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/Linux-v6.6/arch/x86/platform/ce4100/
Dfalconfalls.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
26 soc@0 {
27 #address-cells = <1>;
[all …]
/Linux-v6.6/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
Dtaprio.json4 "name": "Add taprio Qdisc to multi-queue device (8 queues)",
15 …e 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 s…
16 "expExitCode": "0",
18 … "matchPattern": "qdisc taprio 1: root refcnt [0-9]+ tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2",
26 "name": "Add taprio Qdisc with multiple sched-entry",
37 … 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 sched-entry S 01 300000 s…
38 "expExitCode": "0",
40 "matchPattern": "index [0-9]+ cmd S gatemask 0x[0-9]+ interval [0-9]+00000",
48 "name": "Add taprio Qdisc with txtime-delay",
59 …taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 sched-…
[all …]
/Linux-v6.6/drivers/media/dvb-frontends/
Dstv090x_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 #define STV090x_MID 0xf100
16 #define STV090x_OFFST_MRELEASE_FIELD 0
19 #define STV090x_DACR1 0xf113
22 #define STV090x_OFFST_DACR1_VALUE_FIELD 0
25 #define STV090x_DACR2 0xf114
26 #define STV090x_OFFST_DACR2_VALUE_FIELD 0
29 #define STV090x_OUTCFG 0xf11c
39 #define STV090x_MODECFG 0xf11d
41 #define STV090x_IRQSTATUS3 0xf120
[all …]
/Linux-v6.6/drivers/accel/habanalabs/goya/
Dgoya_security.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2019 HabanaLabs, Ltd.
12 * goya_set_block_as_protected - set the given block as protected
20 u32 pb_addr = base - CFG_BASE + PROT_BITS_OFFS; in goya_pb_set_block()
22 while (pb_addr & 0xFFF) { in goya_pb_set_block()
23 WREG32(pb_addr, 0); in goya_pb_set_block()
34 u64 mmMME_SBB_POWER_ECO1 = 0xDFF60, in goya_init_mme_protection_bits()
35 mmMME_SBB_POWER_ECO2 = 0xDFF64; in goya_init_mme_protection_bits()
67 pb_addr = (mmMME_DUMMY & ~0xFFF) + PROT_BITS_OFFS; in goya_init_mme_protection_bits()
68 word_offset = ((mmMME_DUMMY & PROT_BITS_OFFS) >> 7) << 2; in goya_init_mme_protection_bits()
[all …]
/Linux-v6.6/drivers/gpu/drm/panel/
Dpanel-truly-nt35597.c1 // SPDX-License-Identifier: GPL-2.0
64 struct mipi_dsi_device *dsi[2];
78 { { 0xff, 0x20 }, 2 },
79 { { 0xfb, 0x01 }, 2 },
80 { { 0x00, 0x01 }, 2 },
81 { { 0x01, 0x55 }, 2 },
82 { { 0x02, 0x45 }, 2 },
83 { { 0x05, 0x40 }, 2 },
84 { { 0x06, 0x19 }, 2 },
85 { { 0x07, 0x1e }, 2 },
[all …]
/Linux-v6.6/arch/xtensa/variants/test_kc705_be/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 2 /* number of coprocessors */
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
48 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
50 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
53 #define XCHAL_CP0_SA_SIZE 0
[all …]
/Linux-v6.6/arch/xtensa/variants/test_kc705_hifi/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
35 #define XCHAL_CP_NUM 2 /* number of coprocessors */
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
48 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
50 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
53 #define XCHAL_CP0_SA_SIZE 0
[all …]
/Linux-v6.6/arch/arm64/crypto/
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
8 * it under the terms of the GNU General Public License version 2 as
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
17 .set .Lv\b\().2d, \b
21 .inst 0xce608000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
25 .inst 0xce608400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
29 .inst 0xcec08000 | .L\rd | (.L\rn << 5)
33 .inst 0xce608800 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
37 * The SHA-512 round constants
[all …]
/Linux-v6.6/drivers/phy/rockchip/
Dphy-rockchip-inno-hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Author: Zheng Yang <zhengyang@rock-chips.com>
10 #include <linux/clk-provider.h>
16 #include <linux/nvmem-consumer.h>
25 /* REG: 0x00 */
26 #define RK3228_PRE_PLL_REFCLK_SEL_PCLK BIT(0)
27 /* REG: 0x01 */
28 #define RK3228_BYPASS_RXSENSE_EN BIT(2)
30 #define RK3228_BYPASS_PLLPD_EN BIT(0)
31 /* REG: 0x02 */
[all …]
Dphy-rockchip-typec.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Chris Zhong <zyw@rock-chips.com>
5 * Kever Yang <kever.yang@rock-chips.com>
7 * The ROCKCHIP Type-C PHY has two PLL clocks. The first PLL clock
8 * is used for USB3, the second PLL clock is used for DP. This Type-C PHY has
24 * 2. DP only mode:
34 * This Type-C PHY driver supports normal and flip orientation. The orientation
40 #include <linux/clk-provider.h>
58 #define CMN_SSM_BANDGAP (0x21 << 2)
59 #define CMN_SSM_BIAS (0x22 << 2)
[all …]
/Linux-v6.6/sound/firewire/dice/
Ddice-weiss.c1 // SPDX-License-Identifier: GPL-2.0
2 // dice-weiss.c - a part of driver for DICE based devices
13 // Weiss DAC202: 192kHz 2-channel DAC
15 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
16 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
19 // Weiss MAN301: 192kHz 2-channel music archive network player
21 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
22 .rx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
25 // Weiss INT202: 192kHz unidirectional 2-channel digital Firewire nterface
27 .tx_pcm_chs = {{2, 2, 2}, {0, 0, 0} },
[all …]
/Linux-v6.6/arch/xtensa/variants/de212/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 0 /* number of coprocessors */
36 #define XCHAL_CP_MAX 0 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
[all …]
/Linux-v6.6/arch/xtensa/variants/csp/include/variant/
Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x80 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
43 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
45 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
48 #define XCHAL_CP0_SA_SIZE 0
50 #define XCHAL_CP1_SA_SIZE 0
52 #define XCHAL_CP2_SA_SIZE 0
[all …]
/Linux-v6.6/drivers/media/i2c/ccs/
Dccs-limits.c1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 /* Copyright (C) 2019--2020 Intel Corporation */
4 * Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs;
8 #include "ccs-limits.h"
9 #include "ccs-regs.h"
12 { CCS_R_FRAME_FORMAT_MODEL_TYPE, 1, 0, "frame_format_model_type" },
13 { CCS_R_FRAME_FORMAT_MODEL_SUBTYPE, 1, 0, "frame_format_model_subtype" },
14 { CCS_R_FRAME_FORMAT_DESCRIPTOR(0), 30, 0, "frame_format_descriptor" },
15 { CCS_R_FRAME_FORMAT_DESCRIPTOR_4(0), 32, 0, "frame_format_descriptor_4" },
16 { CCS_R_ANALOG_GAIN_CAPABILITY, 2, 0, "analog_gain_capability" },
[all …]
/Linux-v6.6/arch/mips/kernel/
Dmips-r2-to-r6-emul.c28 #include <asm/mips-r2-to-r6-emul.h>
59 int mipsr2_emulation = 0;
65 pr_info("MIPS R2-to-R6 Emulator Enabled!"); in mipsr2emu_enable()
72 * mipsr6_emul - Emulate some frequent R2/R5/R6 instructions in delay slot
83 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
84 (s32)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
86 return 0; in mipsr6_emul()
92 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
93 (s64)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
95 return 0; in mipsr6_emul()
[all …]
/Linux-v6.6/arch/arm/mach-omap1/
Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtw89/
Drtw8852c_table.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2022 Realtek Corporation
10 {0xF0FF0000, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03400FF, 0x00000002},
13 {0xF03500FF, 0x00000003},
14 {0xF03600FF, 0x00000004},
15 {0x70C, 0x00000020},
16 {0x704, 0x601E0100},
17 {0x4000, 0x00000000},
[all …]
/Linux-v6.6/drivers/staging/fbtft/
Dfb_ssd1351.c1 // SPDX-License-Identifier: GPL-2.0
15 #define DEFAULT_GAMMA "0 2 2 2 2 2 2 2 " \
16 "2 2 2 2 2 2 2 2 " \
17 "2 2 2 2 2 2 2 2 " \
18 "2 2 2 2 2 2 2 2 " \
19 "2 2 2 2 2 2 2 2 " \
20 "2 2 2 2 2 2 2 2 " \
21 "2 2 2 2 2 2 2 2 " \
22 "2 2 2 2 2 2 2" \
28 if (par->pdata && in init_display()
[all …]
Dfb_ssd1331.c1 // SPDX-License-Identifier: GPL-2.0
16 #define DEFAULT_GAMMA "0 2 2 2 2 2 2 2 " \
17 "2 2 2 2 2 2 2 2 " \
18 "2 2 2 2 2 2 2 2 " \
19 "2 2 2 2 2 2 2 2 " \
20 "2 2 2 2 2 2 2 2 " \
21 "2 2 2 2 2 2 2 2 " \
22 "2 2 2 2 2 2 2 2 " \
23 "2 2 2 2 2 2 2" \
27 par->fbtftops.reset(par); in init_display()
[all …]
/Linux-v6.6/drivers/video/fbdev/
Datafb_utils.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 * memset(_, 0, _). However their five instances add at least a kilobyte
22 * would be faster. I suspect not for simple text system - not much
30 * Unaligned read/write used requires 68020+ - think this is a problem?
52 return 0; in fb_memclear_small()
55 " lsr.l #1,%1 ; jcc 1f ; move.b %2,-(%0)\n" in fb_memclear_small()
56 "1: lsr.l #1,%1 ; jcc 1f ; move.w %2,-(%0)\n" in fb_memclear_small()
57 "1: lsr.l #1,%1 ; jcc 1f ; move.l %2,-(%0)\n" in fb_memclear_small()
58 "1: lsr.l #1,%1 ; jcc 1f ; move.l %2,-(%0) ; move.l %2,-(%0)\n" in fb_memclear_small()
61 : "d" (0), "0" ((char *)s + count), "1" (count)); in fb_memclear_small()
[all …]
/Linux-v6.6/drivers/net/dsa/hirschmann/
Dhellcreek.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
6 * Copyright (C) 2019-2021 Linutronix GmbH
20 #include <linux/platform_data/hirschmann-hellcreek.h>
27 * - 0: CPU
28 * - 1: Tunnel
29 * - 2: TSN front port 1
30 * - 3: TSN front port 2
31 * - ...
33 #define CPU_PORT 0
36 #define HELLCREEK_VLAN_NO_MEMBER 0x0
[all …]
/Linux-v6.6/drivers/gpu/drm/tests/
Ddrm_rect_test.c1 // SPDX-License-Identifier: GPL-2.0
19 KUNIT_EXPECT_EQ(test, r->x1, expected->x1); in drm_rect_compare()
20 KUNIT_EXPECT_EQ(test, r->y1, expected->y1); in drm_rect_compare()
34 drm_rect_init(&src, 0, 0, 0, 0); in drm_test_rect_clip_scaled_div_by_zero()
35 drm_rect_init(&dst, 0, 0, 0, 0); in drm_test_rect_clip_scaled_div_by_zero()
42 drm_rect_init(&src, 0, 0, 0, 0); in drm_test_rect_clip_scaled_div_by_zero()
43 drm_rect_init(&dst, 3, 3, 0, 0); in drm_test_rect_clip_scaled_div_by_zero()
57 drm_rect_init(&src, 0, 0, 1 << 16, 1 << 16); in drm_test_rect_clip_scaled_not_clipped()
58 drm_rect_init(&dst, 0, 0, 1, 1); in drm_test_rect_clip_scaled_not_clipped()
59 drm_rect_init(&clip, 0, 0, 1, 1); in drm_test_rect_clip_scaled_not_clipped()
[all …]
/Linux-v6.6/drivers/pinctrl/mediatek/
Dpinctrl-mt8365.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/mt65xx.h>
14 #include "pinctrl-mtk-common.h"
15 #include "pinctrl-mtk-mt8365.h"
18 /* 0E4E8SR 4/8/12/16 */
19 MTK_DRV_GRP(4, 16, 1, 2, 4),
20 /* 0E2E4SR 2/4/6/8 */
21 MTK_DRV_GRP(2, 8, 1, 2, 2),
22 /* E8E4E2 2/4/6/8/10/12/14/16 */
23 MTK_DRV_GRP(2, 16, 0, 2, 2)
[all …]
/Linux-v6.6/arch/xtensa/lib/
Dmodsi3.S1 /* SPDX-License-Identifier: GPL-2.0-or-later WITH GCC-exception-2.0 */
15 bltui a3, 2, .Lle_one /* check if udivisor <= 1 */
20 sub a4, a4, a5 /* count = udivisor_shift - udividend_shift */
24 /* test-subtract-and-shift loop */
34 addi a4, a4, -1
44 neg a2, a2 /* if (dividend < 0), return -udividend */
58 movi a2, 0
73 .byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
74 .byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
79 .byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
[all …]
/Linux-v6.6/Documentation/userspace-api/media/v4l/
Dsubdev-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
17 :widths: 1 1 2
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
[all …]

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