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/Linux-v6.6/Documentation/userspace-api/media/v4l/
Dpixfmt-rgb.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
56 noted by the presence of bit 31 in the 4CC value), and on the number of bits
[all …]
Dpixfmt-srggb10-ipu3.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
39 - B\ :sub:`0000low`
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Dsubdev-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
23 - ``height``
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Dmetafmt-vsp1-hgo.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-meta-fmt-vsp1-hgo:
9 Renesas R-Car VSP1 1-D Histogram Data
15 This format describes histogram data generated by the Renesas R-Car VSP1 1-D
20 computes the minimum, maximum and sum of all pixels as well as per-channel
28 - In *64 bins normal mode*, the HGO operates on the three channels independently
29 to compute three 64-bins histograms. RGB, YCbCr and HSV image formats are
31 - In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
32 channels to compute a single 64-bins histogram. Only the RGB image format is
34 - In *256 bins normal mode*, the HGO operates on the Y channel to compute a
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Dpixfmt-srggb14p.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB14P:
4 .. _v4l2-pix-fmt-sbggr14p:
5 .. _v4l2-pix-fmt-sgbrg14p:
6 .. _v4l2-pix-fmt-sgrbg14p:
17 14-bit packed Bayer formats
29 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
30 with alternating green-red and green-blue rows. They are conventionally
45 .. flat-table::
46 :header-rows: 0
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Dpixfmt-srggb12p.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB12P:
4 .. _v4l2-pix-fmt-sbggr12p:
5 .. _v4l2-pix-fmt-sgbrg12p:
6 .. _v4l2-pix-fmt-sgrbg12p:
13 12-bit packed Bayer formats
14 ---------------------------
26 Each n-pixel row contains n/2 green samples and n/2 blue or red
27 samples, with alternating green-red and green-blue rows. They are
37 .. flat-table::
[all …]
Dpixfmt-srggb10p.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10P:
4 .. _v4l2-pix-fmt-sbggr10p:
5 .. _v4l2-pix-fmt-sgbrg10p:
6 .. _v4l2-pix-fmt-sgrbg10p:
16 10-bit packed Bayer formats
24 bytes. Each of the first 4 bytes contain the 8 high order bits
28 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
29 with alternating green-red and green-blue rows. They are conventionally
38 .. flat-table::
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Dsubdev-image-processing-full.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 viewBox="-186 71 1174.5119 332.1463"
17 sodipodi:docname="subdev-image-processing-full.svg">
41 inkscape:window-width="1920"
42 inkscape:window-height="997"
45 fit-margin-top="0"
46 fit-margin-left="0"
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Dsubdev-image-processing-scaling-multi-source.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 viewBox="-194 128 1175.0698 319.59442"
17 sodipodi:docname="subdev-image-processing-scaling-multi-source.svg">
41 inkscape:window-width="1920"
42 inkscape:window-height="997"
45 fit-margin-top="0"
46 fit-margin-left="0"
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/Linux-v6.6/drivers/media/platform/samsung/exynos-gsc/
Dgsc-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
6 * Register definition file for Samsung G-Scaler driver
12 /* G-Scaler enable */
18 /* G-Scaler S/W reset */
22 /* G-Scaler IRQ */
29 /* G-Scaler input control */
35 #define GSC_IN_ROT_90 (4 << 16)
55 #define GSC_IN_YUV422_1P (4 << 8)
58 #define GSC_IN_TILE_TYPE_MASK (1 << 4)
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/Linux-v6.6/drivers/gpu/drm/exynos/
Dregs-gsc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* linux/drivers/gpu/drm/exynos/regs-gsc.h
7 * Register definition file for Samsung G-Scaler driver
13 /* G-Scaler enable */
26 #define GSC_ENABLE_ON_CLEAR_MASK (1 << 4)
27 #define GSC_ENABLE_ON_CLEAR_ONESHOT (1 << 4)
33 /* G-Scaler S/W reset */
37 /* G-Scaler IRQ */
45 /* G-Scaler input control */
55 #define GSC_IN_ROT_90 (4 << 16)
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/Linux-v6.6/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main_regs.h1 /* SPDX-License-Identifier: GPL-2.0+
7 /* This file is autogenerated by cml-utils 2023-02-10 11:18:53 +0100.
21 TARGET_ANA_AC_POL = 4,
62 0, 1, 839108, 0, 1, 4, 0, 0, 1, 4)
78 0, 1, 894472, 0, 1, 352, 52, r, 3, 4)
80 #define ANA_AC_OWN_UPSID_OWN_UPSID GENMASK(4, 0)
87 #define ANA_AC_SRC_CFG(g) __REG(TARGET_ANA_AC,\ argument
88 0, 1, 849920, g, 102, 16, 0, 0, 1, 4)
91 #define ANA_AC_SRC_CFG1(g) __REG(TARGET_ANA_AC,\ argument
92 0, 1, 849920, g, 102, 16, 4, 0, 1, 4)
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/Linux-v6.6/include/dt-bindings/memory/
Dmt8186-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
22 * modules dma-address-region larbs-ports
23 * disp 0 ~ 4G larb0/1/2
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
26 * N/A 12G ~ 16G
28 * CCU1 0x24400_0000 ~ 0x247ff_ffff larb14: port 4/5
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Dmt8195-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <dt-bindings/memory/mtk-memory-port.h>
13 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
16 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
20 * modules dma-address-region larbs-ports
21 * disp 0 ~ 4G larb0/1/2/3
22 * vcodec 4G ~ 8G larb19/20/21/22/23/24
23 * cam/mdp 8G ~ 12G the other larbs.
24 * N/A 12G ~ 16G
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
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/Linux-v6.6/tools/perf/bench/
Dnuma.c1 // SPDX-License-Identifier: GPL-2.0
5 * numa: Simulate NUMA-sensitive workload and measure their NUMA performance
10 #include <subcmd/parse-options.h>
46 * Regular printout to the terminal, suppressed if -q is specified:
48 #define tprintf(x...) do { if (g && g->p.show_details >= 0) printf(x); } while (0)
54 #define dprintf(x...) do { if (g && g->p.show_details >= 1) printf(x); } while (0)
128 /* Affinity options -C and -N: */
134 /* Global, read-writable area, accessible to all processes and threads: */
162 static struct global_info *g = NULL; variable
173 OPT_STRING('G', "mb_global" , &p0.mb_global_str, "MB", "global memory (MBs)"),
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/Linux-v6.6/drivers/staging/vc04_services/vchiq-mmal/
Dmmal-encodings.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 #define MMAL_ENCODING_H264 MMAL_FOURCC('H', '2', '6', '4')
18 #define MMAL_ENCODING_MP4V MMAL_FOURCC('M', 'P', '4', 'V')
30 #define MMAL_ENCODING_MJPEG MMAL_FOURCC('M', 'J', 'P', 'G')
32 #define MMAL_ENCODING_JPEG MMAL_FOURCC('J', 'P', 'E', 'G')
33 #define MMAL_ENCODING_GIF MMAL_FOURCC('G', 'I', 'F', ' ')
34 #define MMAL_ENCODING_PNG MMAL_FOURCC('P', 'N', 'G', ' ')
36 #define MMAL_ENCODING_TGA MMAL_FOURCC('T', 'G', 'A', ' ')
39 #define MMAL_ENCODING_I420 MMAL_FOURCC('I', '4', '2', '0')
40 #define MMAL_ENCODING_I420_SLICE MMAL_FOURCC('S', '4', '2', '0')
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/Linux-v6.6/drivers/iio/accel/
Dbma400.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * Read-Only Registers
43 #define BMA400_INT_ENG_OVRUN_MSK BIT(4)
63 * Read-write configuration registers
81 #define BMA400_NP_OSR_SHIFT 4
86 #define BMA400_NP_OSR_MASK GENMASK(5, 4)
119 #define BMA400_TAP_QUIETDT_MSK GENMASK(5, 4)
120 #define BMA400_TAP_TIM_LIST_LEN 4
124 * converting to micro values for +-2g range.
126 * For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2
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/Linux-v6.6/arch/x86/crypto/
Dsha256-avx2-asm.S2 # Implement fast SHA-256 with AVX2 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
48 # This code schedules 2 blocks at a time, with 4 lanes per block
60 # Add reg to mem using reg-mem add and store
87 SHUF_00BA = %ymm10 # shuffle xBxA -> 00BA
88 SHUF_DC00 = %ymm12 # shuffle xDxC -> DC00
106 g = %r10d define
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Dsha256-avx-asm.S2 # Implement fast SHA-256 with AVX1 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
40 # This code is described in an Intel White-Paper:
41 # "Fast SHA-256 Implementations on Intel Architecture Processors"
47 # This code schedules 1 block at a time, with 4 lanes per block
59 # Add reg to mem using reg-mem add and store
67 shld $(32-(\p1)), \p2, \p2
94 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
95 SHUF_DC00 = %xmm12 # shuffle xDxC -> DC00
[all …]
Dsha256-ssse3-asm.S2 # Implement fast SHA-256 with SSSE3 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
58 # Add reg to mem using reg-mem add and store
87 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
88 SHUF_DC00 = %xmm11 # shuffle xDxC -> DC00
104 g = %r10d define
138 h = g
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/Linux-v6.6/drivers/staging/most/dim2/
Dhal.c1 // SPDX-License-Identifier: GPL-2.0
3 * hal.c - DIM2 HAL implementation
6 * Copyright (C) 2015-2016, Microchip Technology Germany II GmbH & Co. KG
25 * Number of 32-bit units for DBR map.
29 * 4: block size is 128, max allocation is 4K
37 /* -------------------------------------------------------------------------- */
50 /* -------------------------------------------------------------------------- */
64 /* -------------------------------------------------------------------------- */
84 static struct lld_global_vars_t g = { false }; variable
86 /* -------------------------------------------------------------------------- */
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/Linux-v6.6/drivers/net/ethernet/microchip/lan966x/
Dlan966x_regs.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
3 /* This file is autogenerated by cml-utils 2021-10-10 13:25:08 +0200.
35 #define AFI_PORT_FRM_OUT(g) __REG(TARGET_AFI, 0, 1, 98816, g, 10, 8, 0, 0, 1, 4) argument
44 #define AFI_PORT_CFG(g) __REG(TARGET_AFI, 0, 1, 98816, g, 10, 8, 4, 0, 1, 4) argument
59 #define ANA_ADVLEARN __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 0, 0, 1, 4)
68 #define ANA_VLANMASK __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 8, 0, 1, 4)
71 #define ANA_ANAINTR __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 16, 0, 1, 4)
86 #define ANA_AUTOAGE __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 44, 0, 1, 4)
95 #define ANA_MIRRORPORTS __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 60, 0, 1, 4)
104 #define ANA_EMIRRORPORTS __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 64, 0, 1, 4)
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/Linux-v6.6/drivers/net/ethernet/brocade/bna/
Dbfa_defs_mfg_comm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
27 #define BFA_MFG_HDR_LEN 4
30 #define STRSZ(_n) (((_n) + 4) & ~3)
35 BFA_MFG_TYPE_FC8P2 = 825, /*!< 8G 2port FC card */
36 BFA_MFG_TYPE_FC8P1 = 815, /*!< 8G 1port FC card */
37 BFA_MFG_TYPE_FC4P2 = 425, /*!< 4G 2port FC card */
38 BFA_MFG_TYPE_FC4P1 = 415, /*!< 4G 1port FC card */
[all …]
/Linux-v6.6/lib/crypto/
Dblake2s-generic.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
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/Linux-v6.6/include/uapi/drm/
Ddrm_fourcc.h39 * further describe the buffer's format - for example tiling or compression.
42 * ----------------
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
58 * may preserve meaning - such as number of planes - from the fourcc code,
64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
76 * - Kernel and user-space drivers: for drivers it's important that modifiers
80 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users
93 * -----------------------
98 * upstream in-kernel or open source userspace user does not apply.
116 #define DRM_FORMAT_C4 fourcc_code('C', '4', ' ', ' ') /* [7:0] C0:C1 4:4 two pixels/byte */
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