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/Linux-v6.6/drivers/pinctrl/tegra/
Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
1290 .drvup_bit = -1, \
1291 .slwr_bit = -1, \
[all …]
Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
23 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
177 /* All non-GPIO pins follow */
178 #define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
181 /* Non-GPIO pins */
183 #define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
1269 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
1270 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
[all …]
Dpinctrl-tegra234.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
/Linux-v6.6/fs/nls/
Dnls_ucs2_utils.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
26 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
27 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
28 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
29 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
30 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
31 0, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32,
32 -32, -32, -32, -32, -32, /* 060-06f */
33 -32, -32, -32, -32, -32, -32, -32, -32, -32, -32,
[all …]
/Linux-v6.6/arch/x86/kernel/
Duprobes.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * User-space Probes (UProbes) for x86
5 * Copyright (C) IBM Corporation, 2008-2011
21 /* Post-execution fixups. */
41 #define OPCODE1(insn) ((insn)->opcode.bytes[0])
42 #define OPCODE2(insn) ((insn)->opcode.bytes[1])
43 #define OPCODE3(insn) ((insn)->opcode.bytes[2])
44 #define MODRM_REG(insn) X86_MODRM_REG((insn)->modrm.value)
54 * Good-instruction tables for 32-bit apps. This is non-const and volatile
59 * 6c-6f - ins,outs. SEGVs if used in userspace
[all …]
/Linux-v6.6/arch/arm64/boot/dts/hisilicon/
Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/Linux-v6.6/drivers/media/dvb-frontends/
Dstv090x_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 #define STV090x_WIDTH_OUTSERRS1_HZ_FIELD 1
33 #define STV090x_WIDTH_OUTSERRS2_HZ_FIELD 1
35 #define STV090x_WIDTH_OUTSERRS3_HZ_FIELD 1
37 #define STV090x_WIDTH_OUTPARRS3_HZ_FIELD 1
43 #define STV090x_WIDTH_SPLL_LOCK_FIELD 1
45 #define STV090x_WIDTH_SSTREAM_LCK_3_FIELD 1
47 #define STV090x_WIDTH_SSTREAM_LCK_2_FIELD 1
49 #define STV090x_WIDTH_SSTREAM_LCK_1_FIELD 1
50 #define STV090x_OFFST_SDVBS1_PRF_2_FIELD 1
[all …]
/Linux-v6.6/drivers/usb/gadget/udc/
Dfusb300_udc.h1 // SPDX-License-Identifier: GPL-2.0
7 * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
21 #define FUSB300_OFFSET_EPSET0(n) (0x20 + (n - 1) * 0x30)
22 #define FUSB300_OFFSET_EPSET1(n) (0x24 + (n - 1) * 0x30)
23 #define FUSB300_OFFSET_EPSET2(n) (0x28 + (n - 1) * 0x30)
24 #define FUSB300_OFFSET_EPFFR(n) (0x2c + (n - 1) * 0x30)
25 #define FUSB300_OFFSET_EPSTRID(n) (0x40 + (n - 1) * 0x30)
54 #define FUSB300_OFFSET_EPPRD_W0(n) (0x520 + (n - 1) * 0x10)
55 #define FUSB300_OFFSET_EPPRD_W1(n) (0x524 + (n - 1) * 0x10)
56 #define FUSB300_OFFSET_EPPRD_W2(n) (0x528 + (n - 1) * 0x10)
[all …]
/Linux-v6.6/drivers/media/platform/qcom/camss/
Dcamss-video.c1 // SPDX-License-Identifier: GPL-2.0
3 * camss-video.c
5 * Qualcomm MSM Camera Subsystem - V4L2 device node
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
11 #include <media/media-entity.h>
12 #include <media/v4l2-dev.h>
13 #include <media/v4l2-device.h>
14 #include <media/v4l2-ioctl.h>
15 #include <media/v4l2-mc.h>
[all …]
/Linux-v6.6/drivers/media/v4l2-core/
Dv4l2-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
27 * Video4linux 1/2 integration by Justin Schoeman
46 #include <media/v4l2-common.h>
47 #include <media/v4l2-device.h>
48 #include <media/v4l2-ctrls.h>
73 v4l2_ctrl_fill(qctrl->id, &name, &qctrl->type, in v4l2_ctrl_query_fill()
74 &min, &max, &step, &def, &qctrl->flags); in v4l2_ctrl_query_fill()
77 return -EINVAL; in v4l2_ctrl_query_fill()
79 qctrl->minimum = min; in v4l2_ctrl_query_fill()
80 qctrl->maximum = max; in v4l2_ctrl_query_fill()
[all …]
/Linux-v6.6/Documentation/userspace-api/media/v4l/
Dcrop.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
25 ….48 8.19,17.01 -46.93,23.31 29.61,-25.515 -38.12,8.505 47.25,-23.31 z m -1559.25,800.73 -8.5,-17.0…
27 inkscape:connector-curvature="0"
28 style="clip-rule:evenodd" /></clipPath><clipPath
31 …-1626 -1,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2…
32 -1,0 0,1 -1,0 0,1 -1,0 0,1 -2,0 0,1 -1,0 0,2 2,0 0,-1 4,0 0,-1 5,0 0,-1 4,0 0,-1 5,0 0,-1 5,0 0,-1 …
34 inkscape:connector-curvature="0"
[all …]
/Linux-v6.6/drivers/clk/ingenic/
Dx1830-cgu.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
59 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_enable()
60 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_enable()
69 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_disable()
70 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_disable()
78 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_is_enabled()
79 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_is_enabled()
93 0x0, 0x1, -1, 0x2, -1, -1, -1, 0x3,
[all …]
Djz4740-cgu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
38 #define PLLCTL_STABLE (1 << 10)
39 #define PLLCTL_BYPASS (1 << 9)
40 #define PLLCTL_ENABLE (1 << 8)
43 #define LCR_SLEEP (1 << 0)
46 #define CLKGR_UDC (1 << 11)
51 0x0, 0x1, -1, 0x3,
55 1, 2, 3, 4, 6, 8, 12, 16, 24, 32,
[all …]
Djz4725b-cgu.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
36 0x0, 0x1, -1, 0x3,
40 1, 2, 3, 4, 6, 8,
44 2, 1,
56 .parents = { JZ4725B_CLK_EXT, -1, -1, -1 },
59 .rate_multiplier = 1,
81 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 },
83 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1, 0,
[all …]
/Linux-v6.6/include/uapi/linux/
Dmap_to_7segment.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
10 * of (ASCII) characters to a 7-segments notation.
15 * Notation: +-a-+
17 * +-g-+
19 * +-d-+
45 * return -EINVAL;
52 * 2005-05-31 RFC linux-kernel@vger.kernel.org
58 #define BIT_SEG7_B 1
72 return c >= 0 && c < sizeof(map->table) ? map->table[c] : -EINVAL; in map_to_seg7()
97 _SEG7('!',0,0,0,0,1,1,0), _SEG7('"',0,1,0,0,0,1,0), _SEG7('#',0,1,1,0,1,1,0),\
[all …]
/Linux-v6.6/arch/arm/mach-omap1/
Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
[all …]
/Linux-v6.6/Documentation/driver-api/media/drivers/ccs/
Dccs-regs.asc1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
13 # v1.1 defined in version 1.1
23 - e GRBG 0
24 - e RGGB 1
[all …]
/Linux-v6.6/arch/alpha/kernel/
Dsys_sable.c1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
58 * 0-7 (char at 536)
59 * 8-15 (char at 53a)
60 * 16-23 (char at 53c)
65 *------------------------------------------
67 * 1 NCR810 (builtin) 33
70 * 4 PCI slot 1 35
72 * 6 keyboard 1
76 *10 EISA irq 3 -
[all …]
/Linux-v6.6/sound/soc/fsl/
Dfsl_esai.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * fsl_esai.h - ALSA ESAI interface for the Freescale i.MX SoC
52 /* ESAI Control Register -- REG_ESAI_ECR 0x8 */
54 #define ESAI_ECR_ETI_MASK (1 << ESAI_ECR_ETI_SHIFT)
55 #define ESAI_ECR_ETI (1 << ESAI_ECR_ETI_SHIFT)
57 #define ESAI_ECR_ETO_MASK (1 << ESAI_ECR_ETO_SHIFT)
58 #define ESAI_ECR_ETO (1 << ESAI_ECR_ETO_SHIFT)
60 #define ESAI_ECR_ERI_MASK (1 << ESAI_ECR_ERI_SHIFT)
61 #define ESAI_ECR_ERI (1 << ESAI_ECR_ERI_SHIFT)
63 #define ESAI_ECR_ERO_MASK (1 << ESAI_ECR_ERO_SHIFT)
[all …]
/Linux-v6.6/tools/testing/selftests/tc-testing/tc-tests/qdiscs/
Dtaprio.json4 "name": "Add taprio Qdisc to multi-queue device (8 queues)",
13 "echo \"1 1 8\" > /sys/bus/netdevsim/new_device"
15 … add dev $ETH root handle 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@…
18 … "matchPattern": "qdisc taprio 1: root refcnt [0-9]+ tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2",
19 "matchCount": "1",
21 "echo \"1\" > /sys/bus/netdevsim/del_device"
26 "name": "Add taprio Qdisc with multiple sched-entry",
35 "echo \"1 1 8\" > /sys/bus/netdevsim/new_device"
37 …e 1: taprio num_tc 3 map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@0 1@0 base-time 1000000000 s…
40 "matchPattern": "index [0-9]+ cmd S gatemask 0x[0-9]+ interval [0-9]+00000",
[all …]
/Linux-v6.6/drivers/gpu/drm/i915/gt/shaders/clear_kernel/
Dhsw.asm1 // SPDX-License-Identifier: MIT
9 * 1. Clear all 64 GRF registers assigned to the kernel with designated value;
15 mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N };
20 * DW 1.0 - Block Offset to write Render Cache
21 * DW 1.1 [15:0] - Clear Word
22 * DW 1.2 - Delay iterations
23 * DW 1.3 - Enable Instrumentation (only for debug)
24 * DW 1.4 - Rsvd (intended for context ID)
25 * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount
26 * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count)
[all …]
Divb.asm1 // SPDX-License-Identifier: MIT
9 * 1. Clear all 64 GRF registers assigned to the kernel with designated value;
15 mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N };
20 * DW 1.0 - Block Offset to write Render Cache
21 * DW 1.1 [15:0] - Clear Word
22 * DW 1.2 - Delay iterations
23 * DW 1.3 - Enable Instrumentation (only for debug)
24 * DW 1.4 - Rsvd (intended for context ID)
25 * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount
26 * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count)
[all …]
/Linux-v6.6/drivers/phy/rockchip/
Dphy-rockchip-inno-hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Author: Zheng Yang <zhengyang@rock-chips.com>
10 #include <linux/clk-provider.h>
16 #include <linux/nvmem-consumer.h>
29 #define RK3228_BYPASS_PWRON_EN BIT(1)
46 #define RK3228_RXSENSE_DATA_CH1_ENABLE BIT(1)
76 #define RK3228_PRE_PLL_TMDSCLK_DIV_B_MASK GENMASK(1, 0)
77 #define RK3228_PRE_PLL_TMDSCLK_DIV_B(x) UPDATE(x, 1, 0)
98 #define RK3228_TMDS_DATA_CH0_TA(x) UPDATE(x, 1, 0)
104 #define RK3228_TMDS_DATA_CH0_PRE_EMPHASIS_MASK GENMASK(1, 0)
[all …]
/Linux-v6.6/arch/arm/boot/dts/hisilicon/
Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 HiSilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]

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