1 /*
2 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * header file for Samsung EXYNOS5 SoC series G-Scaler driver
6
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #ifndef GSC_CORE_H_
13 #define GSC_CORE_H_
14
15 #include <linux/delay.h>
16 #include <linux/sched.h>
17 #include <linux/spinlock.h>
18 #include <linux/types.h>
19 #include <linux/videodev2.h>
20 #include <linux/io.h>
21 #include <linux/pm_runtime.h>
22 #include <media/videobuf2-v4l2.h>
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-mem2mem.h>
26 #include <media/v4l2-mediabus.h>
27 #include <media/videobuf2-dma-contig.h>
28
29 #include "gsc-regs.h"
30
31 #define CONFIG_VB2_GSC_DMA_CONTIG 1
32 #define GSC_MODULE_NAME "exynos-gsc"
33
34 #define GSC_SHUTDOWN_TIMEOUT ((100*HZ)/1000)
35 #define GSC_MAX_DEVS 4
36 #define GSC_MAX_CLOCKS 4
37 #define GSC_M2M_BUF_NUM 0
38 #define GSC_MAX_CTRL_NUM 10
39 #define GSC_SC_ALIGN_4 4
40 #define GSC_SC_ALIGN_2 2
41 #define DEFAULT_CSC_EQ 1
42 #define DEFAULT_CSC_RANGE 1
43
44 #define GSC_PARAMS (1 << 0)
45 #define GSC_SRC_FMT (1 << 1)
46 #define GSC_DST_FMT (1 << 2)
47 #define GSC_CTX_M2M (1 << 3)
48 #define GSC_CTX_STOP_REQ (1 << 6)
49 #define GSC_CTX_ABORT (1 << 7)
50
51 enum gsc_dev_flags {
52 /* for m2m node */
53 ST_M2M_OPEN,
54 ST_M2M_RUN,
55 ST_M2M_PEND,
56 ST_M2M_SUSPENDED,
57 ST_M2M_SUSPENDING,
58 };
59
60 enum gsc_irq {
61 GSC_IRQ_DONE,
62 GSC_IRQ_OVERRUN
63 };
64
65 /**
66 * enum gsc_datapath - the path of data used for G-Scaler
67 * @GSC_CAMERA: from camera
68 * @GSC_DMA: from/to DMA
69 * @GSC_LOCAL: to local path
70 * @GSC_WRITEBACK: from FIMD
71 */
72 enum gsc_datapath {
73 GSC_CAMERA = 0x1,
74 GSC_DMA,
75 GSC_MIXER,
76 GSC_FIMD,
77 GSC_WRITEBACK,
78 };
79
80 enum gsc_color_fmt {
81 GSC_RGB = 0x1,
82 GSC_YUV420 = 0x2,
83 GSC_YUV422 = 0x4,
84 GSC_YUV444 = 0x8,
85 };
86
87 enum gsc_yuv_fmt {
88 GSC_LSB_Y = 0x10,
89 GSC_LSB_C,
90 GSC_CBCR = 0x20,
91 GSC_CRCB,
92 };
93
94 #define fh_to_ctx(__fh) container_of(__fh, struct gsc_ctx, fh)
95 #define is_rgb(x) (!!((x) & 0x1))
96 #define is_yuv420(x) (!!((x) & 0x2))
97 #define is_yuv422(x) (!!((x) & 0x4))
98
99 #define gsc_m2m_active(dev) test_bit(ST_M2M_RUN, &(dev)->state)
100 #define gsc_m2m_pending(dev) test_bit(ST_M2M_PEND, &(dev)->state)
101 #define gsc_m2m_opened(dev) test_bit(ST_M2M_OPEN, &(dev)->state)
102
103 #define ctrl_to_ctx(__ctrl) \
104 container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler)
105 /**
106 * struct gsc_fmt - the driver's internal color format data
107 * @mbus_code: Media Bus pixel code, -1 if not applicable
108 * @name: format description
109 * @pixelformat: the fourcc code for this format, 0 if not applicable
110 * @yorder: Y/C order
111 * @corder: Chrominance order control
112 * @num_planes: number of physically non-contiguous data planes
113 * @nr_comp: number of physically contiguous data planes
114 * @depth: per plane driver's private 'number of bits per pixel'
115 * @flags: flags indicating which operation mode format applies to
116 */
117 struct gsc_fmt {
118 u32 mbus_code;
119 char *name;
120 u32 pixelformat;
121 u32 color;
122 u32 yorder;
123 u32 corder;
124 u16 num_planes;
125 u16 num_comp;
126 u8 depth[VIDEO_MAX_PLANES];
127 u32 flags;
128 };
129
130 /**
131 * struct gsc_input_buf - the driver's video buffer
132 * @vb: videobuf2 buffer
133 * @list : linked list structure for buffer queue
134 * @idx : index of G-Scaler input buffer
135 */
136 struct gsc_input_buf {
137 struct vb2_v4l2_buffer vb;
138 struct list_head list;
139 int idx;
140 };
141
142 /**
143 * struct gsc_addr - the G-Scaler physical address set
144 * @y: luminance plane address
145 * @cb: Cb plane address
146 * @cr: Cr plane address
147 */
148 struct gsc_addr {
149 dma_addr_t y;
150 dma_addr_t cb;
151 dma_addr_t cr;
152 };
153
154 /* struct gsc_ctrls - the G-Scaler control set
155 * @rotate: rotation degree
156 * @hflip: horizontal flip
157 * @vflip: vertical flip
158 * @global_alpha: the alpha value of current frame
159 */
160 struct gsc_ctrls {
161 struct v4l2_ctrl *rotate;
162 struct v4l2_ctrl *hflip;
163 struct v4l2_ctrl *vflip;
164 struct v4l2_ctrl *global_alpha;
165 };
166
167 /**
168 * struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler
169 * @pre_shfactor: pre sclaer shift factor
170 * @pre_hratio: horizontal ratio of the prescaler
171 * @pre_vratio: vertical ratio of the prescaler
172 * @main_hratio: the main scaler's horizontal ratio
173 * @main_vratio: the main scaler's vertical ratio
174 */
175 struct gsc_scaler {
176 u32 pre_shfactor;
177 u32 pre_hratio;
178 u32 pre_vratio;
179 u32 main_hratio;
180 u32 main_vratio;
181 };
182
183 struct gsc_dev;
184
185 struct gsc_ctx;
186
187 /**
188 * struct gsc_frame - source/target frame properties
189 * @f_width: SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH
190 * @f_height: SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT
191 * @crop: cropped(source)/scaled(destination) size
192 * @payload: image size in bytes (w x h x bpp)
193 * @addr: image frame buffer physical addresses
194 * @fmt: G-Scaler color format pointer
195 * @colorspace: value indicating v4l2_colorspace
196 * @alpha: frame's alpha value
197 */
198 struct gsc_frame {
199 u32 f_width;
200 u32 f_height;
201 struct v4l2_rect crop;
202 unsigned long payload[VIDEO_MAX_PLANES];
203 struct gsc_addr addr;
204 const struct gsc_fmt *fmt;
205 u32 colorspace;
206 u8 alpha;
207 };
208
209 /**
210 * struct gsc_m2m_device - v4l2 memory-to-memory device data
211 * @vfd: the video device node for v4l2 m2m mode
212 * @m2m_dev: v4l2 memory-to-memory device data
213 * @ctx: hardware context data
214 * @refcnt: the reference counter
215 */
216 struct gsc_m2m_device {
217 struct video_device *vfd;
218 struct v4l2_m2m_dev *m2m_dev;
219 struct gsc_ctx *ctx;
220 int refcnt;
221 };
222
223 /**
224 * struct gsc_pix_max - image pixel size limits in various IP configurations
225 *
226 * @org_scaler_bypass_w: max pixel width when the scaler is disabled
227 * @org_scaler_bypass_h: max pixel height when the scaler is disabled
228 * @org_scaler_input_w: max pixel width when the scaler is enabled
229 * @org_scaler_input_h: max pixel height when the scaler is enabled
230 * @real_rot_dis_w: max pixel src cropped height with the rotator is off
231 * @real_rot_dis_h: max pixel src croppped width with the rotator is off
232 * @real_rot_en_w: max pixel src cropped width with the rotator is on
233 * @real_rot_en_h: max pixel src cropped height with the rotator is on
234 * @target_rot_dis_w: max pixel dst scaled width with the rotator is off
235 * @target_rot_dis_h: max pixel dst scaled height with the rotator is off
236 * @target_rot_en_w: max pixel dst scaled width with the rotator is on
237 * @target_rot_en_h: max pixel dst scaled height with the rotator is on
238 */
239 struct gsc_pix_max {
240 u16 org_scaler_bypass_w;
241 u16 org_scaler_bypass_h;
242 u16 org_scaler_input_w;
243 u16 org_scaler_input_h;
244 u16 real_rot_dis_w;
245 u16 real_rot_dis_h;
246 u16 real_rot_en_w;
247 u16 real_rot_en_h;
248 u16 target_rot_dis_w;
249 u16 target_rot_dis_h;
250 u16 target_rot_en_w;
251 u16 target_rot_en_h;
252 };
253
254 /**
255 * struct gsc_pix_min - image pixel size limits in various IP configurations
256 *
257 * @org_w: minimum source pixel width
258 * @org_h: minimum source pixel height
259 * @real_w: minimum input crop pixel width
260 * @real_h: minimum input crop pixel height
261 * @target_rot_dis_w: minimum output scaled pixel height when rotator is off
262 * @target_rot_dis_h: minimum output scaled pixel height when rotator is off
263 * @target_rot_en_w: minimum output scaled pixel height when rotator is on
264 * @target_rot_en_h: minimum output scaled pixel height when rotator is on
265 */
266 struct gsc_pix_min {
267 u16 org_w;
268 u16 org_h;
269 u16 real_w;
270 u16 real_h;
271 u16 target_rot_dis_w;
272 u16 target_rot_dis_h;
273 u16 target_rot_en_w;
274 u16 target_rot_en_h;
275 };
276
277 struct gsc_pix_align {
278 u16 org_h;
279 u16 org_w;
280 u16 offset_h;
281 u16 real_w;
282 u16 real_h;
283 u16 target_w;
284 u16 target_h;
285 };
286
287 /**
288 * struct gsc_variant - G-Scaler variant information
289 */
290 struct gsc_variant {
291 struct gsc_pix_max *pix_max;
292 struct gsc_pix_min *pix_min;
293 struct gsc_pix_align *pix_align;
294 u16 in_buf_cnt;
295 u16 out_buf_cnt;
296 u16 sc_up_max;
297 u16 sc_down_max;
298 u16 poly_sc_down_max;
299 u16 pre_sc_down_max;
300 u16 local_sc_down;
301 };
302
303 /**
304 * struct gsc_driverdata - per device type driver data for init time.
305 *
306 * @variant: the variant information for this driver.
307 * @num_entities: the number of g-scalers
308 */
309 struct gsc_driverdata {
310 struct gsc_variant *variant[GSC_MAX_DEVS];
311 const char *clk_names[GSC_MAX_CLOCKS];
312 int num_clocks;
313 int num_entities;
314 };
315
316 /**
317 * struct gsc_dev - abstraction for G-Scaler entity
318 * @slock: the spinlock protecting this data structure
319 * @lock: the mutex protecting this data structure
320 * @pdev: pointer to the G-Scaler platform device
321 * @variant: the IP variant information
322 * @id: G-Scaler device index (0..GSC_MAX_DEVS)
323 * @clock: clocks required for G-Scaler operation
324 * @regs: the mapped hardware registers
325 * @irq_queue: interrupt handler waitqueue
326 * @m2m: memory-to-memory V4L2 device information
327 * @state: flags used to synchronize m2m and capture mode operation
328 * @vdev: video device for G-Scaler instance
329 */
330 struct gsc_dev {
331 spinlock_t slock;
332 struct mutex lock;
333 struct platform_device *pdev;
334 struct gsc_variant *variant;
335 u16 id;
336 int num_clocks;
337 struct clk *clock[GSC_MAX_CLOCKS];
338 void __iomem *regs;
339 wait_queue_head_t irq_queue;
340 struct gsc_m2m_device m2m;
341 unsigned long state;
342 struct video_device vdev;
343 struct v4l2_device v4l2_dev;
344 };
345
346 /**
347 * gsc_ctx - the device context data
348 * @s_frame: source frame properties
349 * @d_frame: destination frame properties
350 * @in_path: input mode (DMA or camera)
351 * @out_path: output mode (DMA or FIFO)
352 * @scaler: image scaler properties
353 * @flags: additional flags for image conversion
354 * @state: flags to keep track of user configuration
355 * @gsc_dev: the G-Scaler device this context applies to
356 * @m2m_ctx: memory-to-memory device context
357 * @fh: v4l2 file handle
358 * @ctrl_handler: v4l2 controls handler
359 * @gsc_ctrls G-Scaler control set
360 * @ctrls_rdy: true if the control handler is initialized
361 */
362 struct gsc_ctx {
363 struct gsc_frame s_frame;
364 struct gsc_frame d_frame;
365 enum gsc_datapath in_path;
366 enum gsc_datapath out_path;
367 struct gsc_scaler scaler;
368 u32 flags;
369 u32 state;
370 int rotation;
371 unsigned int hflip:1;
372 unsigned int vflip:1;
373 struct gsc_dev *gsc_dev;
374 struct v4l2_m2m_ctx *m2m_ctx;
375 struct v4l2_fh fh;
376 struct v4l2_ctrl_handler ctrl_handler;
377 struct gsc_ctrls gsc_ctrls;
378 bool ctrls_rdy;
379 enum v4l2_colorspace out_colorspace;
380 };
381
382 void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm);
383 int gsc_register_m2m_device(struct gsc_dev *gsc);
384 void gsc_unregister_m2m_device(struct gsc_dev *gsc);
385 void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state);
386
387 u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);
388 const struct gsc_fmt *get_format(int index);
389 const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index);
390 int gsc_enum_fmt_mplane(struct v4l2_fmtdesc *f);
391 int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
392 void gsc_set_frame_size(struct gsc_frame *frame, int width, int height);
393 int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
394 void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h);
395 int gsc_g_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr);
396 int gsc_try_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr);
397 int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
398 u32 *ratio);
399 void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh);
400 void gsc_check_src_scale_info(struct gsc_variant *var,
401 struct gsc_frame *s_frame,
402 u32 *wratio, u32 tx, u32 ty, u32 *hratio);
403 int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
404 int dh, int rot, int out_path);
405 int gsc_set_scaler_info(struct gsc_ctx *ctx);
406 int gsc_ctrls_create(struct gsc_ctx *ctx);
407 void gsc_ctrls_delete(struct gsc_ctx *ctx);
408 int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
409 struct gsc_frame *frame, struct gsc_addr *addr);
410
gsc_ctx_state_lock_set(u32 state,struct gsc_ctx * ctx)411 static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx)
412 {
413 unsigned long flags;
414
415 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
416 ctx->state |= state;
417 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
418 }
419
gsc_ctx_state_lock_clear(u32 state,struct gsc_ctx * ctx)420 static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx)
421 {
422 unsigned long flags;
423
424 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
425 ctx->state &= ~state;
426 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
427 }
428
is_tiled(const struct gsc_fmt * fmt)429 static inline int is_tiled(const struct gsc_fmt *fmt)
430 {
431 return fmt->pixelformat == V4L2_PIX_FMT_NV12MT_16X16;
432 }
433
gsc_hw_enable_control(struct gsc_dev * dev,bool on)434 static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on)
435 {
436 u32 cfg = readl(dev->regs + GSC_ENABLE);
437
438 if (on)
439 cfg |= GSC_ENABLE_ON;
440 else
441 cfg &= ~GSC_ENABLE_ON;
442
443 writel(cfg, dev->regs + GSC_ENABLE);
444 }
445
gsc_hw_get_irq_status(struct gsc_dev * dev)446 static inline int gsc_hw_get_irq_status(struct gsc_dev *dev)
447 {
448 u32 cfg = readl(dev->regs + GSC_IRQ);
449 if (cfg & GSC_IRQ_STATUS_OR_IRQ)
450 return GSC_IRQ_OVERRUN;
451 else
452 return GSC_IRQ_DONE;
453
454 }
455
gsc_hw_clear_irq(struct gsc_dev * dev,int irq)456 static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq)
457 {
458 u32 cfg = readl(dev->regs + GSC_IRQ);
459 if (irq == GSC_IRQ_OVERRUN)
460 cfg |= GSC_IRQ_STATUS_OR_IRQ;
461 else if (irq == GSC_IRQ_DONE)
462 cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ;
463 writel(cfg, dev->regs + GSC_IRQ);
464 }
465
gsc_ctx_state_is_set(u32 mask,struct gsc_ctx * ctx)466 static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx)
467 {
468 unsigned long flags;
469 bool ret;
470
471 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
472 ret = (ctx->state & mask) == mask;
473 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
474 return ret;
475 }
476
ctx_get_frame(struct gsc_ctx * ctx,enum v4l2_buf_type type)477 static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx,
478 enum v4l2_buf_type type)
479 {
480 struct gsc_frame *frame;
481
482 if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) {
483 frame = &ctx->s_frame;
484 } else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) {
485 frame = &ctx->d_frame;
486 } else {
487 pr_err("Wrong buffer/video queue type (%d)", type);
488 return ERR_PTR(-EINVAL);
489 }
490
491 return frame;
492 }
493
494 void gsc_hw_set_sw_reset(struct gsc_dev *dev);
495 int gsc_wait_reset(struct gsc_dev *dev);
496
497 void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask);
498 void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask);
499 void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
500 void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
501 void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
502 int index);
503 void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr,
504 int index);
505 void gsc_hw_set_input_path(struct gsc_ctx *ctx);
506 void gsc_hw_set_in_size(struct gsc_ctx *ctx);
507 void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx);
508 void gsc_hw_set_in_image_format(struct gsc_ctx *ctx);
509 void gsc_hw_set_output_path(struct gsc_ctx *ctx);
510 void gsc_hw_set_out_size(struct gsc_ctx *ctx);
511 void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx);
512 void gsc_hw_set_out_image_format(struct gsc_ctx *ctx);
513 void gsc_hw_set_prescaler(struct gsc_ctx *ctx);
514 void gsc_hw_set_mainscaler(struct gsc_ctx *ctx);
515 void gsc_hw_set_rotation(struct gsc_ctx *ctx);
516 void gsc_hw_set_global_alpha(struct gsc_ctx *ctx);
517 void gsc_hw_set_sfr_update(struct gsc_ctx *ctx);
518
519 #endif /* GSC_CORE_H_ */
520
