1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License as published by
4  * the Free Software Foundation; either version 2 of the License, or
5  * (at your option) any later version.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  *
11  * GNU General Public License for more details.
12  */
13 
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/device.h>
19 #include <linux/string.h>
20 #include <linux/slab.h>
21 #include <linux/fs.h>
22 #include <linux/platform_device.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/firmware.h>
26 #include <linux/io.h>
27 
28 #include "io.h"
29 
30 static inline void byte0_out(unsigned char data);
31 static inline void byte1_out(unsigned char data);
32 static inline void xl_cclk_b(int32_t i);
33 
34 /* Assert and Deassert CCLK */
xl_shift_cclk(int count)35 void xl_shift_cclk(int count)
36 {
37 	int i;
38 
39 	for (i = 0; i < count; i++) {
40 		xl_cclk_b(1);
41 		xl_cclk_b(0);
42 	}
43 }
44 
xl_supported_prog_bus_width(enum wbus bus_bytes)45 int xl_supported_prog_bus_width(enum wbus bus_bytes)
46 {
47 	switch (bus_bytes) {
48 	case bus_1byte:
49 		break;
50 	case bus_2byte:
51 		break;
52 	default:
53 		pr_err("unsupported program bus width %d\n",
54 				bus_bytes);
55 		return 0;
56 	}
57 
58 	return 1;
59 }
60 
61 /* Serialize byte and clock each bit on target's DIN and CCLK pins */
xl_shift_bytes_out(enum wbus bus_byte,unsigned char * pdata)62 void xl_shift_bytes_out(enum wbus bus_byte, unsigned char *pdata)
63 {
64 	/*
65 	 * supports 1 and 2 bytes programming mode
66 	 */
67 	if (likely(bus_byte == bus_2byte))
68 		byte0_out(pdata[0]);
69 
70 	byte1_out(pdata[1]);
71 	xl_shift_cclk(1);
72 }
73 
74 /*
75  * generic bit swap for xilinx SYSTEMMAP FPGA programming
76  */
xl_program_b(int32_t i)77 void xl_program_b(int32_t i)
78 {
79 }
80 
xl_rdwr_b(int32_t i)81 void xl_rdwr_b(int32_t i)
82 {
83 }
84 
xl_csi_b(int32_t i)85 void xl_csi_b(int32_t i)
86 {
87 }
88 
xl_get_init_b(void)89 int xl_get_init_b(void)
90 {
91 	return -1;
92 }
93 
xl_get_done_b(void)94 int xl_get_done_b(void)
95 {
96 	return -1;
97 }
98 
byte0_out(unsigned char data)99 static inline void byte0_out(unsigned char data)
100 {
101 }
102 
byte1_out(unsigned char data)103 static inline void byte1_out(unsigned char data)
104 {
105 }
106 
xl_cclk_b(int32_t i)107 static inline void xl_cclk_b(int32_t i)
108 {
109 }
110 
111 /*
112  * configurable per device type for different I/O config
113  */
xl_init_io(void)114 int xl_init_io(void)
115 {
116 	return -1;
117 }
118