1 /*
2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #include <linux/moduleparam.h>
19 #include <linux/if_arp.h>
20 #include <linux/etherdevice.h>
21
22 #include "wil6210.h"
23 #include "txrx.h"
24 #include "txrx_edma.h"
25 #include "wmi.h"
26 #include "boot_loader.h"
27
28 #define WAIT_FOR_HALP_VOTE_MS 100
29 #define WAIT_FOR_SCAN_ABORT_MS 1000
30 #define WIL_DEFAULT_NUM_RX_STATUS_RINGS 1
31 #define WIL_BOARD_FILE_MAX_NAMELEN 128
32
33 bool debug_fw; /* = false; */
34 module_param(debug_fw, bool, 0444);
35 MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug");
36
37 static u8 oob_mode;
38 module_param(oob_mode, byte, 0444);
39 MODULE_PARM_DESC(oob_mode,
40 " enable out of the box (OOB) mode in FW, for diagnostics and certification");
41
42 bool no_fw_recovery;
43 module_param(no_fw_recovery, bool, 0644);
44 MODULE_PARM_DESC(no_fw_recovery, " disable automatic FW error recovery");
45
46 /* if not set via modparam, will be set to default value of 1/8 of
47 * rx ring size during init flow
48 */
49 unsigned short rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_INIT;
50 module_param(rx_ring_overflow_thrsh, ushort, 0444);
51 MODULE_PARM_DESC(rx_ring_overflow_thrsh,
52 " RX ring overflow threshold in descriptors.");
53
54 /* We allow allocation of more than 1 page buffers to support large packets.
55 * It is suboptimal behavior performance wise in case MTU above page size.
56 */
57 unsigned int mtu_max = TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
mtu_max_set(const char * val,const struct kernel_param * kp)58 static int mtu_max_set(const char *val, const struct kernel_param *kp)
59 {
60 int ret;
61
62 /* sets mtu_max directly. no need to restore it in case of
63 * illegal value since we assume this will fail insmod
64 */
65 ret = param_set_uint(val, kp);
66 if (ret)
67 return ret;
68
69 if (mtu_max < 68 || mtu_max > WIL_MAX_ETH_MTU)
70 ret = -EINVAL;
71
72 return ret;
73 }
74
75 static const struct kernel_param_ops mtu_max_ops = {
76 .set = mtu_max_set,
77 .get = param_get_uint,
78 };
79
80 module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444);
81 MODULE_PARM_DESC(mtu_max, " Max MTU value.");
82
83 static uint rx_ring_order = WIL_RX_RING_SIZE_ORDER_DEFAULT;
84 static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT;
85 static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT;
86
ring_order_set(const char * val,const struct kernel_param * kp)87 static int ring_order_set(const char *val, const struct kernel_param *kp)
88 {
89 int ret;
90 uint x;
91
92 ret = kstrtouint(val, 0, &x);
93 if (ret)
94 return ret;
95
96 if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX))
97 return -EINVAL;
98
99 *((uint *)kp->arg) = x;
100
101 return 0;
102 }
103
104 static const struct kernel_param_ops ring_order_ops = {
105 .set = ring_order_set,
106 .get = param_get_uint,
107 };
108
109 module_param_cb(rx_ring_order, &ring_order_ops, &rx_ring_order, 0444);
110 MODULE_PARM_DESC(rx_ring_order, " Rx ring order; size = 1 << order");
111 module_param_cb(tx_ring_order, &ring_order_ops, &tx_ring_order, 0444);
112 MODULE_PARM_DESC(tx_ring_order, " Tx ring order; size = 1 << order");
113 module_param_cb(bcast_ring_order, &ring_order_ops, &bcast_ring_order, 0444);
114 MODULE_PARM_DESC(bcast_ring_order, " Bcast ring order; size = 1 << order");
115
116 enum {
117 WIL_BOOT_ERR,
118 WIL_BOOT_VANILLA,
119 WIL_BOOT_PRODUCTION,
120 WIL_BOOT_DEVELOPMENT,
121 };
122
123 enum {
124 WIL_SIG_STATUS_VANILLA = 0x0,
125 WIL_SIG_STATUS_DEVELOPMENT = 0x1,
126 WIL_SIG_STATUS_PRODUCTION = 0x2,
127 WIL_SIG_STATUS_CORRUPTED_PRODUCTION = 0x3,
128 };
129
130 #define RST_DELAY (20) /* msec, for loop in @wil_wait_device_ready */
131 #define RST_COUNT (1 + 1000/RST_DELAY) /* round up to be above 1 sec total */
132
133 #define PMU_READY_DELAY_MS (4) /* ms, for sleep in @wil_wait_device_ready */
134
135 #define OTP_HW_DELAY (200) /* usec, loop in @wil_wait_device_ready_talyn_mb */
136 /* round up to be above 2 ms total */
137 #define OTP_HW_COUNT (1 + 2000 / OTP_HW_DELAY)
138
139 /*
140 * Due to a hardware issue,
141 * one has to read/write to/from NIC in 32-bit chunks;
142 * regular memcpy_fromio and siblings will
143 * not work on 64-bit platform - it uses 64-bit transactions
144 *
145 * Force 32-bit transactions to enable NIC on 64-bit platforms
146 *
147 * To avoid byte swap on big endian host, __raw_{read|write}l
148 * should be used - {read|write}l would swap bytes to provide
149 * little endian on PCI value in host endianness.
150 */
wil_memcpy_fromio_32(void * dst,const volatile void __iomem * src,size_t count)151 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
152 size_t count)
153 {
154 u32 *d = dst;
155 const volatile u32 __iomem *s = src;
156
157 for (; count >= 4; count -= 4)
158 *d++ = __raw_readl(s++);
159
160 if (unlikely(count)) {
161 /* count can be 1..3 */
162 u32 tmp = __raw_readl(s);
163
164 memcpy(d, &tmp, count);
165 }
166 }
167
wil_memcpy_toio_32(volatile void __iomem * dst,const void * src,size_t count)168 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
169 size_t count)
170 {
171 volatile u32 __iomem *d = dst;
172 const u32 *s = src;
173
174 for (; count >= 4; count -= 4)
175 __raw_writel(*s++, d++);
176
177 if (unlikely(count)) {
178 /* count can be 1..3 */
179 u32 tmp = 0;
180
181 memcpy(&tmp, s, count);
182 __raw_writel(tmp, d);
183 }
184 }
185
wil_ring_fini_tx(struct wil6210_priv * wil,int id)186 static void wil_ring_fini_tx(struct wil6210_priv *wil, int id)
187 {
188 struct wil_ring *ring = &wil->ring_tx[id];
189 struct wil_ring_tx_data *txdata = &wil->ring_tx_data[id];
190
191 lockdep_assert_held(&wil->mutex);
192
193 if (!ring->va)
194 return;
195
196 wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id);
197
198 spin_lock_bh(&txdata->lock);
199 txdata->dot1x_open = false;
200 txdata->mid = U8_MAX;
201 txdata->enabled = 0; /* no Tx can be in progress or start anew */
202 spin_unlock_bh(&txdata->lock);
203 /* napi_synchronize waits for completion of the current NAPI but will
204 * not prevent the next NAPI run.
205 * Add a memory barrier to guarantee that txdata->enabled is zeroed
206 * before napi_synchronize so that the next scheduled NAPI will not
207 * handle this vring
208 */
209 wmb();
210 /* make sure NAPI won't touch this vring */
211 if (test_bit(wil_status_napi_en, wil->status))
212 napi_synchronize(&wil->napi_tx);
213
214 wil->txrx_ops.ring_fini_tx(wil, ring);
215 }
216
wil_disconnect_cid(struct wil6210_vif * vif,int cid,u16 reason_code,bool from_event)217 static void wil_disconnect_cid(struct wil6210_vif *vif, int cid,
218 u16 reason_code, bool from_event)
219 __acquires(&sta->tid_rx_lock) __releases(&sta->tid_rx_lock)
220 {
221 uint i;
222 struct wil6210_priv *wil = vif_to_wil(vif);
223 struct net_device *ndev = vif_to_ndev(vif);
224 struct wireless_dev *wdev = vif_to_wdev(vif);
225 struct wil_sta_info *sta = &wil->sta[cid];
226
227 might_sleep();
228 wil_dbg_misc(wil, "disconnect_cid: CID %d, MID %d, status %d\n",
229 cid, sta->mid, sta->status);
230 /* inform upper/lower layers */
231 if (sta->status != wil_sta_unused) {
232 if (vif->mid != sta->mid) {
233 wil_err(wil, "STA MID mismatch with VIF MID(%d)\n",
234 vif->mid);
235 /* let FW override sta->mid but be more strict with
236 * user space requests
237 */
238 if (!from_event)
239 return;
240 }
241 if (!from_event) {
242 bool del_sta = (wdev->iftype == NL80211_IFTYPE_AP) ?
243 disable_ap_sme : false;
244 wmi_disconnect_sta(vif, sta->addr, reason_code,
245 true, del_sta);
246 }
247
248 switch (wdev->iftype) {
249 case NL80211_IFTYPE_AP:
250 case NL80211_IFTYPE_P2P_GO:
251 /* AP-like interface */
252 cfg80211_del_sta(ndev, sta->addr, GFP_KERNEL);
253 break;
254 default:
255 break;
256 }
257 sta->status = wil_sta_unused;
258 sta->mid = U8_MAX;
259 }
260 /* reorder buffers */
261 for (i = 0; i < WIL_STA_TID_NUM; i++) {
262 struct wil_tid_ampdu_rx *r;
263
264 spin_lock_bh(&sta->tid_rx_lock);
265
266 r = sta->tid_rx[i];
267 sta->tid_rx[i] = NULL;
268 wil_tid_ampdu_rx_free(wil, r);
269
270 spin_unlock_bh(&sta->tid_rx_lock);
271 }
272 /* crypto context */
273 memset(sta->tid_crypto_rx, 0, sizeof(sta->tid_crypto_rx));
274 memset(&sta->group_crypto_rx, 0, sizeof(sta->group_crypto_rx));
275 /* release vrings */
276 for (i = 0; i < ARRAY_SIZE(wil->ring_tx); i++) {
277 if (wil->ring2cid_tid[i][0] == cid)
278 wil_ring_fini_tx(wil, i);
279 }
280 /* statistics */
281 memset(&sta->stats, 0, sizeof(sta->stats));
282 sta->stats.tx_latency_min_us = U32_MAX;
283 }
284
wil_vif_is_connected(struct wil6210_priv * wil,u8 mid)285 static bool wil_vif_is_connected(struct wil6210_priv *wil, u8 mid)
286 {
287 int i;
288
289 for (i = 0; i < ARRAY_SIZE(wil->sta); i++) {
290 if (wil->sta[i].mid == mid &&
291 wil->sta[i].status == wil_sta_connected)
292 return true;
293 }
294
295 return false;
296 }
297
_wil6210_disconnect(struct wil6210_vif * vif,const u8 * bssid,u16 reason_code,bool from_event)298 static void _wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
299 u16 reason_code, bool from_event)
300 {
301 struct wil6210_priv *wil = vif_to_wil(vif);
302 int cid = -ENOENT;
303 struct net_device *ndev;
304 struct wireless_dev *wdev;
305
306 if (unlikely(!vif))
307 return;
308
309 ndev = vif_to_ndev(vif);
310 wdev = vif_to_wdev(vif);
311
312 might_sleep();
313 wil_info(wil, "bssid=%pM, reason=%d, ev%s\n", bssid,
314 reason_code, from_event ? "+" : "-");
315
316 /* Cases are:
317 * - disconnect single STA, still connected
318 * - disconnect single STA, already disconnected
319 * - disconnect all
320 *
321 * For "disconnect all", there are 3 options:
322 * - bssid == NULL
323 * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
324 * - bssid is our MAC address
325 */
326 if (bssid && !is_broadcast_ether_addr(bssid) &&
327 !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
328 cid = wil_find_cid(wil, vif->mid, bssid);
329 wil_dbg_misc(wil, "Disconnect %pM, CID=%d, reason=%d\n",
330 bssid, cid, reason_code);
331 if (cid >= 0) /* disconnect 1 peer */
332 wil_disconnect_cid(vif, cid, reason_code, from_event);
333 } else { /* all */
334 wil_dbg_misc(wil, "Disconnect all\n");
335 for (cid = 0; cid < WIL6210_MAX_CID; cid++)
336 wil_disconnect_cid(vif, cid, reason_code, from_event);
337 }
338
339 /* link state */
340 switch (wdev->iftype) {
341 case NL80211_IFTYPE_STATION:
342 case NL80211_IFTYPE_P2P_CLIENT:
343 wil_bcast_fini(vif);
344 wil_update_net_queues_bh(wil, vif, NULL, true);
345 netif_carrier_off(ndev);
346 if (!wil_has_other_active_ifaces(wil, ndev, false, true))
347 wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
348
349 if (test_and_clear_bit(wil_vif_fwconnected, vif->status)) {
350 atomic_dec(&wil->connected_vifs);
351 cfg80211_disconnected(ndev, reason_code,
352 NULL, 0,
353 vif->locally_generated_disc,
354 GFP_KERNEL);
355 vif->locally_generated_disc = false;
356 } else if (test_bit(wil_vif_fwconnecting, vif->status)) {
357 cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0,
358 WLAN_STATUS_UNSPECIFIED_FAILURE,
359 GFP_KERNEL);
360 vif->bss = NULL;
361 }
362 clear_bit(wil_vif_fwconnecting, vif->status);
363 break;
364 case NL80211_IFTYPE_AP:
365 case NL80211_IFTYPE_P2P_GO:
366 if (!wil_vif_is_connected(wil, vif->mid)) {
367 wil_update_net_queues_bh(wil, vif, NULL, true);
368 if (test_and_clear_bit(wil_vif_fwconnected,
369 vif->status))
370 atomic_dec(&wil->connected_vifs);
371 } else {
372 wil_update_net_queues_bh(wil, vif, NULL, false);
373 }
374 break;
375 default:
376 break;
377 }
378 }
379
wil_disconnect_worker(struct work_struct * work)380 void wil_disconnect_worker(struct work_struct *work)
381 {
382 struct wil6210_vif *vif = container_of(work,
383 struct wil6210_vif, disconnect_worker);
384 struct wil6210_priv *wil = vif_to_wil(vif);
385 struct net_device *ndev = vif_to_ndev(vif);
386 int rc;
387 struct {
388 struct wmi_cmd_hdr wmi;
389 struct wmi_disconnect_event evt;
390 } __packed reply;
391
392 if (test_bit(wil_vif_fwconnected, vif->status))
393 /* connect succeeded after all */
394 return;
395
396 if (!test_bit(wil_vif_fwconnecting, vif->status))
397 /* already disconnected */
398 return;
399
400 memset(&reply, 0, sizeof(reply));
401
402 rc = wmi_call(wil, WMI_DISCONNECT_CMDID, vif->mid, NULL, 0,
403 WMI_DISCONNECT_EVENTID, &reply, sizeof(reply),
404 WIL6210_DISCONNECT_TO_MS);
405 if (rc) {
406 wil_err(wil, "disconnect error %d\n", rc);
407 return;
408 }
409
410 wil_update_net_queues_bh(wil, vif, NULL, true);
411 netif_carrier_off(ndev);
412 cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0,
413 WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL);
414 clear_bit(wil_vif_fwconnecting, vif->status);
415 }
416
wil_wait_for_recovery(struct wil6210_priv * wil)417 static int wil_wait_for_recovery(struct wil6210_priv *wil)
418 {
419 if (wait_event_interruptible(wil->wq, wil->recovery_state !=
420 fw_recovery_pending)) {
421 wil_err(wil, "Interrupt, canceling recovery\n");
422 return -ERESTARTSYS;
423 }
424 if (wil->recovery_state != fw_recovery_running) {
425 wil_info(wil, "Recovery cancelled\n");
426 return -EINTR;
427 }
428 wil_info(wil, "Proceed with recovery\n");
429 return 0;
430 }
431
wil_set_recovery_state(struct wil6210_priv * wil,int state)432 void wil_set_recovery_state(struct wil6210_priv *wil, int state)
433 {
434 wil_dbg_misc(wil, "set_recovery_state: %d -> %d\n",
435 wil->recovery_state, state);
436
437 wil->recovery_state = state;
438 wake_up_interruptible(&wil->wq);
439 }
440
wil_is_recovery_blocked(struct wil6210_priv * wil)441 bool wil_is_recovery_blocked(struct wil6210_priv *wil)
442 {
443 return no_fw_recovery && (wil->recovery_state == fw_recovery_pending);
444 }
445
wil_fw_error_worker(struct work_struct * work)446 static void wil_fw_error_worker(struct work_struct *work)
447 {
448 struct wil6210_priv *wil = container_of(work, struct wil6210_priv,
449 fw_error_worker);
450 struct net_device *ndev = wil->main_ndev;
451 struct wireless_dev *wdev;
452
453 wil_dbg_misc(wil, "fw error worker\n");
454
455 if (!ndev || !(ndev->flags & IFF_UP)) {
456 wil_info(wil, "No recovery - interface is down\n");
457 return;
458 }
459 wdev = ndev->ieee80211_ptr;
460
461 /* increment @recovery_count if less then WIL6210_FW_RECOVERY_TO
462 * passed since last recovery attempt
463 */
464 if (time_is_after_jiffies(wil->last_fw_recovery +
465 WIL6210_FW_RECOVERY_TO))
466 wil->recovery_count++;
467 else
468 wil->recovery_count = 1; /* fw was alive for a long time */
469
470 if (wil->recovery_count > WIL6210_FW_RECOVERY_RETRIES) {
471 wil_err(wil, "too many recovery attempts (%d), giving up\n",
472 wil->recovery_count);
473 return;
474 }
475
476 wil->last_fw_recovery = jiffies;
477
478 wil_info(wil, "fw error recovery requested (try %d)...\n",
479 wil->recovery_count);
480 if (!no_fw_recovery)
481 wil->recovery_state = fw_recovery_running;
482 if (wil_wait_for_recovery(wil) != 0)
483 return;
484
485 mutex_lock(&wil->mutex);
486 /* Needs adaptation for multiple VIFs
487 * need to go over all VIFs and consider the appropriate
488 * recovery.
489 */
490 switch (wdev->iftype) {
491 case NL80211_IFTYPE_STATION:
492 case NL80211_IFTYPE_P2P_CLIENT:
493 case NL80211_IFTYPE_MONITOR:
494 /* silent recovery, upper layers will see disconnect */
495 __wil_down(wil);
496 __wil_up(wil);
497 break;
498 case NL80211_IFTYPE_AP:
499 case NL80211_IFTYPE_P2P_GO:
500 wil_info(wil, "No recovery for AP-like interface\n");
501 /* recovery in these modes is done by upper layers */
502 break;
503 default:
504 wil_err(wil, "No recovery - unknown interface type %d\n",
505 wdev->iftype);
506 break;
507 }
508 mutex_unlock(&wil->mutex);
509 }
510
wil_find_free_ring(struct wil6210_priv * wil)511 static int wil_find_free_ring(struct wil6210_priv *wil)
512 {
513 int i;
514 int min_ring_id = wil_get_min_tx_ring_id(wil);
515
516 for (i = min_ring_id; i < WIL6210_MAX_TX_RINGS; i++) {
517 if (!wil->ring_tx[i].va)
518 return i;
519 }
520 return -EINVAL;
521 }
522
wil_ring_init_tx(struct wil6210_vif * vif,int cid)523 int wil_ring_init_tx(struct wil6210_vif *vif, int cid)
524 {
525 struct wil6210_priv *wil = vif_to_wil(vif);
526 int rc = -EINVAL, ringid;
527
528 if (cid < 0) {
529 wil_err(wil, "No connection pending\n");
530 goto out;
531 }
532 ringid = wil_find_free_ring(wil);
533 if (ringid < 0) {
534 wil_err(wil, "No free vring found\n");
535 goto out;
536 }
537
538 wil_dbg_wmi(wil, "Configure for connection CID %d MID %d ring %d\n",
539 cid, vif->mid, ringid);
540
541 rc = wil->txrx_ops.ring_init_tx(vif, ringid, 1 << tx_ring_order,
542 cid, 0);
543 if (rc)
544 wil_err(wil, "init TX for CID %d MID %d vring %d failed\n",
545 cid, vif->mid, ringid);
546
547 out:
548 return rc;
549 }
550
wil_bcast_init(struct wil6210_vif * vif)551 int wil_bcast_init(struct wil6210_vif *vif)
552 {
553 struct wil6210_priv *wil = vif_to_wil(vif);
554 int ri = vif->bcast_ring, rc;
555
556 if (ri >= 0 && wil->ring_tx[ri].va)
557 return 0;
558
559 ri = wil_find_free_ring(wil);
560 if (ri < 0)
561 return ri;
562
563 vif->bcast_ring = ri;
564 rc = wil->txrx_ops.ring_init_bcast(vif, ri, 1 << bcast_ring_order);
565 if (rc)
566 vif->bcast_ring = -1;
567
568 return rc;
569 }
570
wil_bcast_fini(struct wil6210_vif * vif)571 void wil_bcast_fini(struct wil6210_vif *vif)
572 {
573 struct wil6210_priv *wil = vif_to_wil(vif);
574 int ri = vif->bcast_ring;
575
576 if (ri < 0)
577 return;
578
579 vif->bcast_ring = -1;
580 wil_ring_fini_tx(wil, ri);
581 }
582
wil_bcast_fini_all(struct wil6210_priv * wil)583 void wil_bcast_fini_all(struct wil6210_priv *wil)
584 {
585 int i;
586 struct wil6210_vif *vif;
587
588 for (i = 0; i < wil->max_vifs; i++) {
589 vif = wil->vifs[i];
590 if (vif)
591 wil_bcast_fini(vif);
592 }
593 }
594
wil_priv_init(struct wil6210_priv * wil)595 int wil_priv_init(struct wil6210_priv *wil)
596 {
597 uint i;
598
599 wil_dbg_misc(wil, "priv_init\n");
600
601 memset(wil->sta, 0, sizeof(wil->sta));
602 for (i = 0; i < WIL6210_MAX_CID; i++) {
603 spin_lock_init(&wil->sta[i].tid_rx_lock);
604 wil->sta[i].mid = U8_MAX;
605 }
606
607 for (i = 0; i < WIL6210_MAX_TX_RINGS; i++)
608 spin_lock_init(&wil->ring_tx_data[i].lock);
609
610 mutex_init(&wil->mutex);
611 mutex_init(&wil->vif_mutex);
612 mutex_init(&wil->wmi_mutex);
613 mutex_init(&wil->halp.lock);
614
615 init_completion(&wil->wmi_ready);
616 init_completion(&wil->wmi_call);
617 init_completion(&wil->halp.comp);
618
619 INIT_WORK(&wil->wmi_event_worker, wmi_event_worker);
620 INIT_WORK(&wil->fw_error_worker, wil_fw_error_worker);
621
622 INIT_LIST_HEAD(&wil->pending_wmi_ev);
623 spin_lock_init(&wil->wmi_ev_lock);
624 spin_lock_init(&wil->net_queue_lock);
625 init_waitqueue_head(&wil->wq);
626
627 wil->wmi_wq = create_singlethread_workqueue(WIL_NAME "_wmi");
628 if (!wil->wmi_wq)
629 return -EAGAIN;
630
631 wil->wq_service = create_singlethread_workqueue(WIL_NAME "_service");
632 if (!wil->wq_service)
633 goto out_wmi_wq;
634
635 wil->last_fw_recovery = jiffies;
636 wil->tx_interframe_timeout = WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT;
637 wil->rx_interframe_timeout = WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT;
638 wil->tx_max_burst_duration = WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT;
639 wil->rx_max_burst_duration = WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT;
640
641 if (rx_ring_overflow_thrsh == WIL6210_RX_HIGH_TRSH_INIT)
642 rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_DEFAULT;
643
644 wil->ps_profile = WMI_PS_PROFILE_TYPE_DEFAULT;
645
646 wil->wakeup_trigger = WMI_WAKEUP_TRIGGER_UCAST |
647 WMI_WAKEUP_TRIGGER_BCAST;
648 memset(&wil->suspend_stats, 0, sizeof(wil->suspend_stats));
649 wil->ring_idle_trsh = 16;
650
651 wil->reply_mid = U8_MAX;
652 wil->max_vifs = 1;
653
654 /* edma configuration can be updated via debugfs before allocation */
655 wil->num_rx_status_rings = WIL_DEFAULT_NUM_RX_STATUS_RINGS;
656 wil->use_compressed_rx_status = true;
657 wil->use_rx_hw_reordering = true;
658 wil->tx_status_ring_order = WIL_TX_SRING_SIZE_ORDER_DEFAULT;
659
660 /* Rx status ring size should be bigger than the number of RX buffers
661 * in order to prevent backpressure on the status ring, which may
662 * cause HW freeze.
663 */
664 wil->rx_status_ring_order = WIL_RX_SRING_SIZE_ORDER_DEFAULT;
665 /* Number of RX buffer IDs should be bigger than the RX descriptor
666 * ring size as in HW reorder flow, the HW can consume additional
667 * buffers before releasing the previous ones.
668 */
669 wil->rx_buff_id_count = WIL_RX_BUFF_ARR_SIZE_DEFAULT;
670
671 wil->amsdu_en = 1;
672
673 return 0;
674
675 out_wmi_wq:
676 destroy_workqueue(wil->wmi_wq);
677
678 return -EAGAIN;
679 }
680
wil6210_bus_request(struct wil6210_priv * wil,u32 kbps)681 void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps)
682 {
683 if (wil->platform_ops.bus_request) {
684 wil->bus_request_kbps = kbps;
685 wil->platform_ops.bus_request(wil->platform_handle, kbps);
686 }
687 }
688
689 /**
690 * wil6210_disconnect - disconnect one connection
691 * @vif: virtual interface context
692 * @bssid: peer to disconnect, NULL to disconnect all
693 * @reason_code: Reason code for the Disassociation frame
694 * @from_event: whether is invoked from FW event handler
695 *
696 * Disconnect and release associated resources. If invoked not from the
697 * FW event handler, issue WMI command(s) to trigger MAC disconnect.
698 */
wil6210_disconnect(struct wil6210_vif * vif,const u8 * bssid,u16 reason_code,bool from_event)699 void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
700 u16 reason_code, bool from_event)
701 {
702 struct wil6210_priv *wil = vif_to_wil(vif);
703
704 wil_dbg_misc(wil, "disconnect\n");
705
706 del_timer_sync(&vif->connect_timer);
707 _wil6210_disconnect(vif, bssid, reason_code, from_event);
708 }
709
wil_priv_deinit(struct wil6210_priv * wil)710 void wil_priv_deinit(struct wil6210_priv *wil)
711 {
712 wil_dbg_misc(wil, "priv_deinit\n");
713
714 wil_set_recovery_state(wil, fw_recovery_idle);
715 cancel_work_sync(&wil->fw_error_worker);
716 wmi_event_flush(wil);
717 destroy_workqueue(wil->wq_service);
718 destroy_workqueue(wil->wmi_wq);
719 }
720
wil_shutdown_bl(struct wil6210_priv * wil)721 static void wil_shutdown_bl(struct wil6210_priv *wil)
722 {
723 u32 val;
724
725 wil_s(wil, RGF_USER_BL +
726 offsetof(struct bl_dedicated_registers_v1,
727 bl_shutdown_handshake), BL_SHUTDOWN_HS_GRTD);
728
729 usleep_range(100, 150);
730
731 val = wil_r(wil, RGF_USER_BL +
732 offsetof(struct bl_dedicated_registers_v1,
733 bl_shutdown_handshake));
734 if (val & BL_SHUTDOWN_HS_RTD) {
735 wil_dbg_misc(wil, "BL is ready for halt\n");
736 return;
737 }
738
739 wil_err(wil, "BL did not report ready for halt\n");
740 }
741
742 /* this format is used by ARC embedded CPU for instruction memory */
ARC_me_imm32(u32 d)743 static inline u32 ARC_me_imm32(u32 d)
744 {
745 return ((d & 0xffff0000) >> 16) | ((d & 0x0000ffff) << 16);
746 }
747
748 /* defines access to interrupt vectors for wil_freeze_bl */
749 #define ARC_IRQ_VECTOR_OFFSET(N) ((N) * 8)
750 /* ARC long jump instruction */
751 #define ARC_JAL_INST (0x20200f80)
752
wil_freeze_bl(struct wil6210_priv * wil)753 static void wil_freeze_bl(struct wil6210_priv *wil)
754 {
755 u32 jal, upc, saved;
756 u32 ivt3 = ARC_IRQ_VECTOR_OFFSET(3);
757
758 jal = wil_r(wil, wil->iccm_base + ivt3);
759 if (jal != ARC_me_imm32(ARC_JAL_INST)) {
760 wil_dbg_misc(wil, "invalid IVT entry found, skipping\n");
761 return;
762 }
763
764 /* prevent the target from entering deep sleep
765 * and disabling memory access
766 */
767 saved = wil_r(wil, RGF_USER_USAGE_8);
768 wil_w(wil, RGF_USER_USAGE_8, saved | BIT_USER_PREVENT_DEEP_SLEEP);
769 usleep_range(20, 25); /* let the BL process the bit */
770
771 /* redirect to endless loop in the INT_L1 context and let it trap */
772 wil_w(wil, wil->iccm_base + ivt3 + 4, ARC_me_imm32(ivt3));
773 usleep_range(20, 25); /* let the BL get into the trap */
774
775 /* verify the BL is frozen */
776 upc = wil_r(wil, RGF_USER_CPU_PC);
777 if (upc < ivt3 || (upc > (ivt3 + 8)))
778 wil_dbg_misc(wil, "BL freeze failed, PC=0x%08X\n", upc);
779
780 wil_w(wil, RGF_USER_USAGE_8, saved);
781 }
782
wil_bl_prepare_halt(struct wil6210_priv * wil)783 static void wil_bl_prepare_halt(struct wil6210_priv *wil)
784 {
785 u32 tmp, ver;
786
787 /* before halting device CPU driver must make sure BL is not accessing
788 * host memory. This is done differently depending on BL version:
789 * 1. For very old BL versions the procedure is skipped
790 * (not supported).
791 * 2. For old BL version we use a special trick to freeze the BL
792 * 3. For new BL versions we shutdown the BL using handshake procedure.
793 */
794 tmp = wil_r(wil, RGF_USER_BL +
795 offsetof(struct bl_dedicated_registers_v0,
796 boot_loader_struct_version));
797 if (!tmp) {
798 wil_dbg_misc(wil, "old BL, skipping halt preparation\n");
799 return;
800 }
801
802 tmp = wil_r(wil, RGF_USER_BL +
803 offsetof(struct bl_dedicated_registers_v1,
804 bl_shutdown_handshake));
805 ver = BL_SHUTDOWN_HS_PROT_VER(tmp);
806
807 if (ver > 0)
808 wil_shutdown_bl(wil);
809 else
810 wil_freeze_bl(wil);
811 }
812
wil_halt_cpu(struct wil6210_priv * wil)813 static inline void wil_halt_cpu(struct wil6210_priv *wil)
814 {
815 if (wil->hw_version >= HW_VER_TALYN_MB) {
816 wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB,
817 BIT_USER_USER_CPU_MAN_RST);
818 wil_w(wil, RGF_USER_MAC_CPU_0_TALYN_MB,
819 BIT_USER_MAC_CPU_MAN_RST);
820 } else {
821 wil_w(wil, RGF_USER_USER_CPU_0, BIT_USER_USER_CPU_MAN_RST);
822 wil_w(wil, RGF_USER_MAC_CPU_0, BIT_USER_MAC_CPU_MAN_RST);
823 }
824 }
825
wil_release_cpu(struct wil6210_priv * wil)826 static inline void wil_release_cpu(struct wil6210_priv *wil)
827 {
828 /* Start CPU */
829 if (wil->hw_version >= HW_VER_TALYN_MB)
830 wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB, 1);
831 else
832 wil_w(wil, RGF_USER_USER_CPU_0, 1);
833 }
834
wil_set_oob_mode(struct wil6210_priv * wil,u8 mode)835 static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
836 {
837 wil_info(wil, "oob_mode to %d\n", mode);
838 switch (mode) {
839 case 0:
840 wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE |
841 BIT_USER_OOB_R2_MODE);
842 break;
843 case 1:
844 wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
845 wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
846 break;
847 case 2:
848 wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
849 wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
850 break;
851 default:
852 wil_err(wil, "invalid oob_mode: %d\n", mode);
853 }
854 }
855
wil_wait_device_ready(struct wil6210_priv * wil,int no_flash)856 static int wil_wait_device_ready(struct wil6210_priv *wil, int no_flash)
857 {
858 int delay = 0;
859 u32 x, x1 = 0;
860
861 /* wait until device ready. */
862 if (no_flash) {
863 msleep(PMU_READY_DELAY_MS);
864
865 wil_dbg_misc(wil, "Reset completed\n");
866 } else {
867 do {
868 msleep(RST_DELAY);
869 x = wil_r(wil, RGF_USER_BL +
870 offsetof(struct bl_dedicated_registers_v0,
871 boot_loader_ready));
872 if (x1 != x) {
873 wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n",
874 x1, x);
875 x1 = x;
876 }
877 if (delay++ > RST_COUNT) {
878 wil_err(wil, "Reset not completed, bl.ready 0x%08x\n",
879 x);
880 return -ETIME;
881 }
882 } while (x != BL_READY);
883
884 wil_dbg_misc(wil, "Reset completed in %d ms\n",
885 delay * RST_DELAY);
886 }
887
888 return 0;
889 }
890
wil_wait_device_ready_talyn_mb(struct wil6210_priv * wil)891 static int wil_wait_device_ready_talyn_mb(struct wil6210_priv *wil)
892 {
893 u32 otp_hw;
894 u8 signature_status;
895 bool otp_signature_err;
896 bool hw_section_done;
897 u32 otp_qc_secured;
898 int delay = 0;
899
900 /* Wait for OTP signature test to complete */
901 usleep_range(2000, 2200);
902
903 wil->boot_config = WIL_BOOT_ERR;
904
905 /* Poll until OTP signature status is valid.
906 * In vanilla and development modes, when signature test is complete
907 * HW sets BIT_OTP_SIGNATURE_ERR_TALYN_MB.
908 * In production mode BIT_OTP_SIGNATURE_ERR_TALYN_MB remains 0, poll
909 * for signature status change to 2 or 3.
910 */
911 do {
912 otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
913 signature_status = WIL_GET_BITS(otp_hw, 8, 9);
914 otp_signature_err = otp_hw & BIT_OTP_SIGNATURE_ERR_TALYN_MB;
915
916 if (otp_signature_err &&
917 signature_status == WIL_SIG_STATUS_VANILLA) {
918 wil->boot_config = WIL_BOOT_VANILLA;
919 break;
920 }
921 if (otp_signature_err &&
922 signature_status == WIL_SIG_STATUS_DEVELOPMENT) {
923 wil->boot_config = WIL_BOOT_DEVELOPMENT;
924 break;
925 }
926 if (!otp_signature_err &&
927 signature_status == WIL_SIG_STATUS_PRODUCTION) {
928 wil->boot_config = WIL_BOOT_PRODUCTION;
929 break;
930 }
931 if (!otp_signature_err &&
932 signature_status ==
933 WIL_SIG_STATUS_CORRUPTED_PRODUCTION) {
934 /* Unrecognized OTP signature found. Possibly a
935 * corrupted production signature, access control
936 * is applied as in production mode, therefore
937 * do not fail
938 */
939 wil->boot_config = WIL_BOOT_PRODUCTION;
940 break;
941 }
942 if (delay++ > OTP_HW_COUNT)
943 break;
944
945 usleep_range(OTP_HW_DELAY, OTP_HW_DELAY + 10);
946 } while (!otp_signature_err && signature_status == 0);
947
948 if (wil->boot_config == WIL_BOOT_ERR) {
949 wil_err(wil,
950 "invalid boot config, signature_status %d otp_signature_err %d\n",
951 signature_status, otp_signature_err);
952 return -ETIME;
953 }
954
955 wil_dbg_misc(wil,
956 "signature test done in %d usec, otp_hw 0x%x, boot_config %d\n",
957 delay * OTP_HW_DELAY, otp_hw, wil->boot_config);
958
959 if (wil->boot_config == WIL_BOOT_VANILLA)
960 /* Assuming not SPI boot (currently not supported) */
961 goto out;
962
963 hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
964 delay = 0;
965
966 while (!hw_section_done) {
967 msleep(RST_DELAY);
968
969 otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
970 hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
971
972 if (delay++ > RST_COUNT) {
973 wil_err(wil, "TO waiting for hw_section_done\n");
974 return -ETIME;
975 }
976 }
977
978 wil_dbg_misc(wil, "HW section done in %d ms\n", delay * RST_DELAY);
979
980 otp_qc_secured = wil_r(wil, RGF_OTP_QC_SECURED);
981 wil->secured_boot = otp_qc_secured & BIT_BOOT_FROM_ROM ? 1 : 0;
982 wil_dbg_misc(wil, "secured boot is %sabled\n",
983 wil->secured_boot ? "en" : "dis");
984
985 out:
986 wil_dbg_misc(wil, "Reset completed\n");
987
988 return 0;
989 }
990
wil_target_reset(struct wil6210_priv * wil,int no_flash)991 static int wil_target_reset(struct wil6210_priv *wil, int no_flash)
992 {
993 u32 x;
994 int rc;
995
996 wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name);
997
998 /* Clear MAC link up */
999 wil_s(wil, RGF_HP_CTRL, BIT(15));
1000 wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_HPAL_PERST_FROM_PAD);
1001 wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
1002
1003 wil_halt_cpu(wil);
1004
1005 if (!no_flash) {
1006 /* clear all boot loader "ready" bits */
1007 wil_w(wil, RGF_USER_BL +
1008 offsetof(struct bl_dedicated_registers_v0,
1009 boot_loader_ready), 0);
1010 /* this should be safe to write even with old BLs */
1011 wil_w(wil, RGF_USER_BL +
1012 offsetof(struct bl_dedicated_registers_v1,
1013 bl_shutdown_handshake), 0);
1014 }
1015 /* Clear Fw Download notification */
1016 wil_c(wil, RGF_USER_USAGE_6, BIT(0));
1017
1018 wil_s(wil, RGF_CAF_OSC_CONTROL, BIT_CAF_OSC_XTAL_EN);
1019 /* XTAL stabilization should take about 3ms */
1020 usleep_range(5000, 7000);
1021 x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS);
1022 if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) {
1023 wil_err(wil, "Xtal stabilization timeout\n"
1024 "RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x);
1025 return -ETIME;
1026 }
1027 /* switch 10k to XTAL*/
1028 wil_c(wil, RGF_USER_SPARROW_M_4, BIT_SPARROW_M_4_SEL_SLEEP_OR_REF);
1029 /* 40 MHz */
1030 wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_CAR_AHB_SW_SEL);
1031
1032 wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x3ff81f);
1033 wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0xf);
1034
1035 if (wil->hw_version >= HW_VER_TALYN_MB) {
1036 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x7e000000);
1037 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
1038 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0xc00000f0);
1039 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
1040 } else {
1041 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xfe000000);
1042 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
1043 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x000000f0);
1044 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
1045 }
1046
1047 wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x0);
1048 wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0x0);
1049
1050 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0);
1051 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0);
1052 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0);
1053 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
1054
1055 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000003);
1056 /* reset A2 PCIE AHB */
1057 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
1058
1059 wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
1060
1061 if (wil->hw_version == HW_VER_TALYN_MB)
1062 rc = wil_wait_device_ready_talyn_mb(wil);
1063 else
1064 rc = wil_wait_device_ready(wil, no_flash);
1065 if (rc)
1066 return rc;
1067
1068 wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
1069
1070 /* enable fix for HW bug related to the SA/DA swap in AP Rx */
1071 wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN |
1072 BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC);
1073
1074 if (wil->hw_version < HW_VER_TALYN_MB && no_flash) {
1075 /* Reset OTP HW vectors to fit 40MHz */
1076 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME1, 0x60001);
1077 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME2, 0x20027);
1078 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME3, 0x1);
1079 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME4, 0x20027);
1080 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME5, 0x30003);
1081 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME6, 0x20002);
1082 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME7, 0x60001);
1083 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME8, 0x60001);
1084 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME9, 0x60001);
1085 wil_w(wil, RGF_USER_XPM_IFC_RD_TIME10, 0x60001);
1086 wil_w(wil, RGF_USER_XPM_RD_DOUT_SAMPLE_TIME, 0x57);
1087 }
1088
1089 return 0;
1090 }
1091
wil_collect_fw_info(struct wil6210_priv * wil)1092 static void wil_collect_fw_info(struct wil6210_priv *wil)
1093 {
1094 struct wiphy *wiphy = wil_to_wiphy(wil);
1095 u8 retry_short;
1096 int rc;
1097
1098 wil_refresh_fw_capabilities(wil);
1099
1100 rc = wmi_get_mgmt_retry(wil, &retry_short);
1101 if (!rc) {
1102 wiphy->retry_short = retry_short;
1103 wil_dbg_misc(wil, "FW retry_short: %d\n", retry_short);
1104 }
1105 }
1106
wil_refresh_fw_capabilities(struct wil6210_priv * wil)1107 void wil_refresh_fw_capabilities(struct wil6210_priv *wil)
1108 {
1109 struct wiphy *wiphy = wil_to_wiphy(wil);
1110 int features;
1111
1112 wil->keep_radio_on_during_sleep =
1113 test_bit(WIL_PLATFORM_CAPA_RADIO_ON_IN_SUSPEND,
1114 wil->platform_capa) &&
1115 test_bit(WMI_FW_CAPABILITY_D3_SUSPEND, wil->fw_capabilities);
1116
1117 wil_info(wil, "keep_radio_on_during_sleep (%d)\n",
1118 wil->keep_radio_on_during_sleep);
1119
1120 if (test_bit(WMI_FW_CAPABILITY_RSSI_REPORTING, wil->fw_capabilities))
1121 wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
1122 else
1123 wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC;
1124
1125 if (test_bit(WMI_FW_CAPABILITY_PNO, wil->fw_capabilities)) {
1126 wiphy->max_sched_scan_reqs = 1;
1127 wiphy->max_sched_scan_ssids = WMI_MAX_PNO_SSID_NUM;
1128 wiphy->max_match_sets = WMI_MAX_PNO_SSID_NUM;
1129 wiphy->max_sched_scan_ie_len = WMI_MAX_IE_LEN;
1130 wiphy->max_sched_scan_plans = WMI_MAX_PLANS_NUM;
1131 }
1132
1133 if (test_bit(WMI_FW_CAPABILITY_TX_REQ_EXT, wil->fw_capabilities))
1134 wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX;
1135
1136 if (wil->platform_ops.set_features) {
1137 features = (test_bit(WMI_FW_CAPABILITY_REF_CLOCK_CONTROL,
1138 wil->fw_capabilities) &&
1139 test_bit(WIL_PLATFORM_CAPA_EXT_CLK,
1140 wil->platform_capa)) ?
1141 BIT(WIL_PLATFORM_FEATURE_FW_EXT_CLK_CONTROL) : 0;
1142
1143 if (wil->n_msi == 3)
1144 features |= BIT(WIL_PLATFORM_FEATURE_TRIPLE_MSI);
1145
1146 wil->platform_ops.set_features(wil->platform_handle, features);
1147 }
1148
1149 if (test_bit(WMI_FW_CAPABILITY_BACK_WIN_SIZE_64,
1150 wil->fw_capabilities)) {
1151 wil->max_agg_wsize = WIL_MAX_AGG_WSIZE_64;
1152 wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE_128;
1153 } else {
1154 wil->max_agg_wsize = WIL_MAX_AGG_WSIZE;
1155 wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE;
1156 }
1157 }
1158
wil_mbox_ring_le2cpus(struct wil6210_mbox_ring * r)1159 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r)
1160 {
1161 le32_to_cpus(&r->base);
1162 le16_to_cpus(&r->entry_size);
1163 le16_to_cpus(&r->size);
1164 le32_to_cpus(&r->tail);
1165 le32_to_cpus(&r->head);
1166 }
1167
1168 /* construct actual board file name to use */
wil_get_board_file(struct wil6210_priv * wil,char * buf,size_t len)1169 void wil_get_board_file(struct wil6210_priv *wil, char *buf, size_t len)
1170 {
1171 const char *board_file;
1172 const char *wil_talyn_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
1173 WIL_FW_NAME_TALYN;
1174
1175 if (wil->board_file) {
1176 board_file = wil->board_file;
1177 } else {
1178 /* If specific FW file is used for Talyn,
1179 * use specific board file
1180 */
1181 if (strcmp(wil->wil_fw_name, wil_talyn_fw_name) == 0)
1182 board_file = WIL_BRD_NAME_TALYN;
1183 else
1184 board_file = WIL_BOARD_FILE_NAME;
1185 }
1186
1187 strlcpy(buf, board_file, len);
1188 }
1189
wil_get_bl_info(struct wil6210_priv * wil)1190 static int wil_get_bl_info(struct wil6210_priv *wil)
1191 {
1192 struct net_device *ndev = wil->main_ndev;
1193 struct wiphy *wiphy = wil_to_wiphy(wil);
1194 union {
1195 struct bl_dedicated_registers_v0 bl0;
1196 struct bl_dedicated_registers_v1 bl1;
1197 } bl;
1198 u32 bl_ver;
1199 u8 *mac;
1200 u16 rf_status;
1201
1202 wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL),
1203 sizeof(bl));
1204 bl_ver = le32_to_cpu(bl.bl0.boot_loader_struct_version);
1205 mac = bl.bl0.mac_address;
1206
1207 if (bl_ver == 0) {
1208 le32_to_cpus(&bl.bl0.rf_type);
1209 le32_to_cpus(&bl.bl0.baseband_type);
1210 rf_status = 0; /* actually, unknown */
1211 wil_info(wil,
1212 "Boot Loader struct v%d: MAC = %pM RF = 0x%08x bband = 0x%08x\n",
1213 bl_ver, mac,
1214 bl.bl0.rf_type, bl.bl0.baseband_type);
1215 wil_info(wil, "Boot Loader build unknown for struct v0\n");
1216 } else {
1217 le16_to_cpus(&bl.bl1.rf_type);
1218 rf_status = le16_to_cpu(bl.bl1.rf_status);
1219 le32_to_cpus(&bl.bl1.baseband_type);
1220 le16_to_cpus(&bl.bl1.bl_version_subminor);
1221 le16_to_cpus(&bl.bl1.bl_version_build);
1222 wil_info(wil,
1223 "Boot Loader struct v%d: MAC = %pM RF = 0x%04x (status 0x%04x) bband = 0x%08x\n",
1224 bl_ver, mac,
1225 bl.bl1.rf_type, rf_status,
1226 bl.bl1.baseband_type);
1227 wil_info(wil, "Boot Loader build %d.%d.%d.%d\n",
1228 bl.bl1.bl_version_major, bl.bl1.bl_version_minor,
1229 bl.bl1.bl_version_subminor, bl.bl1.bl_version_build);
1230 }
1231
1232 if (!is_valid_ether_addr(mac)) {
1233 wil_err(wil, "BL: Invalid MAC %pM\n", mac);
1234 return -EINVAL;
1235 }
1236
1237 ether_addr_copy(ndev->perm_addr, mac);
1238 ether_addr_copy(wiphy->perm_addr, mac);
1239 if (!is_valid_ether_addr(ndev->dev_addr))
1240 ether_addr_copy(ndev->dev_addr, mac);
1241
1242 if (rf_status) {/* bad RF cable? */
1243 wil_err(wil, "RF communication error 0x%04x",
1244 rf_status);
1245 return -EAGAIN;
1246 }
1247
1248 return 0;
1249 }
1250
wil_bl_crash_info(struct wil6210_priv * wil,bool is_err)1251 static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err)
1252 {
1253 u32 bl_assert_code, bl_assert_blink, bl_magic_number;
1254 u32 bl_ver = wil_r(wil, RGF_USER_BL +
1255 offsetof(struct bl_dedicated_registers_v0,
1256 boot_loader_struct_version));
1257
1258 if (bl_ver < 2)
1259 return;
1260
1261 bl_assert_code = wil_r(wil, RGF_USER_BL +
1262 offsetof(struct bl_dedicated_registers_v1,
1263 bl_assert_code));
1264 bl_assert_blink = wil_r(wil, RGF_USER_BL +
1265 offsetof(struct bl_dedicated_registers_v1,
1266 bl_assert_blink));
1267 bl_magic_number = wil_r(wil, RGF_USER_BL +
1268 offsetof(struct bl_dedicated_registers_v1,
1269 bl_magic_number));
1270
1271 if (is_err) {
1272 wil_err(wil,
1273 "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
1274 bl_assert_code, bl_assert_blink, bl_magic_number);
1275 } else {
1276 wil_dbg_misc(wil,
1277 "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
1278 bl_assert_code, bl_assert_blink, bl_magic_number);
1279 }
1280 }
1281
wil_get_otp_info(struct wil6210_priv * wil)1282 static int wil_get_otp_info(struct wil6210_priv *wil)
1283 {
1284 struct net_device *ndev = wil->main_ndev;
1285 struct wiphy *wiphy = wil_to_wiphy(wil);
1286 u8 mac[8];
1287 int mac_addr;
1288
1289 if (wil->hw_version >= HW_VER_TALYN_MB)
1290 mac_addr = RGF_OTP_MAC_TALYN_MB;
1291 else
1292 mac_addr = RGF_OTP_MAC;
1293
1294 wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr),
1295 sizeof(mac));
1296 if (!is_valid_ether_addr(mac)) {
1297 wil_err(wil, "Invalid MAC %pM\n", mac);
1298 return -EINVAL;
1299 }
1300
1301 ether_addr_copy(ndev->perm_addr, mac);
1302 ether_addr_copy(wiphy->perm_addr, mac);
1303 if (!is_valid_ether_addr(ndev->dev_addr))
1304 ether_addr_copy(ndev->dev_addr, mac);
1305
1306 return 0;
1307 }
1308
wil_wait_for_fw_ready(struct wil6210_priv * wil)1309 static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
1310 {
1311 ulong to = msecs_to_jiffies(2000);
1312 ulong left = wait_for_completion_timeout(&wil->wmi_ready, to);
1313
1314 if (0 == left) {
1315 wil_err(wil, "Firmware not ready\n");
1316 return -ETIME;
1317 } else {
1318 wil_info(wil, "FW ready after %d ms. HW version 0x%08x\n",
1319 jiffies_to_msecs(to-left), wil->hw_version);
1320 }
1321 return 0;
1322 }
1323
wil_abort_scan(struct wil6210_vif * vif,bool sync)1324 void wil_abort_scan(struct wil6210_vif *vif, bool sync)
1325 {
1326 struct wil6210_priv *wil = vif_to_wil(vif);
1327 int rc;
1328 struct cfg80211_scan_info info = {
1329 .aborted = true,
1330 };
1331
1332 lockdep_assert_held(&wil->vif_mutex);
1333
1334 if (!vif->scan_request)
1335 return;
1336
1337 wil_dbg_misc(wil, "Abort scan_request 0x%p\n", vif->scan_request);
1338 del_timer_sync(&vif->scan_timer);
1339 mutex_unlock(&wil->vif_mutex);
1340 rc = wmi_abort_scan(vif);
1341 if (!rc && sync)
1342 wait_event_interruptible_timeout(wil->wq, !vif->scan_request,
1343 msecs_to_jiffies(
1344 WAIT_FOR_SCAN_ABORT_MS));
1345
1346 mutex_lock(&wil->vif_mutex);
1347 if (vif->scan_request) {
1348 cfg80211_scan_done(vif->scan_request, &info);
1349 vif->scan_request = NULL;
1350 }
1351 }
1352
wil_abort_scan_all_vifs(struct wil6210_priv * wil,bool sync)1353 void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync)
1354 {
1355 int i;
1356
1357 lockdep_assert_held(&wil->vif_mutex);
1358
1359 for (i = 0; i < wil->max_vifs; i++) {
1360 struct wil6210_vif *vif = wil->vifs[i];
1361
1362 if (vif)
1363 wil_abort_scan(vif, sync);
1364 }
1365 }
1366
wil_ps_update(struct wil6210_priv * wil,enum wmi_ps_profile_type ps_profile)1367 int wil_ps_update(struct wil6210_priv *wil, enum wmi_ps_profile_type ps_profile)
1368 {
1369 int rc;
1370
1371 if (!test_bit(WMI_FW_CAPABILITY_PS_CONFIG, wil->fw_capabilities)) {
1372 wil_err(wil, "set_power_mgmt not supported\n");
1373 return -EOPNOTSUPP;
1374 }
1375
1376 rc = wmi_ps_dev_profile_cfg(wil, ps_profile);
1377 if (rc)
1378 wil_err(wil, "wmi_ps_dev_profile_cfg failed (%d)\n", rc);
1379 else
1380 wil->ps_profile = ps_profile;
1381
1382 return rc;
1383 }
1384
wil_pre_fw_config(struct wil6210_priv * wil)1385 static void wil_pre_fw_config(struct wil6210_priv *wil)
1386 {
1387 /* Mark FW as loaded from host */
1388 wil_s(wil, RGF_USER_USAGE_6, 1);
1389
1390 /* clear any interrupts which on-card-firmware
1391 * may have set
1392 */
1393 wil6210_clear_irq(wil);
1394 /* CAF_ICR - clear and mask */
1395 /* it is W1C, clear by writing back same value */
1396 wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
1397 wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
1398 /* clear PAL_UNIT_ICR (potential D0->D3 leftover)
1399 * In Talyn-MB host cannot access this register due to
1400 * access control, hence PAL_UNIT_ICR is cleared by the FW
1401 */
1402 if (wil->hw_version < HW_VER_TALYN_MB)
1403 wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR),
1404 0);
1405
1406 if (wil->fw_calib_result > 0) {
1407 __le32 val = cpu_to_le32(wil->fw_calib_result |
1408 (CALIB_RESULT_SIGNATURE << 8));
1409 wil_w(wil, RGF_USER_FW_CALIB_RESULT, (u32 __force)val);
1410 }
1411 }
1412
wil_restore_vifs(struct wil6210_priv * wil)1413 static int wil_restore_vifs(struct wil6210_priv *wil)
1414 {
1415 struct wil6210_vif *vif;
1416 struct net_device *ndev;
1417 struct wireless_dev *wdev;
1418 int i, rc;
1419
1420 for (i = 0; i < wil->max_vifs; i++) {
1421 vif = wil->vifs[i];
1422 if (!vif)
1423 continue;
1424 vif->ap_isolate = 0;
1425 if (vif->mid) {
1426 ndev = vif_to_ndev(vif);
1427 wdev = vif_to_wdev(vif);
1428 rc = wmi_port_allocate(wil, vif->mid, ndev->dev_addr,
1429 wdev->iftype);
1430 if (rc) {
1431 wil_err(wil, "fail to restore VIF %d type %d, rc %d\n",
1432 i, wdev->iftype, rc);
1433 return rc;
1434 }
1435 }
1436 }
1437
1438 return 0;
1439 }
1440
1441 /*
1442 * We reset all the structures, and we reset the UMAC.
1443 * After calling this routine, you're expected to reload
1444 * the firmware.
1445 */
wil_reset(struct wil6210_priv * wil,bool load_fw)1446 int wil_reset(struct wil6210_priv *wil, bool load_fw)
1447 {
1448 int rc, i;
1449 unsigned long status_flags = BIT(wil_status_resetting);
1450 int no_flash;
1451 struct wil6210_vif *vif;
1452
1453 wil_dbg_misc(wil, "reset\n");
1454
1455 WARN_ON(!mutex_is_locked(&wil->mutex));
1456 WARN_ON(test_bit(wil_status_napi_en, wil->status));
1457
1458 if (debug_fw) {
1459 static const u8 mac[ETH_ALEN] = {
1460 0x00, 0xde, 0xad, 0x12, 0x34, 0x56,
1461 };
1462 struct net_device *ndev = wil->main_ndev;
1463
1464 ether_addr_copy(ndev->perm_addr, mac);
1465 ether_addr_copy(ndev->dev_addr, ndev->perm_addr);
1466 return 0;
1467 }
1468
1469 if (wil->hw_version == HW_VER_UNKNOWN)
1470 return -ENODEV;
1471
1472 if (test_bit(WIL_PLATFORM_CAPA_T_PWR_ON_0, wil->platform_capa)) {
1473 wil_dbg_misc(wil, "Notify FW to set T_POWER_ON=0\n");
1474 wil_s(wil, RGF_USER_USAGE_8, BIT_USER_SUPPORT_T_POWER_ON_0);
1475 }
1476
1477 if (test_bit(WIL_PLATFORM_CAPA_EXT_CLK, wil->platform_capa)) {
1478 wil_dbg_misc(wil, "Notify FW on ext clock configuration\n");
1479 wil_s(wil, RGF_USER_USAGE_8, BIT_USER_EXT_CLK);
1480 }
1481
1482 if (wil->platform_ops.notify) {
1483 rc = wil->platform_ops.notify(wil->platform_handle,
1484 WIL_PLATFORM_EVT_PRE_RESET);
1485 if (rc)
1486 wil_err(wil, "PRE_RESET platform notify failed, rc %d\n",
1487 rc);
1488 }
1489
1490 set_bit(wil_status_resetting, wil->status);
1491 if (test_bit(wil_status_collecting_dumps, wil->status)) {
1492 /* Device collects crash dump, cancel the reset.
1493 * following crash dump collection, reset would take place.
1494 */
1495 wil_dbg_misc(wil, "reject reset while collecting crash dump\n");
1496 rc = -EBUSY;
1497 goto out;
1498 }
1499
1500 mutex_lock(&wil->vif_mutex);
1501 wil_abort_scan_all_vifs(wil, false);
1502 mutex_unlock(&wil->vif_mutex);
1503
1504 for (i = 0; i < wil->max_vifs; i++) {
1505 vif = wil->vifs[i];
1506 if (vif) {
1507 cancel_work_sync(&vif->disconnect_worker);
1508 wil6210_disconnect(vif, NULL,
1509 WLAN_REASON_DEAUTH_LEAVING, false);
1510 }
1511 }
1512 wil_bcast_fini_all(wil);
1513
1514 /* Disable device led before reset*/
1515 wmi_led_cfg(wil, false);
1516
1517 /* prevent NAPI from being scheduled and prevent wmi commands */
1518 mutex_lock(&wil->wmi_mutex);
1519 if (test_bit(wil_status_suspending, wil->status))
1520 status_flags |= BIT(wil_status_suspending);
1521 bitmap_and(wil->status, wil->status, &status_flags,
1522 wil_status_last);
1523 wil_dbg_misc(wil, "wil->status (0x%lx)\n", *wil->status);
1524 mutex_unlock(&wil->wmi_mutex);
1525
1526 wil_mask_irq(wil);
1527
1528 wmi_event_flush(wil);
1529
1530 flush_workqueue(wil->wq_service);
1531 flush_workqueue(wil->wmi_wq);
1532
1533 no_flash = test_bit(hw_capa_no_flash, wil->hw_capa);
1534 if (!no_flash)
1535 wil_bl_crash_info(wil, false);
1536 wil_disable_irq(wil);
1537 rc = wil_target_reset(wil, no_flash);
1538 wil6210_clear_irq(wil);
1539 wil_enable_irq(wil);
1540 wil->txrx_ops.rx_fini(wil);
1541 wil->txrx_ops.tx_fini(wil);
1542 if (rc) {
1543 if (!no_flash)
1544 wil_bl_crash_info(wil, true);
1545 goto out;
1546 }
1547
1548 if (no_flash) {
1549 rc = wil_get_otp_info(wil);
1550 } else {
1551 rc = wil_get_bl_info(wil);
1552 if (rc == -EAGAIN && !load_fw)
1553 /* ignore RF error if not going up */
1554 rc = 0;
1555 }
1556 if (rc)
1557 goto out;
1558
1559 wil_set_oob_mode(wil, oob_mode);
1560 if (load_fw) {
1561 char board_file[WIL_BOARD_FILE_MAX_NAMELEN];
1562
1563 if (wil->secured_boot) {
1564 wil_err(wil, "secured boot is not supported\n");
1565 return -ENOTSUPP;
1566 }
1567
1568 board_file[0] = '\0';
1569 wil_get_board_file(wil, board_file, sizeof(board_file));
1570 wil_info(wil, "Use firmware <%s> + board <%s>\n",
1571 wil->wil_fw_name, board_file);
1572
1573 if (!no_flash)
1574 wil_bl_prepare_halt(wil);
1575
1576 wil_halt_cpu(wil);
1577 memset(wil->fw_version, 0, sizeof(wil->fw_version));
1578 /* Loading f/w from the file */
1579 rc = wil_request_firmware(wil, wil->wil_fw_name, true);
1580 if (rc)
1581 goto out;
1582 if (wil->brd_file_addr)
1583 rc = wil_request_board(wil, board_file);
1584 else
1585 rc = wil_request_firmware(wil, board_file, true);
1586 if (rc)
1587 goto out;
1588
1589 wil_pre_fw_config(wil);
1590 wil_release_cpu(wil);
1591 }
1592
1593 /* init after reset */
1594 reinit_completion(&wil->wmi_ready);
1595 reinit_completion(&wil->wmi_call);
1596 reinit_completion(&wil->halp.comp);
1597
1598 clear_bit(wil_status_resetting, wil->status);
1599
1600 if (load_fw) {
1601 wil_unmask_irq(wil);
1602
1603 /* we just started MAC, wait for FW ready */
1604 rc = wil_wait_for_fw_ready(wil);
1605 if (rc)
1606 return rc;
1607
1608 /* check FW is responsive */
1609 rc = wmi_echo(wil);
1610 if (rc) {
1611 wil_err(wil, "wmi_echo failed, rc %d\n", rc);
1612 return rc;
1613 }
1614
1615 wil->txrx_ops.configure_interrupt_moderation(wil);
1616
1617 /* Enable OFU rdy valid bug fix, to prevent hang in oful34_rx
1618 * while there is back-pressure from Host during RX
1619 */
1620 if (wil->hw_version >= HW_VER_TALYN_MB)
1621 wil_s(wil, RGF_DMA_MISC_CTL,
1622 BIT_OFUL34_RDY_VALID_BUG_FIX_EN);
1623
1624 rc = wil_restore_vifs(wil);
1625 if (rc) {
1626 wil_err(wil, "failed to restore vifs, rc %d\n", rc);
1627 return rc;
1628 }
1629
1630 wil_collect_fw_info(wil);
1631
1632 if (wil->ps_profile != WMI_PS_PROFILE_TYPE_DEFAULT)
1633 wil_ps_update(wil, wil->ps_profile);
1634
1635 if (wil->platform_ops.notify) {
1636 rc = wil->platform_ops.notify(wil->platform_handle,
1637 WIL_PLATFORM_EVT_FW_RDY);
1638 if (rc) {
1639 wil_err(wil, "FW_RDY notify failed, rc %d\n",
1640 rc);
1641 rc = 0;
1642 }
1643 }
1644 }
1645
1646 return rc;
1647
1648 out:
1649 clear_bit(wil_status_resetting, wil->status);
1650 return rc;
1651 }
1652
wil_fw_error_recovery(struct wil6210_priv * wil)1653 void wil_fw_error_recovery(struct wil6210_priv *wil)
1654 {
1655 wil_dbg_misc(wil, "starting fw error recovery\n");
1656
1657 if (test_bit(wil_status_resetting, wil->status)) {
1658 wil_info(wil, "Reset already in progress\n");
1659 return;
1660 }
1661
1662 wil->recovery_state = fw_recovery_pending;
1663 schedule_work(&wil->fw_error_worker);
1664 }
1665
__wil_up(struct wil6210_priv * wil)1666 int __wil_up(struct wil6210_priv *wil)
1667 {
1668 struct net_device *ndev = wil->main_ndev;
1669 struct wireless_dev *wdev = ndev->ieee80211_ptr;
1670 int rc;
1671
1672 WARN_ON(!mutex_is_locked(&wil->mutex));
1673
1674 rc = wil_reset(wil, true);
1675 if (rc)
1676 return rc;
1677
1678 /* Rx RING. After MAC and beacon */
1679 rc = wil->txrx_ops.rx_init(wil, 1 << rx_ring_order);
1680 if (rc)
1681 return rc;
1682
1683 rc = wil->txrx_ops.tx_init(wil);
1684 if (rc)
1685 return rc;
1686
1687 switch (wdev->iftype) {
1688 case NL80211_IFTYPE_STATION:
1689 wil_dbg_misc(wil, "type: STATION\n");
1690 ndev->type = ARPHRD_ETHER;
1691 break;
1692 case NL80211_IFTYPE_AP:
1693 wil_dbg_misc(wil, "type: AP\n");
1694 ndev->type = ARPHRD_ETHER;
1695 break;
1696 case NL80211_IFTYPE_P2P_CLIENT:
1697 wil_dbg_misc(wil, "type: P2P_CLIENT\n");
1698 ndev->type = ARPHRD_ETHER;
1699 break;
1700 case NL80211_IFTYPE_P2P_GO:
1701 wil_dbg_misc(wil, "type: P2P_GO\n");
1702 ndev->type = ARPHRD_ETHER;
1703 break;
1704 case NL80211_IFTYPE_MONITOR:
1705 wil_dbg_misc(wil, "type: Monitor\n");
1706 ndev->type = ARPHRD_IEEE80211_RADIOTAP;
1707 /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
1708 break;
1709 default:
1710 return -EOPNOTSUPP;
1711 }
1712
1713 /* MAC address - pre-requisite for other commands */
1714 wmi_set_mac_address(wil, ndev->dev_addr);
1715
1716 wil_dbg_misc(wil, "NAPI enable\n");
1717 napi_enable(&wil->napi_rx);
1718 napi_enable(&wil->napi_tx);
1719 set_bit(wil_status_napi_en, wil->status);
1720
1721 wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
1722
1723 return 0;
1724 }
1725
wil_up(struct wil6210_priv * wil)1726 int wil_up(struct wil6210_priv *wil)
1727 {
1728 int rc;
1729
1730 wil_dbg_misc(wil, "up\n");
1731
1732 mutex_lock(&wil->mutex);
1733 rc = __wil_up(wil);
1734 mutex_unlock(&wil->mutex);
1735
1736 return rc;
1737 }
1738
__wil_down(struct wil6210_priv * wil)1739 int __wil_down(struct wil6210_priv *wil)
1740 {
1741 WARN_ON(!mutex_is_locked(&wil->mutex));
1742
1743 set_bit(wil_status_resetting, wil->status);
1744
1745 wil6210_bus_request(wil, 0);
1746
1747 wil_disable_irq(wil);
1748 if (test_and_clear_bit(wil_status_napi_en, wil->status)) {
1749 napi_disable(&wil->napi_rx);
1750 napi_disable(&wil->napi_tx);
1751 wil_dbg_misc(wil, "NAPI disable\n");
1752 }
1753 wil_enable_irq(wil);
1754
1755 mutex_lock(&wil->vif_mutex);
1756 wil_p2p_stop_radio_operations(wil);
1757 wil_abort_scan_all_vifs(wil, false);
1758 mutex_unlock(&wil->vif_mutex);
1759
1760 return wil_reset(wil, false);
1761 }
1762
wil_down(struct wil6210_priv * wil)1763 int wil_down(struct wil6210_priv *wil)
1764 {
1765 int rc;
1766
1767 wil_dbg_misc(wil, "down\n");
1768
1769 wil_set_recovery_state(wil, fw_recovery_idle);
1770 mutex_lock(&wil->mutex);
1771 rc = __wil_down(wil);
1772 mutex_unlock(&wil->mutex);
1773
1774 return rc;
1775 }
1776
wil_find_cid(struct wil6210_priv * wil,u8 mid,const u8 * mac)1777 int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac)
1778 {
1779 int i;
1780 int rc = -ENOENT;
1781
1782 for (i = 0; i < ARRAY_SIZE(wil->sta); i++) {
1783 if (wil->sta[i].mid == mid &&
1784 wil->sta[i].status != wil_sta_unused &&
1785 ether_addr_equal(wil->sta[i].addr, mac)) {
1786 rc = i;
1787 break;
1788 }
1789 }
1790
1791 return rc;
1792 }
1793
wil_halp_vote(struct wil6210_priv * wil)1794 void wil_halp_vote(struct wil6210_priv *wil)
1795 {
1796 unsigned long rc;
1797 unsigned long to_jiffies = msecs_to_jiffies(WAIT_FOR_HALP_VOTE_MS);
1798
1799 mutex_lock(&wil->halp.lock);
1800
1801 wil_dbg_irq(wil, "halp_vote: start, HALP ref_cnt (%d)\n",
1802 wil->halp.ref_cnt);
1803
1804 if (++wil->halp.ref_cnt == 1) {
1805 reinit_completion(&wil->halp.comp);
1806 wil6210_set_halp(wil);
1807 rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
1808 if (!rc) {
1809 wil_err(wil, "HALP vote timed out\n");
1810 /* Mask HALP as done in case the interrupt is raised */
1811 wil6210_mask_halp(wil);
1812 } else {
1813 wil_dbg_irq(wil,
1814 "halp_vote: HALP vote completed after %d ms\n",
1815 jiffies_to_msecs(to_jiffies - rc));
1816 }
1817 }
1818
1819 wil_dbg_irq(wil, "halp_vote: end, HALP ref_cnt (%d)\n",
1820 wil->halp.ref_cnt);
1821
1822 mutex_unlock(&wil->halp.lock);
1823 }
1824
wil_halp_unvote(struct wil6210_priv * wil)1825 void wil_halp_unvote(struct wil6210_priv *wil)
1826 {
1827 WARN_ON(wil->halp.ref_cnt == 0);
1828
1829 mutex_lock(&wil->halp.lock);
1830
1831 wil_dbg_irq(wil, "halp_unvote: start, HALP ref_cnt (%d)\n",
1832 wil->halp.ref_cnt);
1833
1834 if (--wil->halp.ref_cnt == 0) {
1835 wil6210_clear_halp(wil);
1836 wil_dbg_irq(wil, "HALP unvote\n");
1837 }
1838
1839 wil_dbg_irq(wil, "halp_unvote:end, HALP ref_cnt (%d)\n",
1840 wil->halp.ref_cnt);
1841
1842 mutex_unlock(&wil->halp.lock);
1843 }
1844
wil_init_txrx_ops(struct wil6210_priv * wil)1845 void wil_init_txrx_ops(struct wil6210_priv *wil)
1846 {
1847 if (wil->use_enhanced_dma_hw)
1848 wil_init_txrx_ops_edma(wil);
1849 else
1850 wil_init_txrx_ops_legacy_dma(wil);
1851 }
1852
