1 /*
2 * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19 #include "txrx.h"
20
get_rssi0(struct wcn36xx_rx_bd * bd)21 static inline int get_rssi0(struct wcn36xx_rx_bd *bd)
22 {
23 return 100 - ((bd->phy_stat0 >> 24) & 0xff);
24 }
25
26 struct wcn36xx_rate {
27 u16 bitrate;
28 u16 mcs_or_legacy_index;
29 enum mac80211_rx_encoding encoding;
30 enum mac80211_rx_encoding_flags encoding_flags;
31 enum rate_info_bw bw;
32 };
33
34 static const struct wcn36xx_rate wcn36xx_rate_table[] = {
35 /* 11b rates */
36 { 10, 0, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
37 { 20, 1, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
38 { 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
39 { 110, 3, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
40
41 /* 11b SP (short preamble) */
42 { 10, 0, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
43 { 20, 1, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
44 { 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
45 { 110, 3, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
46
47 /* 11ag */
48 { 60, 4, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
49 { 90, 5, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
50 { 120, 6, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
51 { 180, 7, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
52 { 240, 8, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
53 { 360, 9, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
54 { 480, 10, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
55 { 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
56
57 /* 11n */
58 { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
59 { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
60 { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
61 { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
62 { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
63 { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
64 { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
65 { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
66
67 /* 11n SGI */
68 { 72, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
69 { 144, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
70 { 217, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
71 { 289, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
72 { 434, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
73 { 578, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
74 { 650, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
75 { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
76
77 /* 11n GF (greenfield) */
78 { 65, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
79 { 130, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
80 { 195, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
81 { 260, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
82 { 390, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
83 { 520, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
84 { 585, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
85 { 650, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
86
87 /* 11n CB (channel bonding) */
88 { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
89 { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
90 { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
91 { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
92 { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
93 { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
94 { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
95 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
96
97 /* 11n CB + SGI */
98 { 150, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
99 { 300, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
100 { 450, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
101 { 600, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
102 { 900, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
103 { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
104 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
105 { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
106
107 /* 11n GF + CB */
108 { 135, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
109 { 270, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
110 { 405, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
111 { 540, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
112 { 810, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
113 { 1080, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
114 { 1215, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
115 { 1350, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
116
117 /* 11ac reserved indices */
118 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
119 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
120
121 /* 11ac 20 MHz 800ns GI MCS 0-8 */
122 { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
123 { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
124 { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
125 { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
126 { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
127 { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
128 { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
129 { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
130 { 780, 8, RX_ENC_HT, 0, RATE_INFO_BW_20 },
131
132 /* 11ac reserved indices */
133 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
134 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
135 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
136 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
137 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
138 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
139 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
140 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
141 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
142
143 /* 11ac 20 MHz 400ns SGI MCS 6-8 */
144 { 655, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
145 { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
146 { 866, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
147
148 /* 11ac reserved indices */
149 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
150 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
151 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
152
153 /* 11ac 40 MHz 800ns GI MCS 0-9 */
154 { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
155 { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
156 { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
157 { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
158 { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
159 { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
160 { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
161 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
162 { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
163 { 1620, 8, RX_ENC_HT, 0, RATE_INFO_BW_40 },
164 { 1800, 9, RX_ENC_HT, 0, RATE_INFO_BW_40 },
165
166 /* 11ac reserved indices */
167 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
168 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
169 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
170 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
171 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
172 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
173
174 /* 11ac 40 MHz 400ns SGI MCS 5-7 */
175 { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
176 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
177 { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
178
179 /* 11ac reserved index */
180 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
181
182 /* 11ac 40 MHz 400ns SGI MCS 5-7 */
183 { 1800, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
184 { 2000, 9, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
185
186 /* 11ac reserved index */
187 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
188
189 /* 11ac 80 MHz 800ns GI MCS 0-7 */
190 { 292, 0, RX_ENC_HT, 0, RATE_INFO_BW_80},
191 { 585, 1, RX_ENC_HT, 0, RATE_INFO_BW_80},
192 { 877, 2, RX_ENC_HT, 0, RATE_INFO_BW_80},
193 { 1170, 3, RX_ENC_HT, 0, RATE_INFO_BW_80},
194 { 1755, 4, RX_ENC_HT, 0, RATE_INFO_BW_80},
195 { 2340, 5, RX_ENC_HT, 0, RATE_INFO_BW_80},
196 { 2632, 6, RX_ENC_HT, 0, RATE_INFO_BW_80},
197 { 2925, 7, RX_ENC_HT, 0, RATE_INFO_BW_80},
198
199 /* 11 ac reserved index */
200 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
201
202 /* 11ac 80 MHz 800 ns GI MCS 8-9 */
203 { 3510, 8, RX_ENC_HT, 0, RATE_INFO_BW_80},
204 { 3900, 9, RX_ENC_HT, 0, RATE_INFO_BW_80},
205
206 /* 11 ac reserved indices */
207 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
208 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
209 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
210 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
211 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
212 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
213 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
214
215 /* 11ac 80 MHz 400 ns SGI MCS 6-7 */
216 { 2925, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
217 { 3250, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
218
219 /* 11ac reserved index */
220 { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
221
222 /* 11ac 80 MHz 400ns SGI MCS 8-9 */
223 { 3900, 8, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
224 { 4333, 9, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
225 };
226
wcn36xx_rx_skb(struct wcn36xx * wcn,struct sk_buff * skb)227 int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
228 {
229 struct ieee80211_rx_status status;
230 const struct wcn36xx_rate *rate;
231 struct ieee80211_hdr *hdr;
232 struct wcn36xx_rx_bd *bd;
233 struct ieee80211_supported_band *sband;
234 u16 fc, sn;
235
236 /*
237 * All fields must be 0, otherwise it can lead to
238 * unexpected consequences.
239 */
240 memset(&status, 0, sizeof(status));
241
242 bd = (struct wcn36xx_rx_bd *)skb->data;
243 buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32));
244 wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP,
245 "BD <<< ", (char *)bd,
246 sizeof(struct wcn36xx_rx_bd));
247
248 skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len);
249 skb_pull(skb, bd->pdu.mpdu_header_off);
250
251 hdr = (struct ieee80211_hdr *) skb->data;
252 fc = __le16_to_cpu(hdr->frame_control);
253 sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
254
255 status.freq = WCN36XX_CENTER_FREQ(wcn);
256 status.band = WCN36XX_BAND(wcn);
257 status.mactime = 10;
258 status.signal = -get_rssi0(bd);
259 status.antenna = 1;
260 status.flag = 0;
261 status.rx_flags = 0;
262 status.flag |= RX_FLAG_IV_STRIPPED |
263 RX_FLAG_MMIC_STRIPPED |
264 RX_FLAG_DECRYPTED;
265
266 wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x\n", status.flag);
267
268 if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) {
269 rate = &wcn36xx_rate_table[bd->rate_id];
270 status.encoding = rate->encoding;
271 status.enc_flags = rate->encoding_flags;
272 status.bw = rate->bw;
273 status.rate_idx = rate->mcs_or_legacy_index;
274 sband = wcn->hw->wiphy->bands[status.band];
275 status.nss = 1;
276
277 if (status.band == NL80211_BAND_5GHZ &&
278 status.encoding == RX_ENC_LEGACY &&
279 status.rate_idx >= sband->n_bitrates) {
280 /* no dsss rates in 5Ghz rates table */
281 status.rate_idx -= 4;
282 }
283 } else {
284 status.encoding = 0;
285 status.bw = 0;
286 status.enc_flags = 0;
287 status.rate_idx = 0;
288 }
289
290 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
291
292 if (ieee80211_is_beacon(hdr->frame_control)) {
293 wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n",
294 skb, skb->len, fc, sn);
295 wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ",
296 (char *)skb->data, skb->len);
297 } else {
298 wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n",
299 skb, skb->len, fc, sn);
300 wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ",
301 (char *)skb->data, skb->len);
302 }
303
304 ieee80211_rx_irqsafe(wcn->hw, skb);
305
306 return 0;
307 }
308
wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd * bd,u32 mpdu_header_len,u32 len,u16 tid)309 static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd,
310 u32 mpdu_header_len,
311 u32 len,
312 u16 tid)
313 {
314 bd->pdu.mpdu_header_len = mpdu_header_len;
315 bd->pdu.mpdu_header_off = sizeof(*bd);
316 bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len +
317 bd->pdu.mpdu_header_off;
318 bd->pdu.mpdu_len = len;
319 bd->pdu.tid = tid;
320 /* Use seq number generated by mac80211 */
321 bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_HOST;
322 }
323
get_vif_by_addr(struct wcn36xx * wcn,u8 * addr)324 static inline struct wcn36xx_vif *get_vif_by_addr(struct wcn36xx *wcn,
325 u8 *addr)
326 {
327 struct wcn36xx_vif *vif_priv = NULL;
328 struct ieee80211_vif *vif = NULL;
329 list_for_each_entry(vif_priv, &wcn->vif_list, list) {
330 vif = wcn36xx_priv_to_vif(vif_priv);
331 if (memcmp(vif->addr, addr, ETH_ALEN) == 0)
332 return vif_priv;
333 }
334 wcn36xx_warn("vif %pM not found\n", addr);
335 return NULL;
336 }
337
wcn36xx_tx_start_ampdu(struct wcn36xx * wcn,struct wcn36xx_sta * sta_priv,struct sk_buff * skb)338 static void wcn36xx_tx_start_ampdu(struct wcn36xx *wcn,
339 struct wcn36xx_sta *sta_priv,
340 struct sk_buff *skb)
341 {
342 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
343 struct ieee80211_sta *sta;
344 u8 *qc, tid;
345
346 if (!conf_is_ht(&wcn->hw->conf))
347 return;
348
349 sta = wcn36xx_priv_to_sta(sta_priv);
350
351 if (WARN_ON(!ieee80211_is_data_qos(hdr->frame_control)))
352 return;
353
354 if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
355 return;
356
357 qc = ieee80211_get_qos_ctl(hdr);
358 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
359
360 spin_lock(&sta_priv->ampdu_lock);
361 if (sta_priv->ampdu_state[tid] != WCN36XX_AMPDU_NONE)
362 goto out_unlock;
363
364 if (sta_priv->non_agg_frame_ct++ >= WCN36XX_AMPDU_START_THRESH) {
365 sta_priv->ampdu_state[tid] = WCN36XX_AMPDU_START;
366 sta_priv->non_agg_frame_ct = 0;
367 ieee80211_start_tx_ba_session(sta, tid, 0);
368 }
369 out_unlock:
370 spin_unlock(&sta_priv->ampdu_lock);
371 }
372
wcn36xx_set_tx_data(struct wcn36xx_tx_bd * bd,struct wcn36xx * wcn,struct wcn36xx_vif ** vif_priv,struct wcn36xx_sta * sta_priv,struct sk_buff * skb,bool bcast)373 static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd,
374 struct wcn36xx *wcn,
375 struct wcn36xx_vif **vif_priv,
376 struct wcn36xx_sta *sta_priv,
377 struct sk_buff *skb,
378 bool bcast)
379 {
380 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
381 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
382 struct ieee80211_vif *vif = NULL;
383 struct wcn36xx_vif *__vif_priv = NULL;
384 bool is_data_qos = ieee80211_is_data_qos(hdr->frame_control);
385 u16 tid = 0;
386
387 bd->bd_rate = WCN36XX_BD_RATE_DATA;
388
389 /*
390 * For not unicast frames mac80211 will not set sta pointer so use
391 * self_sta_index instead.
392 */
393 if (sta_priv) {
394 __vif_priv = sta_priv->vif;
395 vif = wcn36xx_priv_to_vif(__vif_priv);
396
397 bd->dpu_sign = sta_priv->ucast_dpu_sign;
398 if (vif->type == NL80211_IFTYPE_STATION) {
399 bd->sta_index = sta_priv->bss_sta_index;
400 bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index;
401 } else if (vif->type == NL80211_IFTYPE_AP ||
402 vif->type == NL80211_IFTYPE_ADHOC ||
403 vif->type == NL80211_IFTYPE_MESH_POINT) {
404 bd->sta_index = sta_priv->sta_index;
405 bd->dpu_desc_idx = sta_priv->dpu_desc_index;
406 }
407 } else {
408 __vif_priv = get_vif_by_addr(wcn, hdr->addr2);
409 bd->sta_index = __vif_priv->self_sta_index;
410 bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index;
411 bd->dpu_sign = __vif_priv->self_ucast_dpu_sign;
412 }
413
414 if (is_data_qos) {
415 tid = ieee80211_get_tid(hdr);
416 /* TID->QID is one-to-one mapping */
417 bd->queue_id = tid;
418 }
419
420 if (info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT ||
421 (sta_priv && !sta_priv->is_data_encrypted)) {
422 bd->dpu_ne = 1;
423 }
424
425 if (ieee80211_is_any_nullfunc(hdr->frame_control)) {
426 /* Don't use a regular queue for null packet (no ampdu) */
427 bd->queue_id = WCN36XX_TX_U_WQ_ID;
428 }
429
430 if (bcast) {
431 bd->ub = 1;
432 bd->ack_policy = 1;
433 }
434 *vif_priv = __vif_priv;
435
436 wcn36xx_set_tx_pdu(bd,
437 is_data_qos ?
438 sizeof(struct ieee80211_qos_hdr) :
439 sizeof(struct ieee80211_hdr_3addr),
440 skb->len, tid);
441
442 if (sta_priv && is_data_qos)
443 wcn36xx_tx_start_ampdu(wcn, sta_priv, skb);
444 }
445
wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd * bd,struct wcn36xx * wcn,struct wcn36xx_vif ** vif_priv,struct sk_buff * skb,bool bcast)446 static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd,
447 struct wcn36xx *wcn,
448 struct wcn36xx_vif **vif_priv,
449 struct sk_buff *skb,
450 bool bcast)
451 {
452 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
453 struct wcn36xx_vif *__vif_priv =
454 get_vif_by_addr(wcn, hdr->addr2);
455 bd->sta_index = __vif_priv->self_sta_index;
456 bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index;
457 bd->dpu_ne = 1;
458
459 /* default rate for unicast */
460 if (ieee80211_is_mgmt(hdr->frame_control))
461 bd->bd_rate = (WCN36XX_BAND(wcn) == NL80211_BAND_5GHZ) ?
462 WCN36XX_BD_RATE_CTRL :
463 WCN36XX_BD_RATE_MGMT;
464 else if (ieee80211_is_ctl(hdr->frame_control))
465 bd->bd_rate = WCN36XX_BD_RATE_CTRL;
466 else
467 wcn36xx_warn("frame control type unknown\n");
468
469 /*
470 * In joining state trick hardware that probe is sent as
471 * unicast even if address is broadcast.
472 */
473 if (__vif_priv->is_joining &&
474 ieee80211_is_probe_req(hdr->frame_control))
475 bcast = false;
476
477 if (bcast) {
478 /* broadcast */
479 bd->ub = 1;
480 /* No ack needed not unicast */
481 bd->ack_policy = 1;
482 bd->queue_id = WCN36XX_TX_B_WQ_ID;
483 } else
484 bd->queue_id = WCN36XX_TX_U_WQ_ID;
485 *vif_priv = __vif_priv;
486
487 wcn36xx_set_tx_pdu(bd,
488 ieee80211_is_data_qos(hdr->frame_control) ?
489 sizeof(struct ieee80211_qos_hdr) :
490 sizeof(struct ieee80211_hdr_3addr),
491 skb->len, WCN36XX_TID);
492 }
493
wcn36xx_start_tx(struct wcn36xx * wcn,struct wcn36xx_sta * sta_priv,struct sk_buff * skb)494 int wcn36xx_start_tx(struct wcn36xx *wcn,
495 struct wcn36xx_sta *sta_priv,
496 struct sk_buff *skb)
497 {
498 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
499 struct wcn36xx_vif *vif_priv = NULL;
500 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
501 unsigned long flags;
502 bool is_low = ieee80211_is_data(hdr->frame_control);
503 bool bcast = is_broadcast_ether_addr(hdr->addr1) ||
504 is_multicast_ether_addr(hdr->addr1);
505 struct wcn36xx_tx_bd bd;
506 int ret;
507
508 memset(&bd, 0, sizeof(bd));
509
510 wcn36xx_dbg(WCN36XX_DBG_TX,
511 "tx skb %p len %d fc %04x sn %d %s %s\n",
512 skb, skb->len, __le16_to_cpu(hdr->frame_control),
513 IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)),
514 is_low ? "low" : "high", bcast ? "bcast" : "ucast");
515
516 wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len);
517
518 bd.dpu_rf = WCN36XX_BMU_WQ_TX;
519
520 if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) {
521 wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n");
522
523 spin_lock_irqsave(&wcn->dxe_lock, flags);
524 if (wcn->tx_ack_skb) {
525 spin_unlock_irqrestore(&wcn->dxe_lock, flags);
526 wcn36xx_warn("tx_ack_skb already set\n");
527 return -EINVAL;
528 }
529
530 wcn->tx_ack_skb = skb;
531 spin_unlock_irqrestore(&wcn->dxe_lock, flags);
532
533 /* Only one at a time is supported by fw. Stop the TX queues
534 * until the ack status gets back.
535 */
536 ieee80211_stop_queues(wcn->hw);
537
538 /* TX watchdog if no TX irq or ack indication received */
539 mod_timer(&wcn->tx_ack_timer, jiffies + HZ / 10);
540
541 /* Request ack indication from the firmware */
542 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
543 bd.tx_comp = 1;
544 }
545
546 /* Data frames served first*/
547 if (is_low)
548 wcn36xx_set_tx_data(&bd, wcn, &vif_priv, sta_priv, skb, bcast);
549 else
550 /* MGMT and CTRL frames are handeld here*/
551 wcn36xx_set_tx_mgmt(&bd, wcn, &vif_priv, skb, bcast);
552
553 buff_to_be((u32 *)&bd, sizeof(bd)/sizeof(u32));
554 bd.tx_bd_sign = 0xbdbdbdbd;
555
556 ret = wcn36xx_dxe_tx_frame(wcn, vif_priv, &bd, skb, is_low);
557 if (ret && (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS)) {
558 /* If the skb has not been transmitted,
559 * don't keep a reference to it.
560 */
561 spin_lock_irqsave(&wcn->dxe_lock, flags);
562 wcn->tx_ack_skb = NULL;
563 spin_unlock_irqrestore(&wcn->dxe_lock, flags);
564
565 ieee80211_wake_queues(wcn->hw);
566 }
567
568 return ret;
569 }
570
