1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2019, Intel Corporation. */ 3 4 #ifndef _ICE_FLEX_TYPE_H_ 5 #define _ICE_FLEX_TYPE_H_ 6 /* Extraction Sequence (Field Vector) Table */ 7 struct ice_fv_word { 8 u8 prot_id; 9 u16 off; /* Offset within the protocol header */ 10 u8 resvrd; 11 } __packed; 12 13 #define ICE_MAX_FV_WORDS 48 14 struct ice_fv { 15 struct ice_fv_word ew[ICE_MAX_FV_WORDS]; 16 }; 17 18 /* Package and segment headers and tables */ 19 struct ice_pkg_hdr { 20 struct ice_pkg_ver format_ver; 21 __le32 seg_count; 22 __le32 seg_offset[1]; 23 }; 24 25 /* generic segment */ 26 struct ice_generic_seg_hdr { 27 #define SEGMENT_TYPE_METADATA 0x00000001 28 #define SEGMENT_TYPE_ICE 0x00000010 29 __le32 seg_type; 30 struct ice_pkg_ver seg_ver; 31 __le32 seg_size; 32 char seg_name[ICE_PKG_NAME_SIZE]; 33 }; 34 35 /* ice specific segment */ 36 37 union ice_device_id { 38 struct { 39 __le16 device_id; 40 __le16 vendor_id; 41 } dev_vend_id; 42 __le32 id; 43 }; 44 45 struct ice_device_id_entry { 46 union ice_device_id device; 47 union ice_device_id sub_device; 48 }; 49 50 struct ice_seg { 51 struct ice_generic_seg_hdr hdr; 52 __le32 device_table_count; 53 struct ice_device_id_entry device_table[1]; 54 }; 55 56 struct ice_nvm_table { 57 __le32 table_count; 58 __le32 vers[1]; 59 }; 60 61 struct ice_buf { 62 #define ICE_PKG_BUF_SIZE 4096 63 u8 buf[ICE_PKG_BUF_SIZE]; 64 }; 65 66 struct ice_buf_table { 67 __le32 buf_count; 68 struct ice_buf buf_array[1]; 69 }; 70 71 /* global metadata specific segment */ 72 struct ice_global_metadata_seg { 73 struct ice_generic_seg_hdr hdr; 74 struct ice_pkg_ver pkg_ver; 75 __le32 track_id; 76 char pkg_name[ICE_PKG_NAME_SIZE]; 77 }; 78 79 #define ICE_MIN_S_OFF 12 80 #define ICE_MAX_S_OFF 4095 81 #define ICE_MIN_S_SZ 1 82 #define ICE_MAX_S_SZ 4084 83 84 /* section information */ 85 struct ice_section_entry { 86 __le32 type; 87 __le16 offset; 88 __le16 size; 89 }; 90 91 #define ICE_MIN_S_COUNT 1 92 #define ICE_MAX_S_COUNT 511 93 #define ICE_MIN_S_DATA_END 12 94 #define ICE_MAX_S_DATA_END 4096 95 96 #define ICE_METADATA_BUF 0x80000000 97 98 struct ice_buf_hdr { 99 __le16 section_count; 100 __le16 data_end; 101 struct ice_section_entry section_entry[1]; 102 }; 103 104 #define ICE_MAX_ENTRIES_IN_BUF(hd_sz, ent_sz) ((ICE_PKG_BUF_SIZE - \ 105 sizeof(struct ice_buf_hdr) - (hd_sz)) / (ent_sz)) 106 107 /* ice package section IDs */ 108 #define ICE_SID_XLT1_SW 12 109 #define ICE_SID_XLT2_SW 13 110 #define ICE_SID_PROFID_TCAM_SW 14 111 #define ICE_SID_PROFID_REDIR_SW 15 112 #define ICE_SID_FLD_VEC_SW 16 113 114 #define ICE_SID_XLT1_ACL 22 115 #define ICE_SID_XLT2_ACL 23 116 #define ICE_SID_PROFID_TCAM_ACL 24 117 #define ICE_SID_PROFID_REDIR_ACL 25 118 #define ICE_SID_FLD_VEC_ACL 26 119 120 #define ICE_SID_XLT1_FD 32 121 #define ICE_SID_XLT2_FD 33 122 #define ICE_SID_PROFID_TCAM_FD 34 123 #define ICE_SID_PROFID_REDIR_FD 35 124 #define ICE_SID_FLD_VEC_FD 36 125 126 #define ICE_SID_XLT1_RSS 42 127 #define ICE_SID_XLT2_RSS 43 128 #define ICE_SID_PROFID_TCAM_RSS 44 129 #define ICE_SID_PROFID_REDIR_RSS 45 130 #define ICE_SID_FLD_VEC_RSS 46 131 132 #define ICE_SID_RXPARSER_BOOST_TCAM 56 133 134 #define ICE_SID_XLT1_PE 82 135 #define ICE_SID_XLT2_PE 83 136 #define ICE_SID_PROFID_TCAM_PE 84 137 #define ICE_SID_PROFID_REDIR_PE 85 138 #define ICE_SID_FLD_VEC_PE 86 139 140 /* Label Metadata section IDs */ 141 #define ICE_SID_LBL_FIRST 0x80000010 142 #define ICE_SID_LBL_RXPARSER_TMEM 0x80000018 143 /* The following define MUST be updated to reflect the last label section ID */ 144 #define ICE_SID_LBL_LAST 0x80000038 145 146 enum ice_block { 147 ICE_BLK_SW = 0, 148 ICE_BLK_ACL, 149 ICE_BLK_FD, 150 ICE_BLK_RSS, 151 ICE_BLK_PE, 152 ICE_BLK_COUNT 153 }; 154 155 /* package labels */ 156 struct ice_label { 157 __le16 value; 158 #define ICE_PKG_LABEL_SIZE 64 159 char name[ICE_PKG_LABEL_SIZE]; 160 }; 161 162 struct ice_label_section { 163 __le16 count; 164 struct ice_label label[1]; 165 }; 166 167 #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 168 sizeof(struct ice_label_section) - sizeof(struct ice_label), \ 169 sizeof(struct ice_label)) 170 171 struct ice_sw_fv_section { 172 __le16 count; 173 __le16 base_offset; 174 struct ice_fv fv[1]; 175 }; 176 177 /* The BOOST TCAM stores the match packet header in reverse order, meaning 178 * the fields are reversed; in addition, this means that the normally big endian 179 * fields of the packet are now little endian. 180 */ 181 struct ice_boost_key_value { 182 #define ICE_BOOST_REMAINING_HV_KEY 15 183 u8 remaining_hv_key[ICE_BOOST_REMAINING_HV_KEY]; 184 __le16 hv_dst_port_key; 185 __le16 hv_src_port_key; 186 u8 tcam_search_key; 187 } __packed; 188 189 struct ice_boost_key { 190 struct ice_boost_key_value key; 191 struct ice_boost_key_value key2; 192 }; 193 194 /* package Boost TCAM entry */ 195 struct ice_boost_tcam_entry { 196 __le16 addr; 197 __le16 reserved; 198 /* break up the 40 bytes of key into different fields */ 199 struct ice_boost_key key; 200 u8 boost_hit_index_group; 201 /* The following contains bitfields which are not on byte boundaries. 202 * These fields are currently unused by driver software. 203 */ 204 #define ICE_BOOST_BIT_FIELDS 43 205 u8 bit_fields[ICE_BOOST_BIT_FIELDS]; 206 }; 207 208 struct ice_boost_tcam_section { 209 __le16 count; 210 __le16 reserved; 211 struct ice_boost_tcam_entry tcam[1]; 212 }; 213 214 #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \ 215 sizeof(struct ice_boost_tcam_section) - \ 216 sizeof(struct ice_boost_tcam_entry), \ 217 sizeof(struct ice_boost_tcam_entry)) 218 219 struct ice_xlt1_section { 220 __le16 count; 221 __le16 offset; 222 u8 value[1]; 223 } __packed; 224 225 struct ice_xlt2_section { 226 __le16 count; 227 __le16 offset; 228 __le16 value[1]; 229 }; 230 231 struct ice_prof_redir_section { 232 __le16 count; 233 __le16 offset; 234 u8 redir_value[1]; 235 }; 236 237 struct ice_pkg_enum { 238 struct ice_buf_table *buf_table; 239 u32 buf_idx; 240 241 u32 type; 242 struct ice_buf_hdr *buf; 243 u32 sect_idx; 244 void *sect; 245 u32 sect_type; 246 247 u32 entry_idx; 248 void *(*handler)(u32 sect_type, void *section, u32 index, u32 *offset); 249 }; 250 251 struct ice_es { 252 u32 sid; 253 u16 count; 254 u16 fvw; 255 u16 *ref_count; 256 struct list_head prof_map; 257 struct ice_fv_word *t; 258 struct mutex prof_map_lock; /* protect access to profiles list */ 259 u8 *written; 260 u8 reverse; /* set to true to reverse FV order */ 261 }; 262 263 /* PTYPE Group management */ 264 265 /* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type 266 * group (PTG) ID as output. 267 * 268 * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE 269 * are a part of this group until moved to a new PTG. 270 */ 271 #define ICE_DEFAULT_PTG 0 272 273 struct ice_ptg_entry { 274 struct ice_ptg_ptype *first_ptype; 275 u8 in_use; 276 }; 277 278 struct ice_ptg_ptype { 279 struct ice_ptg_ptype *next_ptype; 280 u8 ptg; 281 }; 282 283 struct ice_vsig_entry { 284 struct list_head prop_lst; 285 struct ice_vsig_vsi *first_vsi; 286 u8 in_use; 287 }; 288 289 struct ice_vsig_vsi { 290 struct ice_vsig_vsi *next_vsi; 291 u32 prop_mask; 292 u16 changed; 293 u16 vsig; 294 }; 295 296 #define ICE_XLT1_CNT 1024 297 #define ICE_MAX_PTGS 256 298 299 /* XLT1 Table */ 300 struct ice_xlt1 { 301 struct ice_ptg_entry *ptg_tbl; 302 struct ice_ptg_ptype *ptypes; 303 u8 *t; 304 u32 sid; 305 u16 count; 306 }; 307 308 #define ICE_XLT2_CNT 768 309 #define ICE_MAX_VSIGS 768 310 311 /* VSIG bit layout: 312 * [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS 313 * [13:15]: PF number of device 314 */ 315 #define ICE_VSIG_IDX_M (0x1FFF) 316 #define ICE_PF_NUM_S 13 317 #define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S) 318 #define ICE_VSIG_VALUE(vsig, pf_id) \ 319 (u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \ 320 (((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M)) 321 #define ICE_DEFAULT_VSIG 0 322 323 /* XLT2 Table */ 324 struct ice_xlt2 { 325 struct ice_vsig_entry *vsig_tbl; 326 struct ice_vsig_vsi *vsis; 327 u16 *t; 328 u32 sid; 329 u16 count; 330 }; 331 332 /* Keys are made up of two values, each one-half the size of the key. 333 * For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values) 334 */ 335 #define ICE_TCAM_KEY_VAL_SZ 5 336 #define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ) 337 338 struct ice_prof_tcam_entry { 339 __le16 addr; 340 u8 key[ICE_TCAM_KEY_SZ]; 341 u8 prof_id; 342 } __packed; 343 344 struct ice_prof_id_section { 345 __le16 count; 346 struct ice_prof_tcam_entry entry[1]; 347 } __packed; 348 349 struct ice_prof_tcam { 350 u32 sid; 351 u16 count; 352 u16 max_prof_id; 353 struct ice_prof_tcam_entry *t; 354 u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */ 355 }; 356 357 struct ice_prof_redir { 358 u8 *t; 359 u32 sid; 360 u16 count; 361 }; 362 363 /* Tables per block */ 364 struct ice_blk_info { 365 struct ice_xlt1 xlt1; 366 struct ice_xlt2 xlt2; 367 struct ice_prof_tcam prof; 368 struct ice_prof_redir prof_redir; 369 struct ice_es es; 370 u8 overwrite; /* set to true to allow overwrite of table entries */ 371 u8 is_list_init; 372 }; 373 374 #endif /* _ICE_FLEX_TYPE_H_ */ 375
