1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /**************************************************************************
3 *
4 * Copyright 2015 VMware, Inc., Palo Alto, CA., USA
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27 /*
28 * This file implements the vmwgfx context binding manager,
29 * The sole reason for having to use this code is that vmware guest
30 * backed contexts can be swapped out to their backing mobs by the device
31 * at any time, also swapped in at any time. At swapin time, the device
32 * validates the context bindings to make sure they point to valid resources.
33 * It's this outside-of-drawcall validation (that can happen at any time),
34 * that makes this code necessary.
35 *
36 * We therefore need to kill any context bindings pointing to a resource
37 * when the resource is swapped out. Furthermore, if the vmwgfx driver has
38 * swapped out the context we can't swap it in again to kill bindings because
39 * of backing mob reservation lockdep violations, so as part of
40 * context swapout, also kill all bindings of a context, so that they are
41 * already killed if a resource to which a binding points
42 * needs to be swapped out.
43 *
44 * Note that a resource can be pointed to by bindings from multiple contexts,
45 * Therefore we can't easily protect this data by a per context mutex
46 * (unless we use deadlock-safe WW mutexes). So we use a global binding_mutex
47 * to protect all binding manager data.
48 *
49 * Finally, any association between a context and a global resource
50 * (surface, shader or even DX query) is conceptually a context binding that
51 * needs to be tracked by this code.
52 */
53
54 #include "vmwgfx_drv.h"
55 #include "vmwgfx_binding.h"
56 #include "device_include/svga3d_reg.h"
57
58 #define VMW_BINDING_RT_BIT 0
59 #define VMW_BINDING_PS_BIT 1
60 #define VMW_BINDING_SO_T_BIT 2
61 #define VMW_BINDING_VB_BIT 3
62 #define VMW_BINDING_UAV_BIT 4
63 #define VMW_BINDING_CS_UAV_BIT 5
64 #define VMW_BINDING_NUM_BITS 6
65
66 #define VMW_BINDING_PS_SR_BIT 0
67
68 /**
69 * struct vmw_ctx_binding_state - per context binding state
70 *
71 * @dev_priv: Pointer to device private structure.
72 * @list: linked list of individual active bindings.
73 * @render_targets: Render target bindings.
74 * @texture_units: Texture units bindings.
75 * @ds_view: Depth-stencil view binding.
76 * @so_targets: StreamOutput target bindings.
77 * @vertex_buffers: Vertex buffer bindings.
78 * @index_buffer: Index buffer binding.
79 * @per_shader: Per shader-type bindings.
80 * @ua_views: UAV bindings.
81 * @so_state: StreamOutput bindings.
82 * @dirty: Bitmap tracking per binding-type changes that have not yet
83 * been emitted to the device.
84 * @dirty_vb: Bitmap tracking individual vertex buffer binding changes that
85 * have not yet been emitted to the device.
86 * @bind_cmd_buffer: Scratch space used to construct binding commands.
87 * @bind_cmd_count: Number of binding command data entries in @bind_cmd_buffer
88 * @bind_first_slot: Used together with @bind_cmd_buffer to indicate the
89 * device binding slot of the first command data entry in @bind_cmd_buffer.
90 *
91 * Note that this structure also provides storage space for the individual
92 * struct vmw_ctx_binding objects, so that no dynamic allocation is needed
93 * for individual bindings.
94 *
95 */
96 struct vmw_ctx_binding_state {
97 struct vmw_private *dev_priv;
98 struct list_head list;
99 struct vmw_ctx_bindinfo_view render_targets[SVGA3D_RT_MAX];
100 struct vmw_ctx_bindinfo_tex texture_units[SVGA3D_NUM_TEXTURE_UNITS];
101 struct vmw_ctx_bindinfo_view ds_view;
102 struct vmw_ctx_bindinfo_so_target so_targets[SVGA3D_DX_MAX_SOTARGETS];
103 struct vmw_ctx_bindinfo_vb vertex_buffers[SVGA3D_DX_MAX_VERTEXBUFFERS];
104 struct vmw_ctx_bindinfo_ib index_buffer;
105 struct vmw_dx_shader_bindings per_shader[SVGA3D_NUM_SHADERTYPE];
106 struct vmw_ctx_bindinfo_uav ua_views[VMW_MAX_UAV_BIND_TYPE];
107 struct vmw_ctx_bindinfo_so so_state;
108
109 unsigned long dirty;
110 DECLARE_BITMAP(dirty_vb, SVGA3D_DX_MAX_VERTEXBUFFERS);
111
112 u32 bind_cmd_buffer[VMW_MAX_VIEW_BINDINGS];
113 u32 bind_cmd_count;
114 u32 bind_first_slot;
115 };
116
117 static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind);
118 static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
119 bool rebind);
120 static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi, bool rebind);
121 static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind);
122 static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind);
123 static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind);
124 static int vmw_binding_scrub_so_target(struct vmw_ctx_bindinfo *bi, bool rebind);
125 static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs);
126 static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi,
127 bool rebind);
128 static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind);
129 static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind);
130 static int vmw_binding_scrub_uav(struct vmw_ctx_bindinfo *bi, bool rebind);
131 static int vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo *bi, bool rebind);
132 static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind);
133
134 static void vmw_binding_build_asserts(void) __attribute__ ((unused));
135
136 typedef int (*vmw_scrub_func)(struct vmw_ctx_bindinfo *, bool);
137
138 /**
139 * struct vmw_binding_info - Per binding type information for the binding
140 * manager
141 *
142 * @size: The size of the struct binding derived from a struct vmw_ctx_bindinfo.
143 * @offsets: array[shader_slot] of offsets to the array[slot]
144 * of struct bindings for the binding type.
145 * @scrub_func: Pointer to the scrub function for this binding type.
146 *
147 * Holds static information to help optimize the binding manager and avoid
148 * an excessive amount of switch statements.
149 */
150 struct vmw_binding_info {
151 size_t size;
152 const size_t *offsets;
153 vmw_scrub_func scrub_func;
154 };
155
156 /*
157 * A number of static variables that help determine the scrub func and the
158 * location of the struct vmw_ctx_bindinfo slots for each binding type.
159 */
160 static const size_t vmw_binding_shader_offsets[] = {
161 offsetof(struct vmw_ctx_binding_state, per_shader[0].shader),
162 offsetof(struct vmw_ctx_binding_state, per_shader[1].shader),
163 offsetof(struct vmw_ctx_binding_state, per_shader[2].shader),
164 offsetof(struct vmw_ctx_binding_state, per_shader[3].shader),
165 offsetof(struct vmw_ctx_binding_state, per_shader[4].shader),
166 offsetof(struct vmw_ctx_binding_state, per_shader[5].shader),
167 };
168 static const size_t vmw_binding_rt_offsets[] = {
169 offsetof(struct vmw_ctx_binding_state, render_targets),
170 };
171 static const size_t vmw_binding_tex_offsets[] = {
172 offsetof(struct vmw_ctx_binding_state, texture_units),
173 };
174 static const size_t vmw_binding_cb_offsets[] = {
175 offsetof(struct vmw_ctx_binding_state, per_shader[0].const_buffers),
176 offsetof(struct vmw_ctx_binding_state, per_shader[1].const_buffers),
177 offsetof(struct vmw_ctx_binding_state, per_shader[2].const_buffers),
178 offsetof(struct vmw_ctx_binding_state, per_shader[3].const_buffers),
179 offsetof(struct vmw_ctx_binding_state, per_shader[4].const_buffers),
180 offsetof(struct vmw_ctx_binding_state, per_shader[5].const_buffers),
181 };
182 static const size_t vmw_binding_dx_ds_offsets[] = {
183 offsetof(struct vmw_ctx_binding_state, ds_view),
184 };
185 static const size_t vmw_binding_sr_offsets[] = {
186 offsetof(struct vmw_ctx_binding_state, per_shader[0].shader_res),
187 offsetof(struct vmw_ctx_binding_state, per_shader[1].shader_res),
188 offsetof(struct vmw_ctx_binding_state, per_shader[2].shader_res),
189 offsetof(struct vmw_ctx_binding_state, per_shader[3].shader_res),
190 offsetof(struct vmw_ctx_binding_state, per_shader[4].shader_res),
191 offsetof(struct vmw_ctx_binding_state, per_shader[5].shader_res),
192 };
193 static const size_t vmw_binding_so_target_offsets[] = {
194 offsetof(struct vmw_ctx_binding_state, so_targets),
195 };
196 static const size_t vmw_binding_vb_offsets[] = {
197 offsetof(struct vmw_ctx_binding_state, vertex_buffers),
198 };
199 static const size_t vmw_binding_ib_offsets[] = {
200 offsetof(struct vmw_ctx_binding_state, index_buffer),
201 };
202 static const size_t vmw_binding_uav_offsets[] = {
203 offsetof(struct vmw_ctx_binding_state, ua_views[0].views),
204 };
205 static const size_t vmw_binding_cs_uav_offsets[] = {
206 offsetof(struct vmw_ctx_binding_state, ua_views[1].views),
207 };
208 static const size_t vmw_binding_so_offsets[] = {
209 offsetof(struct vmw_ctx_binding_state, so_state),
210 };
211
212 static const struct vmw_binding_info vmw_binding_infos[] = {
213 [vmw_ctx_binding_shader] = {
214 .size = sizeof(struct vmw_ctx_bindinfo_shader),
215 .offsets = vmw_binding_shader_offsets,
216 .scrub_func = vmw_binding_scrub_shader},
217 [vmw_ctx_binding_rt] = {
218 .size = sizeof(struct vmw_ctx_bindinfo_view),
219 .offsets = vmw_binding_rt_offsets,
220 .scrub_func = vmw_binding_scrub_render_target},
221 [vmw_ctx_binding_tex] = {
222 .size = sizeof(struct vmw_ctx_bindinfo_tex),
223 .offsets = vmw_binding_tex_offsets,
224 .scrub_func = vmw_binding_scrub_texture},
225 [vmw_ctx_binding_cb] = {
226 .size = sizeof(struct vmw_ctx_bindinfo_cb),
227 .offsets = vmw_binding_cb_offsets,
228 .scrub_func = vmw_binding_scrub_cb},
229 [vmw_ctx_binding_dx_shader] = {
230 .size = sizeof(struct vmw_ctx_bindinfo_shader),
231 .offsets = vmw_binding_shader_offsets,
232 .scrub_func = vmw_binding_scrub_dx_shader},
233 [vmw_ctx_binding_dx_rt] = {
234 .size = sizeof(struct vmw_ctx_bindinfo_view),
235 .offsets = vmw_binding_rt_offsets,
236 .scrub_func = vmw_binding_scrub_dx_rt},
237 [vmw_ctx_binding_sr] = {
238 .size = sizeof(struct vmw_ctx_bindinfo_view),
239 .offsets = vmw_binding_sr_offsets,
240 .scrub_func = vmw_binding_scrub_sr},
241 [vmw_ctx_binding_ds] = {
242 .size = sizeof(struct vmw_ctx_bindinfo_view),
243 .offsets = vmw_binding_dx_ds_offsets,
244 .scrub_func = vmw_binding_scrub_dx_rt},
245 [vmw_ctx_binding_so_target] = {
246 .size = sizeof(struct vmw_ctx_bindinfo_so_target),
247 .offsets = vmw_binding_so_target_offsets,
248 .scrub_func = vmw_binding_scrub_so_target},
249 [vmw_ctx_binding_vb] = {
250 .size = sizeof(struct vmw_ctx_bindinfo_vb),
251 .offsets = vmw_binding_vb_offsets,
252 .scrub_func = vmw_binding_scrub_vb},
253 [vmw_ctx_binding_ib] = {
254 .size = sizeof(struct vmw_ctx_bindinfo_ib),
255 .offsets = vmw_binding_ib_offsets,
256 .scrub_func = vmw_binding_scrub_ib},
257 [vmw_ctx_binding_uav] = {
258 .size = sizeof(struct vmw_ctx_bindinfo_view),
259 .offsets = vmw_binding_uav_offsets,
260 .scrub_func = vmw_binding_scrub_uav},
261 [vmw_ctx_binding_cs_uav] = {
262 .size = sizeof(struct vmw_ctx_bindinfo_view),
263 .offsets = vmw_binding_cs_uav_offsets,
264 .scrub_func = vmw_binding_scrub_cs_uav},
265 [vmw_ctx_binding_so] = {
266 .size = sizeof(struct vmw_ctx_bindinfo_so),
267 .offsets = vmw_binding_so_offsets,
268 .scrub_func = vmw_binding_scrub_so},
269 };
270
271 /**
272 * vmw_cbs_context - Return a pointer to the context resource of a
273 * context binding state tracker.
274 *
275 * @cbs: The context binding state tracker.
276 *
277 * Provided there are any active bindings, this function will return an
278 * unreferenced pointer to the context resource that owns the context
279 * binding state tracker. If there are no active bindings, this function
280 * will return NULL. Note that the caller must somehow ensure that a reference
281 * is held on the context resource prior to calling this function.
282 */
283 static const struct vmw_resource *
vmw_cbs_context(const struct vmw_ctx_binding_state * cbs)284 vmw_cbs_context(const struct vmw_ctx_binding_state *cbs)
285 {
286 if (list_empty(&cbs->list))
287 return NULL;
288
289 return list_first_entry(&cbs->list, struct vmw_ctx_bindinfo,
290 ctx_list)->ctx;
291 }
292
293 /**
294 * vmw_binding_loc - determine the struct vmw_ctx_bindinfo slot location.
295 *
296 * @cbs: Pointer to a struct vmw_ctx_binding state which holds the slot.
297 * @bt: The binding type.
298 * @shader_slot: The shader slot of the binding. If none, then set to 0.
299 * @slot: The slot of the binding.
300 */
301 static struct vmw_ctx_bindinfo *
vmw_binding_loc(struct vmw_ctx_binding_state * cbs,enum vmw_ctx_binding_type bt,u32 shader_slot,u32 slot)302 vmw_binding_loc(struct vmw_ctx_binding_state *cbs,
303 enum vmw_ctx_binding_type bt, u32 shader_slot, u32 slot)
304 {
305 const struct vmw_binding_info *b = &vmw_binding_infos[bt];
306 size_t offset = b->offsets[shader_slot] + b->size*slot;
307
308 return (struct vmw_ctx_bindinfo *)((u8 *) cbs + offset);
309 }
310
311 /**
312 * vmw_binding_drop: Stop tracking a context binding
313 *
314 * @bi: Pointer to binding tracker storage.
315 *
316 * Stops tracking a context binding, and re-initializes its storage.
317 * Typically used when the context binding is replaced with a binding to
318 * another (or the same, for that matter) resource.
319 */
vmw_binding_drop(struct vmw_ctx_bindinfo * bi)320 static void vmw_binding_drop(struct vmw_ctx_bindinfo *bi)
321 {
322 list_del(&bi->ctx_list);
323 if (!list_empty(&bi->res_list))
324 list_del(&bi->res_list);
325 bi->ctx = NULL;
326 }
327
328 /**
329 * vmw_binding_add: Start tracking a context binding
330 *
331 * @cbs: Pointer to the context binding state tracker.
332 * @bi: Information about the binding to track.
333 * @shader_slot: The shader slot of the binding.
334 * @slot: The slot of the binding.
335 *
336 * Starts tracking the binding in the context binding
337 * state structure @cbs.
338 */
vmw_binding_add(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo * bi,u32 shader_slot,u32 slot)339 void vmw_binding_add(struct vmw_ctx_binding_state *cbs,
340 const struct vmw_ctx_bindinfo *bi,
341 u32 shader_slot, u32 slot)
342 {
343 struct vmw_ctx_bindinfo *loc =
344 vmw_binding_loc(cbs, bi->bt, shader_slot, slot);
345 const struct vmw_binding_info *b = &vmw_binding_infos[bi->bt];
346
347 if (loc->ctx != NULL)
348 vmw_binding_drop(loc);
349
350 memcpy(loc, bi, b->size);
351 loc->scrubbed = false;
352 list_add(&loc->ctx_list, &cbs->list);
353 INIT_LIST_HEAD(&loc->res_list);
354 }
355
356 /**
357 * vmw_binding_add_uav_index - Add UAV index for tracking.
358 * @cbs: Pointer to the context binding state tracker.
359 * @slot: UAV type to which bind this index.
360 * @index: The splice index to track.
361 */
vmw_binding_add_uav_index(struct vmw_ctx_binding_state * cbs,uint32 slot,uint32 index)362 void vmw_binding_add_uav_index(struct vmw_ctx_binding_state *cbs, uint32 slot,
363 uint32 index)
364 {
365 cbs->ua_views[slot].index = index;
366 }
367
368 /**
369 * vmw_binding_transfer: Transfer a context binding tracking entry.
370 *
371 * @cbs: Pointer to the persistent context binding state tracker.
372 * @from: Staged binding info built during execbuf
373 * @bi: Information about the binding to track.
374 *
375 */
vmw_binding_transfer(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_binding_state * from,const struct vmw_ctx_bindinfo * bi)376 static void vmw_binding_transfer(struct vmw_ctx_binding_state *cbs,
377 const struct vmw_ctx_binding_state *from,
378 const struct vmw_ctx_bindinfo *bi)
379 {
380 size_t offset = (unsigned long)bi - (unsigned long)from;
381 struct vmw_ctx_bindinfo *loc = (struct vmw_ctx_bindinfo *)
382 ((unsigned long) cbs + offset);
383
384 if (loc->ctx != NULL) {
385 WARN_ON(bi->scrubbed);
386
387 vmw_binding_drop(loc);
388 }
389
390 if (bi->res != NULL) {
391 memcpy(loc, bi, vmw_binding_infos[bi->bt].size);
392 list_add_tail(&loc->ctx_list, &cbs->list);
393 list_add_tail(&loc->res_list, &loc->res->binding_head);
394 }
395 }
396
397 /**
398 * vmw_binding_state_kill - Kill all bindings associated with a
399 * struct vmw_ctx_binding state structure, and re-initialize the structure.
400 *
401 * @cbs: Pointer to the context binding state tracker.
402 *
403 * Emits commands to scrub all bindings associated with the
404 * context binding state tracker. Then re-initializes the whole structure.
405 */
vmw_binding_state_kill(struct vmw_ctx_binding_state * cbs)406 void vmw_binding_state_kill(struct vmw_ctx_binding_state *cbs)
407 {
408 struct vmw_ctx_bindinfo *entry, *next;
409
410 vmw_binding_state_scrub(cbs);
411 list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
412 vmw_binding_drop(entry);
413 }
414
415 /**
416 * vmw_binding_state_scrub - Scrub all bindings associated with a
417 * struct vmw_ctx_binding state structure.
418 *
419 * @cbs: Pointer to the context binding state tracker.
420 *
421 * Emits commands to scrub all bindings associated with the
422 * context binding state tracker.
423 */
vmw_binding_state_scrub(struct vmw_ctx_binding_state * cbs)424 void vmw_binding_state_scrub(struct vmw_ctx_binding_state *cbs)
425 {
426 struct vmw_ctx_bindinfo *entry;
427
428 list_for_each_entry(entry, &cbs->list, ctx_list) {
429 if (!entry->scrubbed) {
430 (void) vmw_binding_infos[entry->bt].scrub_func
431 (entry, false);
432 entry->scrubbed = true;
433 }
434 }
435
436 (void) vmw_binding_emit_dirty(cbs);
437 }
438
439 /**
440 * vmw_binding_res_list_kill - Kill all bindings on a
441 * resource binding list
442 *
443 * @head: list head of resource binding list
444 *
445 * Kills all bindings associated with a specific resource. Typically
446 * called before the resource is destroyed.
447 */
vmw_binding_res_list_kill(struct list_head * head)448 void vmw_binding_res_list_kill(struct list_head *head)
449 {
450 struct vmw_ctx_bindinfo *entry, *next;
451
452 vmw_binding_res_list_scrub(head);
453 list_for_each_entry_safe(entry, next, head, res_list)
454 vmw_binding_drop(entry);
455 }
456
457 /**
458 * vmw_binding_res_list_scrub - Scrub all bindings on a
459 * resource binding list
460 *
461 * @head: list head of resource binding list
462 *
463 * Scrub all bindings associated with a specific resource. Typically
464 * called before the resource is evicted.
465 */
vmw_binding_res_list_scrub(struct list_head * head)466 void vmw_binding_res_list_scrub(struct list_head *head)
467 {
468 struct vmw_ctx_bindinfo *entry;
469
470 list_for_each_entry(entry, head, res_list) {
471 if (!entry->scrubbed) {
472 (void) vmw_binding_infos[entry->bt].scrub_func
473 (entry, false);
474 entry->scrubbed = true;
475 }
476 }
477
478 list_for_each_entry(entry, head, res_list) {
479 struct vmw_ctx_binding_state *cbs =
480 vmw_context_binding_state(entry->ctx);
481
482 (void) vmw_binding_emit_dirty(cbs);
483 }
484 }
485
486
487 /**
488 * vmw_binding_state_commit - Commit staged binding info
489 *
490 * @to: Staged binding info area to copy into to.
491 * @from: Staged binding info built during execbuf.
492 *
493 * Transfers binding info from a temporary structure
494 * (typically used by execbuf) to the persistent
495 * structure in the context. This can be done once commands have been
496 * submitted to hardware
497 */
vmw_binding_state_commit(struct vmw_ctx_binding_state * to,struct vmw_ctx_binding_state * from)498 void vmw_binding_state_commit(struct vmw_ctx_binding_state *to,
499 struct vmw_ctx_binding_state *from)
500 {
501 struct vmw_ctx_bindinfo *entry, *next;
502
503 list_for_each_entry_safe(entry, next, &from->list, ctx_list) {
504 vmw_binding_transfer(to, from, entry);
505 vmw_binding_drop(entry);
506 }
507
508 /* Also transfer uav splice indices */
509 to->ua_views[0].index = from->ua_views[0].index;
510 to->ua_views[1].index = from->ua_views[1].index;
511 }
512
513 /**
514 * vmw_binding_rebind_all - Rebind all scrubbed bindings of a context
515 *
516 * @cbs: Pointer to the context binding state tracker.
517 *
518 * Walks through the context binding list and rebinds all scrubbed
519 * resources.
520 */
vmw_binding_rebind_all(struct vmw_ctx_binding_state * cbs)521 int vmw_binding_rebind_all(struct vmw_ctx_binding_state *cbs)
522 {
523 struct vmw_ctx_bindinfo *entry;
524 int ret;
525
526 list_for_each_entry(entry, &cbs->list, ctx_list) {
527 if (likely(!entry->scrubbed))
528 continue;
529
530 if ((entry->res == NULL || entry->res->id ==
531 SVGA3D_INVALID_ID))
532 continue;
533
534 ret = vmw_binding_infos[entry->bt].scrub_func(entry, true);
535 if (unlikely(ret != 0))
536 return ret;
537
538 entry->scrubbed = false;
539 }
540
541 return vmw_binding_emit_dirty(cbs);
542 }
543
544 /**
545 * vmw_binding_scrub_shader - scrub a shader binding from a context.
546 *
547 * @bi: single binding information.
548 * @rebind: Whether to issue a bind instead of scrub command.
549 */
vmw_binding_scrub_shader(struct vmw_ctx_bindinfo * bi,bool rebind)550 static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
551 {
552 struct vmw_ctx_bindinfo_shader *binding =
553 container_of(bi, typeof(*binding), bi);
554 struct vmw_private *dev_priv = bi->ctx->dev_priv;
555 struct {
556 SVGA3dCmdHeader header;
557 SVGA3dCmdSetShader body;
558 } *cmd;
559
560 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
561 if (unlikely(cmd == NULL))
562 return -ENOMEM;
563
564 cmd->header.id = SVGA_3D_CMD_SET_SHADER;
565 cmd->header.size = sizeof(cmd->body);
566 cmd->body.cid = bi->ctx->id;
567 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
568 cmd->body.shid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
569 vmw_cmd_commit(dev_priv, sizeof(*cmd));
570
571 return 0;
572 }
573
574 /**
575 * vmw_binding_scrub_render_target - scrub a render target binding
576 * from a context.
577 *
578 * @bi: single binding information.
579 * @rebind: Whether to issue a bind instead of scrub command.
580 */
vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo * bi,bool rebind)581 static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
582 bool rebind)
583 {
584 struct vmw_ctx_bindinfo_view *binding =
585 container_of(bi, typeof(*binding), bi);
586 struct vmw_private *dev_priv = bi->ctx->dev_priv;
587 struct {
588 SVGA3dCmdHeader header;
589 SVGA3dCmdSetRenderTarget body;
590 } *cmd;
591
592 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
593 if (unlikely(cmd == NULL))
594 return -ENOMEM;
595
596 cmd->header.id = SVGA_3D_CMD_SETRENDERTARGET;
597 cmd->header.size = sizeof(cmd->body);
598 cmd->body.cid = bi->ctx->id;
599 cmd->body.type = binding->slot;
600 cmd->body.target.sid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
601 cmd->body.target.face = 0;
602 cmd->body.target.mipmap = 0;
603 vmw_cmd_commit(dev_priv, sizeof(*cmd));
604
605 return 0;
606 }
607
608 /**
609 * vmw_binding_scrub_texture - scrub a texture binding from a context.
610 *
611 * @bi: single binding information.
612 * @rebind: Whether to issue a bind instead of scrub command.
613 *
614 * TODO: Possibly complement this function with a function that takes
615 * a list of texture bindings and combines them to a single command.
616 */
vmw_binding_scrub_texture(struct vmw_ctx_bindinfo * bi,bool rebind)617 static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi,
618 bool rebind)
619 {
620 struct vmw_ctx_bindinfo_tex *binding =
621 container_of(bi, typeof(*binding), bi);
622 struct vmw_private *dev_priv = bi->ctx->dev_priv;
623 struct {
624 SVGA3dCmdHeader header;
625 struct {
626 SVGA3dCmdSetTextureState c;
627 SVGA3dTextureState s1;
628 } body;
629 } *cmd;
630
631 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
632 if (unlikely(cmd == NULL))
633 return -ENOMEM;
634
635 cmd->header.id = SVGA_3D_CMD_SETTEXTURESTATE;
636 cmd->header.size = sizeof(cmd->body);
637 cmd->body.c.cid = bi->ctx->id;
638 cmd->body.s1.stage = binding->texture_stage;
639 cmd->body.s1.name = SVGA3D_TS_BIND_TEXTURE;
640 cmd->body.s1.value = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
641 vmw_cmd_commit(dev_priv, sizeof(*cmd));
642
643 return 0;
644 }
645
646 /**
647 * vmw_binding_scrub_dx_shader - scrub a dx shader binding from a context.
648 *
649 * @bi: single binding information.
650 * @rebind: Whether to issue a bind instead of scrub command.
651 */
vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo * bi,bool rebind)652 static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
653 {
654 struct vmw_ctx_bindinfo_shader *binding =
655 container_of(bi, typeof(*binding), bi);
656 struct vmw_private *dev_priv = bi->ctx->dev_priv;
657 struct {
658 SVGA3dCmdHeader header;
659 SVGA3dCmdDXSetShader body;
660 } *cmd;
661
662 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);
663 if (unlikely(cmd == NULL))
664 return -ENOMEM;
665
666 cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER;
667 cmd->header.size = sizeof(cmd->body);
668 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
669 cmd->body.shaderId = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
670 vmw_cmd_commit(dev_priv, sizeof(*cmd));
671
672 return 0;
673 }
674
675 /**
676 * vmw_binding_scrub_cb - scrub a constant buffer binding from a context.
677 *
678 * @bi: single binding information.
679 * @rebind: Whether to issue a bind instead of scrub command.
680 */
vmw_binding_scrub_cb(struct vmw_ctx_bindinfo * bi,bool rebind)681 static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind)
682 {
683 struct vmw_ctx_bindinfo_cb *binding =
684 container_of(bi, typeof(*binding), bi);
685 struct vmw_private *dev_priv = bi->ctx->dev_priv;
686 struct {
687 SVGA3dCmdHeader header;
688 SVGA3dCmdDXSetSingleConstantBuffer body;
689 } *cmd;
690
691 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);
692 if (unlikely(cmd == NULL))
693 return -ENOMEM;
694
695 cmd->header.id = SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER;
696 cmd->header.size = sizeof(cmd->body);
697 cmd->body.slot = binding->slot;
698 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
699 if (rebind) {
700 cmd->body.offsetInBytes = binding->offset;
701 cmd->body.sizeInBytes = binding->size;
702 cmd->body.sid = bi->res->id;
703 } else {
704 cmd->body.offsetInBytes = 0;
705 cmd->body.sizeInBytes = 0;
706 cmd->body.sid = SVGA3D_INVALID_ID;
707 }
708 vmw_cmd_commit(dev_priv, sizeof(*cmd));
709
710 return 0;
711 }
712
713 /**
714 * vmw_collect_view_ids - Build view id data for a view binding command
715 * without checking which bindings actually need to be emitted
716 *
717 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
718 * @biv: Pointer to where the binding info array is stored in @cbs
719 * @max_num: Maximum number of entries in the @bi array.
720 *
721 * Scans the @bi array for bindings and builds a buffer of view id data.
722 * Stops at the first non-existing binding in the @bi array.
723 * On output, @cbs->bind_cmd_count contains the number of bindings to be
724 * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
725 * contains the command data.
726 */
vmw_collect_view_ids(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo_view * biv,u32 max_num)727 static void vmw_collect_view_ids(struct vmw_ctx_binding_state *cbs,
728 const struct vmw_ctx_bindinfo_view *biv,
729 u32 max_num)
730 {
731 unsigned long i;
732
733 cbs->bind_cmd_count = 0;
734 cbs->bind_first_slot = 0;
735
736 for (i = 0; i < max_num; ++i, ++biv) {
737 if (!biv->bi.ctx)
738 break;
739
740 cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
741 ((biv->bi.scrubbed) ?
742 SVGA3D_INVALID_ID : biv->bi.res->id);
743 }
744 }
745
746 /**
747 * vmw_collect_dirty_view_ids - Build view id data for a view binding command
748 *
749 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
750 * @bi: Pointer to where the binding info array is stored in @cbs
751 * @dirty: Bitmap indicating which bindings need to be emitted.
752 * @max_num: Maximum number of entries in the @bi array.
753 *
754 * Scans the @bi array for bindings that need to be emitted and
755 * builds a buffer of view id data.
756 * On output, @cbs->bind_cmd_count contains the number of bindings to be
757 * emitted, @cbs->bind_first_slot indicates the index of the first emitted
758 * binding, and @cbs->bind_cmd_buffer contains the command data.
759 */
vmw_collect_dirty_view_ids(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo * bi,unsigned long * dirty,u32 max_num)760 static void vmw_collect_dirty_view_ids(struct vmw_ctx_binding_state *cbs,
761 const struct vmw_ctx_bindinfo *bi,
762 unsigned long *dirty,
763 u32 max_num)
764 {
765 const struct vmw_ctx_bindinfo_view *biv =
766 container_of(bi, struct vmw_ctx_bindinfo_view, bi);
767 unsigned long i, next_bit;
768
769 cbs->bind_cmd_count = 0;
770 i = find_first_bit(dirty, max_num);
771 next_bit = i;
772 cbs->bind_first_slot = i;
773
774 biv += i;
775 for (; i < max_num; ++i, ++biv) {
776 cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
777 ((!biv->bi.ctx || biv->bi.scrubbed) ?
778 SVGA3D_INVALID_ID : biv->bi.res->id);
779
780 if (next_bit == i) {
781 next_bit = find_next_bit(dirty, max_num, i + 1);
782 if (next_bit >= max_num)
783 break;
784 }
785 }
786 }
787
788 /**
789 * vmw_emit_set_sr - Issue delayed DX shader resource binding commands
790 *
791 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
792 * @shader_slot: The shader slot of the binding.
793 */
vmw_emit_set_sr(struct vmw_ctx_binding_state * cbs,int shader_slot)794 static int vmw_emit_set_sr(struct vmw_ctx_binding_state *cbs,
795 int shader_slot)
796 {
797 const struct vmw_ctx_bindinfo *loc =
798 &cbs->per_shader[shader_slot].shader_res[0].bi;
799 struct {
800 SVGA3dCmdHeader header;
801 SVGA3dCmdDXSetShaderResources body;
802 } *cmd;
803 size_t cmd_size, view_id_size;
804 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
805
806 vmw_collect_dirty_view_ids(cbs, loc,
807 cbs->per_shader[shader_slot].dirty_sr,
808 SVGA3D_DX_MAX_SRVIEWS);
809 if (cbs->bind_cmd_count == 0)
810 return 0;
811
812 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
813 cmd_size = sizeof(*cmd) + view_id_size;
814 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
815 if (unlikely(cmd == NULL))
816 return -ENOMEM;
817
818 cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER_RESOURCES;
819 cmd->header.size = sizeof(cmd->body) + view_id_size;
820 cmd->body.type = shader_slot + SVGA3D_SHADERTYPE_MIN;
821 cmd->body.startView = cbs->bind_first_slot;
822
823 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
824
825 vmw_cmd_commit(ctx->dev_priv, cmd_size);
826 bitmap_clear(cbs->per_shader[shader_slot].dirty_sr,
827 cbs->bind_first_slot, cbs->bind_cmd_count);
828
829 return 0;
830 }
831
832 /**
833 * vmw_emit_set_rt - Issue delayed DX rendertarget binding commands
834 *
835 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
836 */
vmw_emit_set_rt(struct vmw_ctx_binding_state * cbs)837 static int vmw_emit_set_rt(struct vmw_ctx_binding_state *cbs)
838 {
839 const struct vmw_ctx_bindinfo_view *loc = &cbs->render_targets[0];
840 struct {
841 SVGA3dCmdHeader header;
842 SVGA3dCmdDXSetRenderTargets body;
843 } *cmd;
844 size_t cmd_size, view_id_size;
845 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
846
847 vmw_collect_view_ids(cbs, loc, SVGA3D_DX_MAX_RENDER_TARGETS);
848 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
849 cmd_size = sizeof(*cmd) + view_id_size;
850 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
851 if (unlikely(cmd == NULL))
852 return -ENOMEM;
853
854 cmd->header.id = SVGA_3D_CMD_DX_SET_RENDERTARGETS;
855 cmd->header.size = sizeof(cmd->body) + view_id_size;
856
857 if (cbs->ds_view.bi.ctx && !cbs->ds_view.bi.scrubbed)
858 cmd->body.depthStencilViewId = cbs->ds_view.bi.res->id;
859 else
860 cmd->body.depthStencilViewId = SVGA3D_INVALID_ID;
861
862 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
863
864 vmw_cmd_commit(ctx->dev_priv, cmd_size);
865
866 return 0;
867
868 }
869
870 /**
871 * vmw_collect_so_targets - Build SVGA3dSoTarget data for a binding command
872 * without checking which bindings actually need to be emitted
873 *
874 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
875 * @biso: Pointer to where the binding info array is stored in @cbs
876 * @max_num: Maximum number of entries in the @bi array.
877 *
878 * Scans the @bi array for bindings and builds a buffer of SVGA3dSoTarget data.
879 * Stops at the first non-existing binding in the @bi array.
880 * On output, @cbs->bind_cmd_count contains the number of bindings to be
881 * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
882 * contains the command data.
883 */
vmw_collect_so_targets(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo_so_target * biso,u32 max_num)884 static void vmw_collect_so_targets(struct vmw_ctx_binding_state *cbs,
885 const struct vmw_ctx_bindinfo_so_target *biso,
886 u32 max_num)
887 {
888 unsigned long i;
889 SVGA3dSoTarget *so_buffer = (SVGA3dSoTarget *) cbs->bind_cmd_buffer;
890
891 cbs->bind_cmd_count = 0;
892 cbs->bind_first_slot = 0;
893
894 for (i = 0; i < max_num; ++i, ++biso, ++so_buffer,
895 ++cbs->bind_cmd_count) {
896 if (!biso->bi.ctx)
897 break;
898
899 if (!biso->bi.scrubbed) {
900 so_buffer->sid = biso->bi.res->id;
901 so_buffer->offset = biso->offset;
902 so_buffer->sizeInBytes = biso->size;
903 } else {
904 so_buffer->sid = SVGA3D_INVALID_ID;
905 so_buffer->offset = 0;
906 so_buffer->sizeInBytes = 0;
907 }
908 }
909 }
910
911 /**
912 * vmw_emit_set_so_target - Issue delayed streamout binding commands
913 *
914 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
915 */
vmw_emit_set_so_target(struct vmw_ctx_binding_state * cbs)916 static int vmw_emit_set_so_target(struct vmw_ctx_binding_state *cbs)
917 {
918 const struct vmw_ctx_bindinfo_so_target *loc = &cbs->so_targets[0];
919 struct {
920 SVGA3dCmdHeader header;
921 SVGA3dCmdDXSetSOTargets body;
922 } *cmd;
923 size_t cmd_size, so_target_size;
924 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
925
926 vmw_collect_so_targets(cbs, loc, SVGA3D_DX_MAX_SOTARGETS);
927 if (cbs->bind_cmd_count == 0)
928 return 0;
929
930 so_target_size = cbs->bind_cmd_count*sizeof(SVGA3dSoTarget);
931 cmd_size = sizeof(*cmd) + so_target_size;
932 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
933 if (unlikely(cmd == NULL))
934 return -ENOMEM;
935
936 cmd->header.id = SVGA_3D_CMD_DX_SET_SOTARGETS;
937 cmd->header.size = sizeof(cmd->body) + so_target_size;
938 memcpy(&cmd[1], cbs->bind_cmd_buffer, so_target_size);
939
940 vmw_cmd_commit(ctx->dev_priv, cmd_size);
941
942 return 0;
943
944 }
945
946 /**
947 * vmw_binding_emit_dirty_ps - Issue delayed per shader binding commands
948 *
949 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
950 *
951 */
vmw_binding_emit_dirty_ps(struct vmw_ctx_binding_state * cbs)952 static int vmw_binding_emit_dirty_ps(struct vmw_ctx_binding_state *cbs)
953 {
954 struct vmw_dx_shader_bindings *sb = &cbs->per_shader[0];
955 u32 i;
956 int ret;
957
958 for (i = 0; i < SVGA3D_NUM_SHADERTYPE_DX10; ++i, ++sb) {
959 if (!test_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty))
960 continue;
961
962 ret = vmw_emit_set_sr(cbs, i);
963 if (ret)
964 break;
965
966 __clear_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty);
967 }
968
969 return 0;
970 }
971
972 /**
973 * vmw_collect_dirty_vbs - Build SVGA3dVertexBuffer data for a
974 * SVGA3dCmdDXSetVertexBuffers command
975 *
976 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
977 * @bi: Pointer to where the binding info array is stored in @cbs
978 * @dirty: Bitmap indicating which bindings need to be emitted.
979 * @max_num: Maximum number of entries in the @bi array.
980 *
981 * Scans the @bi array for bindings that need to be emitted and
982 * builds a buffer of SVGA3dVertexBuffer data.
983 * On output, @cbs->bind_cmd_count contains the number of bindings to be
984 * emitted, @cbs->bind_first_slot indicates the index of the first emitted
985 * binding, and @cbs->bind_cmd_buffer contains the command data.
986 */
vmw_collect_dirty_vbs(struct vmw_ctx_binding_state * cbs,const struct vmw_ctx_bindinfo * bi,unsigned long * dirty,u32 max_num)987 static void vmw_collect_dirty_vbs(struct vmw_ctx_binding_state *cbs,
988 const struct vmw_ctx_bindinfo *bi,
989 unsigned long *dirty,
990 u32 max_num)
991 {
992 const struct vmw_ctx_bindinfo_vb *biv =
993 container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
994 unsigned long i, next_bit;
995 SVGA3dVertexBuffer *vbs = (SVGA3dVertexBuffer *) &cbs->bind_cmd_buffer;
996
997 cbs->bind_cmd_count = 0;
998 i = find_first_bit(dirty, max_num);
999 next_bit = i;
1000 cbs->bind_first_slot = i;
1001
1002 biv += i;
1003 for (; i < max_num; ++i, ++biv, ++vbs) {
1004 if (!biv->bi.ctx || biv->bi.scrubbed) {
1005 vbs->sid = SVGA3D_INVALID_ID;
1006 vbs->stride = 0;
1007 vbs->offset = 0;
1008 } else {
1009 vbs->sid = biv->bi.res->id;
1010 vbs->stride = biv->stride;
1011 vbs->offset = biv->offset;
1012 }
1013 cbs->bind_cmd_count++;
1014 if (next_bit == i) {
1015 next_bit = find_next_bit(dirty, max_num, i + 1);
1016 if (next_bit >= max_num)
1017 break;
1018 }
1019 }
1020 }
1021
1022 /**
1023 * vmw_emit_set_vb - Issue delayed vertex buffer binding commands
1024 *
1025 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
1026 *
1027 */
vmw_emit_set_vb(struct vmw_ctx_binding_state * cbs)1028 static int vmw_emit_set_vb(struct vmw_ctx_binding_state *cbs)
1029 {
1030 const struct vmw_ctx_bindinfo *loc =
1031 &cbs->vertex_buffers[0].bi;
1032 struct {
1033 SVGA3dCmdHeader header;
1034 SVGA3dCmdDXSetVertexBuffers body;
1035 } *cmd;
1036 size_t cmd_size, set_vb_size;
1037 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1038
1039 vmw_collect_dirty_vbs(cbs, loc, cbs->dirty_vb,
1040 SVGA3D_DX_MAX_VERTEXBUFFERS);
1041 if (cbs->bind_cmd_count == 0)
1042 return 0;
1043
1044 set_vb_size = cbs->bind_cmd_count*sizeof(SVGA3dVertexBuffer);
1045 cmd_size = sizeof(*cmd) + set_vb_size;
1046 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
1047 if (unlikely(cmd == NULL))
1048 return -ENOMEM;
1049
1050 cmd->header.id = SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS;
1051 cmd->header.size = sizeof(cmd->body) + set_vb_size;
1052 cmd->body.startBuffer = cbs->bind_first_slot;
1053
1054 memcpy(&cmd[1], cbs->bind_cmd_buffer, set_vb_size);
1055
1056 vmw_cmd_commit(ctx->dev_priv, cmd_size);
1057 bitmap_clear(cbs->dirty_vb,
1058 cbs->bind_first_slot, cbs->bind_cmd_count);
1059
1060 return 0;
1061 }
1062
vmw_emit_set_uav(struct vmw_ctx_binding_state * cbs)1063 static int vmw_emit_set_uav(struct vmw_ctx_binding_state *cbs)
1064 {
1065 const struct vmw_ctx_bindinfo_view *loc = &cbs->ua_views[0].views[0];
1066 struct {
1067 SVGA3dCmdHeader header;
1068 SVGA3dCmdDXSetUAViews body;
1069 } *cmd;
1070 size_t cmd_size, view_id_size;
1071 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1072
1073 vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_UAVIEWS);
1074 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
1075 cmd_size = sizeof(*cmd) + view_id_size;
1076 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
1077 if (!cmd)
1078 return -ENOMEM;
1079
1080 cmd->header.id = SVGA_3D_CMD_DX_SET_UA_VIEWS;
1081 cmd->header.size = sizeof(cmd->body) + view_id_size;
1082
1083 /* Splice index is specified user-space */
1084 cmd->body.uavSpliceIndex = cbs->ua_views[0].index;
1085
1086 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
1087
1088 vmw_cmd_commit(ctx->dev_priv, cmd_size);
1089
1090 return 0;
1091 }
1092
vmw_emit_set_cs_uav(struct vmw_ctx_binding_state * cbs)1093 static int vmw_emit_set_cs_uav(struct vmw_ctx_binding_state *cbs)
1094 {
1095 const struct vmw_ctx_bindinfo_view *loc = &cbs->ua_views[1].views[0];
1096 struct {
1097 SVGA3dCmdHeader header;
1098 SVGA3dCmdDXSetCSUAViews body;
1099 } *cmd;
1100 size_t cmd_size, view_id_size;
1101 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1102
1103 vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_UAVIEWS);
1104 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
1105 cmd_size = sizeof(*cmd) + view_id_size;
1106 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
1107 if (!cmd)
1108 return -ENOMEM;
1109
1110 cmd->header.id = SVGA_3D_CMD_DX_SET_CS_UA_VIEWS;
1111 cmd->header.size = sizeof(cmd->body) + view_id_size;
1112
1113 /* Start index is specified user-space */
1114 cmd->body.startIndex = cbs->ua_views[1].index;
1115
1116 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
1117
1118 vmw_cmd_commit(ctx->dev_priv, cmd_size);
1119
1120 return 0;
1121 }
1122
1123 /**
1124 * vmw_binding_emit_dirty - Issue delayed binding commands
1125 *
1126 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
1127 *
1128 * This function issues the delayed binding commands that arise from
1129 * previous scrub / unscrub calls. These binding commands are typically
1130 * commands that batch a number of bindings and therefore it makes sense
1131 * to delay them.
1132 */
vmw_binding_emit_dirty(struct vmw_ctx_binding_state * cbs)1133 static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs)
1134 {
1135 int ret = 0;
1136 unsigned long hit = 0;
1137
1138 while ((hit = find_next_bit(&cbs->dirty, VMW_BINDING_NUM_BITS, hit))
1139 < VMW_BINDING_NUM_BITS) {
1140
1141 switch (hit) {
1142 case VMW_BINDING_RT_BIT:
1143 ret = vmw_emit_set_rt(cbs);
1144 break;
1145 case VMW_BINDING_PS_BIT:
1146 ret = vmw_binding_emit_dirty_ps(cbs);
1147 break;
1148 case VMW_BINDING_SO_T_BIT:
1149 ret = vmw_emit_set_so_target(cbs);
1150 break;
1151 case VMW_BINDING_VB_BIT:
1152 ret = vmw_emit_set_vb(cbs);
1153 break;
1154 case VMW_BINDING_UAV_BIT:
1155 ret = vmw_emit_set_uav(cbs);
1156 break;
1157 case VMW_BINDING_CS_UAV_BIT:
1158 ret = vmw_emit_set_cs_uav(cbs);
1159 break;
1160 default:
1161 BUG();
1162 }
1163 if (ret)
1164 return ret;
1165
1166 __clear_bit(hit, &cbs->dirty);
1167 hit++;
1168 }
1169
1170 return 0;
1171 }
1172
1173 /**
1174 * vmw_binding_scrub_sr - Schedule a dx shaderresource binding
1175 * scrub from a context
1176 *
1177 * @bi: single binding information.
1178 * @rebind: Whether to issue a bind instead of scrub command.
1179 */
vmw_binding_scrub_sr(struct vmw_ctx_bindinfo * bi,bool rebind)1180 static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind)
1181 {
1182 struct vmw_ctx_bindinfo_view *biv =
1183 container_of(bi, struct vmw_ctx_bindinfo_view, bi);
1184 struct vmw_ctx_binding_state *cbs =
1185 vmw_context_binding_state(bi->ctx);
1186
1187 __set_bit(biv->slot, cbs->per_shader[biv->shader_slot].dirty_sr);
1188 __set_bit(VMW_BINDING_PS_SR_BIT,
1189 &cbs->per_shader[biv->shader_slot].dirty);
1190 __set_bit(VMW_BINDING_PS_BIT, &cbs->dirty);
1191
1192 return 0;
1193 }
1194
1195 /**
1196 * vmw_binding_scrub_dx_rt - Schedule a dx rendertarget binding
1197 * scrub from a context
1198 *
1199 * @bi: single binding information.
1200 * @rebind: Whether to issue a bind instead of scrub command.
1201 */
vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo * bi,bool rebind)1202 static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind)
1203 {
1204 struct vmw_ctx_binding_state *cbs =
1205 vmw_context_binding_state(bi->ctx);
1206
1207 __set_bit(VMW_BINDING_RT_BIT, &cbs->dirty);
1208
1209 return 0;
1210 }
1211
1212 /**
1213 * vmw_binding_scrub_so_target - Schedule a dx streamoutput buffer binding
1214 * scrub from a context
1215 *
1216 * @bi: single binding information.
1217 * @rebind: Whether to issue a bind instead of scrub command.
1218 */
vmw_binding_scrub_so_target(struct vmw_ctx_bindinfo * bi,bool rebind)1219 static int vmw_binding_scrub_so_target(struct vmw_ctx_bindinfo *bi, bool rebind)
1220 {
1221 struct vmw_ctx_binding_state *cbs =
1222 vmw_context_binding_state(bi->ctx);
1223
1224 __set_bit(VMW_BINDING_SO_T_BIT, &cbs->dirty);
1225
1226 return 0;
1227 }
1228
1229 /**
1230 * vmw_binding_scrub_vb - Schedule a dx vertex buffer binding
1231 * scrub from a context
1232 *
1233 * @bi: single binding information.
1234 * @rebind: Whether to issue a bind instead of scrub command.
1235 */
vmw_binding_scrub_vb(struct vmw_ctx_bindinfo * bi,bool rebind)1236 static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind)
1237 {
1238 struct vmw_ctx_bindinfo_vb *bivb =
1239 container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
1240 struct vmw_ctx_binding_state *cbs =
1241 vmw_context_binding_state(bi->ctx);
1242
1243 __set_bit(bivb->slot, cbs->dirty_vb);
1244 __set_bit(VMW_BINDING_VB_BIT, &cbs->dirty);
1245
1246 return 0;
1247 }
1248
1249 /**
1250 * vmw_binding_scrub_ib - scrub a dx index buffer binding from a context
1251 *
1252 * @bi: single binding information.
1253 * @rebind: Whether to issue a bind instead of scrub command.
1254 */
vmw_binding_scrub_ib(struct vmw_ctx_bindinfo * bi,bool rebind)1255 static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind)
1256 {
1257 struct vmw_ctx_bindinfo_ib *binding =
1258 container_of(bi, typeof(*binding), bi);
1259 struct vmw_private *dev_priv = bi->ctx->dev_priv;
1260 struct {
1261 SVGA3dCmdHeader header;
1262 SVGA3dCmdDXSetIndexBuffer body;
1263 } *cmd;
1264
1265 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);
1266 if (unlikely(cmd == NULL))
1267 return -ENOMEM;
1268
1269 cmd->header.id = SVGA_3D_CMD_DX_SET_INDEX_BUFFER;
1270 cmd->header.size = sizeof(cmd->body);
1271 if (rebind) {
1272 cmd->body.sid = bi->res->id;
1273 cmd->body.format = binding->format;
1274 cmd->body.offset = binding->offset;
1275 } else {
1276 cmd->body.sid = SVGA3D_INVALID_ID;
1277 cmd->body.format = 0;
1278 cmd->body.offset = 0;
1279 }
1280
1281 vmw_cmd_commit(dev_priv, sizeof(*cmd));
1282
1283 return 0;
1284 }
1285
vmw_binding_scrub_uav(struct vmw_ctx_bindinfo * bi,bool rebind)1286 static int vmw_binding_scrub_uav(struct vmw_ctx_bindinfo *bi, bool rebind)
1287 {
1288 struct vmw_ctx_binding_state *cbs = vmw_context_binding_state(bi->ctx);
1289
1290 __set_bit(VMW_BINDING_UAV_BIT, &cbs->dirty);
1291 return 0;
1292 }
1293
vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo * bi,bool rebind)1294 static int vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo *bi, bool rebind)
1295 {
1296 struct vmw_ctx_binding_state *cbs = vmw_context_binding_state(bi->ctx);
1297
1298 __set_bit(VMW_BINDING_CS_UAV_BIT, &cbs->dirty);
1299 return 0;
1300 }
1301
1302 /**
1303 * vmw_binding_scrub_so - Scrub a streamoutput binding from context.
1304 * @bi: Single binding information.
1305 * @rebind: Whether to issue a bind instead of scrub command.
1306 */
vmw_binding_scrub_so(struct vmw_ctx_bindinfo * bi,bool rebind)1307 static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind)
1308 {
1309 struct vmw_ctx_bindinfo_so *binding =
1310 container_of(bi, typeof(*binding), bi);
1311 struct vmw_private *dev_priv = bi->ctx->dev_priv;
1312 struct {
1313 SVGA3dCmdHeader header;
1314 SVGA3dCmdDXSetStreamOutput body;
1315 } *cmd;
1316
1317 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);
1318 if (!cmd)
1319 return -ENOMEM;
1320
1321 cmd->header.id = SVGA_3D_CMD_DX_SET_STREAMOUTPUT;
1322 cmd->header.size = sizeof(cmd->body);
1323 cmd->body.soid = rebind ? bi->res->id : SVGA3D_INVALID_ID;
1324 vmw_cmd_commit(dev_priv, sizeof(*cmd));
1325
1326 return 0;
1327 }
1328
1329 /**
1330 * vmw_binding_state_alloc - Allocate a struct vmw_ctx_binding_state with
1331 * memory accounting.
1332 *
1333 * @dev_priv: Pointer to a device private structure.
1334 *
1335 * Returns a pointer to a newly allocated struct or an error pointer on error.
1336 */
1337 struct vmw_ctx_binding_state *
vmw_binding_state_alloc(struct vmw_private * dev_priv)1338 vmw_binding_state_alloc(struct vmw_private *dev_priv)
1339 {
1340 struct vmw_ctx_binding_state *cbs;
1341 struct ttm_operation_ctx ctx = {
1342 .interruptible = false,
1343 .no_wait_gpu = false
1344 };
1345 int ret;
1346
1347 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), sizeof(*cbs),
1348 &ctx);
1349 if (ret)
1350 return ERR_PTR(ret);
1351
1352 cbs = vzalloc(sizeof(*cbs));
1353 if (!cbs) {
1354 ttm_mem_global_free(vmw_mem_glob(dev_priv), sizeof(*cbs));
1355 return ERR_PTR(-ENOMEM);
1356 }
1357
1358 cbs->dev_priv = dev_priv;
1359 INIT_LIST_HEAD(&cbs->list);
1360
1361 return cbs;
1362 }
1363
1364 /**
1365 * vmw_binding_state_free - Free a struct vmw_ctx_binding_state and its
1366 * memory accounting info.
1367 *
1368 * @cbs: Pointer to the struct vmw_ctx_binding_state to be freed.
1369 */
vmw_binding_state_free(struct vmw_ctx_binding_state * cbs)1370 void vmw_binding_state_free(struct vmw_ctx_binding_state *cbs)
1371 {
1372 struct vmw_private *dev_priv = cbs->dev_priv;
1373
1374 vfree(cbs);
1375 ttm_mem_global_free(vmw_mem_glob(dev_priv), sizeof(*cbs));
1376 }
1377
1378 /**
1379 * vmw_binding_state_list - Get the binding list of a
1380 * struct vmw_ctx_binding_state
1381 *
1382 * @cbs: Pointer to the struct vmw_ctx_binding_state
1383 *
1384 * Returns the binding list which can be used to traverse through the bindings
1385 * and access the resource information of all bindings.
1386 */
vmw_binding_state_list(struct vmw_ctx_binding_state * cbs)1387 struct list_head *vmw_binding_state_list(struct vmw_ctx_binding_state *cbs)
1388 {
1389 return &cbs->list;
1390 }
1391
1392 /**
1393 * vmw_binding_state_reset - clear a struct vmw_ctx_binding_state
1394 *
1395 * @cbs: Pointer to the struct vmw_ctx_binding_state to be cleared
1396 *
1397 * Drops all bindings registered in @cbs. No device binding actions are
1398 * performed.
1399 */
vmw_binding_state_reset(struct vmw_ctx_binding_state * cbs)1400 void vmw_binding_state_reset(struct vmw_ctx_binding_state *cbs)
1401 {
1402 struct vmw_ctx_bindinfo *entry, *next;
1403
1404 list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
1405 vmw_binding_drop(entry);
1406 }
1407
1408 /**
1409 * vmw_binding_dirtying - Return whether a binding type is dirtying its resource
1410 * @binding_type: The binding type
1411 *
1412 * Each time a resource is put on the validation list as the result of a
1413 * context binding referencing it, we need to determine whether that resource
1414 * will be dirtied (written to by the GPU) as a result of the corresponding
1415 * GPU operation. Currently rendertarget-, depth-stencil-, stream-output-target
1416 * and unordered access view bindings are capable of dirtying its resource.
1417 *
1418 * Return: Whether the binding type dirties the resource its binding points to.
1419 */
vmw_binding_dirtying(enum vmw_ctx_binding_type binding_type)1420 u32 vmw_binding_dirtying(enum vmw_ctx_binding_type binding_type)
1421 {
1422 static u32 is_binding_dirtying[vmw_ctx_binding_max] = {
1423 [vmw_ctx_binding_rt] = VMW_RES_DIRTY_SET,
1424 [vmw_ctx_binding_dx_rt] = VMW_RES_DIRTY_SET,
1425 [vmw_ctx_binding_ds] = VMW_RES_DIRTY_SET,
1426 [vmw_ctx_binding_so_target] = VMW_RES_DIRTY_SET,
1427 [vmw_ctx_binding_uav] = VMW_RES_DIRTY_SET,
1428 [vmw_ctx_binding_cs_uav] = VMW_RES_DIRTY_SET,
1429 };
1430
1431 /* Review this function as new bindings are added. */
1432 BUILD_BUG_ON(vmw_ctx_binding_max != 14);
1433 return is_binding_dirtying[binding_type];
1434 }
1435
1436 /*
1437 * This function is unused at run-time, and only used to hold various build
1438 * asserts important for code optimization assumptions.
1439 */
vmw_binding_build_asserts(void)1440 static void vmw_binding_build_asserts(void)
1441 {
1442 BUILD_BUG_ON(SVGA3D_NUM_SHADERTYPE_DX10 != 3);
1443 BUILD_BUG_ON(SVGA3D_DX_MAX_RENDER_TARGETS > SVGA3D_RT_MAX);
1444 BUILD_BUG_ON(sizeof(uint32) != sizeof(u32));
1445
1446 /*
1447 * struct vmw_ctx_binding_state::bind_cmd_buffer is used for various
1448 * view id arrays.
1449 */
1450 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_RT_MAX);
1451 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_SRVIEWS);
1452 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_CONSTBUFFERS);
1453
1454 /*
1455 * struct vmw_ctx_binding_state::bind_cmd_buffer is used for
1456 * u32 view ids, SVGA3dSoTargets and SVGA3dVertexBuffers
1457 */
1458 BUILD_BUG_ON(SVGA3D_DX_MAX_SOTARGETS*sizeof(SVGA3dSoTarget) >
1459 VMW_MAX_VIEW_BINDINGS*sizeof(u32));
1460 BUILD_BUG_ON(SVGA3D_DX_MAX_VERTEXBUFFERS*sizeof(SVGA3dVertexBuffer) >
1461 VMW_MAX_VIEW_BINDINGS*sizeof(u32));
1462 }
1463