1 /*
2 * TI VPFE capture Driver
3 *
4 * Copyright (C) 2013 - 2014 Texas Instruments, Inc.
5 *
6 * Benoit Parrot <bparrot@ti.com>
7 * Lad, Prabhakar <prabhakar.csengg@gmail.com>
8 *
9 * This program is free software; you may redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
17 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
18 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include <linux/delay.h>
24 #include <linux/err.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/io.h>
28 #include <linux/module.h>
29 #include <linux/of_graph.h>
30 #include <linux/pinctrl/consumer.h>
31 #include <linux/platform_device.h>
32 #include <linux/pm_runtime.h>
33 #include <linux/slab.h>
34 #include <linux/uaccess.h>
35 #include <linux/videodev2.h>
36
37 #include <media/v4l2-common.h>
38 #include <media/v4l2-ctrls.h>
39 #include <media/v4l2-event.h>
40 #include <media/v4l2-fwnode.h>
41
42 #include "am437x-vpfe.h"
43
44 #define VPFE_MODULE_NAME "vpfe"
45 #define VPFE_VERSION "0.1.0"
46
47 static int debug;
48 module_param(debug, int, 0644);
49 MODULE_PARM_DESC(debug, "Debug level 0-8");
50
51 #define vpfe_dbg(level, dev, fmt, arg...) \
52 v4l2_dbg(level, debug, &dev->v4l2_dev, fmt, ##arg)
53 #define vpfe_info(dev, fmt, arg...) \
54 v4l2_info(&dev->v4l2_dev, fmt, ##arg)
55 #define vpfe_err(dev, fmt, arg...) \
56 v4l2_err(&dev->v4l2_dev, fmt, ##arg)
57
58 /* standard information */
59 struct vpfe_standard {
60 v4l2_std_id std_id;
61 unsigned int width;
62 unsigned int height;
63 struct v4l2_fract pixelaspect;
64 int frame_format;
65 };
66
67 static const struct vpfe_standard vpfe_standards[] = {
68 {V4L2_STD_525_60, 720, 480, {11, 10}, 1},
69 {V4L2_STD_625_50, 720, 576, {54, 59}, 1},
70 };
71
72 struct bus_format {
73 unsigned int width;
74 unsigned int bpp;
75 };
76
77 /*
78 * struct vpfe_fmt - VPFE media bus format information
79 * @code: V4L2 media bus format code
80 * @shifted: V4L2 media bus format code for the same pixel layout but
81 * shifted to be 8 bits per pixel. =0 if format is not shiftable.
82 * @pixelformat: V4L2 pixel format FCC identifier
83 * @width: Bits per pixel (when transferred over a bus)
84 * @bpp: Bytes per pixel (when stored in memory)
85 * @supported: Indicates format supported by subdev
86 */
87 struct vpfe_fmt {
88 u32 fourcc;
89 u32 code;
90 struct bus_format l;
91 struct bus_format s;
92 bool supported;
93 u32 index;
94 };
95
96 static struct vpfe_fmt formats[] = {
97 {
98 .fourcc = V4L2_PIX_FMT_YUYV,
99 .code = MEDIA_BUS_FMT_YUYV8_2X8,
100 .l.width = 10,
101 .l.bpp = 4,
102 .s.width = 8,
103 .s.bpp = 2,
104 .supported = false,
105 }, {
106 .fourcc = V4L2_PIX_FMT_UYVY,
107 .code = MEDIA_BUS_FMT_UYVY8_2X8,
108 .l.width = 10,
109 .l.bpp = 4,
110 .s.width = 8,
111 .s.bpp = 2,
112 .supported = false,
113 }, {
114 .fourcc = V4L2_PIX_FMT_YVYU,
115 .code = MEDIA_BUS_FMT_YVYU8_2X8,
116 .l.width = 10,
117 .l.bpp = 4,
118 .s.width = 8,
119 .s.bpp = 2,
120 .supported = false,
121 }, {
122 .fourcc = V4L2_PIX_FMT_VYUY,
123 .code = MEDIA_BUS_FMT_VYUY8_2X8,
124 .l.width = 10,
125 .l.bpp = 4,
126 .s.width = 8,
127 .s.bpp = 2,
128 .supported = false,
129 }, {
130 .fourcc = V4L2_PIX_FMT_SBGGR8,
131 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
132 .l.width = 10,
133 .l.bpp = 2,
134 .s.width = 8,
135 .s.bpp = 1,
136 .supported = false,
137 }, {
138 .fourcc = V4L2_PIX_FMT_SGBRG8,
139 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
140 .l.width = 10,
141 .l.bpp = 2,
142 .s.width = 8,
143 .s.bpp = 1,
144 .supported = false,
145 }, {
146 .fourcc = V4L2_PIX_FMT_SGRBG8,
147 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
148 .l.width = 10,
149 .l.bpp = 2,
150 .s.width = 8,
151 .s.bpp = 1,
152 .supported = false,
153 }, {
154 .fourcc = V4L2_PIX_FMT_SRGGB8,
155 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
156 .l.width = 10,
157 .l.bpp = 2,
158 .s.width = 8,
159 .s.bpp = 1,
160 .supported = false,
161 }, {
162 .fourcc = V4L2_PIX_FMT_RGB565,
163 .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
164 .l.width = 10,
165 .l.bpp = 4,
166 .s.width = 8,
167 .s.bpp = 2,
168 .supported = false,
169 }, {
170 .fourcc = V4L2_PIX_FMT_RGB565X,
171 .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
172 .l.width = 10,
173 .l.bpp = 4,
174 .s.width = 8,
175 .s.bpp = 2,
176 .supported = false,
177 },
178 };
179
180 static int
181 __vpfe_get_format(struct vpfe_device *vpfe,
182 struct v4l2_format *format, unsigned int *bpp);
183
find_format_by_code(unsigned int code)184 static struct vpfe_fmt *find_format_by_code(unsigned int code)
185 {
186 struct vpfe_fmt *fmt;
187 unsigned int k;
188
189 for (k = 0; k < ARRAY_SIZE(formats); k++) {
190 fmt = &formats[k];
191 if (fmt->code == code)
192 return fmt;
193 }
194
195 return NULL;
196 }
197
find_format_by_pix(unsigned int pixelformat)198 static struct vpfe_fmt *find_format_by_pix(unsigned int pixelformat)
199 {
200 struct vpfe_fmt *fmt;
201 unsigned int k;
202
203 for (k = 0; k < ARRAY_SIZE(formats); k++) {
204 fmt = &formats[k];
205 if (fmt->fourcc == pixelformat)
206 return fmt;
207 }
208
209 return NULL;
210 }
211
212 static void
mbus_to_pix(struct vpfe_device * vpfe,const struct v4l2_mbus_framefmt * mbus,struct v4l2_pix_format * pix,unsigned int * bpp)213 mbus_to_pix(struct vpfe_device *vpfe,
214 const struct v4l2_mbus_framefmt *mbus,
215 struct v4l2_pix_format *pix, unsigned int *bpp)
216 {
217 struct vpfe_subdev_info *sdinfo = vpfe->current_subdev;
218 unsigned int bus_width = sdinfo->vpfe_param.bus_width;
219 struct vpfe_fmt *fmt;
220
221 fmt = find_format_by_code(mbus->code);
222 if (WARN_ON(fmt == NULL)) {
223 pr_err("Invalid mbus code set\n");
224 *bpp = 1;
225 return;
226 }
227
228 memset(pix, 0, sizeof(*pix));
229 v4l2_fill_pix_format(pix, mbus);
230 pix->pixelformat = fmt->fourcc;
231 *bpp = (bus_width == 10) ? fmt->l.bpp : fmt->s.bpp;
232
233 /* pitch should be 32 bytes aligned */
234 pix->bytesperline = ALIGN(pix->width * *bpp, 32);
235 pix->sizeimage = pix->bytesperline * pix->height;
236 }
237
pix_to_mbus(struct vpfe_device * vpfe,struct v4l2_pix_format * pix_fmt,struct v4l2_mbus_framefmt * mbus_fmt)238 static void pix_to_mbus(struct vpfe_device *vpfe,
239 struct v4l2_pix_format *pix_fmt,
240 struct v4l2_mbus_framefmt *mbus_fmt)
241 {
242 struct vpfe_fmt *fmt;
243
244 fmt = find_format_by_pix(pix_fmt->pixelformat);
245 if (!fmt) {
246 /* default to first entry */
247 vpfe_dbg(3, vpfe, "Invalid pixel code: %x, default used instead\n",
248 pix_fmt->pixelformat);
249 fmt = &formats[0];
250 }
251
252 memset(mbus_fmt, 0, sizeof(*mbus_fmt));
253 v4l2_fill_mbus_format(mbus_fmt, pix_fmt, fmt->code);
254 }
255
256 /* Print Four-character-code (FOURCC) */
print_fourcc(u32 fmt)257 static char *print_fourcc(u32 fmt)
258 {
259 static char code[5];
260
261 code[0] = (unsigned char)(fmt & 0xff);
262 code[1] = (unsigned char)((fmt >> 8) & 0xff);
263 code[2] = (unsigned char)((fmt >> 16) & 0xff);
264 code[3] = (unsigned char)((fmt >> 24) & 0xff);
265 code[4] = '\0';
266
267 return code;
268 }
269
270 static int
cmp_v4l2_format(const struct v4l2_format * lhs,const struct v4l2_format * rhs)271 cmp_v4l2_format(const struct v4l2_format *lhs, const struct v4l2_format *rhs)
272 {
273 return lhs->type == rhs->type &&
274 lhs->fmt.pix.width == rhs->fmt.pix.width &&
275 lhs->fmt.pix.height == rhs->fmt.pix.height &&
276 lhs->fmt.pix.pixelformat == rhs->fmt.pix.pixelformat &&
277 lhs->fmt.pix.field == rhs->fmt.pix.field &&
278 lhs->fmt.pix.colorspace == rhs->fmt.pix.colorspace &&
279 lhs->fmt.pix.ycbcr_enc == rhs->fmt.pix.ycbcr_enc &&
280 lhs->fmt.pix.quantization == rhs->fmt.pix.quantization &&
281 lhs->fmt.pix.xfer_func == rhs->fmt.pix.xfer_func;
282 }
283
vpfe_reg_read(struct vpfe_ccdc * ccdc,u32 offset)284 static inline u32 vpfe_reg_read(struct vpfe_ccdc *ccdc, u32 offset)
285 {
286 return ioread32(ccdc->ccdc_cfg.base_addr + offset);
287 }
288
vpfe_reg_write(struct vpfe_ccdc * ccdc,u32 val,u32 offset)289 static inline void vpfe_reg_write(struct vpfe_ccdc *ccdc, u32 val, u32 offset)
290 {
291 iowrite32(val, ccdc->ccdc_cfg.base_addr + offset);
292 }
293
to_vpfe(struct vpfe_ccdc * ccdc)294 static inline struct vpfe_device *to_vpfe(struct vpfe_ccdc *ccdc)
295 {
296 return container_of(ccdc, struct vpfe_device, ccdc);
297 }
298
299 static inline
to_vpfe_buffer(struct vb2_v4l2_buffer * vb)300 struct vpfe_cap_buffer *to_vpfe_buffer(struct vb2_v4l2_buffer *vb)
301 {
302 return container_of(vb, struct vpfe_cap_buffer, vb);
303 }
304
vpfe_pcr_enable(struct vpfe_ccdc * ccdc,int flag)305 static inline void vpfe_pcr_enable(struct vpfe_ccdc *ccdc, int flag)
306 {
307 vpfe_reg_write(ccdc, !!flag, VPFE_PCR);
308 }
309
vpfe_config_enable(struct vpfe_ccdc * ccdc,int flag)310 static void vpfe_config_enable(struct vpfe_ccdc *ccdc, int flag)
311 {
312 unsigned int cfg;
313
314 if (!flag) {
315 cfg = vpfe_reg_read(ccdc, VPFE_CONFIG);
316 cfg &= ~(VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT);
317 } else {
318 cfg = VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT;
319 }
320
321 vpfe_reg_write(ccdc, cfg, VPFE_CONFIG);
322 }
323
vpfe_ccdc_setwin(struct vpfe_ccdc * ccdc,struct v4l2_rect * image_win,enum ccdc_frmfmt frm_fmt,int bpp)324 static void vpfe_ccdc_setwin(struct vpfe_ccdc *ccdc,
325 struct v4l2_rect *image_win,
326 enum ccdc_frmfmt frm_fmt,
327 int bpp)
328 {
329 int horz_start, horz_nr_pixels;
330 int vert_start, vert_nr_lines;
331 int val, mid_img;
332
333 /*
334 * ppc - per pixel count. indicates how many pixels per cell
335 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
336 * raw capture this is 1
337 */
338 horz_start = image_win->left * bpp;
339 horz_nr_pixels = (image_win->width * bpp) - 1;
340 vpfe_reg_write(ccdc, (horz_start << VPFE_HORZ_INFO_SPH_SHIFT) |
341 horz_nr_pixels, VPFE_HORZ_INFO);
342
343 vert_start = image_win->top;
344
345 if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
346 vert_nr_lines = (image_win->height >> 1) - 1;
347 vert_start >>= 1;
348 /* Since first line doesn't have any data */
349 vert_start += 1;
350 /* configure VDINT0 */
351 val = (vert_start << VPFE_VDINT_VDINT0_SHIFT);
352 } else {
353 /* Since first line doesn't have any data */
354 vert_start += 1;
355 vert_nr_lines = image_win->height - 1;
356 /*
357 * configure VDINT0 and VDINT1. VDINT1 will be at half
358 * of image height
359 */
360 mid_img = vert_start + (image_win->height / 2);
361 val = (vert_start << VPFE_VDINT_VDINT0_SHIFT) |
362 (mid_img & VPFE_VDINT_VDINT1_MASK);
363 }
364
365 vpfe_reg_write(ccdc, val, VPFE_VDINT);
366
367 vpfe_reg_write(ccdc, (vert_start << VPFE_VERT_START_SLV0_SHIFT) |
368 vert_start, VPFE_VERT_START);
369 vpfe_reg_write(ccdc, vert_nr_lines, VPFE_VERT_LINES);
370 }
371
vpfe_reg_dump(struct vpfe_ccdc * ccdc)372 static void vpfe_reg_dump(struct vpfe_ccdc *ccdc)
373 {
374 struct vpfe_device *vpfe = to_vpfe(ccdc);
375
376 vpfe_dbg(3, vpfe, "ALAW: 0x%x\n", vpfe_reg_read(ccdc, VPFE_ALAW));
377 vpfe_dbg(3, vpfe, "CLAMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_CLAMP));
378 vpfe_dbg(3, vpfe, "DCSUB: 0x%x\n", vpfe_reg_read(ccdc, VPFE_DCSUB));
379 vpfe_dbg(3, vpfe, "BLKCMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_BLKCMP));
380 vpfe_dbg(3, vpfe, "COLPTN: 0x%x\n", vpfe_reg_read(ccdc, VPFE_COLPTN));
381 vpfe_dbg(3, vpfe, "SDOFST: 0x%x\n", vpfe_reg_read(ccdc, VPFE_SDOFST));
382 vpfe_dbg(3, vpfe, "SYN_MODE: 0x%x\n",
383 vpfe_reg_read(ccdc, VPFE_SYNMODE));
384 vpfe_dbg(3, vpfe, "HSIZE_OFF: 0x%x\n",
385 vpfe_reg_read(ccdc, VPFE_HSIZE_OFF));
386 vpfe_dbg(3, vpfe, "HORZ_INFO: 0x%x\n",
387 vpfe_reg_read(ccdc, VPFE_HORZ_INFO));
388 vpfe_dbg(3, vpfe, "VERT_START: 0x%x\n",
389 vpfe_reg_read(ccdc, VPFE_VERT_START));
390 vpfe_dbg(3, vpfe, "VERT_LINES: 0x%x\n",
391 vpfe_reg_read(ccdc, VPFE_VERT_LINES));
392 }
393
394 static int
vpfe_ccdc_validate_param(struct vpfe_ccdc * ccdc,struct vpfe_ccdc_config_params_raw * ccdcparam)395 vpfe_ccdc_validate_param(struct vpfe_ccdc *ccdc,
396 struct vpfe_ccdc_config_params_raw *ccdcparam)
397 {
398 struct vpfe_device *vpfe = to_vpfe(ccdc);
399 u8 max_gamma, max_data;
400
401 if (!ccdcparam->alaw.enable)
402 return 0;
403
404 max_gamma = ccdc_gamma_width_max_bit(ccdcparam->alaw.gamma_wd);
405 max_data = ccdc_data_size_max_bit(ccdcparam->data_sz);
406
407 if (ccdcparam->alaw.gamma_wd > VPFE_CCDC_GAMMA_BITS_09_0 ||
408 ccdcparam->alaw.gamma_wd < VPFE_CCDC_GAMMA_BITS_15_6 ||
409 max_gamma > max_data) {
410 vpfe_dbg(1, vpfe, "Invalid data line select\n");
411 return -EINVAL;
412 }
413
414 return 0;
415 }
416
417 static void
vpfe_ccdc_update_raw_params(struct vpfe_ccdc * ccdc,struct vpfe_ccdc_config_params_raw * raw_params)418 vpfe_ccdc_update_raw_params(struct vpfe_ccdc *ccdc,
419 struct vpfe_ccdc_config_params_raw *raw_params)
420 {
421 struct vpfe_ccdc_config_params_raw *config_params =
422 &ccdc->ccdc_cfg.bayer.config_params;
423
424 *config_params = *raw_params;
425 }
426
427 /*
428 * vpfe_ccdc_restore_defaults()
429 * This function will write defaults to all CCDC registers
430 */
vpfe_ccdc_restore_defaults(struct vpfe_ccdc * ccdc)431 static void vpfe_ccdc_restore_defaults(struct vpfe_ccdc *ccdc)
432 {
433 int i;
434
435 /* Disable CCDC */
436 vpfe_pcr_enable(ccdc, 0);
437
438 /* set all registers to default value */
439 for (i = 4; i <= 0x94; i += 4)
440 vpfe_reg_write(ccdc, 0, i);
441
442 vpfe_reg_write(ccdc, VPFE_NO_CULLING, VPFE_CULLING);
443 vpfe_reg_write(ccdc, VPFE_CCDC_GAMMA_BITS_11_2, VPFE_ALAW);
444 }
445
vpfe_ccdc_close(struct vpfe_ccdc * ccdc,struct device * dev)446 static int vpfe_ccdc_close(struct vpfe_ccdc *ccdc, struct device *dev)
447 {
448 int dma_cntl, i, pcr;
449
450 /* If the CCDC module is still busy wait for it to be done */
451 for (i = 0; i < 10; i++) {
452 usleep_range(5000, 6000);
453 pcr = vpfe_reg_read(ccdc, VPFE_PCR);
454 if (!pcr)
455 break;
456
457 /* make sure it it is disabled */
458 vpfe_pcr_enable(ccdc, 0);
459 }
460
461 /* Disable CCDC by resetting all register to default POR values */
462 vpfe_ccdc_restore_defaults(ccdc);
463
464 /* if DMA_CNTL overflow bit is set. Clear it
465 * It appears to take a while for this to become quiescent ~20ms
466 */
467 for (i = 0; i < 10; i++) {
468 dma_cntl = vpfe_reg_read(ccdc, VPFE_DMA_CNTL);
469 if (!(dma_cntl & VPFE_DMA_CNTL_OVERFLOW))
470 break;
471
472 /* Clear the overflow bit */
473 vpfe_reg_write(ccdc, dma_cntl, VPFE_DMA_CNTL);
474 usleep_range(5000, 6000);
475 }
476
477 /* Disabled the module at the CONFIG level */
478 vpfe_config_enable(ccdc, 0);
479
480 pm_runtime_put_sync(dev);
481
482 return 0;
483 }
484
vpfe_ccdc_set_params(struct vpfe_ccdc * ccdc,void __user * params)485 static int vpfe_ccdc_set_params(struct vpfe_ccdc *ccdc, void __user *params)
486 {
487 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
488 struct vpfe_ccdc_config_params_raw raw_params;
489 int x;
490
491 if (ccdc->ccdc_cfg.if_type != VPFE_RAW_BAYER)
492 return -EINVAL;
493
494 x = copy_from_user(&raw_params, params, sizeof(raw_params));
495 if (x) {
496 vpfe_dbg(1, vpfe,
497 "vpfe_ccdc_set_params: error in copying ccdc params, %d\n",
498 x);
499 return -EFAULT;
500 }
501
502 if (!vpfe_ccdc_validate_param(ccdc, &raw_params)) {
503 vpfe_ccdc_update_raw_params(ccdc, &raw_params);
504 return 0;
505 }
506
507 return -EINVAL;
508 }
509
510 /*
511 * vpfe_ccdc_config_ycbcr()
512 * This function will configure CCDC for YCbCr video capture
513 */
vpfe_ccdc_config_ycbcr(struct vpfe_ccdc * ccdc)514 static void vpfe_ccdc_config_ycbcr(struct vpfe_ccdc *ccdc)
515 {
516 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
517 struct ccdc_params_ycbcr *params = &ccdc->ccdc_cfg.ycbcr;
518 u32 syn_mode;
519
520 vpfe_dbg(3, vpfe, "vpfe_ccdc_config_ycbcr:\n");
521 /*
522 * first restore the CCDC registers to default values
523 * This is important since we assume default values to be set in
524 * a lot of registers that we didn't touch
525 */
526 vpfe_ccdc_restore_defaults(ccdc);
527
528 /*
529 * configure pixel format, frame format, configure video frame
530 * format, enable output to SDRAM, enable internal timing generator
531 * and 8bit pack mode
532 */
533 syn_mode = (((params->pix_fmt & VPFE_SYN_MODE_INPMOD_MASK) <<
534 VPFE_SYN_MODE_INPMOD_SHIFT) |
535 ((params->frm_fmt & VPFE_SYN_FLDMODE_MASK) <<
536 VPFE_SYN_FLDMODE_SHIFT) | VPFE_VDHDEN_ENABLE |
537 VPFE_WEN_ENABLE | VPFE_DATA_PACK_ENABLE);
538
539 /* setup BT.656 sync mode */
540 if (params->bt656_enable) {
541 vpfe_reg_write(ccdc, VPFE_REC656IF_BT656_EN, VPFE_REC656IF);
542
543 /*
544 * configure the FID, VD, HD pin polarity,
545 * fld,hd pol positive, vd negative, 8-bit data
546 */
547 syn_mode |= VPFE_SYN_MODE_VD_POL_NEGATIVE;
548 if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT)
549 syn_mode |= VPFE_SYN_MODE_10BITS;
550 else
551 syn_mode |= VPFE_SYN_MODE_8BITS;
552 } else {
553 /* y/c external sync mode */
554 syn_mode |= (((params->fid_pol & VPFE_FID_POL_MASK) <<
555 VPFE_FID_POL_SHIFT) |
556 ((params->hd_pol & VPFE_HD_POL_MASK) <<
557 VPFE_HD_POL_SHIFT) |
558 ((params->vd_pol & VPFE_VD_POL_MASK) <<
559 VPFE_VD_POL_SHIFT));
560 }
561 vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE);
562
563 /* configure video window */
564 vpfe_ccdc_setwin(ccdc, ¶ms->win,
565 params->frm_fmt, params->bytesperpixel);
566
567 /*
568 * configure the order of y cb cr in SDRAM, and disable latch
569 * internal register on vsync
570 */
571 if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT)
572 vpfe_reg_write(ccdc,
573 (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) |
574 VPFE_LATCH_ON_VSYNC_DISABLE |
575 VPFE_CCDCFG_BW656_10BIT, VPFE_CCDCFG);
576 else
577 vpfe_reg_write(ccdc,
578 (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) |
579 VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG);
580
581 /*
582 * configure the horizontal line offset. This should be a
583 * on 32 byte boundary. So clear LSB 5 bits
584 */
585 vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF);
586
587 /* configure the memory line offset */
588 if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED)
589 /* two fields are interleaved in memory */
590 vpfe_reg_write(ccdc, VPFE_SDOFST_FIELD_INTERLEAVED,
591 VPFE_SDOFST);
592 }
593
594 static void
vpfe_ccdc_config_black_clamp(struct vpfe_ccdc * ccdc,struct vpfe_ccdc_black_clamp * bclamp)595 vpfe_ccdc_config_black_clamp(struct vpfe_ccdc *ccdc,
596 struct vpfe_ccdc_black_clamp *bclamp)
597 {
598 u32 val;
599
600 if (!bclamp->enable) {
601 /* configure DCSub */
602 val = (bclamp->dc_sub) & VPFE_BLK_DC_SUB_MASK;
603 vpfe_reg_write(ccdc, val, VPFE_DCSUB);
604 vpfe_reg_write(ccdc, VPFE_CLAMP_DEFAULT_VAL, VPFE_CLAMP);
605 return;
606 }
607 /*
608 * Configure gain, Start pixel, No of line to be avg,
609 * No of pixel/line to be avg, & Enable the Black clamping
610 */
611 val = ((bclamp->sgain & VPFE_BLK_SGAIN_MASK) |
612 ((bclamp->start_pixel & VPFE_BLK_ST_PXL_MASK) <<
613 VPFE_BLK_ST_PXL_SHIFT) |
614 ((bclamp->sample_ln & VPFE_BLK_SAMPLE_LINE_MASK) <<
615 VPFE_BLK_SAMPLE_LINE_SHIFT) |
616 ((bclamp->sample_pixel & VPFE_BLK_SAMPLE_LN_MASK) <<
617 VPFE_BLK_SAMPLE_LN_SHIFT) | VPFE_BLK_CLAMP_ENABLE);
618 vpfe_reg_write(ccdc, val, VPFE_CLAMP);
619 /* If Black clamping is enable then make dcsub 0 */
620 vpfe_reg_write(ccdc, VPFE_DCSUB_DEFAULT_VAL, VPFE_DCSUB);
621 }
622
623 static void
vpfe_ccdc_config_black_compense(struct vpfe_ccdc * ccdc,struct vpfe_ccdc_black_compensation * bcomp)624 vpfe_ccdc_config_black_compense(struct vpfe_ccdc *ccdc,
625 struct vpfe_ccdc_black_compensation *bcomp)
626 {
627 u32 val;
628
629 val = ((bcomp->b & VPFE_BLK_COMP_MASK) |
630 ((bcomp->gb & VPFE_BLK_COMP_MASK) <<
631 VPFE_BLK_COMP_GB_COMP_SHIFT) |
632 ((bcomp->gr & VPFE_BLK_COMP_MASK) <<
633 VPFE_BLK_COMP_GR_COMP_SHIFT) |
634 ((bcomp->r & VPFE_BLK_COMP_MASK) <<
635 VPFE_BLK_COMP_R_COMP_SHIFT));
636 vpfe_reg_write(ccdc, val, VPFE_BLKCMP);
637 }
638
639 /*
640 * vpfe_ccdc_config_raw()
641 * This function will configure CCDC for Raw capture mode
642 */
vpfe_ccdc_config_raw(struct vpfe_ccdc * ccdc)643 static void vpfe_ccdc_config_raw(struct vpfe_ccdc *ccdc)
644 {
645 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
646 struct vpfe_ccdc_config_params_raw *config_params =
647 &ccdc->ccdc_cfg.bayer.config_params;
648 struct ccdc_params_raw *params = &ccdc->ccdc_cfg.bayer;
649 unsigned int syn_mode;
650 unsigned int val;
651
652 vpfe_dbg(3, vpfe, "vpfe_ccdc_config_raw:\n");
653
654 /* Reset CCDC */
655 vpfe_ccdc_restore_defaults(ccdc);
656
657 /* Disable latching function registers on VSYNC */
658 vpfe_reg_write(ccdc, VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG);
659
660 /*
661 * Configure the vertical sync polarity(SYN_MODE.VDPOL),
662 * horizontal sync polarity (SYN_MODE.HDPOL), frame id polarity
663 * (SYN_MODE.FLDPOL), frame format(progressive or interlace),
664 * data size(SYNMODE.DATSIZ), &pixel format (Input mode), output
665 * SDRAM, enable internal timing generator
666 */
667 syn_mode = (((params->vd_pol & VPFE_VD_POL_MASK) << VPFE_VD_POL_SHIFT) |
668 ((params->hd_pol & VPFE_HD_POL_MASK) << VPFE_HD_POL_SHIFT) |
669 ((params->fid_pol & VPFE_FID_POL_MASK) <<
670 VPFE_FID_POL_SHIFT) | ((params->frm_fmt &
671 VPFE_FRM_FMT_MASK) << VPFE_FRM_FMT_SHIFT) |
672 ((config_params->data_sz & VPFE_DATA_SZ_MASK) <<
673 VPFE_DATA_SZ_SHIFT) | ((params->pix_fmt &
674 VPFE_PIX_FMT_MASK) << VPFE_PIX_FMT_SHIFT) |
675 VPFE_WEN_ENABLE | VPFE_VDHDEN_ENABLE);
676
677 /* Enable and configure aLaw register if needed */
678 if (config_params->alaw.enable) {
679 val = ((config_params->alaw.gamma_wd &
680 VPFE_ALAW_GAMMA_WD_MASK) | VPFE_ALAW_ENABLE);
681 vpfe_reg_write(ccdc, val, VPFE_ALAW);
682 vpfe_dbg(3, vpfe, "\nWriting 0x%x to ALAW...\n", val);
683 }
684
685 /* Configure video window */
686 vpfe_ccdc_setwin(ccdc, ¶ms->win, params->frm_fmt,
687 params->bytesperpixel);
688
689 /* Configure Black Clamp */
690 vpfe_ccdc_config_black_clamp(ccdc, &config_params->blk_clamp);
691
692 /* Configure Black level compensation */
693 vpfe_ccdc_config_black_compense(ccdc, &config_params->blk_comp);
694
695 /* If data size is 8 bit then pack the data */
696 if ((config_params->data_sz == VPFE_CCDC_DATA_8BITS) ||
697 config_params->alaw.enable)
698 syn_mode |= VPFE_DATA_PACK_ENABLE;
699
700 /*
701 * Configure Horizontal offset register. If pack 8 is enabled then
702 * 1 pixel will take 1 byte
703 */
704 vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF);
705
706 vpfe_dbg(3, vpfe, "Writing %d (%x) to HSIZE_OFF\n",
707 params->bytesperline, params->bytesperline);
708
709 /* Set value for SDOFST */
710 if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
711 if (params->image_invert_enable) {
712 /* For interlace inverse mode */
713 vpfe_reg_write(ccdc, VPFE_INTERLACED_IMAGE_INVERT,
714 VPFE_SDOFST);
715 } else {
716 /* For interlace non inverse mode */
717 vpfe_reg_write(ccdc, VPFE_INTERLACED_NO_IMAGE_INVERT,
718 VPFE_SDOFST);
719 }
720 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
721 vpfe_reg_write(ccdc, VPFE_PROGRESSIVE_NO_IMAGE_INVERT,
722 VPFE_SDOFST);
723 }
724
725 vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE);
726
727 vpfe_reg_dump(ccdc);
728 }
729
730 static inline int
vpfe_ccdc_set_buftype(struct vpfe_ccdc * ccdc,enum ccdc_buftype buf_type)731 vpfe_ccdc_set_buftype(struct vpfe_ccdc *ccdc,
732 enum ccdc_buftype buf_type)
733 {
734 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
735 ccdc->ccdc_cfg.bayer.buf_type = buf_type;
736 else
737 ccdc->ccdc_cfg.ycbcr.buf_type = buf_type;
738
739 return 0;
740 }
741
vpfe_ccdc_get_buftype(struct vpfe_ccdc * ccdc)742 static inline enum ccdc_buftype vpfe_ccdc_get_buftype(struct vpfe_ccdc *ccdc)
743 {
744 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
745 return ccdc->ccdc_cfg.bayer.buf_type;
746
747 return ccdc->ccdc_cfg.ycbcr.buf_type;
748 }
749
vpfe_ccdc_set_pixel_format(struct vpfe_ccdc * ccdc,u32 pixfmt)750 static int vpfe_ccdc_set_pixel_format(struct vpfe_ccdc *ccdc, u32 pixfmt)
751 {
752 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
753
754 vpfe_dbg(1, vpfe, "vpfe_ccdc_set_pixel_format: if_type: %d, pixfmt:%s\n",
755 ccdc->ccdc_cfg.if_type, print_fourcc(pixfmt));
756
757 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
758 ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
759 /*
760 * Need to clear it in case it was left on
761 * after the last capture.
762 */
763 ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 0;
764
765 switch (pixfmt) {
766 case V4L2_PIX_FMT_SBGGR8:
767 ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 1;
768 break;
769
770 case V4L2_PIX_FMT_YUYV:
771 case V4L2_PIX_FMT_UYVY:
772 case V4L2_PIX_FMT_YUV420:
773 case V4L2_PIX_FMT_NV12:
774 case V4L2_PIX_FMT_RGB565X:
775 break;
776
777 case V4L2_PIX_FMT_SBGGR16:
778 default:
779 return -EINVAL;
780 }
781 } else {
782 switch (pixfmt) {
783 case V4L2_PIX_FMT_YUYV:
784 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
785 break;
786
787 case V4L2_PIX_FMT_UYVY:
788 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
789 break;
790
791 default:
792 return -EINVAL;
793 }
794 }
795
796 return 0;
797 }
798
vpfe_ccdc_get_pixel_format(struct vpfe_ccdc * ccdc)799 static u32 vpfe_ccdc_get_pixel_format(struct vpfe_ccdc *ccdc)
800 {
801 u32 pixfmt;
802
803 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
804 pixfmt = V4L2_PIX_FMT_YUYV;
805 } else {
806 if (ccdc->ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
807 pixfmt = V4L2_PIX_FMT_YUYV;
808 else
809 pixfmt = V4L2_PIX_FMT_UYVY;
810 }
811
812 return pixfmt;
813 }
814
815 static int
vpfe_ccdc_set_image_window(struct vpfe_ccdc * ccdc,struct v4l2_rect * win,unsigned int bpp)816 vpfe_ccdc_set_image_window(struct vpfe_ccdc *ccdc,
817 struct v4l2_rect *win, unsigned int bpp)
818 {
819 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
820 ccdc->ccdc_cfg.bayer.win = *win;
821 ccdc->ccdc_cfg.bayer.bytesperpixel = bpp;
822 ccdc->ccdc_cfg.bayer.bytesperline = ALIGN(win->width * bpp, 32);
823 } else {
824 ccdc->ccdc_cfg.ycbcr.win = *win;
825 ccdc->ccdc_cfg.ycbcr.bytesperpixel = bpp;
826 ccdc->ccdc_cfg.ycbcr.bytesperline = ALIGN(win->width * bpp, 32);
827 }
828
829 return 0;
830 }
831
832 static inline void
vpfe_ccdc_get_image_window(struct vpfe_ccdc * ccdc,struct v4l2_rect * win)833 vpfe_ccdc_get_image_window(struct vpfe_ccdc *ccdc,
834 struct v4l2_rect *win)
835 {
836 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
837 *win = ccdc->ccdc_cfg.bayer.win;
838 else
839 *win = ccdc->ccdc_cfg.ycbcr.win;
840 }
841
vpfe_ccdc_get_line_length(struct vpfe_ccdc * ccdc)842 static inline unsigned int vpfe_ccdc_get_line_length(struct vpfe_ccdc *ccdc)
843 {
844 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
845 return ccdc->ccdc_cfg.bayer.bytesperline;
846
847 return ccdc->ccdc_cfg.ycbcr.bytesperline;
848 }
849
850 static inline int
vpfe_ccdc_set_frame_format(struct vpfe_ccdc * ccdc,enum ccdc_frmfmt frm_fmt)851 vpfe_ccdc_set_frame_format(struct vpfe_ccdc *ccdc,
852 enum ccdc_frmfmt frm_fmt)
853 {
854 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
855 ccdc->ccdc_cfg.bayer.frm_fmt = frm_fmt;
856 else
857 ccdc->ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
858
859 return 0;
860 }
861
862 static inline enum ccdc_frmfmt
vpfe_ccdc_get_frame_format(struct vpfe_ccdc * ccdc)863 vpfe_ccdc_get_frame_format(struct vpfe_ccdc *ccdc)
864 {
865 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
866 return ccdc->ccdc_cfg.bayer.frm_fmt;
867
868 return ccdc->ccdc_cfg.ycbcr.frm_fmt;
869 }
870
vpfe_ccdc_getfid(struct vpfe_ccdc * ccdc)871 static inline int vpfe_ccdc_getfid(struct vpfe_ccdc *ccdc)
872 {
873 return (vpfe_reg_read(ccdc, VPFE_SYNMODE) >> 15) & 1;
874 }
875
vpfe_set_sdr_addr(struct vpfe_ccdc * ccdc,unsigned long addr)876 static inline void vpfe_set_sdr_addr(struct vpfe_ccdc *ccdc, unsigned long addr)
877 {
878 vpfe_reg_write(ccdc, addr & 0xffffffe0, VPFE_SDR_ADDR);
879 }
880
vpfe_ccdc_set_hw_if_params(struct vpfe_ccdc * ccdc,struct vpfe_hw_if_param * params)881 static int vpfe_ccdc_set_hw_if_params(struct vpfe_ccdc *ccdc,
882 struct vpfe_hw_if_param *params)
883 {
884 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
885
886 ccdc->ccdc_cfg.if_type = params->if_type;
887
888 switch (params->if_type) {
889 case VPFE_BT656:
890 case VPFE_YCBCR_SYNC_16:
891 case VPFE_YCBCR_SYNC_8:
892 case VPFE_BT656_10BIT:
893 ccdc->ccdc_cfg.ycbcr.vd_pol = params->vdpol;
894 ccdc->ccdc_cfg.ycbcr.hd_pol = params->hdpol;
895 break;
896
897 case VPFE_RAW_BAYER:
898 ccdc->ccdc_cfg.bayer.vd_pol = params->vdpol;
899 ccdc->ccdc_cfg.bayer.hd_pol = params->hdpol;
900 if (params->bus_width == 10)
901 ccdc->ccdc_cfg.bayer.config_params.data_sz =
902 VPFE_CCDC_DATA_10BITS;
903 else
904 ccdc->ccdc_cfg.bayer.config_params.data_sz =
905 VPFE_CCDC_DATA_8BITS;
906 vpfe_dbg(1, vpfe, "params.bus_width: %d\n",
907 params->bus_width);
908 vpfe_dbg(1, vpfe, "config_params.data_sz: %d\n",
909 ccdc->ccdc_cfg.bayer.config_params.data_sz);
910 break;
911
912 default:
913 return -EINVAL;
914 }
915
916 return 0;
917 }
918
vpfe_clear_intr(struct vpfe_ccdc * ccdc,int vdint)919 static void vpfe_clear_intr(struct vpfe_ccdc *ccdc, int vdint)
920 {
921 unsigned int vpfe_int_status;
922
923 vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS);
924
925 switch (vdint) {
926 /* VD0 interrupt */
927 case VPFE_VDINT0:
928 vpfe_int_status &= ~VPFE_VDINT0;
929 vpfe_int_status |= VPFE_VDINT0;
930 break;
931
932 /* VD1 interrupt */
933 case VPFE_VDINT1:
934 vpfe_int_status &= ~VPFE_VDINT1;
935 vpfe_int_status |= VPFE_VDINT1;
936 break;
937
938 /* VD2 interrupt */
939 case VPFE_VDINT2:
940 vpfe_int_status &= ~VPFE_VDINT2;
941 vpfe_int_status |= VPFE_VDINT2;
942 break;
943
944 /* Clear all interrupts */
945 default:
946 vpfe_int_status &= ~(VPFE_VDINT0 |
947 VPFE_VDINT1 |
948 VPFE_VDINT2);
949 vpfe_int_status |= (VPFE_VDINT0 |
950 VPFE_VDINT1 |
951 VPFE_VDINT2);
952 break;
953 }
954 /* Clear specific VDINT from the status register */
955 vpfe_reg_write(ccdc, vpfe_int_status, VPFE_IRQ_STS);
956
957 vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS);
958
959 /* Acknowledge that we are done with all interrupts */
960 vpfe_reg_write(ccdc, 1, VPFE_IRQ_EOI);
961 }
962
vpfe_ccdc_config_defaults(struct vpfe_ccdc * ccdc)963 static void vpfe_ccdc_config_defaults(struct vpfe_ccdc *ccdc)
964 {
965 ccdc->ccdc_cfg.if_type = VPFE_RAW_BAYER;
966
967 ccdc->ccdc_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT;
968 ccdc->ccdc_cfg.ycbcr.frm_fmt = CCDC_FRMFMT_INTERLACED;
969 ccdc->ccdc_cfg.ycbcr.fid_pol = VPFE_PINPOL_POSITIVE;
970 ccdc->ccdc_cfg.ycbcr.vd_pol = VPFE_PINPOL_POSITIVE;
971 ccdc->ccdc_cfg.ycbcr.hd_pol = VPFE_PINPOL_POSITIVE;
972 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
973 ccdc->ccdc_cfg.ycbcr.buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED;
974
975 ccdc->ccdc_cfg.ycbcr.win.left = 0;
976 ccdc->ccdc_cfg.ycbcr.win.top = 0;
977 ccdc->ccdc_cfg.ycbcr.win.width = 720;
978 ccdc->ccdc_cfg.ycbcr.win.height = 576;
979 ccdc->ccdc_cfg.ycbcr.bt656_enable = 1;
980
981 ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
982 ccdc->ccdc_cfg.bayer.frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
983 ccdc->ccdc_cfg.bayer.fid_pol = VPFE_PINPOL_POSITIVE;
984 ccdc->ccdc_cfg.bayer.vd_pol = VPFE_PINPOL_POSITIVE;
985 ccdc->ccdc_cfg.bayer.hd_pol = VPFE_PINPOL_POSITIVE;
986
987 ccdc->ccdc_cfg.bayer.win.left = 0;
988 ccdc->ccdc_cfg.bayer.win.top = 0;
989 ccdc->ccdc_cfg.bayer.win.width = 800;
990 ccdc->ccdc_cfg.bayer.win.height = 600;
991 ccdc->ccdc_cfg.bayer.config_params.data_sz = VPFE_CCDC_DATA_8BITS;
992 ccdc->ccdc_cfg.bayer.config_params.alaw.gamma_wd =
993 VPFE_CCDC_GAMMA_BITS_09_0;
994 }
995
996 /*
997 * vpfe_get_ccdc_image_format - Get image parameters based on CCDC settings
998 */
vpfe_get_ccdc_image_format(struct vpfe_device * vpfe,struct v4l2_format * f)999 static int vpfe_get_ccdc_image_format(struct vpfe_device *vpfe,
1000 struct v4l2_format *f)
1001 {
1002 struct v4l2_rect image_win;
1003 enum ccdc_buftype buf_type;
1004 enum ccdc_frmfmt frm_fmt;
1005
1006 memset(f, 0, sizeof(*f));
1007 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1008 vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win);
1009 f->fmt.pix.width = image_win.width;
1010 f->fmt.pix.height = image_win.height;
1011 f->fmt.pix.bytesperline = vpfe_ccdc_get_line_length(&vpfe->ccdc);
1012 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
1013 f->fmt.pix.height;
1014 buf_type = vpfe_ccdc_get_buftype(&vpfe->ccdc);
1015 f->fmt.pix.pixelformat = vpfe_ccdc_get_pixel_format(&vpfe->ccdc);
1016 frm_fmt = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1017
1018 if (frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
1019 f->fmt.pix.field = V4L2_FIELD_NONE;
1020 } else if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
1021 if (buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) {
1022 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
1023 } else if (buf_type == CCDC_BUFTYPE_FLD_SEPARATED) {
1024 f->fmt.pix.field = V4L2_FIELD_SEQ_TB;
1025 } else {
1026 vpfe_err(vpfe, "Invalid buf_type\n");
1027 return -EINVAL;
1028 }
1029 } else {
1030 vpfe_err(vpfe, "Invalid frm_fmt\n");
1031 return -EINVAL;
1032 }
1033 return 0;
1034 }
1035
vpfe_config_ccdc_image_format(struct vpfe_device * vpfe)1036 static int vpfe_config_ccdc_image_format(struct vpfe_device *vpfe)
1037 {
1038 enum ccdc_frmfmt frm_fmt = CCDC_FRMFMT_INTERLACED;
1039 int ret = 0;
1040
1041 vpfe_dbg(2, vpfe, "vpfe_config_ccdc_image_format\n");
1042
1043 vpfe_dbg(1, vpfe, "pixelformat: %s\n",
1044 print_fourcc(vpfe->fmt.fmt.pix.pixelformat));
1045
1046 if (vpfe_ccdc_set_pixel_format(&vpfe->ccdc,
1047 vpfe->fmt.fmt.pix.pixelformat) < 0) {
1048 vpfe_err(vpfe, "couldn't set pix format in ccdc\n");
1049 return -EINVAL;
1050 }
1051
1052 /* configure the image window */
1053 vpfe_ccdc_set_image_window(&vpfe->ccdc, &vpfe->crop, vpfe->bpp);
1054
1055 switch (vpfe->fmt.fmt.pix.field) {
1056 case V4L2_FIELD_INTERLACED:
1057 /* do nothing, since it is default */
1058 ret = vpfe_ccdc_set_buftype(
1059 &vpfe->ccdc,
1060 CCDC_BUFTYPE_FLD_INTERLEAVED);
1061 break;
1062
1063 case V4L2_FIELD_NONE:
1064 frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
1065 /* buffer type only applicable for interlaced scan */
1066 break;
1067
1068 case V4L2_FIELD_SEQ_TB:
1069 ret = vpfe_ccdc_set_buftype(
1070 &vpfe->ccdc,
1071 CCDC_BUFTYPE_FLD_SEPARATED);
1072 break;
1073
1074 default:
1075 return -EINVAL;
1076 }
1077
1078 if (ret)
1079 return ret;
1080
1081 return vpfe_ccdc_set_frame_format(&vpfe->ccdc, frm_fmt);
1082 }
1083
1084 /*
1085 * vpfe_config_image_format()
1086 * For a given standard, this functions sets up the default
1087 * pix format & crop values in the vpfe device and ccdc. It first
1088 * starts with defaults based values from the standard table.
1089 * It then checks if sub device supports get_fmt and then override the
1090 * values based on that.Sets crop values to match with scan resolution
1091 * starting at 0,0. It calls vpfe_config_ccdc_image_format() set the
1092 * values in ccdc
1093 */
vpfe_config_image_format(struct vpfe_device * vpfe,v4l2_std_id std_id)1094 static int vpfe_config_image_format(struct vpfe_device *vpfe,
1095 v4l2_std_id std_id)
1096 {
1097 struct v4l2_pix_format *pix = &vpfe->fmt.fmt.pix;
1098 int i, ret;
1099
1100 for (i = 0; i < ARRAY_SIZE(vpfe_standards); i++) {
1101 if (vpfe_standards[i].std_id & std_id) {
1102 vpfe->std_info.active_pixels =
1103 vpfe_standards[i].width;
1104 vpfe->std_info.active_lines =
1105 vpfe_standards[i].height;
1106 vpfe->std_info.frame_format =
1107 vpfe_standards[i].frame_format;
1108 vpfe->std_index = i;
1109
1110 break;
1111 }
1112 }
1113
1114 if (i == ARRAY_SIZE(vpfe_standards)) {
1115 vpfe_err(vpfe, "standard not supported\n");
1116 return -EINVAL;
1117 }
1118
1119 vpfe->crop.top = vpfe->crop.left = 0;
1120 vpfe->crop.width = vpfe->std_info.active_pixels;
1121 vpfe->crop.height = vpfe->std_info.active_lines;
1122 pix->width = vpfe->crop.width;
1123 pix->height = vpfe->crop.height;
1124 pix->pixelformat = V4L2_PIX_FMT_YUYV;
1125
1126 /* first field and frame format based on standard frame format */
1127 if (vpfe->std_info.frame_format)
1128 pix->field = V4L2_FIELD_INTERLACED;
1129 else
1130 pix->field = V4L2_FIELD_NONE;
1131
1132 ret = __vpfe_get_format(vpfe, &vpfe->fmt, &vpfe->bpp);
1133 if (ret)
1134 return ret;
1135
1136 /* Update the crop window based on found values */
1137 vpfe->crop.width = pix->width;
1138 vpfe->crop.height = pix->height;
1139
1140 return vpfe_config_ccdc_image_format(vpfe);
1141 }
1142
vpfe_initialize_device(struct vpfe_device * vpfe)1143 static int vpfe_initialize_device(struct vpfe_device *vpfe)
1144 {
1145 struct vpfe_subdev_info *sdinfo;
1146 int ret;
1147
1148 sdinfo = &vpfe->cfg->sub_devs[0];
1149 sdinfo->sd = vpfe->sd[0];
1150 vpfe->current_input = 0;
1151 vpfe->std_index = 0;
1152 /* Configure the default format information */
1153 ret = vpfe_config_image_format(vpfe,
1154 vpfe_standards[vpfe->std_index].std_id);
1155 if (ret)
1156 return ret;
1157
1158 pm_runtime_get_sync(vpfe->pdev);
1159
1160 vpfe_config_enable(&vpfe->ccdc, 1);
1161
1162 vpfe_ccdc_restore_defaults(&vpfe->ccdc);
1163
1164 /* Clear all VPFE interrupts */
1165 vpfe_clear_intr(&vpfe->ccdc, -1);
1166
1167 return ret;
1168 }
1169
1170 /*
1171 * vpfe_release : This function is based on the vb2_fop_release
1172 * helper function.
1173 * It has been augmented to handle module power management,
1174 * by disabling/enabling h/w module fcntl clock when necessary.
1175 */
vpfe_release(struct file * file)1176 static int vpfe_release(struct file *file)
1177 {
1178 struct vpfe_device *vpfe = video_drvdata(file);
1179 bool fh_singular;
1180 int ret;
1181
1182 mutex_lock(&vpfe->lock);
1183
1184 /* Save the singular status before we call the clean-up helper */
1185 fh_singular = v4l2_fh_is_singular_file(file);
1186
1187 /* the release helper will cleanup any on-going streaming */
1188 ret = _vb2_fop_release(file, NULL);
1189
1190 /*
1191 * If this was the last open file.
1192 * Then de-initialize hw module.
1193 */
1194 if (fh_singular)
1195 vpfe_ccdc_close(&vpfe->ccdc, vpfe->pdev);
1196
1197 mutex_unlock(&vpfe->lock);
1198
1199 return ret;
1200 }
1201
1202 /*
1203 * vpfe_open : This function is based on the v4l2_fh_open helper function.
1204 * It has been augmented to handle module power management,
1205 * by disabling/enabling h/w module fcntl clock when necessary.
1206 */
vpfe_open(struct file * file)1207 static int vpfe_open(struct file *file)
1208 {
1209 struct vpfe_device *vpfe = video_drvdata(file);
1210 int ret;
1211
1212 mutex_lock(&vpfe->lock);
1213
1214 ret = v4l2_fh_open(file);
1215 if (ret) {
1216 vpfe_err(vpfe, "v4l2_fh_open failed\n");
1217 goto unlock;
1218 }
1219
1220 if (!v4l2_fh_is_singular_file(file))
1221 goto unlock;
1222
1223 if (vpfe_initialize_device(vpfe)) {
1224 v4l2_fh_release(file);
1225 ret = -ENODEV;
1226 }
1227
1228 unlock:
1229 mutex_unlock(&vpfe->lock);
1230 return ret;
1231 }
1232
1233 /**
1234 * vpfe_schedule_next_buffer: set next buffer address for capture
1235 * @vpfe : ptr to vpfe device
1236 *
1237 * This function will get next buffer from the dma queue and
1238 * set the buffer address in the vpfe register for capture.
1239 * the buffer is marked active
1240 *
1241 * Assumes caller is holding vpfe->dma_queue_lock already
1242 */
vpfe_schedule_next_buffer(struct vpfe_device * vpfe)1243 static inline void vpfe_schedule_next_buffer(struct vpfe_device *vpfe)
1244 {
1245 vpfe->next_frm = list_entry(vpfe->dma_queue.next,
1246 struct vpfe_cap_buffer, list);
1247 list_del(&vpfe->next_frm->list);
1248
1249 vpfe_set_sdr_addr(&vpfe->ccdc,
1250 vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb.vb2_buf, 0));
1251 }
1252
vpfe_schedule_bottom_field(struct vpfe_device * vpfe)1253 static inline void vpfe_schedule_bottom_field(struct vpfe_device *vpfe)
1254 {
1255 unsigned long addr;
1256
1257 addr = vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb.vb2_buf, 0) +
1258 vpfe->field_off;
1259
1260 vpfe_set_sdr_addr(&vpfe->ccdc, addr);
1261 }
1262
1263 /*
1264 * vpfe_process_buffer_complete: process a completed buffer
1265 * @vpfe : ptr to vpfe device
1266 *
1267 * This function time stamp the buffer and mark it as DONE. It also
1268 * wake up any process waiting on the QUEUE and set the next buffer
1269 * as current
1270 */
vpfe_process_buffer_complete(struct vpfe_device * vpfe)1271 static inline void vpfe_process_buffer_complete(struct vpfe_device *vpfe)
1272 {
1273 vpfe->cur_frm->vb.vb2_buf.timestamp = ktime_get_ns();
1274 vpfe->cur_frm->vb.field = vpfe->fmt.fmt.pix.field;
1275 vpfe->cur_frm->vb.sequence = vpfe->sequence++;
1276 vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE);
1277 vpfe->cur_frm = vpfe->next_frm;
1278 }
1279
1280 /*
1281 * vpfe_isr : ISR handler for vpfe capture (VINT0)
1282 * @irq: irq number
1283 * @dev_id: dev_id ptr
1284 *
1285 * It changes status of the captured buffer, takes next buffer from the queue
1286 * and sets its address in VPFE registers
1287 */
vpfe_isr(int irq,void * dev)1288 static irqreturn_t vpfe_isr(int irq, void *dev)
1289 {
1290 struct vpfe_device *vpfe = (struct vpfe_device *)dev;
1291 enum v4l2_field field;
1292 int intr_status;
1293 int fid;
1294
1295 intr_status = vpfe_reg_read(&vpfe->ccdc, VPFE_IRQ_STS);
1296
1297 if (intr_status & VPFE_VDINT0) {
1298 field = vpfe->fmt.fmt.pix.field;
1299
1300 if (field == V4L2_FIELD_NONE) {
1301 /* handle progressive frame capture */
1302 if (vpfe->cur_frm != vpfe->next_frm)
1303 vpfe_process_buffer_complete(vpfe);
1304 goto next_intr;
1305 }
1306
1307 /* interlaced or TB capture check which field
1308 we are in hardware */
1309 fid = vpfe_ccdc_getfid(&vpfe->ccdc);
1310
1311 /* switch the software maintained field id */
1312 vpfe->field ^= 1;
1313 if (fid == vpfe->field) {
1314 /* we are in-sync here,continue */
1315 if (fid == 0) {
1316 /*
1317 * One frame is just being captured. If the
1318 * next frame is available, release the
1319 * current frame and move on
1320 */
1321 if (vpfe->cur_frm != vpfe->next_frm)
1322 vpfe_process_buffer_complete(vpfe);
1323 /*
1324 * based on whether the two fields are stored
1325 * interleave or separately in memory,
1326 * reconfigure the CCDC memory address
1327 */
1328 if (field == V4L2_FIELD_SEQ_TB)
1329 vpfe_schedule_bottom_field(vpfe);
1330
1331 goto next_intr;
1332 }
1333 /*
1334 * if one field is just being captured configure
1335 * the next frame get the next frame from the empty
1336 * queue if no frame is available hold on to the
1337 * current buffer
1338 */
1339 spin_lock(&vpfe->dma_queue_lock);
1340 if (!list_empty(&vpfe->dma_queue) &&
1341 vpfe->cur_frm == vpfe->next_frm)
1342 vpfe_schedule_next_buffer(vpfe);
1343 spin_unlock(&vpfe->dma_queue_lock);
1344 } else if (fid == 0) {
1345 /*
1346 * out of sync. Recover from any hardware out-of-sync.
1347 * May loose one frame
1348 */
1349 vpfe->field = fid;
1350 }
1351 }
1352
1353 next_intr:
1354 if (intr_status & VPFE_VDINT1) {
1355 spin_lock(&vpfe->dma_queue_lock);
1356 if (vpfe->fmt.fmt.pix.field == V4L2_FIELD_NONE &&
1357 !list_empty(&vpfe->dma_queue) &&
1358 vpfe->cur_frm == vpfe->next_frm)
1359 vpfe_schedule_next_buffer(vpfe);
1360 spin_unlock(&vpfe->dma_queue_lock);
1361 }
1362
1363 vpfe_clear_intr(&vpfe->ccdc, intr_status);
1364
1365 return IRQ_HANDLED;
1366 }
1367
vpfe_detach_irq(struct vpfe_device * vpfe)1368 static inline void vpfe_detach_irq(struct vpfe_device *vpfe)
1369 {
1370 unsigned int intr = VPFE_VDINT0;
1371 enum ccdc_frmfmt frame_format;
1372
1373 frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1374 if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
1375 intr |= VPFE_VDINT1;
1376
1377 vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_CLR);
1378 }
1379
vpfe_attach_irq(struct vpfe_device * vpfe)1380 static inline void vpfe_attach_irq(struct vpfe_device *vpfe)
1381 {
1382 unsigned int intr = VPFE_VDINT0;
1383 enum ccdc_frmfmt frame_format;
1384
1385 frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1386 if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
1387 intr |= VPFE_VDINT1;
1388
1389 vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_SET);
1390 }
1391
vpfe_querycap(struct file * file,void * priv,struct v4l2_capability * cap)1392 static int vpfe_querycap(struct file *file, void *priv,
1393 struct v4l2_capability *cap)
1394 {
1395 struct vpfe_device *vpfe = video_drvdata(file);
1396
1397 vpfe_dbg(2, vpfe, "vpfe_querycap\n");
1398
1399 strscpy(cap->driver, VPFE_MODULE_NAME, sizeof(cap->driver));
1400 strscpy(cap->card, "TI AM437x VPFE", sizeof(cap->card));
1401 snprintf(cap->bus_info, sizeof(cap->bus_info),
1402 "platform:%s", vpfe->v4l2_dev.name);
1403 return 0;
1404 }
1405
1406 /* get the format set at output pad of the adjacent subdev */
__vpfe_get_format(struct vpfe_device * vpfe,struct v4l2_format * format,unsigned int * bpp)1407 static int __vpfe_get_format(struct vpfe_device *vpfe,
1408 struct v4l2_format *format, unsigned int *bpp)
1409 {
1410 struct v4l2_mbus_framefmt mbus_fmt;
1411 struct vpfe_subdev_info *sdinfo;
1412 struct v4l2_subdev_format fmt;
1413 int ret;
1414
1415 sdinfo = vpfe->current_subdev;
1416 if (!sdinfo->sd)
1417 return -EINVAL;
1418
1419 fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1420 fmt.pad = 0;
1421
1422 ret = v4l2_subdev_call(sdinfo->sd, pad, get_fmt, NULL, &fmt);
1423 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1424 return ret;
1425
1426 if (!ret) {
1427 v4l2_fill_pix_format(&format->fmt.pix, &fmt.format);
1428 mbus_to_pix(vpfe, &fmt.format, &format->fmt.pix, bpp);
1429 } else {
1430 ret = v4l2_device_call_until_err(&vpfe->v4l2_dev,
1431 sdinfo->grp_id,
1432 pad, get_fmt,
1433 NULL, &fmt);
1434 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1435 return ret;
1436 v4l2_fill_pix_format(&format->fmt.pix, &mbus_fmt);
1437 mbus_to_pix(vpfe, &mbus_fmt, &format->fmt.pix, bpp);
1438 }
1439
1440 format->type = vpfe->fmt.type;
1441
1442 vpfe_dbg(1, vpfe,
1443 "%s size %dx%d (%s) bytesperline = %d, size = %d, bpp = %d\n",
1444 __func__, format->fmt.pix.width, format->fmt.pix.height,
1445 print_fourcc(format->fmt.pix.pixelformat),
1446 format->fmt.pix.bytesperline, format->fmt.pix.sizeimage, *bpp);
1447
1448 return 0;
1449 }
1450
1451 /* set the format at output pad of the adjacent subdev */
__vpfe_set_format(struct vpfe_device * vpfe,struct v4l2_format * format,unsigned int * bpp)1452 static int __vpfe_set_format(struct vpfe_device *vpfe,
1453 struct v4l2_format *format, unsigned int *bpp)
1454 {
1455 struct vpfe_subdev_info *sdinfo;
1456 struct v4l2_subdev_format fmt;
1457 int ret;
1458
1459 vpfe_dbg(2, vpfe, "__vpfe_set_format\n");
1460
1461 sdinfo = vpfe->current_subdev;
1462 if (!sdinfo->sd)
1463 return -EINVAL;
1464
1465 fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1466 fmt.pad = 0;
1467
1468 pix_to_mbus(vpfe, &format->fmt.pix, &fmt.format);
1469
1470 ret = v4l2_subdev_call(sdinfo->sd, pad, set_fmt, NULL, &fmt);
1471 if (ret)
1472 return ret;
1473
1474 v4l2_fill_pix_format(&format->fmt.pix, &fmt.format);
1475 mbus_to_pix(vpfe, &fmt.format, &format->fmt.pix, bpp);
1476
1477 format->type = vpfe->fmt.type;
1478
1479 vpfe_dbg(1, vpfe,
1480 "%s size %dx%d (%s) bytesperline = %d, size = %d, bpp = %d\n",
1481 __func__, format->fmt.pix.width, format->fmt.pix.height,
1482 print_fourcc(format->fmt.pix.pixelformat),
1483 format->fmt.pix.bytesperline, format->fmt.pix.sizeimage, *bpp);
1484
1485 return 0;
1486 }
1487
vpfe_g_fmt(struct file * file,void * priv,struct v4l2_format * fmt)1488 static int vpfe_g_fmt(struct file *file, void *priv,
1489 struct v4l2_format *fmt)
1490 {
1491 struct vpfe_device *vpfe = video_drvdata(file);
1492
1493 vpfe_dbg(2, vpfe, "vpfe_g_fmt\n");
1494
1495 *fmt = vpfe->fmt;
1496
1497 return 0;
1498 }
1499
vpfe_enum_fmt(struct file * file,void * priv,struct v4l2_fmtdesc * f)1500 static int vpfe_enum_fmt(struct file *file, void *priv,
1501 struct v4l2_fmtdesc *f)
1502 {
1503 struct vpfe_device *vpfe = video_drvdata(file);
1504 struct vpfe_subdev_info *sdinfo;
1505 struct vpfe_fmt *fmt = NULL;
1506 unsigned int k;
1507
1508 vpfe_dbg(2, vpfe, "vpfe_enum_format index:%d\n",
1509 f->index);
1510
1511 sdinfo = vpfe->current_subdev;
1512 if (!sdinfo->sd)
1513 return -EINVAL;
1514
1515 if (f->index > ARRAY_SIZE(formats))
1516 return -EINVAL;
1517
1518 for (k = 0; k < ARRAY_SIZE(formats); k++) {
1519 if (formats[k].index == f->index) {
1520 fmt = &formats[k];
1521 break;
1522 }
1523 }
1524 if (!fmt)
1525 return -EINVAL;
1526
1527 f->pixelformat = fmt->fourcc;
1528
1529 vpfe_dbg(1, vpfe, "vpfe_enum_format: mbus index: %d code: %x pixelformat: %s\n",
1530 f->index, fmt->code, print_fourcc(fmt->fourcc));
1531
1532 return 0;
1533 }
1534
vpfe_try_fmt(struct file * file,void * priv,struct v4l2_format * fmt)1535 static int vpfe_try_fmt(struct file *file, void *priv,
1536 struct v4l2_format *fmt)
1537 {
1538 struct vpfe_device *vpfe = video_drvdata(file);
1539 unsigned int bpp;
1540
1541 vpfe_dbg(2, vpfe, "vpfe_try_fmt\n");
1542
1543 return __vpfe_get_format(vpfe, fmt, &bpp);
1544 }
1545
vpfe_s_fmt(struct file * file,void * priv,struct v4l2_format * fmt)1546 static int vpfe_s_fmt(struct file *file, void *priv,
1547 struct v4l2_format *fmt)
1548 {
1549 struct vpfe_device *vpfe = video_drvdata(file);
1550 struct v4l2_format format;
1551 unsigned int bpp;
1552 int ret;
1553
1554 vpfe_dbg(2, vpfe, "vpfe_s_fmt\n");
1555
1556 /* If streaming is started, return error */
1557 if (vb2_is_busy(&vpfe->buffer_queue)) {
1558 vpfe_err(vpfe, "%s device busy\n", __func__);
1559 return -EBUSY;
1560 }
1561
1562 ret = __vpfe_get_format(vpfe, &format, &bpp);
1563 if (ret)
1564 return ret;
1565
1566
1567 if (!cmp_v4l2_format(fmt, &format)) {
1568 /* Sensor format is different from the requested format
1569 * so we need to change it
1570 */
1571 ret = __vpfe_set_format(vpfe, fmt, &bpp);
1572 if (ret)
1573 return ret;
1574 } else /* Just make sure all of the fields are consistent */
1575 *fmt = format;
1576
1577 /* First detach any IRQ if currently attached */
1578 vpfe_detach_irq(vpfe);
1579 vpfe->fmt = *fmt;
1580 vpfe->bpp = bpp;
1581
1582 /* Update the crop window based on found values */
1583 vpfe->crop.width = fmt->fmt.pix.width;
1584 vpfe->crop.height = fmt->fmt.pix.height;
1585
1586 /* set image capture parameters in the ccdc */
1587 return vpfe_config_ccdc_image_format(vpfe);
1588 }
1589
vpfe_enum_size(struct file * file,void * priv,struct v4l2_frmsizeenum * fsize)1590 static int vpfe_enum_size(struct file *file, void *priv,
1591 struct v4l2_frmsizeenum *fsize)
1592 {
1593 struct vpfe_device *vpfe = video_drvdata(file);
1594 struct v4l2_subdev_frame_size_enum fse;
1595 struct vpfe_subdev_info *sdinfo;
1596 struct v4l2_mbus_framefmt mbus;
1597 struct v4l2_pix_format pix;
1598 struct vpfe_fmt *fmt;
1599 int ret;
1600
1601 vpfe_dbg(2, vpfe, "vpfe_enum_size\n");
1602
1603 /* check for valid format */
1604 fmt = find_format_by_pix(fsize->pixel_format);
1605 if (!fmt) {
1606 vpfe_dbg(3, vpfe, "Invalid pixel code: %x, default used instead\n",
1607 fsize->pixel_format);
1608 return -EINVAL;
1609 }
1610
1611 memset(fsize->reserved, 0x0, sizeof(fsize->reserved));
1612
1613 sdinfo = vpfe->current_subdev;
1614 if (!sdinfo->sd)
1615 return -EINVAL;
1616
1617 memset(&pix, 0x0, sizeof(pix));
1618 /* Construct pix from parameter and use default for the rest */
1619 pix.pixelformat = fsize->pixel_format;
1620 pix.width = 640;
1621 pix.height = 480;
1622 pix.colorspace = V4L2_COLORSPACE_SRGB;
1623 pix.field = V4L2_FIELD_NONE;
1624 pix_to_mbus(vpfe, &pix, &mbus);
1625
1626 memset(&fse, 0x0, sizeof(fse));
1627 fse.index = fsize->index;
1628 fse.pad = 0;
1629 fse.code = mbus.code;
1630 fse.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1631 ret = v4l2_subdev_call(sdinfo->sd, pad, enum_frame_size, NULL, &fse);
1632 if (ret)
1633 return -EINVAL;
1634
1635 vpfe_dbg(1, vpfe, "vpfe_enum_size: index: %d code: %x W:[%d,%d] H:[%d,%d]\n",
1636 fse.index, fse.code, fse.min_width, fse.max_width,
1637 fse.min_height, fse.max_height);
1638
1639 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1640 fsize->discrete.width = fse.max_width;
1641 fsize->discrete.height = fse.max_height;
1642
1643 vpfe_dbg(1, vpfe, "vpfe_enum_size: index: %d pixformat: %s size: %dx%d\n",
1644 fsize->index, print_fourcc(fsize->pixel_format),
1645 fsize->discrete.width, fsize->discrete.height);
1646
1647 return 0;
1648 }
1649
1650 /*
1651 * vpfe_get_subdev_input_index - Get subdev index and subdev input index for a
1652 * given app input index
1653 */
1654 static int
vpfe_get_subdev_input_index(struct vpfe_device * vpfe,int * subdev_index,int * subdev_input_index,int app_input_index)1655 vpfe_get_subdev_input_index(struct vpfe_device *vpfe,
1656 int *subdev_index,
1657 int *subdev_input_index,
1658 int app_input_index)
1659 {
1660 int i, j = 0;
1661
1662 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
1663 if (app_input_index < (j + 1)) {
1664 *subdev_index = i;
1665 *subdev_input_index = app_input_index - j;
1666 return 0;
1667 }
1668 j++;
1669 }
1670 return -EINVAL;
1671 }
1672
1673 /*
1674 * vpfe_get_app_input - Get app input index for a given subdev input index
1675 * driver stores the input index of the current sub device and translate it
1676 * when application request the current input
1677 */
vpfe_get_app_input_index(struct vpfe_device * vpfe,int * app_input_index)1678 static int vpfe_get_app_input_index(struct vpfe_device *vpfe,
1679 int *app_input_index)
1680 {
1681 struct vpfe_config *cfg = vpfe->cfg;
1682 struct vpfe_subdev_info *sdinfo;
1683 struct i2c_client *client;
1684 struct i2c_client *curr_client;
1685 int i, j = 0;
1686
1687 curr_client = v4l2_get_subdevdata(vpfe->current_subdev->sd);
1688 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
1689 sdinfo = &cfg->sub_devs[i];
1690 client = v4l2_get_subdevdata(sdinfo->sd);
1691 if (client->addr == curr_client->addr &&
1692 client->adapter->nr == curr_client->adapter->nr) {
1693 if (vpfe->current_input >= 1)
1694 return -1;
1695 *app_input_index = j + vpfe->current_input;
1696 return 0;
1697 }
1698 j++;
1699 }
1700 return -EINVAL;
1701 }
1702
vpfe_enum_input(struct file * file,void * priv,struct v4l2_input * inp)1703 static int vpfe_enum_input(struct file *file, void *priv,
1704 struct v4l2_input *inp)
1705 {
1706 struct vpfe_device *vpfe = video_drvdata(file);
1707 struct vpfe_subdev_info *sdinfo;
1708 int subdev, index;
1709
1710 vpfe_dbg(2, vpfe, "vpfe_enum_input\n");
1711
1712 if (vpfe_get_subdev_input_index(vpfe, &subdev, &index,
1713 inp->index) < 0) {
1714 vpfe_dbg(1, vpfe,
1715 "input information not found for the subdev\n");
1716 return -EINVAL;
1717 }
1718 sdinfo = &vpfe->cfg->sub_devs[subdev];
1719 *inp = sdinfo->inputs[index];
1720
1721 return 0;
1722 }
1723
vpfe_g_input(struct file * file,void * priv,unsigned int * index)1724 static int vpfe_g_input(struct file *file, void *priv, unsigned int *index)
1725 {
1726 struct vpfe_device *vpfe = video_drvdata(file);
1727
1728 vpfe_dbg(2, vpfe, "vpfe_g_input\n");
1729
1730 return vpfe_get_app_input_index(vpfe, index);
1731 }
1732
1733 /* Assumes caller is holding vpfe_dev->lock */
vpfe_set_input(struct vpfe_device * vpfe,unsigned int index)1734 static int vpfe_set_input(struct vpfe_device *vpfe, unsigned int index)
1735 {
1736 int subdev_index = 0, inp_index = 0;
1737 struct vpfe_subdev_info *sdinfo;
1738 struct vpfe_route *route;
1739 u32 input, output;
1740 int ret;
1741
1742 vpfe_dbg(2, vpfe, "vpfe_set_input: index: %d\n", index);
1743
1744 /* If streaming is started, return error */
1745 if (vb2_is_busy(&vpfe->buffer_queue)) {
1746 vpfe_err(vpfe, "%s device busy\n", __func__);
1747 return -EBUSY;
1748 }
1749 ret = vpfe_get_subdev_input_index(vpfe,
1750 &subdev_index,
1751 &inp_index,
1752 index);
1753 if (ret < 0) {
1754 vpfe_err(vpfe, "invalid input index: %d\n", index);
1755 goto get_out;
1756 }
1757
1758 sdinfo = &vpfe->cfg->sub_devs[subdev_index];
1759 sdinfo->sd = vpfe->sd[subdev_index];
1760 route = &sdinfo->routes[inp_index];
1761 if (route && sdinfo->can_route) {
1762 input = route->input;
1763 output = route->output;
1764 if (sdinfo->sd) {
1765 ret = v4l2_subdev_call(sdinfo->sd, video,
1766 s_routing, input, output, 0);
1767 if (ret) {
1768 vpfe_err(vpfe, "s_routing failed\n");
1769 ret = -EINVAL;
1770 goto get_out;
1771 }
1772 }
1773
1774 }
1775
1776 vpfe->current_subdev = sdinfo;
1777 if (sdinfo->sd)
1778 vpfe->v4l2_dev.ctrl_handler = sdinfo->sd->ctrl_handler;
1779 vpfe->current_input = index;
1780 vpfe->std_index = 0;
1781
1782 /* set the bus/interface parameter for the sub device in ccdc */
1783 ret = vpfe_ccdc_set_hw_if_params(&vpfe->ccdc, &sdinfo->vpfe_param);
1784 if (ret)
1785 return ret;
1786
1787 /* set the default image parameters in the device */
1788 return vpfe_config_image_format(vpfe,
1789 vpfe_standards[vpfe->std_index].std_id);
1790
1791 get_out:
1792 return ret;
1793 }
1794
vpfe_s_input(struct file * file,void * priv,unsigned int index)1795 static int vpfe_s_input(struct file *file, void *priv, unsigned int index)
1796 {
1797 struct vpfe_device *vpfe = video_drvdata(file);
1798
1799 vpfe_dbg(2, vpfe,
1800 "vpfe_s_input: index: %d\n", index);
1801
1802 return vpfe_set_input(vpfe, index);
1803 }
1804
vpfe_querystd(struct file * file,void * priv,v4l2_std_id * std_id)1805 static int vpfe_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
1806 {
1807 struct vpfe_device *vpfe = video_drvdata(file);
1808 struct vpfe_subdev_info *sdinfo;
1809
1810 vpfe_dbg(2, vpfe, "vpfe_querystd\n");
1811
1812 sdinfo = vpfe->current_subdev;
1813 if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD))
1814 return -ENODATA;
1815
1816 /* Call querystd function of decoder device */
1817 return v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id,
1818 video, querystd, std_id);
1819 }
1820
vpfe_s_std(struct file * file,void * priv,v4l2_std_id std_id)1821 static int vpfe_s_std(struct file *file, void *priv, v4l2_std_id std_id)
1822 {
1823 struct vpfe_device *vpfe = video_drvdata(file);
1824 struct vpfe_subdev_info *sdinfo;
1825 int ret;
1826
1827 vpfe_dbg(2, vpfe, "vpfe_s_std\n");
1828
1829 sdinfo = vpfe->current_subdev;
1830 if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD))
1831 return -ENODATA;
1832
1833 /* If streaming is started, return error */
1834 if (vb2_is_busy(&vpfe->buffer_queue)) {
1835 vpfe_err(vpfe, "%s device busy\n", __func__);
1836 ret = -EBUSY;
1837 return ret;
1838 }
1839
1840 ret = v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id,
1841 video, s_std, std_id);
1842 if (ret < 0) {
1843 vpfe_err(vpfe, "Failed to set standard\n");
1844 return ret;
1845 }
1846 ret = vpfe_config_image_format(vpfe, std_id);
1847
1848 return ret;
1849 }
1850
vpfe_g_std(struct file * file,void * priv,v4l2_std_id * std_id)1851 static int vpfe_g_std(struct file *file, void *priv, v4l2_std_id *std_id)
1852 {
1853 struct vpfe_device *vpfe = video_drvdata(file);
1854 struct vpfe_subdev_info *sdinfo;
1855
1856 vpfe_dbg(2, vpfe, "vpfe_g_std\n");
1857
1858 sdinfo = vpfe->current_subdev;
1859 if (sdinfo->inputs[0].capabilities != V4L2_IN_CAP_STD)
1860 return -ENODATA;
1861
1862 *std_id = vpfe_standards[vpfe->std_index].std_id;
1863
1864 return 0;
1865 }
1866
1867 /*
1868 * vpfe_calculate_offsets : This function calculates buffers offset
1869 * for top and bottom field
1870 */
vpfe_calculate_offsets(struct vpfe_device * vpfe)1871 static void vpfe_calculate_offsets(struct vpfe_device *vpfe)
1872 {
1873 struct v4l2_rect image_win;
1874
1875 vpfe_dbg(2, vpfe, "vpfe_calculate_offsets\n");
1876
1877 vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win);
1878 vpfe->field_off = image_win.height * image_win.width;
1879 }
1880
1881 /*
1882 * vpfe_queue_setup - Callback function for buffer setup.
1883 * @vq: vb2_queue ptr
1884 * @nbuffers: ptr to number of buffers requested by application
1885 * @nplanes:: contains number of distinct video planes needed to hold a frame
1886 * @sizes[]: contains the size (in bytes) of each plane.
1887 * @alloc_devs: ptr to allocation context
1888 *
1889 * This callback function is called when reqbuf() is called to adjust
1890 * the buffer count and buffer size
1891 */
vpfe_queue_setup(struct vb2_queue * vq,unsigned int * nbuffers,unsigned int * nplanes,unsigned int sizes[],struct device * alloc_devs[])1892 static int vpfe_queue_setup(struct vb2_queue *vq,
1893 unsigned int *nbuffers, unsigned int *nplanes,
1894 unsigned int sizes[], struct device *alloc_devs[])
1895 {
1896 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
1897 unsigned size = vpfe->fmt.fmt.pix.sizeimage;
1898
1899 if (vq->num_buffers + *nbuffers < 3)
1900 *nbuffers = 3 - vq->num_buffers;
1901
1902 if (*nplanes) {
1903 if (sizes[0] < size)
1904 return -EINVAL;
1905 size = sizes[0];
1906 }
1907
1908 *nplanes = 1;
1909 sizes[0] = size;
1910
1911 vpfe_dbg(1, vpfe,
1912 "nbuffers=%d, size=%u\n", *nbuffers, sizes[0]);
1913
1914 /* Calculate field offset */
1915 vpfe_calculate_offsets(vpfe);
1916
1917 return 0;
1918 }
1919
1920 /*
1921 * vpfe_buffer_prepare : callback function for buffer prepare
1922 * @vb: ptr to vb2_buffer
1923 *
1924 * This is the callback function for buffer prepare when vb2_qbuf()
1925 * function is called. The buffer is prepared and user space virtual address
1926 * or user address is converted into physical address
1927 */
vpfe_buffer_prepare(struct vb2_buffer * vb)1928 static int vpfe_buffer_prepare(struct vb2_buffer *vb)
1929 {
1930 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
1931 struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue);
1932
1933 vb2_set_plane_payload(vb, 0, vpfe->fmt.fmt.pix.sizeimage);
1934
1935 if (vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0))
1936 return -EINVAL;
1937
1938 vbuf->field = vpfe->fmt.fmt.pix.field;
1939
1940 return 0;
1941 }
1942
1943 /*
1944 * vpfe_buffer_queue : Callback function to add buffer to DMA queue
1945 * @vb: ptr to vb2_buffer
1946 */
vpfe_buffer_queue(struct vb2_buffer * vb)1947 static void vpfe_buffer_queue(struct vb2_buffer *vb)
1948 {
1949 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
1950 struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue);
1951 struct vpfe_cap_buffer *buf = to_vpfe_buffer(vbuf);
1952 unsigned long flags = 0;
1953
1954 /* add the buffer to the DMA queue */
1955 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1956 list_add_tail(&buf->list, &vpfe->dma_queue);
1957 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1958 }
1959
1960 /*
1961 * vpfe_start_streaming : Starts the DMA engine for streaming
1962 * @vb: ptr to vb2_buffer
1963 * @count: number of buffers
1964 */
vpfe_start_streaming(struct vb2_queue * vq,unsigned int count)1965 static int vpfe_start_streaming(struct vb2_queue *vq, unsigned int count)
1966 {
1967 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
1968 struct vpfe_cap_buffer *buf, *tmp;
1969 struct vpfe_subdev_info *sdinfo;
1970 unsigned long flags;
1971 unsigned long addr;
1972 int ret;
1973
1974 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1975
1976 vpfe->field = 0;
1977 vpfe->sequence = 0;
1978
1979 sdinfo = vpfe->current_subdev;
1980
1981 vpfe_attach_irq(vpfe);
1982
1983 if (vpfe->ccdc.ccdc_cfg.if_type == VPFE_RAW_BAYER)
1984 vpfe_ccdc_config_raw(&vpfe->ccdc);
1985 else
1986 vpfe_ccdc_config_ycbcr(&vpfe->ccdc);
1987
1988 /* Get the next frame from the buffer queue */
1989 vpfe->next_frm = list_entry(vpfe->dma_queue.next,
1990 struct vpfe_cap_buffer, list);
1991 vpfe->cur_frm = vpfe->next_frm;
1992 /* Remove buffer from the buffer queue */
1993 list_del(&vpfe->cur_frm->list);
1994 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1995
1996 addr = vb2_dma_contig_plane_dma_addr(&vpfe->cur_frm->vb.vb2_buf, 0);
1997
1998 vpfe_set_sdr_addr(&vpfe->ccdc, (unsigned long)(addr));
1999
2000 vpfe_pcr_enable(&vpfe->ccdc, 1);
2001
2002 ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 1);
2003 if (ret < 0) {
2004 vpfe_err(vpfe, "Error in attaching interrupt handle\n");
2005 goto err;
2006 }
2007
2008 return 0;
2009
2010 err:
2011 list_for_each_entry_safe(buf, tmp, &vpfe->dma_queue, list) {
2012 list_del(&buf->list);
2013 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
2014 }
2015
2016 return ret;
2017 }
2018
2019 /*
2020 * vpfe_stop_streaming : Stop the DMA engine
2021 * @vq: ptr to vb2_queue
2022 *
2023 * This callback stops the DMA engine and any remaining buffers
2024 * in the DMA queue are released.
2025 */
vpfe_stop_streaming(struct vb2_queue * vq)2026 static void vpfe_stop_streaming(struct vb2_queue *vq)
2027 {
2028 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
2029 struct vpfe_subdev_info *sdinfo;
2030 unsigned long flags;
2031 int ret;
2032
2033 vpfe_pcr_enable(&vpfe->ccdc, 0);
2034
2035 vpfe_detach_irq(vpfe);
2036
2037 sdinfo = vpfe->current_subdev;
2038 ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 0);
2039 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
2040 vpfe_dbg(1, vpfe, "stream off failed in subdev\n");
2041
2042 /* release all active buffers */
2043 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
2044 if (vpfe->cur_frm == vpfe->next_frm) {
2045 vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf,
2046 VB2_BUF_STATE_ERROR);
2047 } else {
2048 if (vpfe->cur_frm != NULL)
2049 vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf,
2050 VB2_BUF_STATE_ERROR);
2051 if (vpfe->next_frm != NULL)
2052 vb2_buffer_done(&vpfe->next_frm->vb.vb2_buf,
2053 VB2_BUF_STATE_ERROR);
2054 }
2055
2056 while (!list_empty(&vpfe->dma_queue)) {
2057 vpfe->next_frm = list_entry(vpfe->dma_queue.next,
2058 struct vpfe_cap_buffer, list);
2059 list_del(&vpfe->next_frm->list);
2060 vb2_buffer_done(&vpfe->next_frm->vb.vb2_buf,
2061 VB2_BUF_STATE_ERROR);
2062 }
2063 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
2064 }
2065
vpfe_g_pixelaspect(struct file * file,void * priv,int type,struct v4l2_fract * f)2066 static int vpfe_g_pixelaspect(struct file *file, void *priv,
2067 int type, struct v4l2_fract *f)
2068 {
2069 struct vpfe_device *vpfe = video_drvdata(file);
2070
2071 vpfe_dbg(2, vpfe, "vpfe_g_pixelaspect\n");
2072
2073 if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
2074 vpfe->std_index >= ARRAY_SIZE(vpfe_standards))
2075 return -EINVAL;
2076
2077 *f = vpfe_standards[vpfe->std_index].pixelaspect;
2078
2079 return 0;
2080 }
2081
2082 static int
vpfe_g_selection(struct file * file,void * fh,struct v4l2_selection * s)2083 vpfe_g_selection(struct file *file, void *fh, struct v4l2_selection *s)
2084 {
2085 struct vpfe_device *vpfe = video_drvdata(file);
2086
2087 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
2088 vpfe->std_index >= ARRAY_SIZE(vpfe_standards))
2089 return -EINVAL;
2090
2091 switch (s->target) {
2092 case V4L2_SEL_TGT_CROP_BOUNDS:
2093 case V4L2_SEL_TGT_CROP_DEFAULT:
2094 s->r.left = 0;
2095 s->r.top = 0;
2096 s->r.width = vpfe_standards[vpfe->std_index].width;
2097 s->r.height = vpfe_standards[vpfe->std_index].height;
2098 break;
2099
2100 case V4L2_SEL_TGT_CROP:
2101 s->r = vpfe->crop;
2102 break;
2103
2104 default:
2105 return -EINVAL;
2106 }
2107
2108 return 0;
2109 }
2110
enclosed_rectangle(struct v4l2_rect * a,struct v4l2_rect * b)2111 static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
2112 {
2113 if (a->left < b->left || a->top < b->top)
2114 return 0;
2115
2116 if (a->left + a->width > b->left + b->width)
2117 return 0;
2118
2119 if (a->top + a->height > b->top + b->height)
2120 return 0;
2121
2122 return 1;
2123 }
2124
2125 static int
vpfe_s_selection(struct file * file,void * fh,struct v4l2_selection * s)2126 vpfe_s_selection(struct file *file, void *fh, struct v4l2_selection *s)
2127 {
2128 struct vpfe_device *vpfe = video_drvdata(file);
2129 struct v4l2_rect cr = vpfe->crop;
2130 struct v4l2_rect r = s->r;
2131
2132 /* If streaming is started, return error */
2133 if (vb2_is_busy(&vpfe->buffer_queue)) {
2134 vpfe_err(vpfe, "%s device busy\n", __func__);
2135 return -EBUSY;
2136 }
2137
2138 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
2139 s->target != V4L2_SEL_TGT_CROP)
2140 return -EINVAL;
2141
2142 v4l_bound_align_image(&r.width, 0, cr.width, 0,
2143 &r.height, 0, cr.height, 0, 0);
2144
2145 r.left = clamp_t(unsigned int, r.left, 0, cr.width - r.width);
2146 r.top = clamp_t(unsigned int, r.top, 0, cr.height - r.height);
2147
2148 if (s->flags & V4L2_SEL_FLAG_LE && !enclosed_rectangle(&r, &s->r))
2149 return -ERANGE;
2150
2151 if (s->flags & V4L2_SEL_FLAG_GE && !enclosed_rectangle(&s->r, &r))
2152 return -ERANGE;
2153
2154 s->r = vpfe->crop = r;
2155
2156 vpfe_ccdc_set_image_window(&vpfe->ccdc, &r, vpfe->bpp);
2157 vpfe->fmt.fmt.pix.width = r.width;
2158 vpfe->fmt.fmt.pix.height = r.height;
2159 vpfe->fmt.fmt.pix.bytesperline = vpfe_ccdc_get_line_length(&vpfe->ccdc);
2160 vpfe->fmt.fmt.pix.sizeimage = vpfe->fmt.fmt.pix.bytesperline *
2161 vpfe->fmt.fmt.pix.height;
2162
2163 vpfe_dbg(1, vpfe, "cropped (%d,%d)/%dx%d of %dx%d\n",
2164 r.left, r.top, r.width, r.height, cr.width, cr.height);
2165
2166 return 0;
2167 }
2168
vpfe_ioctl_default(struct file * file,void * priv,bool valid_prio,unsigned int cmd,void * param)2169 static long vpfe_ioctl_default(struct file *file, void *priv,
2170 bool valid_prio, unsigned int cmd, void *param)
2171 {
2172 struct vpfe_device *vpfe = video_drvdata(file);
2173 int ret;
2174
2175 vpfe_dbg(2, vpfe, "vpfe_ioctl_default\n");
2176
2177 if (!valid_prio) {
2178 vpfe_err(vpfe, "%s device busy\n", __func__);
2179 return -EBUSY;
2180 }
2181
2182 /* If streaming is started, return error */
2183 if (vb2_is_busy(&vpfe->buffer_queue)) {
2184 vpfe_err(vpfe, "%s device busy\n", __func__);
2185 return -EBUSY;
2186 }
2187
2188 switch (cmd) {
2189 case VIDIOC_AM437X_CCDC_CFG:
2190 ret = vpfe_ccdc_set_params(&vpfe->ccdc, (void __user *)param);
2191 if (ret) {
2192 vpfe_dbg(2, vpfe,
2193 "Error setting parameters in CCDC\n");
2194 return ret;
2195 }
2196 ret = vpfe_get_ccdc_image_format(vpfe,
2197 &vpfe->fmt);
2198 if (ret < 0) {
2199 vpfe_dbg(2, vpfe,
2200 "Invalid image format at CCDC\n");
2201 return ret;
2202 }
2203 break;
2204
2205 default:
2206 ret = -ENOTTY;
2207 break;
2208 }
2209
2210 return ret;
2211 }
2212
2213 static const struct vb2_ops vpfe_video_qops = {
2214 .wait_prepare = vb2_ops_wait_prepare,
2215 .wait_finish = vb2_ops_wait_finish,
2216 .queue_setup = vpfe_queue_setup,
2217 .buf_prepare = vpfe_buffer_prepare,
2218 .buf_queue = vpfe_buffer_queue,
2219 .start_streaming = vpfe_start_streaming,
2220 .stop_streaming = vpfe_stop_streaming,
2221 };
2222
2223 /* vpfe capture driver file operations */
2224 static const struct v4l2_file_operations vpfe_fops = {
2225 .owner = THIS_MODULE,
2226 .open = vpfe_open,
2227 .release = vpfe_release,
2228 .read = vb2_fop_read,
2229 .poll = vb2_fop_poll,
2230 .unlocked_ioctl = video_ioctl2,
2231 .mmap = vb2_fop_mmap,
2232 };
2233
2234 /* vpfe capture ioctl operations */
2235 static const struct v4l2_ioctl_ops vpfe_ioctl_ops = {
2236 .vidioc_querycap = vpfe_querycap,
2237 .vidioc_enum_fmt_vid_cap = vpfe_enum_fmt,
2238 .vidioc_g_fmt_vid_cap = vpfe_g_fmt,
2239 .vidioc_s_fmt_vid_cap = vpfe_s_fmt,
2240 .vidioc_try_fmt_vid_cap = vpfe_try_fmt,
2241
2242 .vidioc_enum_framesizes = vpfe_enum_size,
2243
2244 .vidioc_enum_input = vpfe_enum_input,
2245 .vidioc_g_input = vpfe_g_input,
2246 .vidioc_s_input = vpfe_s_input,
2247
2248 .vidioc_querystd = vpfe_querystd,
2249 .vidioc_s_std = vpfe_s_std,
2250 .vidioc_g_std = vpfe_g_std,
2251
2252 .vidioc_reqbufs = vb2_ioctl_reqbufs,
2253 .vidioc_create_bufs = vb2_ioctl_create_bufs,
2254 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
2255 .vidioc_querybuf = vb2_ioctl_querybuf,
2256 .vidioc_qbuf = vb2_ioctl_qbuf,
2257 .vidioc_dqbuf = vb2_ioctl_dqbuf,
2258 .vidioc_expbuf = vb2_ioctl_expbuf,
2259 .vidioc_streamon = vb2_ioctl_streamon,
2260 .vidioc_streamoff = vb2_ioctl_streamoff,
2261
2262 .vidioc_log_status = v4l2_ctrl_log_status,
2263 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
2264 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
2265
2266 .vidioc_g_pixelaspect = vpfe_g_pixelaspect,
2267 .vidioc_g_selection = vpfe_g_selection,
2268 .vidioc_s_selection = vpfe_s_selection,
2269
2270 .vidioc_default = vpfe_ioctl_default,
2271 };
2272
2273 static int
vpfe_async_bound(struct v4l2_async_notifier * notifier,struct v4l2_subdev * subdev,struct v4l2_async_subdev * asd)2274 vpfe_async_bound(struct v4l2_async_notifier *notifier,
2275 struct v4l2_subdev *subdev,
2276 struct v4l2_async_subdev *asd)
2277 {
2278 struct vpfe_device *vpfe = container_of(notifier->v4l2_dev,
2279 struct vpfe_device, v4l2_dev);
2280 struct v4l2_subdev_mbus_code_enum mbus_code;
2281 struct vpfe_subdev_info *sdinfo;
2282 bool found = false;
2283 int i, j;
2284
2285 vpfe_dbg(1, vpfe, "vpfe_async_bound\n");
2286
2287 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
2288 if (vpfe->cfg->asd[i]->match.fwnode ==
2289 asd[i].match.fwnode) {
2290 sdinfo = &vpfe->cfg->sub_devs[i];
2291 vpfe->sd[i] = subdev;
2292 vpfe->sd[i]->grp_id = sdinfo->grp_id;
2293 found = true;
2294 break;
2295 }
2296 }
2297
2298 if (!found) {
2299 vpfe_info(vpfe, "sub device (%s) not matched\n", subdev->name);
2300 return -EINVAL;
2301 }
2302
2303 vpfe->video_dev.tvnorms |= sdinfo->inputs[0].std;
2304
2305 /* setup the supported formats & indexes */
2306 for (j = 0, i = 0; ; ++j) {
2307 struct vpfe_fmt *fmt;
2308 int ret;
2309
2310 memset(&mbus_code, 0, sizeof(mbus_code));
2311 mbus_code.index = j;
2312 mbus_code.which = V4L2_SUBDEV_FORMAT_ACTIVE;
2313 ret = v4l2_subdev_call(subdev, pad, enum_mbus_code,
2314 NULL, &mbus_code);
2315 if (ret)
2316 break;
2317
2318 fmt = find_format_by_code(mbus_code.code);
2319 if (!fmt)
2320 continue;
2321
2322 fmt->supported = true;
2323 fmt->index = i++;
2324 }
2325
2326 return 0;
2327 }
2328
vpfe_probe_complete(struct vpfe_device * vpfe)2329 static int vpfe_probe_complete(struct vpfe_device *vpfe)
2330 {
2331 struct video_device *vdev;
2332 struct vb2_queue *q;
2333 int err;
2334
2335 spin_lock_init(&vpfe->dma_queue_lock);
2336 mutex_init(&vpfe->lock);
2337
2338 vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2339
2340 /* set first sub device as current one */
2341 vpfe->current_subdev = &vpfe->cfg->sub_devs[0];
2342 vpfe->v4l2_dev.ctrl_handler = vpfe->sd[0]->ctrl_handler;
2343
2344 err = vpfe_set_input(vpfe, 0);
2345 if (err)
2346 goto probe_out;
2347
2348 /* Initialize videobuf2 queue as per the buffer type */
2349 q = &vpfe->buffer_queue;
2350 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2351 q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ;
2352 q->drv_priv = vpfe;
2353 q->ops = &vpfe_video_qops;
2354 q->mem_ops = &vb2_dma_contig_memops;
2355 q->buf_struct_size = sizeof(struct vpfe_cap_buffer);
2356 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2357 q->lock = &vpfe->lock;
2358 q->min_buffers_needed = 1;
2359 q->dev = vpfe->pdev;
2360
2361 err = vb2_queue_init(q);
2362 if (err) {
2363 vpfe_err(vpfe, "vb2_queue_init() failed\n");
2364 goto probe_out;
2365 }
2366
2367 INIT_LIST_HEAD(&vpfe->dma_queue);
2368
2369 vdev = &vpfe->video_dev;
2370 strscpy(vdev->name, VPFE_MODULE_NAME, sizeof(vdev->name));
2371 vdev->release = video_device_release_empty;
2372 vdev->fops = &vpfe_fops;
2373 vdev->ioctl_ops = &vpfe_ioctl_ops;
2374 vdev->v4l2_dev = &vpfe->v4l2_dev;
2375 vdev->vfl_dir = VFL_DIR_RX;
2376 vdev->queue = q;
2377 vdev->lock = &vpfe->lock;
2378 vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
2379 V4L2_CAP_READWRITE;
2380 video_set_drvdata(vdev, vpfe);
2381 err = video_register_device(&vpfe->video_dev, VFL_TYPE_GRABBER, -1);
2382 if (err) {
2383 vpfe_err(vpfe,
2384 "Unable to register video device.\n");
2385 goto probe_out;
2386 }
2387
2388 return 0;
2389
2390 probe_out:
2391 v4l2_device_unregister(&vpfe->v4l2_dev);
2392 return err;
2393 }
2394
vpfe_async_complete(struct v4l2_async_notifier * notifier)2395 static int vpfe_async_complete(struct v4l2_async_notifier *notifier)
2396 {
2397 struct vpfe_device *vpfe = container_of(notifier->v4l2_dev,
2398 struct vpfe_device, v4l2_dev);
2399
2400 return vpfe_probe_complete(vpfe);
2401 }
2402
2403 static const struct v4l2_async_notifier_operations vpfe_async_ops = {
2404 .bound = vpfe_async_bound,
2405 .complete = vpfe_async_complete,
2406 };
2407
2408 static struct vpfe_config *
vpfe_get_pdata(struct vpfe_device * vpfe)2409 vpfe_get_pdata(struct vpfe_device *vpfe)
2410 {
2411 struct device_node *endpoint = NULL;
2412 struct device *dev = vpfe->pdev;
2413 struct vpfe_subdev_info *sdinfo;
2414 struct vpfe_config *pdata;
2415 unsigned int flags;
2416 unsigned int i;
2417 int err;
2418
2419 dev_dbg(dev, "vpfe_get_pdata\n");
2420
2421 v4l2_async_notifier_init(&vpfe->notifier);
2422
2423 if (!IS_ENABLED(CONFIG_OF) || !dev->of_node)
2424 return dev->platform_data;
2425
2426 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
2427 if (!pdata)
2428 return NULL;
2429
2430 for (i = 0; ; i++) {
2431 struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
2432 struct device_node *rem;
2433
2434 endpoint = of_graph_get_next_endpoint(dev->of_node, endpoint);
2435 if (!endpoint)
2436 break;
2437
2438 sdinfo = &pdata->sub_devs[i];
2439 sdinfo->grp_id = 0;
2440
2441 /* we only support camera */
2442 sdinfo->inputs[0].index = i;
2443 strscpy(sdinfo->inputs[0].name, "Camera",
2444 sizeof(sdinfo->inputs[0].name));
2445 sdinfo->inputs[0].type = V4L2_INPUT_TYPE_CAMERA;
2446 sdinfo->inputs[0].std = V4L2_STD_ALL;
2447 sdinfo->inputs[0].capabilities = V4L2_IN_CAP_STD;
2448
2449 sdinfo->can_route = 0;
2450 sdinfo->routes = NULL;
2451
2452 of_property_read_u32(endpoint, "ti,am437x-vpfe-interface",
2453 &sdinfo->vpfe_param.if_type);
2454 if (sdinfo->vpfe_param.if_type < 0 ||
2455 sdinfo->vpfe_param.if_type > 4) {
2456 sdinfo->vpfe_param.if_type = VPFE_RAW_BAYER;
2457 }
2458
2459 err = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
2460 &bus_cfg);
2461 if (err) {
2462 dev_err(dev, "Could not parse the endpoint\n");
2463 goto cleanup;
2464 }
2465
2466 sdinfo->vpfe_param.bus_width = bus_cfg.bus.parallel.bus_width;
2467
2468 if (sdinfo->vpfe_param.bus_width < 8 ||
2469 sdinfo->vpfe_param.bus_width > 16) {
2470 dev_err(dev, "Invalid bus width.\n");
2471 goto cleanup;
2472 }
2473
2474 flags = bus_cfg.bus.parallel.flags;
2475
2476 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2477 sdinfo->vpfe_param.hdpol = 1;
2478
2479 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
2480 sdinfo->vpfe_param.vdpol = 1;
2481
2482 rem = of_graph_get_remote_port_parent(endpoint);
2483 if (!rem) {
2484 dev_err(dev, "Remote device at %pOF not found\n",
2485 endpoint);
2486 goto cleanup;
2487 }
2488
2489 pdata->asd[i] = v4l2_async_notifier_add_fwnode_subdev(
2490 &vpfe->notifier, of_fwnode_handle(rem),
2491 sizeof(struct v4l2_async_subdev));
2492 of_node_put(rem);
2493 if (IS_ERR(pdata->asd[i]))
2494 goto cleanup;
2495 }
2496
2497 of_node_put(endpoint);
2498 return pdata;
2499
2500 cleanup:
2501 v4l2_async_notifier_cleanup(&vpfe->notifier);
2502 of_node_put(endpoint);
2503 return NULL;
2504 }
2505
2506 /*
2507 * vpfe_probe : This function creates device entries by register
2508 * itself to the V4L2 driver and initializes fields of each
2509 * device objects
2510 */
vpfe_probe(struct platform_device * pdev)2511 static int vpfe_probe(struct platform_device *pdev)
2512 {
2513 struct vpfe_config *vpfe_cfg;
2514 struct vpfe_device *vpfe;
2515 struct vpfe_ccdc *ccdc;
2516 struct resource *res;
2517 int ret;
2518
2519 vpfe = devm_kzalloc(&pdev->dev, sizeof(*vpfe), GFP_KERNEL);
2520 if (!vpfe)
2521 return -ENOMEM;
2522
2523 vpfe->pdev = &pdev->dev;
2524
2525 vpfe_cfg = vpfe_get_pdata(vpfe);
2526 if (!vpfe_cfg) {
2527 dev_err(&pdev->dev, "No platform data\n");
2528 return -EINVAL;
2529 }
2530
2531 vpfe->cfg = vpfe_cfg;
2532 ccdc = &vpfe->ccdc;
2533
2534 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2535 ccdc->ccdc_cfg.base_addr = devm_ioremap_resource(&pdev->dev, res);
2536 if (IS_ERR(ccdc->ccdc_cfg.base_addr)) {
2537 ret = PTR_ERR(ccdc->ccdc_cfg.base_addr);
2538 goto probe_out_cleanup;
2539 }
2540
2541 ret = platform_get_irq(pdev, 0);
2542 if (ret <= 0) {
2543 ret = -ENODEV;
2544 goto probe_out_cleanup;
2545 }
2546 vpfe->irq = ret;
2547
2548 ret = devm_request_irq(vpfe->pdev, vpfe->irq, vpfe_isr, 0,
2549 "vpfe_capture0", vpfe);
2550 if (ret) {
2551 dev_err(&pdev->dev, "Unable to request interrupt\n");
2552 ret = -EINVAL;
2553 goto probe_out_cleanup;
2554 }
2555
2556 ret = v4l2_device_register(&pdev->dev, &vpfe->v4l2_dev);
2557 if (ret) {
2558 vpfe_err(vpfe,
2559 "Unable to register v4l2 device.\n");
2560 goto probe_out_cleanup;
2561 }
2562
2563 /* set the driver data in platform device */
2564 platform_set_drvdata(pdev, vpfe);
2565 /* Enabling module functional clock */
2566 pm_runtime_enable(&pdev->dev);
2567
2568 /* for now just enable it here instead of waiting for the open */
2569 pm_runtime_get_sync(&pdev->dev);
2570
2571 vpfe_ccdc_config_defaults(ccdc);
2572
2573 pm_runtime_put_sync(&pdev->dev);
2574
2575 vpfe->sd = devm_kcalloc(&pdev->dev,
2576 ARRAY_SIZE(vpfe->cfg->asd),
2577 sizeof(struct v4l2_subdev *),
2578 GFP_KERNEL);
2579 if (!vpfe->sd) {
2580 ret = -ENOMEM;
2581 goto probe_out_v4l2_unregister;
2582 }
2583
2584 vpfe->notifier.ops = &vpfe_async_ops;
2585 ret = v4l2_async_notifier_register(&vpfe->v4l2_dev, &vpfe->notifier);
2586 if (ret) {
2587 vpfe_err(vpfe, "Error registering async notifier\n");
2588 ret = -EINVAL;
2589 goto probe_out_v4l2_unregister;
2590 }
2591
2592 return 0;
2593
2594 probe_out_v4l2_unregister:
2595 v4l2_device_unregister(&vpfe->v4l2_dev);
2596 probe_out_cleanup:
2597 v4l2_async_notifier_cleanup(&vpfe->notifier);
2598 return ret;
2599 }
2600
2601 /*
2602 * vpfe_remove : It un-register device from V4L2 driver
2603 */
vpfe_remove(struct platform_device * pdev)2604 static int vpfe_remove(struct platform_device *pdev)
2605 {
2606 struct vpfe_device *vpfe = platform_get_drvdata(pdev);
2607
2608 vpfe_dbg(2, vpfe, "vpfe_remove\n");
2609
2610 pm_runtime_disable(&pdev->dev);
2611
2612 v4l2_async_notifier_unregister(&vpfe->notifier);
2613 v4l2_async_notifier_cleanup(&vpfe->notifier);
2614 v4l2_device_unregister(&vpfe->v4l2_dev);
2615 video_unregister_device(&vpfe->video_dev);
2616
2617 return 0;
2618 }
2619
2620 #ifdef CONFIG_PM_SLEEP
2621
vpfe_save_context(struct vpfe_ccdc * ccdc)2622 static void vpfe_save_context(struct vpfe_ccdc *ccdc)
2623 {
2624 ccdc->ccdc_ctx[VPFE_PCR >> 2] = vpfe_reg_read(ccdc, VPFE_PCR);
2625 ccdc->ccdc_ctx[VPFE_SYNMODE >> 2] = vpfe_reg_read(ccdc, VPFE_SYNMODE);
2626 ccdc->ccdc_ctx[VPFE_SDOFST >> 2] = vpfe_reg_read(ccdc, VPFE_SDOFST);
2627 ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2] = vpfe_reg_read(ccdc, VPFE_SDR_ADDR);
2628 ccdc->ccdc_ctx[VPFE_CLAMP >> 2] = vpfe_reg_read(ccdc, VPFE_CLAMP);
2629 ccdc->ccdc_ctx[VPFE_DCSUB >> 2] = vpfe_reg_read(ccdc, VPFE_DCSUB);
2630 ccdc->ccdc_ctx[VPFE_COLPTN >> 2] = vpfe_reg_read(ccdc, VPFE_COLPTN);
2631 ccdc->ccdc_ctx[VPFE_BLKCMP >> 2] = vpfe_reg_read(ccdc, VPFE_BLKCMP);
2632 ccdc->ccdc_ctx[VPFE_VDINT >> 2] = vpfe_reg_read(ccdc, VPFE_VDINT);
2633 ccdc->ccdc_ctx[VPFE_ALAW >> 2] = vpfe_reg_read(ccdc, VPFE_ALAW);
2634 ccdc->ccdc_ctx[VPFE_REC656IF >> 2] = vpfe_reg_read(ccdc, VPFE_REC656IF);
2635 ccdc->ccdc_ctx[VPFE_CCDCFG >> 2] = vpfe_reg_read(ccdc, VPFE_CCDCFG);
2636 ccdc->ccdc_ctx[VPFE_CULLING >> 2] = vpfe_reg_read(ccdc, VPFE_CULLING);
2637 ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2] = vpfe_reg_read(ccdc,
2638 VPFE_HD_VD_WID);
2639 ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2] = vpfe_reg_read(ccdc,
2640 VPFE_PIX_LINES);
2641 ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2] = vpfe_reg_read(ccdc,
2642 VPFE_HORZ_INFO);
2643 ccdc->ccdc_ctx[VPFE_VERT_START >> 2] = vpfe_reg_read(ccdc,
2644 VPFE_VERT_START);
2645 ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2] = vpfe_reg_read(ccdc,
2646 VPFE_VERT_LINES);
2647 ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2] = vpfe_reg_read(ccdc,
2648 VPFE_HSIZE_OFF);
2649 }
2650
vpfe_suspend(struct device * dev)2651 static int vpfe_suspend(struct device *dev)
2652 {
2653 struct vpfe_device *vpfe = dev_get_drvdata(dev);
2654 struct vpfe_ccdc *ccdc = &vpfe->ccdc;
2655
2656 /* if streaming has not started we don't care */
2657 if (!vb2_start_streaming_called(&vpfe->buffer_queue))
2658 return 0;
2659
2660 pm_runtime_get_sync(dev);
2661 vpfe_config_enable(ccdc, 1);
2662
2663 /* Save VPFE context */
2664 vpfe_save_context(ccdc);
2665
2666 /* Disable CCDC */
2667 vpfe_pcr_enable(ccdc, 0);
2668 vpfe_config_enable(ccdc, 0);
2669
2670 /* Disable both master and slave clock */
2671 pm_runtime_put_sync(dev);
2672
2673 /* Select sleep pin state */
2674 pinctrl_pm_select_sleep_state(dev);
2675
2676 return 0;
2677 }
2678
vpfe_restore_context(struct vpfe_ccdc * ccdc)2679 static void vpfe_restore_context(struct vpfe_ccdc *ccdc)
2680 {
2681 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SYNMODE >> 2], VPFE_SYNMODE);
2682 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CULLING >> 2], VPFE_CULLING);
2683 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDOFST >> 2], VPFE_SDOFST);
2684 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2], VPFE_SDR_ADDR);
2685 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CLAMP >> 2], VPFE_CLAMP);
2686 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_DCSUB >> 2], VPFE_DCSUB);
2687 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_COLPTN >> 2], VPFE_COLPTN);
2688 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_BLKCMP >> 2], VPFE_BLKCMP);
2689 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VDINT >> 2], VPFE_VDINT);
2690 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_ALAW >> 2], VPFE_ALAW);
2691 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_REC656IF >> 2], VPFE_REC656IF);
2692 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CCDCFG >> 2], VPFE_CCDCFG);
2693 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PCR >> 2], VPFE_PCR);
2694 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2],
2695 VPFE_HD_VD_WID);
2696 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2],
2697 VPFE_PIX_LINES);
2698 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2],
2699 VPFE_HORZ_INFO);
2700 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_START >> 2],
2701 VPFE_VERT_START);
2702 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2],
2703 VPFE_VERT_LINES);
2704 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2],
2705 VPFE_HSIZE_OFF);
2706 }
2707
vpfe_resume(struct device * dev)2708 static int vpfe_resume(struct device *dev)
2709 {
2710 struct vpfe_device *vpfe = dev_get_drvdata(dev);
2711 struct vpfe_ccdc *ccdc = &vpfe->ccdc;
2712
2713 /* if streaming has not started we don't care */
2714 if (!vb2_start_streaming_called(&vpfe->buffer_queue))
2715 return 0;
2716
2717 /* Enable both master and slave clock */
2718 pm_runtime_get_sync(dev);
2719 vpfe_config_enable(ccdc, 1);
2720
2721 /* Restore VPFE context */
2722 vpfe_restore_context(ccdc);
2723
2724 vpfe_config_enable(ccdc, 0);
2725 pm_runtime_put_sync(dev);
2726
2727 /* Select default pin state */
2728 pinctrl_pm_select_default_state(dev);
2729
2730 return 0;
2731 }
2732
2733 #endif
2734
2735 static SIMPLE_DEV_PM_OPS(vpfe_pm_ops, vpfe_suspend, vpfe_resume);
2736
2737 static const struct of_device_id vpfe_of_match[] = {
2738 { .compatible = "ti,am437x-vpfe", },
2739 { /* sentinel */ },
2740 };
2741 MODULE_DEVICE_TABLE(of, vpfe_of_match);
2742
2743 static struct platform_driver vpfe_driver = {
2744 .probe = vpfe_probe,
2745 .remove = vpfe_remove,
2746 .driver = {
2747 .name = VPFE_MODULE_NAME,
2748 .pm = &vpfe_pm_ops,
2749 .of_match_table = of_match_ptr(vpfe_of_match),
2750 },
2751 };
2752
2753 module_platform_driver(vpfe_driver);
2754
2755 MODULE_AUTHOR("Texas Instruments");
2756 MODULE_DESCRIPTION("TI AM437x VPFE driver");
2757 MODULE_LICENSE("GPL");
2758 MODULE_VERSION(VPFE_VERSION);
2759
