1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * linux/drivers/usb/gadget/s3c2410_udc.c
4 *
5 * Samsung S3C24xx series on-chip full speed USB device controllers
6 *
7 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
8 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
9 */
10
11 #define pr_fmt(fmt) "s3c2410_udc: " fmt
12
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/delay.h>
16 #include <linux/ioport.h>
17 #include <linux/sched.h>
18 #include <linux/slab.h>
19 #include <linux/errno.h>
20 #include <linux/init.h>
21 #include <linux/timer.h>
22 #include <linux/list.h>
23 #include <linux/interrupt.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/gpio.h>
27 #include <linux/prefetch.h>
28 #include <linux/io.h>
29
30 #include <linux/debugfs.h>
31 #include <linux/seq_file.h>
32
33 #include <linux/usb.h>
34 #include <linux/usb/gadget.h>
35
36 #include <asm/byteorder.h>
37 #include <asm/irq.h>
38 #include <asm/unaligned.h>
39 #include <mach/irqs.h>
40
41 #include <mach/hardware.h>
42
43 #include <plat/regs-udc.h>
44 #include <linux/platform_data/usb-s3c2410_udc.h>
45
46
47 #include "s3c2410_udc.h"
48
49 #define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
50 #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
51 "Arnaud Patard <arnaud.patard@rtp-net.org>"
52
53 static const char gadget_name[] = "s3c2410_udc";
54 static const char driver_desc[] = DRIVER_DESC;
55
56 static struct s3c2410_udc *the_controller;
57 static struct clk *udc_clock;
58 static struct clk *usb_bus_clock;
59 static void __iomem *base_addr;
60 static u64 rsrc_start;
61 static u64 rsrc_len;
62 static struct dentry *s3c2410_udc_debugfs_root;
63
udc_read(u32 reg)64 static inline u32 udc_read(u32 reg)
65 {
66 return readb(base_addr + reg);
67 }
68
udc_write(u32 value,u32 reg)69 static inline void udc_write(u32 value, u32 reg)
70 {
71 writeb(value, base_addr + reg);
72 }
73
udc_writeb(void __iomem * base,u32 value,u32 reg)74 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
75 {
76 writeb(value, base + reg);
77 }
78
79 static struct s3c2410_udc_mach_info *udc_info;
80
81 /*************************** DEBUG FUNCTION ***************************/
82 #define DEBUG_NORMAL 1
83 #define DEBUG_VERBOSE 2
84
85 #ifdef CONFIG_USB_S3C2410_DEBUG
86 #define USB_S3C2410_DEBUG_LEVEL 0
87
88 static uint32_t s3c2410_ticks = 0;
89
90 __printf(2, 3)
dprintk(int level,const char * fmt,...)91 static void dprintk(int level, const char *fmt, ...)
92 {
93 static long prevticks;
94 static int invocation;
95 struct va_format vaf;
96 va_list args;
97
98 if (level > USB_S3C2410_DEBUG_LEVEL)
99 return;
100
101 va_start(args, fmt);
102
103 vaf.fmt = fmt;
104 vaf.va = &args;
105
106 if (s3c2410_ticks != prevticks) {
107 prevticks = s3c2410_ticks;
108 invocation = 0;
109 }
110
111 pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
112
113 va_end(args);
114 }
115 #else
116 __printf(2, 3)
dprintk(int level,const char * fmt,...)117 static void dprintk(int level, const char *fmt, ...)
118 {
119 }
120 #endif
121
s3c2410_udc_debugfs_show(struct seq_file * m,void * p)122 static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p)
123 {
124 u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
125 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
126 u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
127 u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
128
129 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
130 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
131 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
132 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
133 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
134 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
135 udc_write(0, S3C2410_UDC_INDEX_REG);
136 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
137 udc_write(1, S3C2410_UDC_INDEX_REG);
138 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
139 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
140 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
141 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
142 udc_write(2, S3C2410_UDC_INDEX_REG);
143 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
144 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
145 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
146 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
147
148 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
149 "PWR_REG : 0x%04X\n"
150 "EP_INT_REG : 0x%04X\n"
151 "USB_INT_REG : 0x%04X\n"
152 "EP_INT_EN_REG : 0x%04X\n"
153 "USB_INT_EN_REG : 0x%04X\n"
154 "EP0_CSR : 0x%04X\n"
155 "EP1_I_CSR1 : 0x%04X\n"
156 "EP1_I_CSR2 : 0x%04X\n"
157 "EP1_O_CSR1 : 0x%04X\n"
158 "EP1_O_CSR2 : 0x%04X\n"
159 "EP2_I_CSR1 : 0x%04X\n"
160 "EP2_I_CSR2 : 0x%04X\n"
161 "EP2_O_CSR1 : 0x%04X\n"
162 "EP2_O_CSR2 : 0x%04X\n",
163 addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
164 ep_int_en_reg, usb_int_en_reg, ep0_csr,
165 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
166 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
167 );
168
169 return 0;
170 }
171 DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs);
172
173 /* io macros */
174
s3c2410_udc_clear_ep0_opr(void __iomem * base)175 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
176 {
177 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
178 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
179 S3C2410_UDC_EP0_CSR_REG);
180 }
181
s3c2410_udc_clear_ep0_sst(void __iomem * base)182 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
183 {
184 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
185 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
186 }
187
s3c2410_udc_clear_ep0_se(void __iomem * base)188 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
189 {
190 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
191 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
192 }
193
s3c2410_udc_set_ep0_ipr(void __iomem * base)194 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
195 {
196 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
197 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
198 }
199
s3c2410_udc_set_ep0_de(void __iomem * base)200 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
201 {
202 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
203 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
204 }
205
s3c2410_udc_set_ep0_ss(void __iomem * b)206 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
207 {
208 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
209 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
210 }
211
s3c2410_udc_set_ep0_de_out(void __iomem * base)212 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
213 {
214 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
215
216 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
217 | S3C2410_UDC_EP0_CSR_DE),
218 S3C2410_UDC_EP0_CSR_REG);
219 }
220
s3c2410_udc_set_ep0_de_in(void __iomem * base)221 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
222 {
223 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
224 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
225 | S3C2410_UDC_EP0_CSR_DE),
226 S3C2410_UDC_EP0_CSR_REG);
227 }
228
229 /*------------------------- I/O ----------------------------------*/
230
231 /*
232 * s3c2410_udc_done
233 */
s3c2410_udc_done(struct s3c2410_ep * ep,struct s3c2410_request * req,int status)234 static void s3c2410_udc_done(struct s3c2410_ep *ep,
235 struct s3c2410_request *req, int status)
236 {
237 unsigned halted = ep->halted;
238
239 list_del_init(&req->queue);
240
241 if (likely(req->req.status == -EINPROGRESS))
242 req->req.status = status;
243 else
244 status = req->req.status;
245
246 ep->halted = 1;
247 usb_gadget_giveback_request(&ep->ep, &req->req);
248 ep->halted = halted;
249 }
250
s3c2410_udc_nuke(struct s3c2410_udc * udc,struct s3c2410_ep * ep,int status)251 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
252 struct s3c2410_ep *ep, int status)
253 {
254 /* Sanity check */
255 if (&ep->queue == NULL)
256 return;
257
258 while (!list_empty(&ep->queue)) {
259 struct s3c2410_request *req;
260 req = list_entry(ep->queue.next, struct s3c2410_request,
261 queue);
262 s3c2410_udc_done(ep, req, status);
263 }
264 }
265
s3c2410_udc_fifo_count_out(void)266 static inline int s3c2410_udc_fifo_count_out(void)
267 {
268 int tmp;
269
270 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
271 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
272 return tmp;
273 }
274
275 /*
276 * s3c2410_udc_write_packet
277 */
s3c2410_udc_write_packet(int fifo,struct s3c2410_request * req,unsigned max)278 static inline int s3c2410_udc_write_packet(int fifo,
279 struct s3c2410_request *req,
280 unsigned max)
281 {
282 unsigned len = min(req->req.length - req->req.actual, max);
283 u8 *buf = req->req.buf + req->req.actual;
284
285 prefetch(buf);
286
287 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
288 req->req.actual, req->req.length, len, req->req.actual + len);
289
290 req->req.actual += len;
291
292 udelay(5);
293 writesb(base_addr + fifo, buf, len);
294 return len;
295 }
296
297 /*
298 * s3c2410_udc_write_fifo
299 *
300 * return: 0 = still running, 1 = completed, negative = errno
301 */
s3c2410_udc_write_fifo(struct s3c2410_ep * ep,struct s3c2410_request * req)302 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
303 struct s3c2410_request *req)
304 {
305 unsigned count;
306 int is_last;
307 u32 idx;
308 int fifo_reg;
309 u32 ep_csr;
310
311 idx = ep->bEndpointAddress & 0x7F;
312 switch (idx) {
313 default:
314 idx = 0;
315 /* fall through */
316 case 0:
317 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
318 break;
319 case 1:
320 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
321 break;
322 case 2:
323 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
324 break;
325 case 3:
326 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
327 break;
328 case 4:
329 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
330 break;
331 }
332
333 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
334
335 /* last packet is often short (sometimes a zlp) */
336 if (count != ep->ep.maxpacket)
337 is_last = 1;
338 else if (req->req.length != req->req.actual || req->req.zero)
339 is_last = 0;
340 else
341 is_last = 2;
342
343 /* Only ep0 debug messages are interesting */
344 if (idx == 0)
345 dprintk(DEBUG_NORMAL,
346 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
347 idx, count, req->req.actual, req->req.length,
348 is_last, req->req.zero);
349
350 if (is_last) {
351 /* The order is important. It prevents sending 2 packets
352 * at the same time */
353
354 if (idx == 0) {
355 /* Reset signal => no need to say 'data sent' */
356 if (!(udc_read(S3C2410_UDC_USB_INT_REG)
357 & S3C2410_UDC_USBINT_RESET))
358 s3c2410_udc_set_ep0_de_in(base_addr);
359 ep->dev->ep0state = EP0_IDLE;
360 } else {
361 udc_write(idx, S3C2410_UDC_INDEX_REG);
362 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
363 udc_write(idx, S3C2410_UDC_INDEX_REG);
364 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
365 S3C2410_UDC_IN_CSR1_REG);
366 }
367
368 s3c2410_udc_done(ep, req, 0);
369 is_last = 1;
370 } else {
371 if (idx == 0) {
372 /* Reset signal => no need to say 'data sent' */
373 if (!(udc_read(S3C2410_UDC_USB_INT_REG)
374 & S3C2410_UDC_USBINT_RESET))
375 s3c2410_udc_set_ep0_ipr(base_addr);
376 } else {
377 udc_write(idx, S3C2410_UDC_INDEX_REG);
378 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
379 udc_write(idx, S3C2410_UDC_INDEX_REG);
380 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
381 S3C2410_UDC_IN_CSR1_REG);
382 }
383 }
384
385 return is_last;
386 }
387
s3c2410_udc_read_packet(int fifo,u8 * buf,struct s3c2410_request * req,unsigned avail)388 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
389 struct s3c2410_request *req, unsigned avail)
390 {
391 unsigned len;
392
393 len = min(req->req.length - req->req.actual, avail);
394 req->req.actual += len;
395
396 readsb(fifo + base_addr, buf, len);
397 return len;
398 }
399
400 /*
401 * return: 0 = still running, 1 = queue empty, negative = errno
402 */
s3c2410_udc_read_fifo(struct s3c2410_ep * ep,struct s3c2410_request * req)403 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
404 struct s3c2410_request *req)
405 {
406 u8 *buf;
407 u32 ep_csr;
408 unsigned bufferspace;
409 int is_last = 1;
410 unsigned avail;
411 int fifo_count = 0;
412 u32 idx;
413 int fifo_reg;
414
415 idx = ep->bEndpointAddress & 0x7F;
416
417 switch (idx) {
418 default:
419 idx = 0;
420 /* fall through */
421 case 0:
422 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
423 break;
424 case 1:
425 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
426 break;
427 case 2:
428 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
429 break;
430 case 3:
431 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
432 break;
433 case 4:
434 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
435 break;
436 }
437
438 if (!req->req.length)
439 return 1;
440
441 buf = req->req.buf + req->req.actual;
442 bufferspace = req->req.length - req->req.actual;
443 if (!bufferspace) {
444 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
445 return -1;
446 }
447
448 udc_write(idx, S3C2410_UDC_INDEX_REG);
449
450 fifo_count = s3c2410_udc_fifo_count_out();
451 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
452
453 if (fifo_count > ep->ep.maxpacket)
454 avail = ep->ep.maxpacket;
455 else
456 avail = fifo_count;
457
458 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
459
460 /* checking this with ep0 is not accurate as we already
461 * read a control request
462 **/
463 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
464 is_last = 1;
465 /* overflowed this request? flush extra data */
466 if (fifo_count != avail)
467 req->req.status = -EOVERFLOW;
468 } else {
469 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
470 }
471
472 udc_write(idx, S3C2410_UDC_INDEX_REG);
473 fifo_count = s3c2410_udc_fifo_count_out();
474
475 /* Only ep0 debug messages are interesting */
476 if (idx == 0)
477 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
478 __func__, fifo_count, is_last);
479
480 if (is_last) {
481 if (idx == 0) {
482 s3c2410_udc_set_ep0_de_out(base_addr);
483 ep->dev->ep0state = EP0_IDLE;
484 } else {
485 udc_write(idx, S3C2410_UDC_INDEX_REG);
486 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
487 udc_write(idx, S3C2410_UDC_INDEX_REG);
488 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
489 S3C2410_UDC_OUT_CSR1_REG);
490 }
491
492 s3c2410_udc_done(ep, req, 0);
493 } else {
494 if (idx == 0) {
495 s3c2410_udc_clear_ep0_opr(base_addr);
496 } else {
497 udc_write(idx, S3C2410_UDC_INDEX_REG);
498 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
499 udc_write(idx, S3C2410_UDC_INDEX_REG);
500 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
501 S3C2410_UDC_OUT_CSR1_REG);
502 }
503 }
504
505 return is_last;
506 }
507
s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest * crq)508 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
509 {
510 unsigned char *outbuf = (unsigned char *)crq;
511 int bytes_read = 0;
512
513 udc_write(0, S3C2410_UDC_INDEX_REG);
514
515 bytes_read = s3c2410_udc_fifo_count_out();
516
517 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
518
519 if (bytes_read > sizeof(struct usb_ctrlrequest))
520 bytes_read = sizeof(struct usb_ctrlrequest);
521
522 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
523
524 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
525 bytes_read, crq->bRequest, crq->bRequestType,
526 crq->wValue, crq->wIndex, crq->wLength);
527
528 return bytes_read;
529 }
530
s3c2410_udc_get_status(struct s3c2410_udc * dev,struct usb_ctrlrequest * crq)531 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
532 struct usb_ctrlrequest *crq)
533 {
534 u16 status = 0;
535 u8 ep_num = crq->wIndex & 0x7F;
536 u8 is_in = crq->wIndex & USB_DIR_IN;
537
538 switch (crq->bRequestType & USB_RECIP_MASK) {
539 case USB_RECIP_INTERFACE:
540 break;
541
542 case USB_RECIP_DEVICE:
543 status = dev->devstatus;
544 break;
545
546 case USB_RECIP_ENDPOINT:
547 if (ep_num > 4 || crq->wLength > 2)
548 return 1;
549
550 if (ep_num == 0) {
551 udc_write(0, S3C2410_UDC_INDEX_REG);
552 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
553 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
554 } else {
555 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
556 if (is_in) {
557 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
558 status = status & S3C2410_UDC_ICSR1_SENDSTL;
559 } else {
560 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
561 status = status & S3C2410_UDC_OCSR1_SENDSTL;
562 }
563 }
564
565 status = status ? 1 : 0;
566 break;
567
568 default:
569 return 1;
570 }
571
572 /* Seems to be needed to get it working. ouch :( */
573 udelay(5);
574 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
575 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
576 s3c2410_udc_set_ep0_de_in(base_addr);
577
578 return 0;
579 }
580 /*------------------------- usb state machine -------------------------------*/
581 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
582
s3c2410_udc_handle_ep0_idle(struct s3c2410_udc * dev,struct s3c2410_ep * ep,struct usb_ctrlrequest * crq,u32 ep0csr)583 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
584 struct s3c2410_ep *ep,
585 struct usb_ctrlrequest *crq,
586 u32 ep0csr)
587 {
588 int len, ret, tmp;
589
590 /* start control request? */
591 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
592 return;
593
594 s3c2410_udc_nuke(dev, ep, -EPROTO);
595
596 len = s3c2410_udc_read_fifo_crq(crq);
597 if (len != sizeof(*crq)) {
598 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
599 " wanted %d bytes got %d. Stalling out...\n",
600 sizeof(*crq), len);
601 s3c2410_udc_set_ep0_ss(base_addr);
602 return;
603 }
604
605 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
606 crq->bRequest, crq->bRequestType, crq->wLength);
607
608 /* cope with automagic for some standard requests. */
609 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
610 == USB_TYPE_STANDARD;
611 dev->req_config = 0;
612 dev->req_pending = 1;
613
614 switch (crq->bRequest) {
615 case USB_REQ_SET_CONFIGURATION:
616 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
617
618 if (crq->bRequestType == USB_RECIP_DEVICE) {
619 dev->req_config = 1;
620 s3c2410_udc_set_ep0_de_out(base_addr);
621 }
622 break;
623
624 case USB_REQ_SET_INTERFACE:
625 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
626
627 if (crq->bRequestType == USB_RECIP_INTERFACE) {
628 dev->req_config = 1;
629 s3c2410_udc_set_ep0_de_out(base_addr);
630 }
631 break;
632
633 case USB_REQ_SET_ADDRESS:
634 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
635
636 if (crq->bRequestType == USB_RECIP_DEVICE) {
637 tmp = crq->wValue & 0x7F;
638 dev->address = tmp;
639 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
640 S3C2410_UDC_FUNC_ADDR_REG);
641 s3c2410_udc_set_ep0_de_out(base_addr);
642 return;
643 }
644 break;
645
646 case USB_REQ_GET_STATUS:
647 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
648 s3c2410_udc_clear_ep0_opr(base_addr);
649
650 if (dev->req_std) {
651 if (!s3c2410_udc_get_status(dev, crq))
652 return;
653 }
654 break;
655
656 case USB_REQ_CLEAR_FEATURE:
657 s3c2410_udc_clear_ep0_opr(base_addr);
658
659 if (crq->bRequestType != USB_RECIP_ENDPOINT)
660 break;
661
662 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
663 break;
664
665 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
666 s3c2410_udc_set_ep0_de_out(base_addr);
667 return;
668
669 case USB_REQ_SET_FEATURE:
670 s3c2410_udc_clear_ep0_opr(base_addr);
671
672 if (crq->bRequestType != USB_RECIP_ENDPOINT)
673 break;
674
675 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
676 break;
677
678 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
679 s3c2410_udc_set_ep0_de_out(base_addr);
680 return;
681
682 default:
683 s3c2410_udc_clear_ep0_opr(base_addr);
684 break;
685 }
686
687 if (crq->bRequestType & USB_DIR_IN)
688 dev->ep0state = EP0_IN_DATA_PHASE;
689 else
690 dev->ep0state = EP0_OUT_DATA_PHASE;
691
692 if (!dev->driver)
693 return;
694
695 /* deliver the request to the gadget driver */
696 ret = dev->driver->setup(&dev->gadget, crq);
697 if (ret < 0) {
698 if (dev->req_config) {
699 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
700 crq->bRequest, ret);
701 return;
702 }
703
704 if (ret == -EOPNOTSUPP)
705 dprintk(DEBUG_NORMAL, "Operation not supported\n");
706 else
707 dprintk(DEBUG_NORMAL,
708 "dev->driver->setup failed. (%d)\n", ret);
709
710 udelay(5);
711 s3c2410_udc_set_ep0_ss(base_addr);
712 s3c2410_udc_set_ep0_de_out(base_addr);
713 dev->ep0state = EP0_IDLE;
714 /* deferred i/o == no response yet */
715 } else if (dev->req_pending) {
716 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
717 dev->req_pending = 0;
718 }
719
720 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
721 }
722
s3c2410_udc_handle_ep0(struct s3c2410_udc * dev)723 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
724 {
725 u32 ep0csr;
726 struct s3c2410_ep *ep = &dev->ep[0];
727 struct s3c2410_request *req;
728 struct usb_ctrlrequest crq;
729
730 if (list_empty(&ep->queue))
731 req = NULL;
732 else
733 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
734
735 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
736 * S3C2410_UDC_EP0_CSR_REG when index is zero */
737
738 udc_write(0, S3C2410_UDC_INDEX_REG);
739 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
740
741 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
742 ep0csr, ep0states[dev->ep0state]);
743
744 /* clear stall status */
745 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
746 s3c2410_udc_nuke(dev, ep, -EPIPE);
747 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
748 s3c2410_udc_clear_ep0_sst(base_addr);
749 dev->ep0state = EP0_IDLE;
750 return;
751 }
752
753 /* clear setup end */
754 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
755 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
756 s3c2410_udc_nuke(dev, ep, 0);
757 s3c2410_udc_clear_ep0_se(base_addr);
758 dev->ep0state = EP0_IDLE;
759 }
760
761 switch (dev->ep0state) {
762 case EP0_IDLE:
763 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
764 break;
765
766 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
767 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
768 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
769 s3c2410_udc_write_fifo(ep, req);
770 break;
771
772 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
773 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
774 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
775 s3c2410_udc_read_fifo(ep, req);
776 break;
777
778 case EP0_END_XFER:
779 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
780 dev->ep0state = EP0_IDLE;
781 break;
782
783 case EP0_STALL:
784 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
785 dev->ep0state = EP0_IDLE;
786 break;
787 }
788 }
789
790 /*
791 * handle_ep - Manage I/O endpoints
792 */
793
s3c2410_udc_handle_ep(struct s3c2410_ep * ep)794 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
795 {
796 struct s3c2410_request *req;
797 int is_in = ep->bEndpointAddress & USB_DIR_IN;
798 u32 ep_csr1;
799 u32 idx;
800
801 if (likely(!list_empty(&ep->queue)))
802 req = list_entry(ep->queue.next,
803 struct s3c2410_request, queue);
804 else
805 req = NULL;
806
807 idx = ep->bEndpointAddress & 0x7F;
808
809 if (is_in) {
810 udc_write(idx, S3C2410_UDC_INDEX_REG);
811 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
812 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
813 idx, ep_csr1, req ? 1 : 0);
814
815 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
816 dprintk(DEBUG_VERBOSE, "st\n");
817 udc_write(idx, S3C2410_UDC_INDEX_REG);
818 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
819 S3C2410_UDC_IN_CSR1_REG);
820 return;
821 }
822
823 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
824 s3c2410_udc_write_fifo(ep, req);
825 } else {
826 udc_write(idx, S3C2410_UDC_INDEX_REG);
827 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
828 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
829
830 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
831 udc_write(idx, S3C2410_UDC_INDEX_REG);
832 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
833 S3C2410_UDC_OUT_CSR1_REG);
834 return;
835 }
836
837 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
838 s3c2410_udc_read_fifo(ep, req);
839 }
840 }
841
842 #include <mach/regs-irq.h>
843
844 /*
845 * s3c2410_udc_irq - interrupt handler
846 */
s3c2410_udc_irq(int dummy,void * _dev)847 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
848 {
849 struct s3c2410_udc *dev = _dev;
850 int usb_status;
851 int usbd_status;
852 int pwr_reg;
853 int ep0csr;
854 int i;
855 u32 idx, idx2;
856 unsigned long flags;
857
858 spin_lock_irqsave(&dev->lock, flags);
859
860 /* Driver connected ? */
861 if (!dev->driver) {
862 /* Clear interrupts */
863 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
864 S3C2410_UDC_USB_INT_REG);
865 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
866 S3C2410_UDC_EP_INT_REG);
867 }
868
869 /* Save index */
870 idx = udc_read(S3C2410_UDC_INDEX_REG);
871
872 /* Read status registers */
873 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
874 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
875 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
876
877 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
878 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
879
880 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
881 usb_status, usbd_status, pwr_reg, ep0csr);
882
883 /*
884 * Now, handle interrupts. There's two types :
885 * - Reset, Resume, Suspend coming -> usb_int_reg
886 * - EP -> ep_int_reg
887 */
888
889 /* RESET */
890 if (usb_status & S3C2410_UDC_USBINT_RESET) {
891 /* two kind of reset :
892 * - reset start -> pwr reg = 8
893 * - reset end -> pwr reg = 0
894 **/
895 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
896 ep0csr, pwr_reg);
897
898 dev->gadget.speed = USB_SPEED_UNKNOWN;
899 udc_write(0x00, S3C2410_UDC_INDEX_REG);
900 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
901 S3C2410_UDC_MAXP_REG);
902 dev->address = 0;
903
904 dev->ep0state = EP0_IDLE;
905 dev->gadget.speed = USB_SPEED_FULL;
906
907 /* clear interrupt */
908 udc_write(S3C2410_UDC_USBINT_RESET,
909 S3C2410_UDC_USB_INT_REG);
910
911 udc_write(idx, S3C2410_UDC_INDEX_REG);
912 spin_unlock_irqrestore(&dev->lock, flags);
913 return IRQ_HANDLED;
914 }
915
916 /* RESUME */
917 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
918 dprintk(DEBUG_NORMAL, "USB resume\n");
919
920 /* clear interrupt */
921 udc_write(S3C2410_UDC_USBINT_RESUME,
922 S3C2410_UDC_USB_INT_REG);
923
924 if (dev->gadget.speed != USB_SPEED_UNKNOWN
925 && dev->driver
926 && dev->driver->resume)
927 dev->driver->resume(&dev->gadget);
928 }
929
930 /* SUSPEND */
931 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
932 dprintk(DEBUG_NORMAL, "USB suspend\n");
933
934 /* clear interrupt */
935 udc_write(S3C2410_UDC_USBINT_SUSPEND,
936 S3C2410_UDC_USB_INT_REG);
937
938 if (dev->gadget.speed != USB_SPEED_UNKNOWN
939 && dev->driver
940 && dev->driver->suspend)
941 dev->driver->suspend(&dev->gadget);
942
943 dev->ep0state = EP0_IDLE;
944 }
945
946 /* EP */
947 /* control traffic */
948 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
949 * generate an interrupt
950 */
951 if (usbd_status & S3C2410_UDC_INT_EP0) {
952 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
953 /* Clear the interrupt bit by setting it to 1 */
954 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
955 s3c2410_udc_handle_ep0(dev);
956 }
957
958 /* endpoint data transfers */
959 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
960 u32 tmp = 1 << i;
961 if (usbd_status & tmp) {
962 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
963
964 /* Clear the interrupt bit by setting it to 1 */
965 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
966 s3c2410_udc_handle_ep(&dev->ep[i]);
967 }
968 }
969
970 /* what else causes this interrupt? a receive! who is it? */
971 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
972 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
973 idx2 = udc_read(S3C2410_UDC_INDEX_REG);
974 udc_write(i, S3C2410_UDC_INDEX_REG);
975
976 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
977 s3c2410_udc_handle_ep(&dev->ep[i]);
978
979 /* restore index */
980 udc_write(idx2, S3C2410_UDC_INDEX_REG);
981 }
982 }
983
984 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
985
986 /* Restore old index */
987 udc_write(idx, S3C2410_UDC_INDEX_REG);
988
989 spin_unlock_irqrestore(&dev->lock, flags);
990
991 return IRQ_HANDLED;
992 }
993 /*------------------------- s3c2410_ep_ops ----------------------------------*/
994
to_s3c2410_ep(struct usb_ep * ep)995 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
996 {
997 return container_of(ep, struct s3c2410_ep, ep);
998 }
999
to_s3c2410_udc(struct usb_gadget * gadget)1000 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1001 {
1002 return container_of(gadget, struct s3c2410_udc, gadget);
1003 }
1004
to_s3c2410_req(struct usb_request * req)1005 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1006 {
1007 return container_of(req, struct s3c2410_request, req);
1008 }
1009
1010 /*
1011 * s3c2410_udc_ep_enable
1012 */
s3c2410_udc_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)1013 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1014 const struct usb_endpoint_descriptor *desc)
1015 {
1016 struct s3c2410_udc *dev;
1017 struct s3c2410_ep *ep;
1018 u32 max, tmp;
1019 unsigned long flags;
1020 u32 csr1, csr2;
1021 u32 int_en_reg;
1022
1023 ep = to_s3c2410_ep(_ep);
1024
1025 if (!_ep || !desc
1026 || _ep->name == ep0name
1027 || desc->bDescriptorType != USB_DT_ENDPOINT)
1028 return -EINVAL;
1029
1030 dev = ep->dev;
1031 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1032 return -ESHUTDOWN;
1033
1034 max = usb_endpoint_maxp(desc);
1035
1036 local_irq_save(flags);
1037 _ep->maxpacket = max;
1038 ep->ep.desc = desc;
1039 ep->halted = 0;
1040 ep->bEndpointAddress = desc->bEndpointAddress;
1041
1042 /* set max packet */
1043 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1044 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1045
1046 /* set type, direction, address; reset fifo counters */
1047 if (desc->bEndpointAddress & USB_DIR_IN) {
1048 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1049 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1050
1051 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1052 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1053 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1054 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1055 } else {
1056 /* don't flush in fifo or it will cause endpoint interrupt */
1057 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1058 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1059
1060 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1061 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1062 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1063 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1064
1065 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1066 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1067
1068 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1069 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1070 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1071 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1072 }
1073
1074 /* enable irqs */
1075 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1076 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1077
1078 /* print some debug message */
1079 tmp = desc->bEndpointAddress;
1080 dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1081 _ep->name, ep->num, tmp,
1082 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1083
1084 local_irq_restore(flags);
1085 s3c2410_udc_set_halt(_ep, 0);
1086
1087 return 0;
1088 }
1089
1090 /*
1091 * s3c2410_udc_ep_disable
1092 */
s3c2410_udc_ep_disable(struct usb_ep * _ep)1093 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1094 {
1095 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1096 unsigned long flags;
1097 u32 int_en_reg;
1098
1099 if (!_ep || !ep->ep.desc) {
1100 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1101 _ep ? ep->ep.name : NULL);
1102 return -EINVAL;
1103 }
1104
1105 local_irq_save(flags);
1106
1107 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1108
1109 ep->ep.desc = NULL;
1110 ep->halted = 1;
1111
1112 s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1113
1114 /* disable irqs */
1115 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1116 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1117
1118 local_irq_restore(flags);
1119
1120 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1121
1122 return 0;
1123 }
1124
1125 /*
1126 * s3c2410_udc_alloc_request
1127 */
1128 static struct usb_request *
s3c2410_udc_alloc_request(struct usb_ep * _ep,gfp_t mem_flags)1129 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1130 {
1131 struct s3c2410_request *req;
1132
1133 dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1134
1135 if (!_ep)
1136 return NULL;
1137
1138 req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1139 if (!req)
1140 return NULL;
1141
1142 INIT_LIST_HEAD(&req->queue);
1143 return &req->req;
1144 }
1145
1146 /*
1147 * s3c2410_udc_free_request
1148 */
1149 static void
s3c2410_udc_free_request(struct usb_ep * _ep,struct usb_request * _req)1150 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1151 {
1152 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1153 struct s3c2410_request *req = to_s3c2410_req(_req);
1154
1155 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1156
1157 if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1158 return;
1159
1160 WARN_ON(!list_empty(&req->queue));
1161 kfree(req);
1162 }
1163
1164 /*
1165 * s3c2410_udc_queue
1166 */
s3c2410_udc_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)1167 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1168 gfp_t gfp_flags)
1169 {
1170 struct s3c2410_request *req = to_s3c2410_req(_req);
1171 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1172 struct s3c2410_udc *dev;
1173 u32 ep_csr = 0;
1174 int fifo_count = 0;
1175 unsigned long flags;
1176
1177 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1178 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1179 return -EINVAL;
1180 }
1181
1182 dev = ep->dev;
1183 if (unlikely(!dev->driver
1184 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1185 return -ESHUTDOWN;
1186 }
1187
1188 local_irq_save(flags);
1189
1190 if (unlikely(!_req || !_req->complete
1191 || !_req->buf || !list_empty(&req->queue))) {
1192 if (!_req)
1193 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1194 else {
1195 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1196 __func__, !_req->complete, !_req->buf,
1197 !list_empty(&req->queue));
1198 }
1199
1200 local_irq_restore(flags);
1201 return -EINVAL;
1202 }
1203
1204 _req->status = -EINPROGRESS;
1205 _req->actual = 0;
1206
1207 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1208 __func__, ep->bEndpointAddress, _req->length);
1209
1210 if (ep->bEndpointAddress) {
1211 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1212
1213 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1214 ? S3C2410_UDC_IN_CSR1_REG
1215 : S3C2410_UDC_OUT_CSR1_REG);
1216 fifo_count = s3c2410_udc_fifo_count_out();
1217 } else {
1218 udc_write(0, S3C2410_UDC_INDEX_REG);
1219 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1220 fifo_count = s3c2410_udc_fifo_count_out();
1221 }
1222
1223 /* kickstart this i/o queue? */
1224 if (list_empty(&ep->queue) && !ep->halted) {
1225 if (ep->bEndpointAddress == 0 /* ep0 */) {
1226 switch (dev->ep0state) {
1227 case EP0_IN_DATA_PHASE:
1228 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1229 && s3c2410_udc_write_fifo(ep,
1230 req)) {
1231 dev->ep0state = EP0_IDLE;
1232 req = NULL;
1233 }
1234 break;
1235
1236 case EP0_OUT_DATA_PHASE:
1237 if ((!_req->length)
1238 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1239 && s3c2410_udc_read_fifo(ep,
1240 req))) {
1241 dev->ep0state = EP0_IDLE;
1242 req = NULL;
1243 }
1244 break;
1245
1246 default:
1247 local_irq_restore(flags);
1248 return -EL2HLT;
1249 }
1250 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1251 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1252 && s3c2410_udc_write_fifo(ep, req)) {
1253 req = NULL;
1254 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1255 && fifo_count
1256 && s3c2410_udc_read_fifo(ep, req)) {
1257 req = NULL;
1258 }
1259 }
1260
1261 /* pio or dma irq handler advances the queue. */
1262 if (likely(req))
1263 list_add_tail(&req->queue, &ep->queue);
1264
1265 local_irq_restore(flags);
1266
1267 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1268 return 0;
1269 }
1270
1271 /*
1272 * s3c2410_udc_dequeue
1273 */
s3c2410_udc_dequeue(struct usb_ep * _ep,struct usb_request * _req)1274 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1275 {
1276 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1277 struct s3c2410_udc *udc;
1278 int retval = -EINVAL;
1279 unsigned long flags;
1280 struct s3c2410_request *req = NULL;
1281
1282 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1283
1284 if (!the_controller->driver)
1285 return -ESHUTDOWN;
1286
1287 if (!_ep || !_req)
1288 return retval;
1289
1290 udc = to_s3c2410_udc(ep->gadget);
1291
1292 local_irq_save(flags);
1293
1294 list_for_each_entry(req, &ep->queue, queue) {
1295 if (&req->req == _req) {
1296 list_del_init(&req->queue);
1297 _req->status = -ECONNRESET;
1298 retval = 0;
1299 break;
1300 }
1301 }
1302
1303 if (retval == 0) {
1304 dprintk(DEBUG_VERBOSE,
1305 "dequeued req %p from %s, len %d buf %p\n",
1306 req, _ep->name, _req->length, _req->buf);
1307
1308 s3c2410_udc_done(ep, req, -ECONNRESET);
1309 }
1310
1311 local_irq_restore(flags);
1312 return retval;
1313 }
1314
1315 /*
1316 * s3c2410_udc_set_halt
1317 */
s3c2410_udc_set_halt(struct usb_ep * _ep,int value)1318 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1319 {
1320 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1321 u32 ep_csr = 0;
1322 unsigned long flags;
1323 u32 idx;
1324
1325 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1326 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1327 return -EINVAL;
1328 }
1329
1330 local_irq_save(flags);
1331
1332 idx = ep->bEndpointAddress & 0x7F;
1333
1334 if (idx == 0) {
1335 s3c2410_udc_set_ep0_ss(base_addr);
1336 s3c2410_udc_set_ep0_de_out(base_addr);
1337 } else {
1338 udc_write(idx, S3C2410_UDC_INDEX_REG);
1339 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1340 ? S3C2410_UDC_IN_CSR1_REG
1341 : S3C2410_UDC_OUT_CSR1_REG);
1342
1343 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1344 if (value)
1345 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1346 S3C2410_UDC_IN_CSR1_REG);
1347 else {
1348 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1349 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1350 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1351 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1352 }
1353 } else {
1354 if (value)
1355 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1356 S3C2410_UDC_OUT_CSR1_REG);
1357 else {
1358 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1359 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1360 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1361 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1362 }
1363 }
1364 }
1365
1366 ep->halted = value ? 1 : 0;
1367 local_irq_restore(flags);
1368
1369 return 0;
1370 }
1371
1372 static const struct usb_ep_ops s3c2410_ep_ops = {
1373 .enable = s3c2410_udc_ep_enable,
1374 .disable = s3c2410_udc_ep_disable,
1375
1376 .alloc_request = s3c2410_udc_alloc_request,
1377 .free_request = s3c2410_udc_free_request,
1378
1379 .queue = s3c2410_udc_queue,
1380 .dequeue = s3c2410_udc_dequeue,
1381
1382 .set_halt = s3c2410_udc_set_halt,
1383 };
1384
1385 /*------------------------- usb_gadget_ops ----------------------------------*/
1386
1387 /*
1388 * s3c2410_udc_get_frame
1389 */
s3c2410_udc_get_frame(struct usb_gadget * _gadget)1390 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1391 {
1392 int tmp;
1393
1394 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1395
1396 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1397 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1398 return tmp;
1399 }
1400
1401 /*
1402 * s3c2410_udc_wakeup
1403 */
s3c2410_udc_wakeup(struct usb_gadget * _gadget)1404 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1405 {
1406 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1407 return 0;
1408 }
1409
1410 /*
1411 * s3c2410_udc_set_selfpowered
1412 */
s3c2410_udc_set_selfpowered(struct usb_gadget * gadget,int value)1413 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1414 {
1415 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1416
1417 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1418
1419 gadget->is_selfpowered = (value != 0);
1420 if (value)
1421 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1422 else
1423 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1424
1425 return 0;
1426 }
1427
1428 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1429 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1430
s3c2410_udc_set_pullup(struct s3c2410_udc * udc,int is_on)1431 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1432 {
1433 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1434
1435 if (udc_info && (udc_info->udc_command ||
1436 gpio_is_valid(udc_info->pullup_pin))) {
1437
1438 if (is_on)
1439 s3c2410_udc_enable(udc);
1440 else {
1441 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1442 if (udc->driver && udc->driver->disconnect)
1443 udc->driver->disconnect(&udc->gadget);
1444
1445 }
1446 s3c2410_udc_disable(udc);
1447 }
1448 } else {
1449 return -EOPNOTSUPP;
1450 }
1451
1452 return 0;
1453 }
1454
s3c2410_udc_vbus_session(struct usb_gadget * gadget,int is_active)1455 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1456 {
1457 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1458
1459 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1460
1461 udc->vbus = (is_active != 0);
1462 s3c2410_udc_set_pullup(udc, is_active);
1463 return 0;
1464 }
1465
s3c2410_udc_pullup(struct usb_gadget * gadget,int is_on)1466 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1467 {
1468 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1469
1470 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1471
1472 s3c2410_udc_set_pullup(udc, is_on);
1473 return 0;
1474 }
1475
s3c2410_udc_vbus_irq(int irq,void * _dev)1476 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1477 {
1478 struct s3c2410_udc *dev = _dev;
1479 unsigned int value;
1480
1481 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1482
1483 value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1484 if (udc_info->vbus_pin_inverted)
1485 value = !value;
1486
1487 if (value != dev->vbus)
1488 s3c2410_udc_vbus_session(&dev->gadget, value);
1489
1490 return IRQ_HANDLED;
1491 }
1492
s3c2410_vbus_draw(struct usb_gadget * _gadget,unsigned ma)1493 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1494 {
1495 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1496
1497 if (udc_info && udc_info->vbus_draw) {
1498 udc_info->vbus_draw(ma);
1499 return 0;
1500 }
1501
1502 return -ENOTSUPP;
1503 }
1504
1505 static int s3c2410_udc_start(struct usb_gadget *g,
1506 struct usb_gadget_driver *driver);
1507 static int s3c2410_udc_stop(struct usb_gadget *g);
1508
1509 static const struct usb_gadget_ops s3c2410_ops = {
1510 .get_frame = s3c2410_udc_get_frame,
1511 .wakeup = s3c2410_udc_wakeup,
1512 .set_selfpowered = s3c2410_udc_set_selfpowered,
1513 .pullup = s3c2410_udc_pullup,
1514 .vbus_session = s3c2410_udc_vbus_session,
1515 .vbus_draw = s3c2410_vbus_draw,
1516 .udc_start = s3c2410_udc_start,
1517 .udc_stop = s3c2410_udc_stop,
1518 };
1519
s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)1520 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1521 {
1522 if (!udc_info)
1523 return;
1524
1525 if (udc_info->udc_command) {
1526 udc_info->udc_command(cmd);
1527 } else if (gpio_is_valid(udc_info->pullup_pin)) {
1528 int value;
1529
1530 switch (cmd) {
1531 case S3C2410_UDC_P_ENABLE:
1532 value = 1;
1533 break;
1534 case S3C2410_UDC_P_DISABLE:
1535 value = 0;
1536 break;
1537 default:
1538 return;
1539 }
1540 value ^= udc_info->pullup_pin_inverted;
1541
1542 gpio_set_value(udc_info->pullup_pin, value);
1543 }
1544 }
1545
1546 /*------------------------- gadget driver handling---------------------------*/
1547 /*
1548 * s3c2410_udc_disable
1549 */
s3c2410_udc_disable(struct s3c2410_udc * dev)1550 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1551 {
1552 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1553
1554 /* Disable all interrupts */
1555 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1556 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1557
1558 /* Clear the interrupt registers */
1559 udc_write(S3C2410_UDC_USBINT_RESET
1560 | S3C2410_UDC_USBINT_RESUME
1561 | S3C2410_UDC_USBINT_SUSPEND,
1562 S3C2410_UDC_USB_INT_REG);
1563
1564 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1565
1566 /* Good bye, cruel world */
1567 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1568
1569 /* Set speed to unknown */
1570 dev->gadget.speed = USB_SPEED_UNKNOWN;
1571 }
1572
1573 /*
1574 * s3c2410_udc_reinit
1575 */
s3c2410_udc_reinit(struct s3c2410_udc * dev)1576 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1577 {
1578 u32 i;
1579
1580 /* device/ep0 records init */
1581 INIT_LIST_HEAD(&dev->gadget.ep_list);
1582 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1583 dev->ep0state = EP0_IDLE;
1584
1585 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1586 struct s3c2410_ep *ep = &dev->ep[i];
1587
1588 if (i != 0)
1589 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1590
1591 ep->dev = dev;
1592 ep->ep.desc = NULL;
1593 ep->halted = 0;
1594 INIT_LIST_HEAD(&ep->queue);
1595 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1596 }
1597 }
1598
1599 /*
1600 * s3c2410_udc_enable
1601 */
s3c2410_udc_enable(struct s3c2410_udc * dev)1602 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1603 {
1604 int i;
1605
1606 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1607
1608 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1609 dev->gadget.speed = USB_SPEED_FULL;
1610
1611 /* Set MAXP for all endpoints */
1612 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1613 udc_write(i, S3C2410_UDC_INDEX_REG);
1614 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1615 S3C2410_UDC_MAXP_REG);
1616 }
1617
1618 /* Set default power state */
1619 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1620
1621 /* Enable reset and suspend interrupt interrupts */
1622 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1623 S3C2410_UDC_USB_INT_EN_REG);
1624
1625 /* Enable ep0 interrupt */
1626 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1627
1628 /* time to say "hello, world" */
1629 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1630 }
1631
s3c2410_udc_start(struct usb_gadget * g,struct usb_gadget_driver * driver)1632 static int s3c2410_udc_start(struct usb_gadget *g,
1633 struct usb_gadget_driver *driver)
1634 {
1635 struct s3c2410_udc *udc = to_s3c2410(g);
1636
1637 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1638
1639 /* Hook the driver */
1640 udc->driver = driver;
1641
1642 /* Enable udc */
1643 s3c2410_udc_enable(udc);
1644
1645 return 0;
1646 }
1647
s3c2410_udc_stop(struct usb_gadget * g)1648 static int s3c2410_udc_stop(struct usb_gadget *g)
1649 {
1650 struct s3c2410_udc *udc = to_s3c2410(g);
1651
1652 udc->driver = NULL;
1653
1654 /* Disable udc */
1655 s3c2410_udc_disable(udc);
1656
1657 return 0;
1658 }
1659
1660 /*---------------------------------------------------------------------------*/
1661 static struct s3c2410_udc memory = {
1662 .gadget = {
1663 .ops = &s3c2410_ops,
1664 .ep0 = &memory.ep[0].ep,
1665 .name = gadget_name,
1666 .dev = {
1667 .init_name = "gadget",
1668 },
1669 },
1670
1671 /* control endpoint */
1672 .ep[0] = {
1673 .num = 0,
1674 .ep = {
1675 .name = ep0name,
1676 .ops = &s3c2410_ep_ops,
1677 .maxpacket = EP0_FIFO_SIZE,
1678 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1679 USB_EP_CAPS_DIR_ALL),
1680 },
1681 .dev = &memory,
1682 },
1683
1684 /* first group of endpoints */
1685 .ep[1] = {
1686 .num = 1,
1687 .ep = {
1688 .name = "ep1-bulk",
1689 .ops = &s3c2410_ep_ops,
1690 .maxpacket = EP_FIFO_SIZE,
1691 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1692 USB_EP_CAPS_DIR_ALL),
1693 },
1694 .dev = &memory,
1695 .fifo_size = EP_FIFO_SIZE,
1696 .bEndpointAddress = 1,
1697 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1698 },
1699 .ep[2] = {
1700 .num = 2,
1701 .ep = {
1702 .name = "ep2-bulk",
1703 .ops = &s3c2410_ep_ops,
1704 .maxpacket = EP_FIFO_SIZE,
1705 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1706 USB_EP_CAPS_DIR_ALL),
1707 },
1708 .dev = &memory,
1709 .fifo_size = EP_FIFO_SIZE,
1710 .bEndpointAddress = 2,
1711 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1712 },
1713 .ep[3] = {
1714 .num = 3,
1715 .ep = {
1716 .name = "ep3-bulk",
1717 .ops = &s3c2410_ep_ops,
1718 .maxpacket = EP_FIFO_SIZE,
1719 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1720 USB_EP_CAPS_DIR_ALL),
1721 },
1722 .dev = &memory,
1723 .fifo_size = EP_FIFO_SIZE,
1724 .bEndpointAddress = 3,
1725 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1726 },
1727 .ep[4] = {
1728 .num = 4,
1729 .ep = {
1730 .name = "ep4-bulk",
1731 .ops = &s3c2410_ep_ops,
1732 .maxpacket = EP_FIFO_SIZE,
1733 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1734 USB_EP_CAPS_DIR_ALL),
1735 },
1736 .dev = &memory,
1737 .fifo_size = EP_FIFO_SIZE,
1738 .bEndpointAddress = 4,
1739 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1740 }
1741
1742 };
1743
1744 /*
1745 * probe - binds to the platform device
1746 */
s3c2410_udc_probe(struct platform_device * pdev)1747 static int s3c2410_udc_probe(struct platform_device *pdev)
1748 {
1749 struct s3c2410_udc *udc = &memory;
1750 struct device *dev = &pdev->dev;
1751 int retval;
1752 int irq;
1753
1754 dev_dbg(dev, "%s()\n", __func__);
1755
1756 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1757 if (IS_ERR(usb_bus_clock)) {
1758 dev_err(dev, "failed to get usb bus clock source\n");
1759 return PTR_ERR(usb_bus_clock);
1760 }
1761
1762 clk_prepare_enable(usb_bus_clock);
1763
1764 udc_clock = clk_get(NULL, "usb-device");
1765 if (IS_ERR(udc_clock)) {
1766 dev_err(dev, "failed to get udc clock source\n");
1767 return PTR_ERR(udc_clock);
1768 }
1769
1770 clk_prepare_enable(udc_clock);
1771
1772 mdelay(10);
1773
1774 dev_dbg(dev, "got and enabled clocks\n");
1775
1776 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1777 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1778 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1779 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1780 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1781 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1782 }
1783
1784 spin_lock_init(&udc->lock);
1785 udc_info = dev_get_platdata(&pdev->dev);
1786
1787 rsrc_start = S3C2410_PA_USBDEV;
1788 rsrc_len = S3C24XX_SZ_USBDEV;
1789
1790 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1791 return -EBUSY;
1792
1793 base_addr = ioremap(rsrc_start, rsrc_len);
1794 if (!base_addr) {
1795 retval = -ENOMEM;
1796 goto err_mem;
1797 }
1798
1799 the_controller = udc;
1800 platform_set_drvdata(pdev, udc);
1801
1802 s3c2410_udc_disable(udc);
1803 s3c2410_udc_reinit(udc);
1804
1805 /* irq setup after old hardware state is cleaned up */
1806 retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1807 0, gadget_name, udc);
1808
1809 if (retval != 0) {
1810 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1811 retval = -EBUSY;
1812 goto err_map;
1813 }
1814
1815 dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1816
1817 if (udc_info && udc_info->vbus_pin > 0) {
1818 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1819 if (retval < 0) {
1820 dev_err(dev, "cannot claim vbus pin\n");
1821 goto err_int;
1822 }
1823
1824 irq = gpio_to_irq(udc_info->vbus_pin);
1825 if (irq < 0) {
1826 dev_err(dev, "no irq for gpio vbus pin\n");
1827 retval = irq;
1828 goto err_gpio_claim;
1829 }
1830
1831 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1832 IRQF_TRIGGER_RISING
1833 | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1834 gadget_name, udc);
1835
1836 if (retval != 0) {
1837 dev_err(dev, "can't get vbus irq %d, err %d\n",
1838 irq, retval);
1839 retval = -EBUSY;
1840 goto err_gpio_claim;
1841 }
1842
1843 dev_dbg(dev, "got irq %i\n", irq);
1844 } else {
1845 udc->vbus = 1;
1846 }
1847
1848 if (udc_info && !udc_info->udc_command &&
1849 gpio_is_valid(udc_info->pullup_pin)) {
1850
1851 retval = gpio_request_one(udc_info->pullup_pin,
1852 udc_info->vbus_pin_inverted ?
1853 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1854 "udc pullup");
1855 if (retval)
1856 goto err_vbus_irq;
1857 }
1858
1859 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1860 if (retval)
1861 goto err_add_udc;
1862
1863 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1864 s3c2410_udc_debugfs_root, udc,
1865 &s3c2410_udc_debugfs_fops);
1866
1867 dev_dbg(dev, "probe ok\n");
1868
1869 return 0;
1870
1871 err_add_udc:
1872 if (udc_info && !udc_info->udc_command &&
1873 gpio_is_valid(udc_info->pullup_pin))
1874 gpio_free(udc_info->pullup_pin);
1875 err_vbus_irq:
1876 if (udc_info && udc_info->vbus_pin > 0)
1877 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1878 err_gpio_claim:
1879 if (udc_info && udc_info->vbus_pin > 0)
1880 gpio_free(udc_info->vbus_pin);
1881 err_int:
1882 free_irq(IRQ_USBD, udc);
1883 err_map:
1884 iounmap(base_addr);
1885 err_mem:
1886 release_mem_region(rsrc_start, rsrc_len);
1887
1888 return retval;
1889 }
1890
1891 /*
1892 * s3c2410_udc_remove
1893 */
s3c2410_udc_remove(struct platform_device * pdev)1894 static int s3c2410_udc_remove(struct platform_device *pdev)
1895 {
1896 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1897 unsigned int irq;
1898
1899 dev_dbg(&pdev->dev, "%s()\n", __func__);
1900
1901 if (udc->driver)
1902 return -EBUSY;
1903
1904 usb_del_gadget_udc(&udc->gadget);
1905 debugfs_remove(udc->regs_info);
1906
1907 if (udc_info && !udc_info->udc_command &&
1908 gpio_is_valid(udc_info->pullup_pin))
1909 gpio_free(udc_info->pullup_pin);
1910
1911 if (udc_info && udc_info->vbus_pin > 0) {
1912 irq = gpio_to_irq(udc_info->vbus_pin);
1913 free_irq(irq, udc);
1914 }
1915
1916 free_irq(IRQ_USBD, udc);
1917
1918 iounmap(base_addr);
1919 release_mem_region(rsrc_start, rsrc_len);
1920
1921 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1922 clk_disable_unprepare(udc_clock);
1923 clk_put(udc_clock);
1924 udc_clock = NULL;
1925 }
1926
1927 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1928 clk_disable_unprepare(usb_bus_clock);
1929 clk_put(usb_bus_clock);
1930 usb_bus_clock = NULL;
1931 }
1932
1933 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1934 return 0;
1935 }
1936
1937 #ifdef CONFIG_PM
1938 static int
s3c2410_udc_suspend(struct platform_device * pdev,pm_message_t message)1939 s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1940 {
1941 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1942
1943 return 0;
1944 }
1945
s3c2410_udc_resume(struct platform_device * pdev)1946 static int s3c2410_udc_resume(struct platform_device *pdev)
1947 {
1948 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1949
1950 return 0;
1951 }
1952 #else
1953 #define s3c2410_udc_suspend NULL
1954 #define s3c2410_udc_resume NULL
1955 #endif
1956
1957 static const struct platform_device_id s3c_udc_ids[] = {
1958 { "s3c2410-usbgadget", },
1959 { "s3c2440-usbgadget", },
1960 { }
1961 };
1962 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1963
1964 static struct platform_driver udc_driver_24x0 = {
1965 .driver = {
1966 .name = "s3c24x0-usbgadget",
1967 },
1968 .probe = s3c2410_udc_probe,
1969 .remove = s3c2410_udc_remove,
1970 .suspend = s3c2410_udc_suspend,
1971 .resume = s3c2410_udc_resume,
1972 .id_table = s3c_udc_ids,
1973 };
1974
udc_init(void)1975 static int __init udc_init(void)
1976 {
1977 int retval;
1978
1979 dprintk(DEBUG_NORMAL, "%s\n", gadget_name);
1980
1981 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
1982
1983 retval = platform_driver_register(&udc_driver_24x0);
1984 if (retval)
1985 goto err;
1986
1987 return 0;
1988
1989 err:
1990 debugfs_remove(s3c2410_udc_debugfs_root);
1991 return retval;
1992 }
1993
udc_exit(void)1994 static void __exit udc_exit(void)
1995 {
1996 platform_driver_unregister(&udc_driver_24x0);
1997 debugfs_remove_recursive(s3c2410_udc_debugfs_root);
1998 }
1999
2000 module_init(udc_init);
2001 module_exit(udc_exit);
2002
2003 MODULE_AUTHOR(DRIVER_AUTHOR);
2004 MODULE_DESCRIPTION(DRIVER_DESC);
2005 MODULE_LICENSE("GPL");
2006
