1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * NO WARRANTY
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
30
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
43 * USA.
44 */
45
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
59
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 #include <linux/irq_poll.h>
71
72 #include "mpt3sas_debug.h"
73 #include "mpt3sas_trigger_diag.h"
74 #include "mpt3sas_trigger_pages.h"
75
76 /* driver versioning info */
77 #define MPT3SAS_DRIVER_NAME "mpt3sas"
78 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
79 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
80 #define MPT3SAS_DRIVER_VERSION "39.100.00.00"
81 #define MPT3SAS_MAJOR_VERSION 39
82 #define MPT3SAS_MINOR_VERSION 100
83 #define MPT3SAS_BUILD_VERSION 0
84 #define MPT3SAS_RELEASE_VERSION 00
85
86 #define MPT2SAS_DRIVER_NAME "mpt2sas"
87 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
88 #define MPT2SAS_DRIVER_VERSION "20.102.00.00"
89 #define MPT2SAS_MAJOR_VERSION 20
90 #define MPT2SAS_MINOR_VERSION 102
91 #define MPT2SAS_BUILD_VERSION 0
92 #define MPT2SAS_RELEASE_VERSION 00
93
94 /* CoreDump: Default timeout */
95 #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS (15) /*15 seconds*/
96 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
97 #define MPT3SAS_TIMESYNC_TIMEOUT_SECONDS (10) /* 10 seconds */
98 #define MPT3SAS_TIMESYNC_UPDATE_INTERVAL (900) /* 15 minutes */
99 #define MPT3SAS_TIMESYNC_UNIT_MASK (0x80) /* bit 7 */
100 #define MPT3SAS_TIMESYNC_MASK (0x7F) /* 0 - 6 bits */
101 #define SECONDS_PER_MIN (60)
102 #define SECONDS_PER_HOUR (3600)
103 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
104 #define MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP (0x81)
105
106 /*
107 * Set MPT3SAS_SG_DEPTH value based on user input.
108 */
109 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
110 #define MPT_MIN_PHYS_SEGMENTS 16
111 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
112
113 #define MCPU_MAX_CHAINS_PER_IO 3
114
115 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
116 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
117 #else
118 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
119 #endif
120
121 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
122 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
123 #else
124 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
125 #endif
126
127 /*
128 * Generic Defines
129 */
130 #define MPT3SAS_SATA_QUEUE_DEPTH 32
131 #define MPT3SAS_SAS_QUEUE_DEPTH 254
132 #define MPT3SAS_RAID_QUEUE_DEPTH 128
133 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
134
135 #define MPT3SAS_RAID_MAX_SECTORS 8192
136 #define MPT3SAS_HOST_PAGE_SIZE_4K 12
137 #define MPT3SAS_NVME_QUEUE_DEPTH 128
138 #define MPT_NAME_LENGTH 32 /* generic length of strings */
139 #define MPT_STRING_LENGTH 64
140 #define MPI_FRAME_START_OFFSET 256
141 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/
142
143 #define MPT_MAX_CALLBACKS 32
144
145 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
146 /* reserved for issuing internally framed scsi io cmds */
147 #define INTERNAL_SCSIIO_CMDS_COUNT 3
148
149 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
150
151 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
152
153 #define MAX_CHAIN_ELEMT_SZ 16
154 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8
155
156 #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6
157 #define FW_IMG_HDR_READ_TIMEOUT 15
158
159 #define IOC_OPERATIONAL_WAIT_COUNT 10
160
161 /*
162 * NVMe defines
163 */
164 #define NVME_PRP_SIZE 8 /* PRP size */
165 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
166 #define NVME_TASK_ABORT_MIN_TIMEOUT 6
167 #define NVME_TASK_ABORT_MAX_TIMEOUT 60
168 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
169 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */
170
171 struct mpt3sas_nvme_cmd {
172 u8 rsvd[24];
173 __le64 prp1;
174 __le64 prp2;
175 };
176
177 /*
178 * logging format
179 */
180 #define ioc_err(ioc, fmt, ...) \
181 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
182 #define ioc_notice(ioc, fmt, ...) \
183 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
184 #define ioc_warn(ioc, fmt, ...) \
185 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
186 #define ioc_info(ioc, fmt, ...) \
187 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
188
189 /*
190 * WarpDrive Specific Log codes
191 */
192
193 #define MPT2_WARPDRIVE_LOGENTRY (0x8002)
194 #define MPT2_WARPDRIVE_LC_SSDT (0x41)
195 #define MPT2_WARPDRIVE_LC_SSDLW (0x43)
196 #define MPT2_WARPDRIVE_LC_SSDLF (0x44)
197 #define MPT2_WARPDRIVE_LC_BRMF (0x4D)
198
199 /*
200 * per target private data
201 */
202 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
203 #define MPT_TARGET_FLAGS_VOLUME 0x02
204 #define MPT_TARGET_FLAGS_DELETED 0x04
205 #define MPT_TARGET_FASTPATH_IO 0x08
206 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
207
208 #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
209 #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
210
211 /* Atlas PCIe Switch Management Port */
212 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
213
214 /*
215 * Intel HBA branding
216 */
217 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \
218 "Intel(R) Integrated RAID Module RMS25JB080"
219 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \
220 "Intel(R) Integrated RAID Module RMS25JB040"
221 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \
222 "Intel(R) Integrated RAID Module RMS25KB080"
223 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \
224 "Intel(R) Integrated RAID Module RMS25KB040"
225 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \
226 "Intel(R) Integrated RAID Module RMS25LB040"
227 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \
228 "Intel(R) Integrated RAID Module RMS25LB080"
229 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \
230 "Intel Integrated RAID Module RMS2LL080"
231 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \
232 "Intel Integrated RAID Module RMS2LL040"
233 #define MPT2SAS_INTEL_RS25GB008_BRANDING \
234 "Intel(R) RAID Controller RS25GB008"
235 #define MPT2SAS_INTEL_SSD910_BRANDING \
236 "Intel(R) SSD 910 Series"
237
238 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \
239 "Intel(R) Integrated RAID Module RMS3JC080"
240 #define MPT3SAS_INTEL_RS3GC008_BRANDING \
241 "Intel(R) RAID Controller RS3GC008"
242 #define MPT3SAS_INTEL_RS3FC044_BRANDING \
243 "Intel(R) RAID Controller RS3FC044"
244 #define MPT3SAS_INTEL_RS3UC080_BRANDING \
245 "Intel(R) RAID Controller RS3UC080"
246
247 /*
248 * Intel HBA SSDIDs
249 */
250 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
251 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
252 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
253 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
254 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
255 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
256 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
257 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
258 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
259 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700
260
261 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
262 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
263 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
264 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
265
266 /*
267 * Dell HBA branding
268 */
269 #define MPT2SAS_DELL_BRANDING_SIZE 32
270
271 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
272 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
273 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
274 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
275 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
276 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
277 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
278
279 #define MPT3SAS_DELL_12G_HBA_BRANDING \
280 "Dell 12Gbps HBA"
281
282 /*
283 * Dell HBA SSDIDs
284 */
285 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
286 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
287 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
288 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
289 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
290 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
291 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
292
293 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
294
295 /*
296 * Cisco HBA branding
297 */
298 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
299 "Cisco 9300-8E 12G SAS HBA"
300 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
301 "Cisco 9300-8i 12G SAS HBA"
302 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
303 "Cisco 12G Modular SAS Pass through Controller"
304 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
305 "UCS C3X60 12G SAS Pass through Controller"
306 /*
307 * Cisco HBA SSSDIDs
308 */
309 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
310 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
311 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
312 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
313
314 /*
315 * status bits for ioc->diag_buffer_status
316 */
317 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
318 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
319 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
320 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
321 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
322
323 /*
324 * HP HBA branding
325 */
326 #define MPT2SAS_HP_3PAR_SSVID 0x1590
327
328 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
329 "HP H220 Host Bus Adapter"
330 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
331 "HP H221 Host Bus Adapter"
332 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
333 "HP H222 Host Bus Adapter"
334 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
335 "HP H220i Host Bus Adapter"
336 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
337 "HP H210i Host Bus Adapter"
338
339 /*
340 * HO HBA SSDIDs
341 */
342 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
343 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
344 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
345 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
346 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
347
348 /*
349 * Combined Reply Queue constants,
350 * There are twelve Supplemental Reply Post Host Index Registers
351 * and each register is at offset 0x10 bytes from the previous one.
352 */
353 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
354 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
355 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
356 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
357 #define MPT3_MIN_IRQS 1
358
359 /* OEM Identifiers */
360 #define MFG10_OEM_ID_INVALID (0x00000000)
361 #define MFG10_OEM_ID_DELL (0x00000001)
362 #define MFG10_OEM_ID_FSC (0x00000002)
363 #define MFG10_OEM_ID_SUN (0x00000003)
364 #define MFG10_OEM_ID_IBM (0x00000004)
365
366 /* GENERIC Flags 0*/
367 #define MFG10_GF0_OCE_DISABLED (0x00000001)
368 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
369 #define MFG10_GF0_R10_DISPLAY (0x00000004)
370 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
371 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
372
373 #define VIRTUAL_IO_FAILED_RETRY (0x32010081)
374
375 /* High IOPs definitions */
376 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8
377 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8
378 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16
379 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128
380 #define RDPQ_MAX_INDEX_IN_ONE_CHUNK 16
381
382 /* OEM Specific Flags will come from OEM specific header files */
383 struct Mpi2ManufacturingPage10_t {
384 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
385 U8 OEMIdentifier; /* 04h */
386 U8 Reserved1; /* 05h */
387 U16 Reserved2; /* 08h */
388 U32 Reserved3; /* 0Ch */
389 U32 GenericFlags0; /* 10h */
390 U32 GenericFlags1; /* 14h */
391 U32 Reserved4; /* 18h */
392 U32 OEMSpecificFlags0; /* 1Ch */
393 U32 OEMSpecificFlags1; /* 20h */
394 U32 Reserved5[18]; /* 24h - 60h*/
395 };
396
397
398 /* Miscellaneous options */
399 struct Mpi2ManufacturingPage11_t {
400 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
401 __le32 Reserved1; /* 04h */
402 u8 Reserved2; /* 08h */
403 u8 EEDPTagMode; /* 09h */
404 u8 Reserved3; /* 0Ah */
405 u8 Reserved4; /* 0Bh */
406 __le32 Reserved5[8]; /* 0Ch-2Ch */
407 u16 AddlFlags2; /* 2Ch */
408 u8 AddlFlags3; /* 2Eh */
409 u8 Reserved6; /* 2Fh */
410 __le32 Reserved7[7]; /* 30h - 4Bh */
411 u8 NVMeAbortTO; /* 4Ch */
412 u8 NumPerDevEvents; /* 4Dh */
413 u8 HostTraceBufferDecrementSizeKB; /* 4Eh */
414 u8 HostTraceBufferFlags; /* 4Fh */
415 u16 HostTraceBufferMaxSizeKB; /* 50h */
416 u16 HostTraceBufferMinSizeKB; /* 52h */
417 u8 CoreDumpTOSec; /* 54h */
418 u8 TimeSyncInterval; /* 55h */
419 u16 Reserved9; /* 56h */
420 __le32 Reserved10; /* 58h */
421 };
422
423 /**
424 * struct MPT3SAS_TARGET - starget private hostdata
425 * @starget: starget object
426 * @sas_address: target sas address
427 * @raid_device: raid_device pointer to access volume data
428 * @handle: device handle
429 * @num_luns: number luns
430 * @flags: MPT_TARGET_FLAGS_XXX flags
431 * @deleted: target flaged for deletion
432 * @tm_busy: target is busy with TM request.
433 * @port: hba port entry containing target's port number info
434 * @sas_dev: The sas_device associated with this target
435 * @pcie_dev: The pcie device associated with this target
436 */
437 struct MPT3SAS_TARGET {
438 struct scsi_target *starget;
439 u64 sas_address;
440 struct _raid_device *raid_device;
441 u16 handle;
442 int num_luns;
443 u32 flags;
444 u8 deleted;
445 u8 tm_busy;
446 struct hba_port *port;
447 struct _sas_device *sas_dev;
448 struct _pcie_device *pcie_dev;
449 };
450
451
452 /*
453 * per device private data
454 */
455 #define MPT_DEVICE_FLAGS_INIT 0x01
456
457 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
458 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
459 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
460 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
461
462 /**
463 * struct MPT3SAS_DEVICE - sdev private hostdata
464 * @sas_target: starget private hostdata
465 * @lun: lun number
466 * @flags: MPT_DEVICE_XXX flags
467 * @configured_lun: lun is configured
468 * @block: device is in SDEV_BLOCK state
469 * @tlr_snoop_check: flag used in determining whether to disable TLR
470 * @eedp_enable: eedp support enable bit
471 * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
472 * @eedp_block_length: block size
473 * @ata_command_pending: SATL passthrough outstanding for device
474 */
475 struct MPT3SAS_DEVICE {
476 struct MPT3SAS_TARGET *sas_target;
477 unsigned int lun;
478 u32 flags;
479 u8 configured_lun;
480 u8 block;
481 u8 tlr_snoop_check;
482 u8 ignore_delay_remove;
483 /* Iopriority Command Handling */
484 u8 ncq_prio_enable;
485 /*
486 * Bug workaround for SATL handling: the mpt2/3sas firmware
487 * doesn't return BUSY or TASK_SET_FULL for subsequent
488 * commands while a SATL pass through is in operation as the
489 * spec requires, it simply does nothing with them until the
490 * pass through completes, causing them possibly to timeout if
491 * the passthrough is a long executing command (like format or
492 * secure erase). This variable allows us to do the right
493 * thing while a SATL command is pending.
494 */
495 unsigned long ata_command_pending;
496
497 };
498
499 #define MPT3_CMD_NOT_USED 0x8000 /* free */
500 #define MPT3_CMD_COMPLETE 0x0001 /* completed */
501 #define MPT3_CMD_PENDING 0x0002 /* pending */
502 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
503 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
504 #define MPT3_CMD_COMPLETE_ASYNC 0x0010 /* tells whether cmd completes in same thread or not */
505
506 /**
507 * struct _internal_cmd - internal commands struct
508 * @mutex: mutex
509 * @done: completion
510 * @reply: reply message pointer
511 * @sense: sense data
512 * @status: MPT3_CMD_XXX status
513 * @smid: system message id
514 */
515 struct _internal_cmd {
516 struct mutex mutex;
517 struct completion done;
518 void *reply;
519 void *sense;
520 u16 status;
521 u16 smid;
522 };
523
524
525
526 /**
527 * struct _sas_device - attached device information
528 * @list: sas device list
529 * @starget: starget object
530 * @sas_address: device sas address
531 * @device_name: retrieved from the SAS IDENTIFY frame.
532 * @handle: device handle
533 * @sas_address_parent: sas address of parent expander or sas host
534 * @enclosure_handle: enclosure handle
535 * @enclosure_logical_id: enclosure logical identifier
536 * @volume_handle: volume handle (valid when hidden raid member)
537 * @volume_wwid: volume unique identifier
538 * @device_info: bitfield provides detailed info about the device
539 * @id: target id
540 * @channel: target channel
541 * @slot: number number
542 * @phy: phy identifier provided in sas device page 0
543 * @responding: used in _scsih_sas_device_mark_responding
544 * @fast_path: fast path feature enable bit
545 * @pfa_led_on: flag for PFA LED status
546 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
547 * addition routine.
548 * @chassis_slot: chassis slot
549 * @is_chassis_slot_valid: chassis slot valid or not
550 * @port: hba port entry containing device's port number info
551 * @rphy: device's sas_rphy address used to identify this device structure in
552 * target_alloc callback function
553 */
554 struct _sas_device {
555 struct list_head list;
556 struct scsi_target *starget;
557 u64 sas_address;
558 u64 device_name;
559 u16 handle;
560 u64 sas_address_parent;
561 u16 enclosure_handle;
562 u64 enclosure_logical_id;
563 u16 volume_handle;
564 u64 volume_wwid;
565 u32 device_info;
566 int id;
567 int channel;
568 u16 slot;
569 u8 phy;
570 u8 responding;
571 u8 fast_path;
572 u8 pfa_led_on;
573 u8 pend_sas_rphy_add;
574 u8 enclosure_level;
575 u8 chassis_slot;
576 u8 is_chassis_slot_valid;
577 u8 connector_name[5];
578 struct kref refcount;
579 u8 port_type;
580 struct hba_port *port;
581 struct sas_rphy *rphy;
582 };
583
sas_device_get(struct _sas_device * s)584 static inline void sas_device_get(struct _sas_device *s)
585 {
586 kref_get(&s->refcount);
587 }
588
sas_device_free(struct kref * r)589 static inline void sas_device_free(struct kref *r)
590 {
591 kfree(container_of(r, struct _sas_device, refcount));
592 }
593
sas_device_put(struct _sas_device * s)594 static inline void sas_device_put(struct _sas_device *s)
595 {
596 kref_put(&s->refcount, sas_device_free);
597 }
598
599 /*
600 * struct _pcie_device - attached PCIe device information
601 * @list: pcie device list
602 * @starget: starget object
603 * @wwid: device WWID
604 * @handle: device handle
605 * @device_info: bitfield provides detailed info about the device
606 * @id: target id
607 * @channel: target channel
608 * @slot: slot number
609 * @port_num: port number
610 * @responding: used in _scsih_pcie_device_mark_responding
611 * @fast_path: fast path feature enable bit
612 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
613 * NVMe device only
614 * @enclosure_handle: enclosure handle
615 * @enclosure_logical_id: enclosure logical identifier
616 * @enclosure_level: The level of device's enclosure from the controller
617 * @connector_name: ASCII value of the Connector's name
618 * @serial_number: pointer of serial number string allocated runtime
619 * @access_status: Device's Access Status
620 * @shutdown_latency: NVMe device's RTD3 Entry Latency
621 * @refcount: reference count for deletion
622 */
623 struct _pcie_device {
624 struct list_head list;
625 struct scsi_target *starget;
626 u64 wwid;
627 u16 handle;
628 u32 device_info;
629 int id;
630 int channel;
631 u16 slot;
632 u8 port_num;
633 u8 responding;
634 u8 fast_path;
635 u32 nvme_mdts;
636 u16 enclosure_handle;
637 u64 enclosure_logical_id;
638 u8 enclosure_level;
639 u8 connector_name[4];
640 u8 *serial_number;
641 u8 reset_timeout;
642 u8 access_status;
643 u16 shutdown_latency;
644 struct kref refcount;
645 };
646 /**
647 * pcie_device_get - Increment the pcie device reference count
648 *
649 * @p: pcie_device object
650 *
651 * When ever this function called it will increment the
652 * reference count of the pcie device for which this function called.
653 *
654 */
pcie_device_get(struct _pcie_device * p)655 static inline void pcie_device_get(struct _pcie_device *p)
656 {
657 kref_get(&p->refcount);
658 }
659
660 /**
661 * pcie_device_free - Release the pcie device object
662 * @r - kref object
663 *
664 * Free's the pcie device object. It will be called when reference count
665 * reaches to zero.
666 */
pcie_device_free(struct kref * r)667 static inline void pcie_device_free(struct kref *r)
668 {
669 kfree(container_of(r, struct _pcie_device, refcount));
670 }
671
672 /**
673 * pcie_device_put - Decrement the pcie device reference count
674 *
675 * @p: pcie_device object
676 *
677 * When ever this function called it will decrement the
678 * reference count of the pcie device for which this function called.
679 *
680 * When refernce count reaches to Zero, this will call pcie_device_free to the
681 * pcie_device object.
682 */
pcie_device_put(struct _pcie_device * p)683 static inline void pcie_device_put(struct _pcie_device *p)
684 {
685 kref_put(&p->refcount, pcie_device_free);
686 }
687 /**
688 * struct _raid_device - raid volume link list
689 * @list: sas device list
690 * @starget: starget object
691 * @sdev: scsi device struct (volumes are single lun)
692 * @wwid: unique identifier for the volume
693 * @handle: device handle
694 * @block_size: Block size of the volume
695 * @id: target id
696 * @channel: target channel
697 * @volume_type: the raid level
698 * @device_info: bitfield provides detailed info about the hidden components
699 * @num_pds: number of hidden raid components
700 * @responding: used in _scsih_raid_device_mark_responding
701 * @percent_complete: resync percent complete
702 * @direct_io_enabled: Whether direct io to PDs are allowed or not
703 * @stripe_exponent: X where 2powX is the stripe sz in blocks
704 * @block_exponent: X where 2powX is the block sz in bytes
705 * @max_lba: Maximum number of LBA in the volume
706 * @stripe_sz: Stripe Size of the volume
707 * @device_info: Device info of the volume member disk
708 * @pd_handle: Array of handles of the physical drives for direct I/O in le16
709 */
710 #define MPT_MAX_WARPDRIVE_PDS 8
711 struct _raid_device {
712 struct list_head list;
713 struct scsi_target *starget;
714 struct scsi_device *sdev;
715 u64 wwid;
716 u16 handle;
717 u16 block_sz;
718 int id;
719 int channel;
720 u8 volume_type;
721 u8 num_pds;
722 u8 responding;
723 u8 percent_complete;
724 u8 direct_io_enabled;
725 u8 stripe_exponent;
726 u8 block_exponent;
727 u64 max_lba;
728 u32 stripe_sz;
729 u32 device_info;
730 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
731 };
732
733 /**
734 * struct _boot_device - boot device info
735 *
736 * @channel: sas, raid, or pcie channel
737 * @device: holds pointer for struct _sas_device, struct _raid_device or
738 * struct _pcie_device
739 */
740 struct _boot_device {
741 int channel;
742 void *device;
743 };
744
745 /**
746 * struct _sas_port - wide/narrow sas port information
747 * @port_list: list of ports belonging to expander
748 * @num_phys: number of phys belonging to this port
749 * @remote_identify: attached device identification
750 * @rphy: sas transport rphy object
751 * @port: sas transport wide/narrow port object
752 * @hba_port: hba port entry containing port's port number info
753 * @phy_list: _sas_phy list objects belonging to this port
754 */
755 struct _sas_port {
756 struct list_head port_list;
757 u8 num_phys;
758 struct sas_identify remote_identify;
759 struct sas_rphy *rphy;
760 struct sas_port *port;
761 struct hba_port *hba_port;
762 struct list_head phy_list;
763 };
764
765 /**
766 * struct _sas_phy - phy information
767 * @port_siblings: list of phys belonging to a port
768 * @identify: phy identification
769 * @remote_identify: attached device identification
770 * @phy: sas transport phy object
771 * @phy_id: unique phy id
772 * @handle: device handle for this phy
773 * @attached_handle: device handle for attached device
774 * @phy_belongs_to_port: port has been created for this phy
775 * @port: hba port entry containing port number info
776 */
777 struct _sas_phy {
778 struct list_head port_siblings;
779 struct sas_identify identify;
780 struct sas_identify remote_identify;
781 struct sas_phy *phy;
782 u8 phy_id;
783 u16 handle;
784 u16 attached_handle;
785 u8 phy_belongs_to_port;
786 u8 hba_vphy;
787 struct hba_port *port;
788 };
789
790 /**
791 * struct _sas_node - sas_host/expander information
792 * @list: list of expanders
793 * @parent_dev: parent device class
794 * @num_phys: number phys belonging to this sas_host/expander
795 * @sas_address: sas address of this sas_host/expander
796 * @handle: handle for this sas_host/expander
797 * @sas_address_parent: sas address of parent expander or sas host
798 * @enclosure_handle: handle for this a member of an enclosure
799 * @device_info: bitwise defining capabilities of this sas_host/expander
800 * @responding: used in _scsih_expander_device_mark_responding
801 * @phy: a list of phys that make up this sas_host/expander
802 * @sas_port_list: list of ports attached to this sas_host/expander
803 * @port: hba port entry containing node's port number info
804 * @rphy: sas_rphy object of this expander
805 */
806 struct _sas_node {
807 struct list_head list;
808 struct device *parent_dev;
809 u8 num_phys;
810 u64 sas_address;
811 u16 handle;
812 u64 sas_address_parent;
813 u16 enclosure_handle;
814 u64 enclosure_logical_id;
815 u8 responding;
816 struct hba_port *port;
817 struct _sas_phy *phy;
818 struct list_head sas_port_list;
819 struct sas_rphy *rphy;
820 };
821
822 /**
823 * struct _enclosure_node - enclosure information
824 * @list: list of enclosures
825 * @pg0: enclosure pg0;
826 */
827 struct _enclosure_node {
828 struct list_head list;
829 Mpi2SasEnclosurePage0_t pg0;
830 };
831
832 /**
833 * enum reset_type - reset state
834 * @FORCE_BIG_HAMMER: issue diagnostic reset
835 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
836 */
837 enum reset_type {
838 FORCE_BIG_HAMMER,
839 SOFT_RESET,
840 };
841
842 /**
843 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
844 * @pcie_sgl: PCIe native SGL for NVMe devices
845 * @pcie_sgl_dma: physical address
846 */
847 struct pcie_sg_list {
848 void *pcie_sgl;
849 dma_addr_t pcie_sgl_dma;
850 };
851
852 /**
853 * struct chain_tracker - firmware chain tracker
854 * @chain_buffer: chain buffer
855 * @chain_buffer_dma: physical address
856 * @tracker_list: list of free request (ioc->free_chain_list)
857 */
858 struct chain_tracker {
859 void *chain_buffer;
860 dma_addr_t chain_buffer_dma;
861 };
862
863 struct chain_lookup {
864 struct chain_tracker *chains_per_smid;
865 atomic_t chain_offset;
866 };
867
868 /**
869 * struct scsiio_tracker - scsi mf request tracker
870 * @smid: system message id
871 * @cb_idx: callback index
872 * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
873 * @chain_list: list of associated firmware chain tracker
874 * @msix_io: IO's msix
875 */
876 struct scsiio_tracker {
877 u16 smid;
878 struct scsi_cmnd *scmd;
879 u8 cb_idx;
880 u8 direct_io;
881 struct pcie_sg_list pcie_sg_list;
882 struct list_head chain_list;
883 u16 msix_io;
884 };
885
886 /**
887 * struct request_tracker - firmware request tracker
888 * @smid: system message id
889 * @cb_idx: callback index
890 * @tracker_list: list of free request (ioc->free_list)
891 */
892 struct request_tracker {
893 u16 smid;
894 u8 cb_idx;
895 struct list_head tracker_list;
896 };
897
898 /**
899 * struct _tr_list - target reset list
900 * @handle: device handle
901 * @state: state machine
902 */
903 struct _tr_list {
904 struct list_head list;
905 u16 handle;
906 u16 state;
907 };
908
909 /**
910 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
911 * @handle: device handle
912 */
913 struct _sc_list {
914 struct list_head list;
915 u16 handle;
916 };
917
918 /**
919 * struct _event_ack_list - delayed event acknowledgment list
920 * @Event: Event ID
921 * @EventContext: used to track the event uniquely
922 */
923 struct _event_ack_list {
924 struct list_head list;
925 U16 Event;
926 U32 EventContext;
927 };
928
929 /**
930 * struct adapter_reply_queue - the reply queue struct
931 * @ioc: per adapter object
932 * @msix_index: msix index into vector table
933 * @vector: irq vector
934 * @reply_post_host_index: head index in the pool where FW completes IO
935 * @reply_post_free: reply post base virt address
936 * @name: the name registered to request_irq()
937 * @busy: isr is actively processing replies on another cpu
938 * @os_irq: irq number
939 * @irqpoll: irq_poll object
940 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
941 * @is_iouring_poll_q: Tells whether reply queues is assigned
942 * to io uring poll queues or not
943 * @list: this list
944 */
945 struct adapter_reply_queue {
946 struct MPT3SAS_ADAPTER *ioc;
947 u8 msix_index;
948 u32 reply_post_host_index;
949 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
950 char name[MPT_NAME_LENGTH];
951 atomic_t busy;
952 u32 os_irq;
953 struct irq_poll irqpoll;
954 bool irq_poll_scheduled;
955 bool irq_line_enable;
956 bool is_iouring_poll_q;
957 struct list_head list;
958 };
959
960 /**
961 * struct io_uring_poll_queue - the io uring poll queue structure
962 * @busy: Tells whether io uring poll queue is busy or not
963 * @pause: Tells whether IOs are paused on io uring poll queue or not
964 * @reply_q: reply queue mapped for io uring poll queue
965 */
966 struct io_uring_poll_queue {
967 atomic_t busy;
968 atomic_t pause;
969 struct adapter_reply_queue *reply_q;
970 };
971
972 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
973
974 /* SAS3.0 support */
975 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
976 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
977 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
978 dma_addr_t data_out_dma, size_t data_out_sz,
979 dma_addr_t data_in_dma, size_t data_in_sz);
980 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
981 void *paddr);
982
983 /* SAS3.5 support */
984 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
985 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
986 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
987 size_t data_in_sz);
988
989 /* To support atomic and non atomic descriptors*/
990 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
991 u16 funcdep);
992 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
993 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
994 /*
995 * To get high iops reply queue's msix index when high iops mode is enabled
996 * else get the msix index of general reply queues.
997 */
998 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
999 struct scsi_cmnd *scmd);
1000
1001 /* IOC Facts and Port Facts converted from little endian to cpu */
1002 union mpi3_version_union {
1003 MPI2_VERSION_STRUCT Struct;
1004 u32 Word;
1005 };
1006
1007 struct mpt3sas_facts {
1008 u16 MsgVersion;
1009 u16 HeaderVersion;
1010 u8 IOCNumber;
1011 u8 VP_ID;
1012 u8 VF_ID;
1013 u16 IOCExceptions;
1014 u16 IOCStatus;
1015 u32 IOCLogInfo;
1016 u8 MaxChainDepth;
1017 u8 WhoInit;
1018 u8 NumberOfPorts;
1019 u8 MaxMSIxVectors;
1020 u16 RequestCredit;
1021 u16 ProductID;
1022 u32 IOCCapabilities;
1023 union mpi3_version_union FWVersion;
1024 u16 IOCRequestFrameSize;
1025 u16 IOCMaxChainSegmentSize;
1026 u16 MaxInitiators;
1027 u16 MaxTargets;
1028 u16 MaxSasExpanders;
1029 u16 MaxEnclosures;
1030 u16 ProtocolFlags;
1031 u16 HighPriorityCredit;
1032 u16 MaxReplyDescriptorPostQueueDepth;
1033 u8 ReplyFrameSize;
1034 u8 MaxVolumes;
1035 u16 MaxDevHandle;
1036 u16 MaxPersistentEntries;
1037 u16 MinDevHandle;
1038 u8 CurrentHostPageSize;
1039 };
1040
1041 struct mpt3sas_port_facts {
1042 u8 PortNumber;
1043 u8 VP_ID;
1044 u8 VF_ID;
1045 u8 PortType;
1046 u16 MaxPostedCmdBuffers;
1047 };
1048
1049 struct reply_post_struct {
1050 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
1051 dma_addr_t reply_post_free_dma;
1052 };
1053
1054 /**
1055 * struct virtual_phy - vSES phy structure
1056 * sas_address: SAS Address of vSES device
1057 * phy_mask: vSES device's phy number
1058 * flags: flags used to manage this structure
1059 */
1060 struct virtual_phy {
1061 struct list_head list;
1062 u64 sas_address;
1063 u32 phy_mask;
1064 u8 flags;
1065 };
1066
1067 #define MPT_VPHY_FLAG_DIRTY_PHY 0x01
1068
1069 /**
1070 * struct hba_port - Saves each HBA's Wide/Narrow port info
1071 * @sas_address: sas address of this wide/narrow port's attached device
1072 * @phy_mask: HBA PHY's belonging to this port
1073 * @port_id: port number
1074 * @flags: hba port flags
1075 * @vphys_mask : mask of vSES devices Phy number
1076 * @vphys_list : list containing vSES device structures
1077 */
1078 struct hba_port {
1079 struct list_head list;
1080 u64 sas_address;
1081 u32 phy_mask;
1082 u8 port_id;
1083 u8 flags;
1084 u32 vphys_mask;
1085 struct list_head vphys_list;
1086 };
1087
1088 /* hba port flags */
1089 #define HBA_PORT_FLAG_DIRTY_PORT 0x01
1090 #define HBA_PORT_FLAG_NEW_PORT 0x02
1091
1092 #define MULTIPATH_DISABLED_PORT_ID 0xFF
1093
1094 /**
1095 * struct htb_rel_query - diagnostic buffer release reason
1096 * @unique_id - unique id associated with this buffer.
1097 * @buffer_rel_condition - Release condition ioctl/sysfs/reset
1098 * @reserved
1099 * @trigger_type - Master/Event/scsi/MPI
1100 * @trigger_info_dwords - Data Correspondig to trigger type
1101 */
1102 struct htb_rel_query {
1103 u16 buffer_rel_condition;
1104 u16 reserved;
1105 u32 trigger_type;
1106 u32 trigger_info_dwords[2];
1107 };
1108
1109 /* Buffer_rel_condition bit fields */
1110
1111 /* Bit 0 - Diag Buffer not Released */
1112 #define MPT3_DIAG_BUFFER_NOT_RELEASED (0x00)
1113 /* Bit 0 - Diag Buffer Released */
1114 #define MPT3_DIAG_BUFFER_RELEASED (0x01)
1115
1116 /*
1117 * Bit 1 - Diag Buffer Released by IOCTL,
1118 * This bit is valid only if Bit 0 is one
1119 */
1120 #define MPT3_DIAG_BUFFER_REL_IOCTL (0x02 | MPT3_DIAG_BUFFER_RELEASED)
1121
1122 /*
1123 * Bit 2 - Diag Buffer Released by Trigger,
1124 * This bit is valid only if Bit 0 is one
1125 */
1126 #define MPT3_DIAG_BUFFER_REL_TRIGGER (0x04 | MPT3_DIAG_BUFFER_RELEASED)
1127
1128 /*
1129 * Bit 3 - Diag Buffer Released by SysFs,
1130 * This bit is valid only if Bit 0 is one
1131 */
1132 #define MPT3_DIAG_BUFFER_REL_SYSFS (0x08 | MPT3_DIAG_BUFFER_RELEASED)
1133
1134 /* DIAG RESET Master trigger flags */
1135 #define MPT_DIAG_RESET_ISSUED_BY_DRIVER 0x00000000
1136 #define MPT_DIAG_RESET_ISSUED_BY_USER 0x00000001
1137
1138 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
1139 /**
1140 * struct MPT3SAS_ADAPTER - per adapter struct
1141 * @list: ioc_list
1142 * @shost: shost object
1143 * @id: unique adapter id
1144 * @cpu_count: number online cpus
1145 * @name: generic ioc string
1146 * @tmp_string: tmp string used for logging
1147 * @pdev: pci pdev object
1148 * @pio_chip: physical io register space
1149 * @chip: memory mapped register space
1150 * @chip_phys: physical addrss prior to mapping
1151 * @logging_level: see mpt3sas_debug.h
1152 * @fwfault_debug: debuging FW timeouts
1153 * @ir_firmware: IR firmware present
1154 * @bars: bitmask of BAR's that must be configured
1155 * @mask_interrupts: ignore interrupt
1156 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1157 * pci resource handling
1158 * @fault_reset_work_q_name: fw fault work queue
1159 * @fault_reset_work_q: ""
1160 * @fault_reset_work: ""
1161 * @firmware_event_name: fw event work queue
1162 * @firmware_event_thread: ""
1163 * @fw_event_lock:
1164 * @fw_event_list: list of fw events
1165 * @current_evet: current processing firmware event
1166 * @fw_event_cleanup: set to one while cleaning up the fw events
1167 * @aen_event_read_flag: event log was read
1168 * @broadcast_aen_busy: broadcast aen waiting to be serviced
1169 * @shost_recovery: host reset in progress
1170 * @ioc_reset_in_progress_lock:
1171 * @ioc_link_reset_in_progress: phy/hard reset in progress
1172 * @ignore_loginfos: ignore loginfos during task management
1173 * @remove_host: flag for when driver unloads, to avoid sending dev resets
1174 * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1175 * @wait_for_discovery_to_complete: flag set at driver load time when
1176 * waiting on reporting devices
1177 * @is_driver_loading: flag set at driver load time
1178 * @port_enable_failed: flag set when port enable has failed
1179 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1180 * @start_scan_failed: means port enable failed, return's the ioc_status
1181 * @msix_enable: flag indicating msix is enabled
1182 * @msix_vector_count: number msix vectors
1183 * @cpu_msix_table: table for mapping cpus to msix index
1184 * @cpu_msix_table_sz: table size
1185 * @total_io_cnt: Gives total IO count, used to load balance the interrupts
1186 * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state
1187 * @timestamp_update_count: Counter to fire timeSync command
1188 * time_sync_interval: Time sync interval read from man page 11
1189 * @high_iops_outstanding: used to load balance the interrupts
1190 * within high iops reply queues
1191 * @msix_load_balance: Enables load balancing of interrupts across
1192 * the multiple MSIXs
1193 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1194 * @thresh_hold: Max number of reply descriptors processed
1195 * before updating Host Index
1196 * @iopoll_q_start_index: starting index of io uring poll queues
1197 * in reply queue list
1198 * @drv_internal_flags: Bit map internal to driver
1199 * @drv_support_bitmap: driver's supported feature bit map
1200 * @use_32bit_dma: Flag to use 32 bit consistent dma mask
1201 * @scsi_io_cb_idx: shost generated commands
1202 * @tm_cb_idx: task management commands
1203 * @scsih_cb_idx: scsih internal commands
1204 * @transport_cb_idx: transport internal commands
1205 * @ctl_cb_idx: clt internal commands
1206 * @base_cb_idx: base internal commands
1207 * @config_cb_idx: base internal commands
1208 * @tm_tr_cb_idx : device removal target reset handshake
1209 * @tm_tr_volume_cb_idx : volume removal target reset
1210 * @base_cmds:
1211 * @transport_cmds:
1212 * @scsih_cmds:
1213 * @tm_cmds:
1214 * @ctl_cmds:
1215 * @config_cmds:
1216 * @base_add_sg_single: handler for either 32/64 bit sgl's
1217 * @event_type: bits indicating which events to log
1218 * @event_context: unique id for each logged event
1219 * @event_log: event log pointer
1220 * @event_masks: events that are masked
1221 * @max_shutdown_latency: timeout value for NVMe shutdown operation,
1222 * which is equal that NVMe drive's RTD3 Entry Latency
1223 * which has reported maximum RTD3 Entry Latency value
1224 * among attached NVMe drives.
1225 * @facts: static facts data
1226 * @prev_fw_facts: previous fw facts data
1227 * @pfacts: static port facts data
1228 * @manu_pg0: static manufacturing page 0
1229 * @manu_pg10: static manufacturing page 10
1230 * @manu_pg11: static manufacturing page 11
1231 * @bios_pg2: static bios page 2
1232 * @bios_pg3: static bios page 3
1233 * @ioc_pg8: static ioc page 8
1234 * @iounit_pg0: static iounit page 0
1235 * @iounit_pg1: static iounit page 1
1236 * @iounit_pg8: static iounit page 8
1237 * @sas_hba: sas host object
1238 * @sas_expander_list: expander object list
1239 * @enclosure_list: enclosure object list
1240 * @sas_node_lock:
1241 * @sas_device_list: sas device object list
1242 * @sas_device_init_list: sas device object list (used only at init time)
1243 * @sas_device_lock:
1244 * @pcie_device_list: pcie device object list
1245 * @pcie_device_init_list: pcie device object list (used only at init time)
1246 * @pcie_device_lock:
1247 * @io_missing_delay: time for IO completed by fw when PDR enabled
1248 * @device_missing_delay: time for device missing by fw when PDR enabled
1249 * @sas_id : used for setting volume target IDs
1250 * @pcie_target_id: used for setting pcie target IDs
1251 * @blocking_handles: bitmask used to identify which devices need blocking
1252 * @pd_handles : bitmask for PD handles
1253 * @pd_handles_sz : size of pd_handle bitmask
1254 * @config_page_sz: config page size
1255 * @config_page: reserve memory for config page payload
1256 * @config_page_dma:
1257 * @hba_queue_depth: hba request queue depth
1258 * @sge_size: sg element size for either 32/64 bit
1259 * @scsiio_depth: SCSI_IO queue depth
1260 * @request_sz: per request frame size
1261 * @request: pool of request frames
1262 * @request_dma:
1263 * @request_dma_sz:
1264 * @scsi_lookup: firmware request tracker list
1265 * @scsi_lookup_lock:
1266 * @free_list: free list of request
1267 * @pending_io_count:
1268 * @reset_wq:
1269 * @chain: pool of chains
1270 * @chain_dma:
1271 * @max_sges_in_main_message: number sg elements in main message
1272 * @max_sges_in_chain_message: number sg elements per chain
1273 * @chains_needed_per_io: max chains per io
1274 * @chain_depth: total chains allocated
1275 * @chain_segment_sz: gives the max number of
1276 * SGEs accommodate on single chain buffer
1277 * @hi_priority_smid:
1278 * @hi_priority:
1279 * @hi_priority_dma:
1280 * @hi_priority_depth:
1281 * @hpr_lookup:
1282 * @hpr_free_list:
1283 * @internal_smid:
1284 * @internal:
1285 * @internal_dma:
1286 * @internal_depth:
1287 * @internal_lookup:
1288 * @internal_free_list:
1289 * @sense: pool of sense
1290 * @sense_dma:
1291 * @sense_dma_pool:
1292 * @reply_depth: hba reply queue depth:
1293 * @reply_sz: per reply frame size:
1294 * @reply: pool of replys:
1295 * @reply_dma:
1296 * @reply_dma_pool:
1297 * @reply_free_queue_depth: reply free depth
1298 * @reply_free: pool for reply free queue (32 bit addr)
1299 * @reply_free_dma:
1300 * @reply_free_dma_pool:
1301 * @reply_free_host_index: tail index in pool to insert free replys
1302 * @reply_post_queue_depth: reply post queue depth
1303 * @reply_post_struct: struct for reply_post_free physical & virt address
1304 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1305 * @rdpq_array_enable: rdpq_array support is enabled in the driver
1306 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1307 * is assigned only ones
1308 * @reply_queue_count: number of reply queue's
1309 * @reply_queue_list: link list contaning the reply queue info
1310 * @msix96_vector: 96 MSI-X vector support
1311 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1312 * @delayed_tr_list: target reset link list
1313 * @delayed_tr_volume_list: volume target reset link list
1314 * @delayed_sc_list:
1315 * @delayed_event_ack_list:
1316 * @temp_sensors_count: flag to carry the number of temperature sensors
1317 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1318 * pci resource handling. PCI resource freeing will lead to free
1319 * vital hardware/memory resource, which might be in use by cli/sysfs
1320 * path functions resulting in Null pointer reference followed by kernel
1321 * crash. To avoid the above race condition we use mutex syncrhonization
1322 * which ensures the syncrhonization between cli/sysfs_show path.
1323 * @atomic_desc_capable: Atomic Request Descriptor support.
1324 * @GET_MSIX_INDEX: Get the msix index of high iops queues.
1325 * @multipath_on_hba: flag to determine multipath on hba is enabled or not
1326 * @port_table_list: list containing HBA's wide/narrow port's info
1327 */
1328 struct MPT3SAS_ADAPTER {
1329 struct list_head list;
1330 struct Scsi_Host *shost;
1331 u8 id;
1332 int cpu_count;
1333 char name[MPT_NAME_LENGTH];
1334 char driver_name[MPT_NAME_LENGTH - 8];
1335 char tmp_string[MPT_STRING_LENGTH];
1336 struct pci_dev *pdev;
1337 Mpi2SystemInterfaceRegs_t __iomem *chip;
1338 phys_addr_t chip_phys;
1339 int logging_level;
1340 int fwfault_debug;
1341 u8 ir_firmware;
1342 int bars;
1343 u8 mask_interrupts;
1344
1345 /* fw fault handler */
1346 char fault_reset_work_q_name[20];
1347 struct workqueue_struct *fault_reset_work_q;
1348 struct delayed_work fault_reset_work;
1349
1350 /* fw event handler */
1351 char firmware_event_name[20];
1352 struct workqueue_struct *firmware_event_thread;
1353 spinlock_t fw_event_lock;
1354 struct list_head fw_event_list;
1355 struct fw_event_work *current_event;
1356 u8 fw_events_cleanup;
1357
1358 /* misc flags */
1359 int aen_event_read_flag;
1360 u8 broadcast_aen_busy;
1361 u16 broadcast_aen_pending;
1362 u8 shost_recovery;
1363 u8 got_task_abort_from_ioctl;
1364
1365 struct mutex reset_in_progress_mutex;
1366 spinlock_t ioc_reset_in_progress_lock;
1367 u8 ioc_link_reset_in_progress;
1368
1369 u8 ignore_loginfos;
1370 u8 remove_host;
1371 u8 pci_error_recovery;
1372 u8 wait_for_discovery_to_complete;
1373 u8 is_driver_loading;
1374 u8 port_enable_failed;
1375 u8 start_scan;
1376 u16 start_scan_failed;
1377
1378 u8 msix_enable;
1379 u16 msix_vector_count;
1380 u8 *cpu_msix_table;
1381 u16 cpu_msix_table_sz;
1382 resource_size_t __iomem **reply_post_host_index;
1383 u32 ioc_reset_count;
1384 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1385 u32 non_operational_loop;
1386 u8 ioc_coredump_loop;
1387 u32 timestamp_update_count;
1388 u32 time_sync_interval;
1389 atomic64_t total_io_cnt;
1390 atomic64_t high_iops_outstanding;
1391 bool msix_load_balance;
1392 u16 thresh_hold;
1393 u8 high_iops_queues;
1394 u8 iopoll_q_start_index;
1395 u32 drv_internal_flags;
1396 u32 drv_support_bitmap;
1397 u32 dma_mask;
1398 bool enable_sdev_max_qd;
1399 bool use_32bit_dma;
1400 struct io_uring_poll_queue *io_uring_poll_queues;
1401
1402 /* internal commands, callback index */
1403 u8 scsi_io_cb_idx;
1404 u8 tm_cb_idx;
1405 u8 transport_cb_idx;
1406 u8 scsih_cb_idx;
1407 u8 ctl_cb_idx;
1408 u8 base_cb_idx;
1409 u8 port_enable_cb_idx;
1410 u8 config_cb_idx;
1411 u8 tm_tr_cb_idx;
1412 u8 tm_tr_volume_cb_idx;
1413 u8 tm_sas_control_cb_idx;
1414 struct _internal_cmd base_cmds;
1415 struct _internal_cmd port_enable_cmds;
1416 struct _internal_cmd transport_cmds;
1417 struct _internal_cmd scsih_cmds;
1418 struct _internal_cmd tm_cmds;
1419 struct _internal_cmd ctl_cmds;
1420 struct _internal_cmd config_cmds;
1421
1422 MPT_ADD_SGE base_add_sg_single;
1423
1424 /* function ptr for either IEEE or MPI sg elements */
1425 MPT_BUILD_SG_SCMD build_sg_scmd;
1426 MPT_BUILD_SG build_sg;
1427 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1428 u16 sge_size_ieee;
1429 u16 hba_mpi_version_belonged;
1430
1431 /* function ptr for MPI sg elements only */
1432 MPT_BUILD_SG build_sg_mpi;
1433 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1434
1435 /* function ptr for NVMe PRP elements only */
1436 NVME_BUILD_PRP build_nvme_prp;
1437
1438 /* event log */
1439 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1440 u32 event_context;
1441 void *event_log;
1442 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1443
1444 u8 tm_custom_handling;
1445 u8 nvme_abort_timeout;
1446 u16 max_shutdown_latency;
1447 u16 max_wideport_qd;
1448 u16 max_narrowport_qd;
1449 u16 max_nvme_qd;
1450 u8 max_sata_qd;
1451
1452 /* static config pages */
1453 struct mpt3sas_facts facts;
1454 struct mpt3sas_facts prev_fw_facts;
1455 struct mpt3sas_port_facts *pfacts;
1456 Mpi2ManufacturingPage0_t manu_pg0;
1457 struct Mpi2ManufacturingPage10_t manu_pg10;
1458 struct Mpi2ManufacturingPage11_t manu_pg11;
1459 Mpi2BiosPage2_t bios_pg2;
1460 Mpi2BiosPage3_t bios_pg3;
1461 Mpi2IOCPage8_t ioc_pg8;
1462 Mpi2IOUnitPage0_t iounit_pg0;
1463 Mpi2IOUnitPage1_t iounit_pg1;
1464 Mpi2IOUnitPage8_t iounit_pg8;
1465 Mpi2IOCPage1_t ioc_pg1_copy;
1466
1467 struct _boot_device req_boot_device;
1468 struct _boot_device req_alt_boot_device;
1469 struct _boot_device current_boot_device;
1470
1471 /* sas hba, expander, and device list */
1472 struct _sas_node sas_hba;
1473 struct list_head sas_expander_list;
1474 struct list_head enclosure_list;
1475 spinlock_t sas_node_lock;
1476 struct list_head sas_device_list;
1477 struct list_head sas_device_init_list;
1478 spinlock_t sas_device_lock;
1479 struct list_head pcie_device_list;
1480 struct list_head pcie_device_init_list;
1481 spinlock_t pcie_device_lock;
1482
1483 struct list_head raid_device_list;
1484 spinlock_t raid_device_lock;
1485 u8 io_missing_delay;
1486 u16 device_missing_delay;
1487 int sas_id;
1488 int pcie_target_id;
1489
1490 void *blocking_handles;
1491 void *pd_handles;
1492 u16 pd_handles_sz;
1493
1494 void *pend_os_device_add;
1495 u16 pend_os_device_add_sz;
1496
1497 /* config page */
1498 u16 config_page_sz;
1499 void *config_page;
1500 dma_addr_t config_page_dma;
1501 void *config_vaddr;
1502
1503 /* scsiio request */
1504 u16 hba_queue_depth;
1505 u16 sge_size;
1506 u16 scsiio_depth;
1507 u16 request_sz;
1508 u8 *request;
1509 dma_addr_t request_dma;
1510 u32 request_dma_sz;
1511 struct pcie_sg_list *pcie_sg_lookup;
1512 spinlock_t scsi_lookup_lock;
1513 int pending_io_count;
1514 wait_queue_head_t reset_wq;
1515 u16 *io_queue_num;
1516
1517 /* PCIe SGL */
1518 struct dma_pool *pcie_sgl_dma_pool;
1519 /* Host Page Size */
1520 u32 page_size;
1521
1522 /* chain */
1523 struct chain_lookup *chain_lookup;
1524 struct list_head free_chain_list;
1525 struct dma_pool *chain_dma_pool;
1526 ulong chain_pages;
1527 u16 max_sges_in_main_message;
1528 u16 max_sges_in_chain_message;
1529 u16 chains_needed_per_io;
1530 u32 chain_depth;
1531 u16 chain_segment_sz;
1532 u16 chains_per_prp_buffer;
1533
1534 /* hi-priority queue */
1535 u16 hi_priority_smid;
1536 u8 *hi_priority;
1537 dma_addr_t hi_priority_dma;
1538 u16 hi_priority_depth;
1539 struct request_tracker *hpr_lookup;
1540 struct list_head hpr_free_list;
1541
1542 /* internal queue */
1543 u16 internal_smid;
1544 u8 *internal;
1545 dma_addr_t internal_dma;
1546 u16 internal_depth;
1547 struct request_tracker *internal_lookup;
1548 struct list_head internal_free_list;
1549
1550 /* sense */
1551 u8 *sense;
1552 dma_addr_t sense_dma;
1553 struct dma_pool *sense_dma_pool;
1554
1555 /* reply */
1556 u16 reply_sz;
1557 u8 *reply;
1558 dma_addr_t reply_dma;
1559 u32 reply_dma_max_address;
1560 u32 reply_dma_min_address;
1561 struct dma_pool *reply_dma_pool;
1562
1563 /* reply free queue */
1564 u16 reply_free_queue_depth;
1565 __le32 *reply_free;
1566 dma_addr_t reply_free_dma;
1567 struct dma_pool *reply_free_dma_pool;
1568 u32 reply_free_host_index;
1569
1570 /* reply post queue */
1571 u16 reply_post_queue_depth;
1572 struct reply_post_struct *reply_post;
1573 u8 rdpq_array_capable;
1574 u8 rdpq_array_enable;
1575 u8 rdpq_array_enable_assigned;
1576 struct dma_pool *reply_post_free_dma_pool;
1577 struct dma_pool *reply_post_free_array_dma_pool;
1578 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1579 dma_addr_t reply_post_free_array_dma;
1580 u8 reply_queue_count;
1581 struct list_head reply_queue_list;
1582
1583 u8 combined_reply_queue;
1584 u8 combined_reply_index_count;
1585 u8 smp_affinity_enable;
1586 /* reply post register index */
1587 resource_size_t **replyPostRegisterIndex;
1588
1589 struct list_head delayed_tr_list;
1590 struct list_head delayed_tr_volume_list;
1591 struct list_head delayed_sc_list;
1592 struct list_head delayed_event_ack_list;
1593 u8 temp_sensors_count;
1594 struct mutex pci_access_mutex;
1595
1596 /* diag buffer support */
1597 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1598 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1599 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1600 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1601 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1602 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1603 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1604 u32 ring_buffer_offset;
1605 u32 ring_buffer_sz;
1606 struct htb_rel_query htb_rel;
1607 u8 reset_from_user;
1608 u8 is_warpdrive;
1609 u8 is_mcpu_endpoint;
1610 u8 hide_ir_msg;
1611 u8 mfg_pg10_hide_flag;
1612 u8 hide_drives;
1613 spinlock_t diag_trigger_lock;
1614 u8 diag_trigger_active;
1615 u8 atomic_desc_capable;
1616 BASE_READ_REG base_readl;
1617 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1618 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1619 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1620 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1621 u8 supports_trigger_pages;
1622 void *device_remove_in_progress;
1623 u16 device_remove_in_progress_sz;
1624 u8 is_gen35_ioc;
1625 u8 is_aero_ioc;
1626 struct dentry *debugfs_root;
1627 struct dentry *ioc_dump;
1628 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1629 PUT_SMID_IO_FP_HIP put_smid_fast_path;
1630 PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1631 PUT_SMID_DEFAULT put_smid_default;
1632 GET_MSIX_INDEX get_msix_index_for_smlio;
1633
1634 u8 multipath_on_hba;
1635 struct list_head port_table_list;
1636 };
1637
1638 struct mpt3sas_debugfs_buffer {
1639 void *buf;
1640 u32 len;
1641 };
1642
1643 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1644 #define MPT_DRV_SUPPORT_BITMAP_ADDNLQUERY 0x00000002
1645
1646 #define MPT_DRV_INTERNAL_FIRST_PE_ISSUED 0x00000001
1647
1648 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1649 u32 reply);
1650
1651
1652 /* base shared API */
1653 extern struct list_head mpt3sas_ioc_list;
1654 extern char driver_name[MPT_NAME_LENGTH];
1655 /* spinlock on list operations over IOCs
1656 * Case: when multiple warpdrive cards(IOCs) are in use
1657 * Each IOC will added to the ioc list structure on initialization.
1658 * Watchdog threads run at regular intervals to check IOC for any
1659 * fault conditions which will trigger the dead_ioc thread to
1660 * deallocate pci resource, resulting deleting the IOC netry from list,
1661 * this deletion need to protected by spinlock to enusre that
1662 * ioc removal is syncrhonized, if not synchronized it might lead to
1663 * list_del corruption as the ioc list is traversed in cli path.
1664 */
1665 extern spinlock_t gioc_lock;
1666
1667 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1668 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1669
1670 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1671 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1672 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1673 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1674 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1675 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1676 enum reset_type type);
1677
1678 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1679 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1680 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1681 u16 smid);
1682 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1683 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1684 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll);
1685 void mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1686 void mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1687
1688 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1689 u16 handle);
1690 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1691 u16 msix_task);
1692 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1693 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1694 /* hi-priority queue */
1695 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1696 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1697 struct scsi_cmnd *scmd);
1698 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1699 struct scsiio_tracker *st);
1700
1701 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1702 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1703 void mpt3sas_base_initialize_callback_handler(void);
1704 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1705 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1706
1707 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1708 u32 reply);
1709 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1710 u8 msix_index, u32 reply);
1711 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1712 u32 phys_addr);
1713
1714 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1715
1716 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1717 #define mpt3sas_print_fault_code(ioc, fault_code) \
1718 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1719 mpt3sas_base_fault_info(ioc, fault_code); } while (0)
1720
1721 void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code);
1722 #define mpt3sas_print_coredump_info(ioc, fault_code) \
1723 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1724 mpt3sas_base_coredump_info(ioc, fault_code); } while (0)
1725
1726 int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc,
1727 const char *caller);
1728 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1729 Mpi2SasIoUnitControlReply_t *mpi_reply,
1730 Mpi2SasIoUnitControlRequest_t *mpi_request);
1731 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1732 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1733
1734 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1735 u32 *event_type);
1736
1737 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1738
1739 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1740 u16 device_missing_delay, u8 io_missing_delay);
1741
1742 int mpt3sas_base_check_for_fault_and_issue_reset(
1743 struct MPT3SAS_ADAPTER *ioc);
1744
1745 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1746
1747 void
1748 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1749
1750 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1751 u8 status, void *mpi_request, int sz);
1752 #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \
1753 do { ioc_err(ioc, "In func: %s\n", __func__); \
1754 issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \
1755 status, mpi_request, sz); } while (0)
1756
1757 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1758 int mpt3sas_base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, enum reset_type type);
1759 void mpt3sas_base_free_irq(struct MPT3SAS_ADAPTER *ioc);
1760 void mpt3sas_base_disable_msix(struct MPT3SAS_ADAPTER *ioc);
1761 int mpt3sas_blk_mq_poll(struct Scsi_Host *shost, unsigned int queue_num);
1762 void mpt3sas_base_pause_mq_polling(struct MPT3SAS_ADAPTER *ioc);
1763 void mpt3sas_base_resume_mq_polling(struct MPT3SAS_ADAPTER *ioc);
1764
1765 /* scsih shared API */
1766 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1767 u16 smid);
1768 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1769 u32 reply);
1770 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1771 void mpt3sas_scsih_clear_outstanding_scsi_tm_commands(
1772 struct MPT3SAS_ADAPTER *ioc);
1773 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1774
1775 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1776 uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1777 u16 msix_task, u8 timeout, u8 tr_method);
1778 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1779 uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1780 u16 msix_task, u8 timeout, u8 tr_method);
1781
1782 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1783 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1784 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1785 struct hba_port *port);
1786 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1787 u64 sas_address, struct hba_port *port);
1788 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1789 u16 smid);
1790 struct hba_port *
1791 mpt3sas_get_port_by_id(struct MPT3SAS_ADAPTER *ioc, u8 port,
1792 u8 bypass_dirty_port_flag);
1793
1794 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1795 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1796 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1797 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1798 struct hba_port *port);
1799 struct _sas_device *mpt3sas_get_sdev_by_addr(
1800 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1801 struct hba_port *port);
1802 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1803 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1804 struct hba_port *port);
1805 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1806 u16 handle);
1807 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1808 u16 handle);
1809
1810 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1811 struct _raid_device *
1812 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1813 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
1814 struct _sas_device *
1815 __mpt3sas_get_sdev_by_rphy(struct MPT3SAS_ADAPTER *ioc, struct sas_rphy *rphy);
1816 struct virtual_phy *
1817 mpt3sas_get_vphy_by_phy(struct MPT3SAS_ADAPTER *ioc,
1818 struct hba_port *port, u32 phy);
1819
1820 /* config shared API */
1821 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1822 u32 reply);
1823 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1824 u8 *num_phys);
1825 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1826 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1827 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1828 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1829 u16 sz);
1830 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1831 Mpi2ConfigReply_t *mpi_reply,
1832 struct Mpi2ManufacturingPage10_t *config_page);
1833
1834 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1835 Mpi2ConfigReply_t *mpi_reply,
1836 struct Mpi2ManufacturingPage11_t *config_page);
1837 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1838 Mpi2ConfigReply_t *mpi_reply,
1839 struct Mpi2ManufacturingPage11_t *config_page);
1840
1841 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1842 *mpi_reply, Mpi2BiosPage2_t *config_page);
1843 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1844 *mpi_reply, Mpi2BiosPage3_t *config_page);
1845 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1846 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1847 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1848 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1849 u32 form, u32 handle);
1850 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1851 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1852 u32 form, u32 handle);
1853 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1854 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1855 u32 form, u32 handle);
1856 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1857 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1858 u32 form, u32 handle);
1859 int mpt3sas_config_get_pcie_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1860 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeIOUnitPage1_t *config_page,
1861 u16 sz);
1862 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1863 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1864 u16 sz);
1865 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1866 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1867 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1868 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1869 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1870 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1871 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1872 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1873 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1874 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1875 u16 sz);
1876 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1877 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1878 u16 sz);
1879 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1880 *mpi_reply, Mpi2IOCPage1_t *config_page);
1881 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1882 *mpi_reply, Mpi2IOCPage1_t *config_page);
1883 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1884 *mpi_reply, Mpi2IOCPage8_t *config_page);
1885 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1886 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1887 u32 form, u32 handle);
1888 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1889 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1890 u32 phy_number, u16 handle);
1891 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1892 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1893 u32 form, u32 handle);
1894 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1895 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1896 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1897 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1898 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1899 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1900 u32 handle);
1901 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1902 u8 *num_pds);
1903 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1904 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1905 u32 handle, u16 sz);
1906 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1907 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1908 u32 form, u32 form_specific);
1909 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1910 u16 *volume_handle);
1911 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1912 u16 volume_handle, u64 *wwid);
1913 int
1914 mpt3sas_config_get_driver_trigger_pg0(struct MPT3SAS_ADAPTER *ioc,
1915 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage0_t *config_page);
1916 int
1917 mpt3sas_config_get_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc,
1918 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage1_t *config_page);
1919 int
1920 mpt3sas_config_get_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
1921 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage2_t *config_page);
1922 int
1923 mpt3sas_config_get_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
1924 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage3_t *config_page);
1925 int
1926 mpt3sas_config_get_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
1927 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage4_t *config_page);
1928 int
1929 mpt3sas_config_update_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc,
1930 struct SL_WH_MASTER_TRIGGER_T *master_tg, bool set);
1931 int
1932 mpt3sas_config_update_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
1933 struct SL_WH_EVENT_TRIGGERS_T *event_tg, bool set);
1934 int
1935 mpt3sas_config_update_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
1936 struct SL_WH_SCSI_TRIGGERS_T *scsi_tg, bool set);
1937 int
1938 mpt3sas_config_update_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
1939 struct SL_WH_MPI_TRIGGERS_T *mpi_tg, bool set);
1940
1941 /* ctl shared API */
1942 extern struct device_attribute *mpt3sas_host_attrs[];
1943 extern struct device_attribute *mpt3sas_dev_attrs[];
1944 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1945 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1946 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1947 u32 reply);
1948 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1949 void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc);
1950 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1951 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1952 u8 msix_index, u32 reply);
1953 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1954 Mpi2EventNotificationReply_t *mpi_reply);
1955
1956 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1957 u8 bits_to_register);
1958 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1959 u8 *issue_reset);
1960
1961 /* transport shared API */
1962 extern struct scsi_transport_template *mpt3sas_transport_template;
1963 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1964 u32 reply);
1965 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1966 u16 handle, u64 sas_address, struct hba_port *port);
1967 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1968 u64 sas_address_parent, struct hba_port *port);
1969 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1970 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1971 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1972 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1973 struct device *parent_dev);
1974 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1975 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate,
1976 struct hba_port *port);
1977 extern struct sas_function_template mpt3sas_transport_functions;
1978 extern struct scsi_transport_template *mpt3sas_transport_template;
1979 void
1980 mpt3sas_transport_del_phy_from_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
1981 struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy);
1982 void
1983 mpt3sas_transport_add_phy_to_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
1984 struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy,
1985 u64 sas_address, struct hba_port *port);
1986 /* trigger data externs */
1987 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1988 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1989 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1990 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1991 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1992 u32 trigger_bitmask);
1993 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1994 u16 log_entry_qualifier);
1995 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1996 u8 asc, u8 ascq);
1997 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1998 u32 loginfo);
1999
2000 /* warpdrive APIs */
2001 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
2002 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
2003 struct _raid_device *raid_device);
2004 void
2005 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
2006 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
2007
2008 /* NCQ Prio Handling Check */
2009 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
2010
2011 void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc);
2012 void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc);
2013 void mpt3sas_init_debugfs(void);
2014 void mpt3sas_exit_debugfs(void);
2015
2016 /**
2017 * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
2018 * @device_info: bitfield providing information about the device.
2019 * Context: none
2020 *
2021 * Returns 1 if scsi device.
2022 */
2023 static inline int
mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)2024 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
2025 {
2026 if ((device_info &
2027 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
2028 return 1;
2029 else
2030 return 0;
2031 }
2032 #endif /* MPT3SAS_BASE_H_INCLUDED */
2033
