1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
3 
4 /*
5  * nfp_net.h
6  * Declarations for Netronome network device driver.
7  * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
8  *          Jason McMullan <jason.mcmullan@netronome.com>
9  *          Rolf Neugebauer <rolf.neugebauer@netronome.com>
10  */
11 
12 #ifndef _NFP_NET_H_
13 #define _NFP_NET_H_
14 
15 #include <linux/atomic.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/netdevice.h>
19 #include <linux/pci.h>
20 #include <linux/dim.h>
21 #include <linux/io-64-nonatomic-hi-lo.h>
22 #include <linux/semaphore.h>
23 #include <linux/workqueue.h>
24 #include <net/xdp.h>
25 
26 #include "nfp_net_ctrl.h"
27 
28 #define nn_pr(nn, lvl, fmt, args...)					\
29 	({								\
30 		struct nfp_net *__nn = (nn);				\
31 									\
32 		if (__nn->dp.netdev)					\
33 			netdev_printk(lvl, __nn->dp.netdev, fmt, ## args); \
34 		else							\
35 			dev_printk(lvl, __nn->dp.dev, "ctrl: " fmt, ## args); \
36 	})
37 
38 #define nn_err(nn, fmt, args...)	nn_pr(nn, KERN_ERR, fmt, ## args)
39 #define nn_warn(nn, fmt, args...)	nn_pr(nn, KERN_WARNING, fmt, ## args)
40 #define nn_info(nn, fmt, args...)	nn_pr(nn, KERN_INFO, fmt, ## args)
41 #define nn_dbg(nn, fmt, args...)	nn_pr(nn, KERN_DEBUG, fmt, ## args)
42 
43 #define nn_dp_warn(dp, fmt, args...)					\
44 	({								\
45 		struct nfp_net_dp *__dp = (dp);				\
46 									\
47 		if (unlikely(net_ratelimit())) {			\
48 			if (__dp->netdev)				\
49 				netdev_warn(__dp->netdev, fmt, ## args); \
50 			else						\
51 				dev_warn(__dp->dev, fmt, ## args);	\
52 		}							\
53 	})
54 
55 /* Max time to wait for NFP to respond on updates (in seconds) */
56 #define NFP_NET_POLL_TIMEOUT	5
57 
58 /* Interval for reading offloaded filter stats */
59 #define NFP_NET_STAT_POLL_IVL	msecs_to_jiffies(100)
60 
61 /* Bar allocation */
62 #define NFP_NET_CTRL_BAR	0
63 #define NFP_NET_Q0_BAR		2
64 #define NFP_NET_Q1_BAR		4	/* OBSOLETE */
65 
66 /* Max bits in DMA address */
67 #define NFP_NET_MAX_DMA_BITS	40
68 
69 /* Default size for MTU and freelist buffer sizes */
70 #define NFP_NET_DEFAULT_MTU		1500U
71 
72 /* Maximum number of bytes prepended to a packet */
73 #define NFP_NET_MAX_PREPEND		64
74 
75 /* Interrupt definitions */
76 #define NFP_NET_NON_Q_VECTORS		2
77 #define NFP_NET_IRQ_LSC_IDX		0
78 #define NFP_NET_IRQ_EXN_IDX		1
79 #define NFP_NET_MIN_VNIC_IRQS		(NFP_NET_NON_Q_VECTORS + 1)
80 
81 /* Queue/Ring definitions */
82 #define NFP_NET_MAX_TX_RINGS	64	/* Max. # of Tx rings per device */
83 #define NFP_NET_MAX_RX_RINGS	64	/* Max. # of Rx rings per device */
84 #define NFP_NET_MAX_R_VECS	(NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \
85 				 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS)
86 #define NFP_NET_MAX_IRQS	(NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS)
87 
88 #define NFP_NET_MIN_TX_DESCS	256	/* Min. # of Tx descs per ring */
89 #define NFP_NET_MIN_RX_DESCS	256	/* Min. # of Rx descs per ring */
90 #define NFP_NET_MAX_TX_DESCS	(256 * 1024) /* Max. # of Tx descs per ring */
91 #define NFP_NET_MAX_RX_DESCS	(256 * 1024) /* Max. # of Rx descs per ring */
92 
93 #define NFP_NET_TX_DESCS_DEFAULT 4096	/* Default # of Tx descs per ring */
94 #define NFP_NET_RX_DESCS_DEFAULT 4096	/* Default # of Rx descs per ring */
95 
96 #define NFP_NET_FL_BATCH	16	/* Add freelist in this Batch size */
97 #define NFP_NET_XDP_MAX_COMPLETE 2048	/* XDP bufs to reclaim in NAPI poll */
98 
99 /* Offload definitions */
100 #define NFP_NET_N_VXLAN_PORTS	(NFP_NET_CFG_VXLAN_SZ / sizeof(__be16))
101 
102 #define NFP_NET_RX_BUF_HEADROOM	(NET_SKB_PAD + NET_IP_ALIGN)
103 #define NFP_NET_RX_BUF_NON_DATA	(NFP_NET_RX_BUF_HEADROOM +		\
104 				 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
105 
106 /* Forward declarations */
107 struct nfp_cpp;
108 struct nfp_eth_table_port;
109 struct nfp_net;
110 struct nfp_net_r_vector;
111 struct nfp_port;
112 
113 /* Convenience macro for wrapping descriptor index on ring size */
114 #define D_IDX(ring, idx)	((idx) & ((ring)->cnt - 1))
115 
116 /* Convenience macro for writing dma address into RX/TX descriptors */
117 #define nfp_desc_set_dma_addr(desc, dma_addr)				\
118 	do {								\
119 		__typeof(desc) __d = (desc);				\
120 		dma_addr_t __addr = (dma_addr);				\
121 									\
122 		__d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr));	\
123 		__d->dma_addr_hi = upper_32_bits(__addr) & 0xff;	\
124 	} while (0)
125 
126 /* TX descriptor format */
127 
128 #define PCIE_DESC_TX_EOP		BIT(7)
129 #define PCIE_DESC_TX_OFFSET_MASK	GENMASK(6, 0)
130 #define PCIE_DESC_TX_MSS_MASK		GENMASK(13, 0)
131 
132 /* Flags in the host TX descriptor */
133 #define PCIE_DESC_TX_CSUM		BIT(7)
134 #define PCIE_DESC_TX_IP4_CSUM		BIT(6)
135 #define PCIE_DESC_TX_TCP_CSUM		BIT(5)
136 #define PCIE_DESC_TX_UDP_CSUM		BIT(4)
137 #define PCIE_DESC_TX_VLAN		BIT(3)
138 #define PCIE_DESC_TX_LSO		BIT(2)
139 #define PCIE_DESC_TX_ENCAP		BIT(1)
140 #define PCIE_DESC_TX_O_IP4_CSUM	BIT(0)
141 
142 struct nfp_net_tx_desc {
143 	union {
144 		struct {
145 			u8 dma_addr_hi; /* High bits of host buf address */
146 			__le16 dma_len;	/* Length to DMA for this desc */
147 			u8 offset_eop;	/* Offset in buf where pkt starts +
148 					 * highest bit is eop flag.
149 					 */
150 			__le32 dma_addr_lo; /* Low 32bit of host buf addr */
151 
152 			__le16 mss;	/* MSS to be used for LSO */
153 			u8 lso_hdrlen;	/* LSO, TCP payload offset */
154 			u8 flags;	/* TX Flags, see @PCIE_DESC_TX_* */
155 			union {
156 				struct {
157 					u8 l3_offset; /* L3 header offset */
158 					u8 l4_offset; /* L4 header offset */
159 				};
160 				__le16 vlan; /* VLAN tag to add if indicated */
161 			};
162 			__le16 data_len; /* Length of frame + meta data */
163 		} __packed;
164 		__le32 vals[4];
165 		__le64 vals8[2];
166 	};
167 };
168 
169 /**
170  * struct nfp_net_tx_buf - software TX buffer descriptor
171  * @skb:	normal ring, sk_buff associated with this buffer
172  * @frag:	XDP ring, page frag associated with this buffer
173  * @dma_addr:	DMA mapping address of the buffer
174  * @fidx:	Fragment index (-1 for the head and [0..nr_frags-1] for frags)
175  * @pkt_cnt:	Number of packets to be produced out of the skb associated
176  *		with this buffer (valid only on the head's buffer).
177  *		Will be 1 for all non-TSO packets.
178  * @real_len:	Number of bytes which to be produced out of the skb (valid only
179  *		on the head's buffer). Equal to skb->len for non-TSO packets.
180  */
181 struct nfp_net_tx_buf {
182 	union {
183 		struct sk_buff *skb;
184 		void *frag;
185 	};
186 	dma_addr_t dma_addr;
187 	short int fidx;
188 	u16 pkt_cnt;
189 	u32 real_len;
190 };
191 
192 /**
193  * struct nfp_net_tx_ring - TX ring structure
194  * @r_vec:      Back pointer to ring vector structure
195  * @idx:        Ring index from Linux's perspective
196  * @qcidx:      Queue Controller Peripheral (QCP) queue index for the TX queue
197  * @qcp_q:      Pointer to base of the QCP TX queue
198  * @cnt:        Size of the queue in number of descriptors
199  * @wr_p:       TX ring write pointer (free running)
200  * @rd_p:       TX ring read pointer (free running)
201  * @qcp_rd_p:   Local copy of QCP TX queue read pointer
202  * @wr_ptr_add:	Accumulated number of buffers to add to QCP write pointer
203  *		(used for .xmit_more delayed kick)
204  * @txbufs:     Array of transmitted TX buffers, to free on transmit
205  * @txds:       Virtual address of TX ring in host memory
206  * @dma:        DMA address of the TX ring
207  * @size:       Size, in bytes, of the TX ring (needed to free)
208  * @is_xdp:	Is this a XDP TX ring?
209  */
210 struct nfp_net_tx_ring {
211 	struct nfp_net_r_vector *r_vec;
212 
213 	u32 idx;
214 	int qcidx;
215 	u8 __iomem *qcp_q;
216 
217 	u32 cnt;
218 	u32 wr_p;
219 	u32 rd_p;
220 	u32 qcp_rd_p;
221 
222 	u32 wr_ptr_add;
223 
224 	struct nfp_net_tx_buf *txbufs;
225 	struct nfp_net_tx_desc *txds;
226 
227 	dma_addr_t dma;
228 	size_t size;
229 	bool is_xdp;
230 } ____cacheline_aligned;
231 
232 /* RX and freelist descriptor format */
233 
234 #define PCIE_DESC_RX_DD			BIT(7)
235 #define PCIE_DESC_RX_META_LEN_MASK	GENMASK(6, 0)
236 
237 /* Flags in the RX descriptor */
238 #define PCIE_DESC_RX_RSS		cpu_to_le16(BIT(15))
239 #define PCIE_DESC_RX_I_IP4_CSUM		cpu_to_le16(BIT(14))
240 #define PCIE_DESC_RX_I_IP4_CSUM_OK	cpu_to_le16(BIT(13))
241 #define PCIE_DESC_RX_I_TCP_CSUM		cpu_to_le16(BIT(12))
242 #define PCIE_DESC_RX_I_TCP_CSUM_OK	cpu_to_le16(BIT(11))
243 #define PCIE_DESC_RX_I_UDP_CSUM		cpu_to_le16(BIT(10))
244 #define PCIE_DESC_RX_I_UDP_CSUM_OK	cpu_to_le16(BIT(9))
245 #define PCIE_DESC_RX_DECRYPTED		cpu_to_le16(BIT(8))
246 #define PCIE_DESC_RX_EOP		cpu_to_le16(BIT(7))
247 #define PCIE_DESC_RX_IP4_CSUM		cpu_to_le16(BIT(6))
248 #define PCIE_DESC_RX_IP4_CSUM_OK	cpu_to_le16(BIT(5))
249 #define PCIE_DESC_RX_TCP_CSUM		cpu_to_le16(BIT(4))
250 #define PCIE_DESC_RX_TCP_CSUM_OK	cpu_to_le16(BIT(3))
251 #define PCIE_DESC_RX_UDP_CSUM		cpu_to_le16(BIT(2))
252 #define PCIE_DESC_RX_UDP_CSUM_OK	cpu_to_le16(BIT(1))
253 #define PCIE_DESC_RX_VLAN		cpu_to_le16(BIT(0))
254 
255 #define PCIE_DESC_RX_CSUM_ALL		(PCIE_DESC_RX_IP4_CSUM |	\
256 					 PCIE_DESC_RX_TCP_CSUM |	\
257 					 PCIE_DESC_RX_UDP_CSUM |	\
258 					 PCIE_DESC_RX_I_IP4_CSUM |	\
259 					 PCIE_DESC_RX_I_TCP_CSUM |	\
260 					 PCIE_DESC_RX_I_UDP_CSUM)
261 #define PCIE_DESC_RX_CSUM_OK_SHIFT	1
262 #define __PCIE_DESC_RX_CSUM_ALL		le16_to_cpu(PCIE_DESC_RX_CSUM_ALL)
263 #define __PCIE_DESC_RX_CSUM_ALL_OK	(__PCIE_DESC_RX_CSUM_ALL >>	\
264 					 PCIE_DESC_RX_CSUM_OK_SHIFT)
265 
266 struct nfp_net_rx_desc {
267 	union {
268 		struct {
269 			u8 dma_addr_hi;	/* High bits of the buf address */
270 			__le16 reserved; /* Must be zero */
271 			u8 meta_len_dd; /* Must be zero */
272 
273 			__le32 dma_addr_lo; /* Low bits of the buffer address */
274 		} __packed fld;
275 
276 		struct {
277 			__le16 data_len; /* Length of the frame + meta data */
278 			u8 reserved;
279 			u8 meta_len_dd;	/* Length of meta data prepended +
280 					 * descriptor done flag.
281 					 */
282 
283 			__le16 flags;	/* RX flags. See @PCIE_DESC_RX_* */
284 			__le16 vlan;	/* VLAN if stripped */
285 		} __packed rxd;
286 
287 		__le32 vals[2];
288 	};
289 };
290 
291 #define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0)
292 
293 struct nfp_meta_parsed {
294 	u8 hash_type;
295 	u8 csum_type;
296 	u32 hash;
297 	u32 mark;
298 	u32 portid;
299 	__wsum csum;
300 };
301 
302 struct nfp_net_rx_hash {
303 	__be32 hash_type;
304 	__be32 hash;
305 };
306 
307 /**
308  * struct nfp_net_rx_buf - software RX buffer descriptor
309  * @frag:	page fragment buffer
310  * @dma_addr:	DMA mapping address of the buffer
311  */
312 struct nfp_net_rx_buf {
313 	void *frag;
314 	dma_addr_t dma_addr;
315 };
316 
317 /**
318  * struct nfp_net_rx_ring - RX ring structure
319  * @r_vec:      Back pointer to ring vector structure
320  * @cnt:        Size of the queue in number of descriptors
321  * @wr_p:       FL/RX ring write pointer (free running)
322  * @rd_p:       FL/RX ring read pointer (free running)
323  * @idx:        Ring index from Linux's perspective
324  * @fl_qcidx:   Queue Controller Peripheral (QCP) queue index for the freelist
325  * @qcp_fl:     Pointer to base of the QCP freelist queue
326  * @rxbufs:     Array of transmitted FL/RX buffers
327  * @rxds:       Virtual address of FL/RX ring in host memory
328  * @xdp_rxq:    RX-ring info avail for XDP
329  * @dma:        DMA address of the FL/RX ring
330  * @size:       Size, in bytes, of the FL/RX ring (needed to free)
331  */
332 struct nfp_net_rx_ring {
333 	struct nfp_net_r_vector *r_vec;
334 
335 	u32 cnt;
336 	u32 wr_p;
337 	u32 rd_p;
338 
339 	u32 idx;
340 
341 	int fl_qcidx;
342 	u8 __iomem *qcp_fl;
343 
344 	struct nfp_net_rx_buf *rxbufs;
345 	struct nfp_net_rx_desc *rxds;
346 
347 	struct xdp_rxq_info xdp_rxq;
348 
349 	dma_addr_t dma;
350 	size_t size;
351 } ____cacheline_aligned;
352 
353 /**
354  * struct nfp_net_r_vector - Per ring interrupt vector configuration
355  * @nfp_net:        Backpointer to nfp_net structure
356  * @napi:           NAPI structure for this ring vec
357  * @tasklet:        ctrl vNIC, tasklet for servicing the r_vec
358  * @queue:          ctrl vNIC, send queue
359  * @lock:           ctrl vNIC, r_vec lock protects @queue
360  * @tx_ring:        Pointer to TX ring
361  * @rx_ring:        Pointer to RX ring
362  * @xdp_ring:	    Pointer to an extra TX ring for XDP
363  * @irq_entry:      MSI-X table entry (use for talking to the device)
364  * @event_ctr:	    Number of interrupt
365  * @rx_dim:	    Dynamic interrupt moderation structure for RX
366  * @tx_dim:	    Dynamic interrupt moderation structure for TX
367  * @rx_sync:	    Seqlock for atomic updates of RX stats
368  * @rx_pkts:        Number of received packets
369  * @rx_bytes:	    Number of received bytes
370  * @rx_drops:	    Number of packets dropped on RX due to lack of resources
371  * @hw_csum_rx_ok:  Counter of packets where the HW checksum was OK
372  * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
373  * @hw_csum_rx_complete: Counter of packets with CHECKSUM_COMPLETE reported
374  * @hw_csum_rx_error:	 Counter of packets with bad checksums
375  * @hw_tls_rx:	    Number of packets with TLS decrypted by hardware
376  * @tx_sync:	    Seqlock for atomic updates of TX stats
377  * @tx_pkts:	    Number of Transmitted packets
378  * @tx_bytes:	    Number of Transmitted bytes
379  * @hw_csum_tx:	    Counter of packets with TX checksum offload requested
380  * @hw_csum_tx_inner:	 Counter of inner TX checksum offload requests
381  * @tx_gather:	    Counter of packets with Gather DMA
382  * @tx_lso:	    Counter of LSO packets sent
383  * @hw_tls_tx:	    Counter of TLS packets sent with crypto offloaded to HW
384  * @tls_tx_fallback:	Counter of TLS packets sent which had to be encrypted
385  *			by the fallback path because packets came out of order
386  * @tls_tx_no_fallback:	Counter of TLS packets not sent because the fallback
387  *			path could not encrypt them
388  * @tx_errors:	    How many TX errors were encountered
389  * @tx_busy:        How often was TX busy (no space)?
390  * @rx_replace_buf_alloc_fail:	Counter of RX buffer allocation failures
391  * @irq_vector:     Interrupt vector number (use for talking to the OS)
392  * @handler:        Interrupt handler for this ring vector
393  * @name:           Name of the interrupt vector
394  * @affinity_mask:  SMP affinity mask for this vector
395  *
396  * This structure ties RX and TX rings to interrupt vectors and a NAPI
397  * context. This currently only supports one RX and TX ring per
398  * interrupt vector but might be extended in the future to allow
399  * association of multiple rings per vector.
400  */
401 struct nfp_net_r_vector {
402 	struct nfp_net *nfp_net;
403 	union {
404 		struct napi_struct napi;
405 		struct {
406 			struct tasklet_struct tasklet;
407 			struct sk_buff_head queue;
408 			spinlock_t lock;
409 		};
410 	};
411 
412 	struct nfp_net_tx_ring *tx_ring;
413 	struct nfp_net_rx_ring *rx_ring;
414 
415 	u16 irq_entry;
416 
417 	u16 event_ctr;
418 	struct dim rx_dim;
419 	struct dim tx_dim;
420 
421 	struct u64_stats_sync rx_sync;
422 	u64 rx_pkts;
423 	u64 rx_bytes;
424 	u64 rx_drops;
425 	u64 hw_csum_rx_ok;
426 	u64 hw_csum_rx_inner_ok;
427 	u64 hw_csum_rx_complete;
428 	u64 hw_tls_rx;
429 
430 	u64 hw_csum_rx_error;
431 	u64 rx_replace_buf_alloc_fail;
432 
433 	struct nfp_net_tx_ring *xdp_ring;
434 
435 	struct u64_stats_sync tx_sync;
436 	u64 tx_pkts;
437 	u64 tx_bytes;
438 
439 	u64 ____cacheline_aligned_in_smp hw_csum_tx;
440 	u64 hw_csum_tx_inner;
441 	u64 tx_gather;
442 	u64 tx_lso;
443 	u64 hw_tls_tx;
444 
445 	u64 tls_tx_fallback;
446 	u64 tls_tx_no_fallback;
447 	u64 tx_errors;
448 	u64 tx_busy;
449 
450 	/* Cold data follows */
451 
452 	u32 irq_vector;
453 	irq_handler_t handler;
454 	char name[IFNAMSIZ + 8];
455 	cpumask_t affinity_mask;
456 } ____cacheline_aligned;
457 
458 /* Firmware version as it is written in the 32bit value in the BAR */
459 struct nfp_net_fw_version {
460 	u8 minor;
461 	u8 major;
462 	u8 class;
463 	u8 resv;
464 } __packed;
465 
nfp_net_fw_ver_eq(struct nfp_net_fw_version * fw_ver,u8 resv,u8 class,u8 major,u8 minor)466 static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver,
467 				     u8 resv, u8 class, u8 major, u8 minor)
468 {
469 	return fw_ver->resv == resv &&
470 	       fw_ver->class == class &&
471 	       fw_ver->major == major &&
472 	       fw_ver->minor == minor;
473 }
474 
475 struct nfp_stat_pair {
476 	u64 pkts;
477 	u64 bytes;
478 };
479 
480 /**
481  * struct nfp_net_dp - NFP network device datapath data structure
482  * @dev:		Backpointer to struct device
483  * @netdev:		Backpointer to net_device structure
484  * @is_vf:		Is the driver attached to a VF?
485  * @chained_metadata_format:  Firemware will use new metadata format
486  * @ktls_tx:		Is kTLS TX enabled?
487  * @rx_dma_dir:		Mapping direction for RX buffers
488  * @rx_dma_off:		Offset at which DMA packets (for XDP headroom)
489  * @rx_offset:		Offset in the RX buffers where packet data starts
490  * @ctrl:		Local copy of the control register/word.
491  * @fl_bufsz:		Currently configured size of the freelist buffers
492  * @xdp_prog:		Installed XDP program
493  * @tx_rings:		Array of pre-allocated TX ring structures
494  * @rx_rings:		Array of pre-allocated RX ring structures
495  * @ctrl_bar:		Pointer to mapped control BAR
496  *
497  * @txd_cnt:		Size of the TX ring in number of descriptors
498  * @rxd_cnt:		Size of the RX ring in number of descriptors
499  * @num_r_vecs:		Number of used ring vectors
500  * @num_tx_rings:	Currently configured number of TX rings
501  * @num_stack_tx_rings:	Number of TX rings used by the stack (not XDP)
502  * @num_rx_rings:	Currently configured number of RX rings
503  * @mtu:		Device MTU
504  */
505 struct nfp_net_dp {
506 	struct device *dev;
507 	struct net_device *netdev;
508 
509 	u8 is_vf:1;
510 	u8 chained_metadata_format:1;
511 	u8 ktls_tx:1;
512 
513 	u8 rx_dma_dir;
514 	u8 rx_offset;
515 
516 	u32 rx_dma_off;
517 
518 	u32 ctrl;
519 	u32 fl_bufsz;
520 
521 	struct bpf_prog *xdp_prog;
522 
523 	struct nfp_net_tx_ring *tx_rings;
524 	struct nfp_net_rx_ring *rx_rings;
525 
526 	u8 __iomem *ctrl_bar;
527 
528 	/* Cold data follows */
529 
530 	unsigned int txd_cnt;
531 	unsigned int rxd_cnt;
532 
533 	unsigned int num_r_vecs;
534 
535 	unsigned int num_tx_rings;
536 	unsigned int num_stack_tx_rings;
537 	unsigned int num_rx_rings;
538 
539 	unsigned int mtu;
540 };
541 
542 /**
543  * struct nfp_net - NFP network device structure
544  * @dp:			Datapath structure
545  * @id:			vNIC id within the PF (0 for VFs)
546  * @fw_ver:		Firmware version
547  * @cap:                Capabilities advertised by the Firmware
548  * @max_mtu:            Maximum support MTU advertised by the Firmware
549  * @rss_hfunc:		RSS selected hash function
550  * @rss_cfg:            RSS configuration
551  * @rss_key:            RSS secret key
552  * @rss_itbl:           RSS indirection table
553  * @xdp:		Information about the driver XDP program
554  * @xdp_hw:		Information about the HW XDP program
555  * @max_r_vecs:		Number of allocated interrupt vectors for RX/TX
556  * @max_tx_rings:       Maximum number of TX rings supported by the Firmware
557  * @max_rx_rings:       Maximum number of RX rings supported by the Firmware
558  * @stride_rx:		Queue controller RX queue spacing
559  * @stride_tx:		Queue controller TX queue spacing
560  * @r_vecs:             Pre-allocated array of ring vectors
561  * @irq_entries:        Pre-allocated array of MSI-X entries
562  * @lsc_handler:        Handler for Link State Change interrupt
563  * @lsc_name:           Name for Link State Change interrupt
564  * @exn_handler:        Handler for Exception interrupt
565  * @exn_name:           Name for Exception interrupt
566  * @shared_handler:     Handler for shared interrupts
567  * @shared_name:        Name for shared interrupt
568  * @me_freq_mhz:        ME clock_freq (MHz)
569  * @reconfig_lock:	Protects @reconfig_posted, @reconfig_timer_active,
570  *			@reconfig_sync_present and HW reconfiguration request
571  *			regs/machinery from async requests (sync must take
572  *			@bar_lock)
573  * @reconfig_posted:	Pending reconfig bits coming from async sources
574  * @reconfig_timer_active:  Timer for reading reconfiguration results is pending
575  * @reconfig_sync_present:  Some thread is performing synchronous reconfig
576  * @reconfig_timer:	Timer for async reading of reconfig results
577  * @reconfig_in_progress_update:	Update FW is processing now (debug only)
578  * @bar_lock:		vNIC config BAR access lock, protects: update,
579  *			mailbox area, crypto TLV
580  * @link_up:            Is the link up?
581  * @link_status_lock:	Protects @link_* and ensures atomicity with BAR reading
582  * @rx_coalesce_adapt_on:   Is RX interrupt moderation adaptive?
583  * @tx_coalesce_adapt_on:   Is TX interrupt moderation adaptive?
584  * @rx_coalesce_usecs:      RX interrupt moderation usecs delay parameter
585  * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
586  * @tx_coalesce_usecs:      TX interrupt moderation usecs delay parameter
587  * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter
588  * @qcp_cfg:            Pointer to QCP queue used for configuration notification
589  * @tx_bar:             Pointer to mapped TX queues
590  * @rx_bar:             Pointer to mapped FL/RX queues
591  * @tlv_caps:		Parsed TLV capabilities
592  * @ktls_tx_conn_cnt:	Number of offloaded kTLS TX connections
593  * @ktls_rx_conn_cnt:	Number of offloaded kTLS RX connections
594  * @ktls_conn_id_gen:	Trivial generator for kTLS connection ids (for TX)
595  * @ktls_no_space:	Counter of firmware rejecting kTLS connection due to
596  *			lack of space
597  * @ktls_rx_resync_req:	Counter of TLS RX resync requested
598  * @ktls_rx_resync_ign:	Counter of TLS RX resync requests ignored
599  * @ktls_rx_resync_sent:    Counter of TLS RX resync completed
600  * @mbox_cmsg:		Common Control Message via vNIC mailbox state
601  * @mbox_cmsg.queue:	CCM mbox queue of pending messages
602  * @mbox_cmsg.wq:	CCM mbox wait queue of waiting processes
603  * @mbox_cmsg.workq:	CCM mbox work queue for @wait_work and @runq_work
604  * @mbox_cmsg.wait_work:    CCM mbox posted msg reconfig wait work
605  * @mbox_cmsg.runq_work:    CCM mbox posted msg queue runner work
606  * @mbox_cmsg.tag:	CCM mbox message tag allocator
607  * @debugfs_dir:	Device directory in debugfs
608  * @vnic_list:		Entry on device vNIC list
609  * @pdev:		Backpointer to PCI device
610  * @app:		APP handle if available
611  * @vnic_no_name:	For non-port PF vNIC make ndo_get_phys_port_name return
612  *			-EOPNOTSUPP to keep backwards compatibility (set by app)
613  * @port:		Pointer to nfp_port structure if vNIC is a port
614  * @app_priv:		APP private data for this vNIC
615  */
616 struct nfp_net {
617 	struct nfp_net_dp dp;
618 
619 	struct nfp_net_fw_version fw_ver;
620 
621 	u32 id;
622 
623 	u32 cap;
624 	u32 max_mtu;
625 
626 	u8 rss_hfunc;
627 	u32 rss_cfg;
628 	u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ];
629 	u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ];
630 
631 	struct xdp_attachment_info xdp;
632 	struct xdp_attachment_info xdp_hw;
633 
634 	unsigned int max_tx_rings;
635 	unsigned int max_rx_rings;
636 
637 	int stride_tx;
638 	int stride_rx;
639 
640 	unsigned int max_r_vecs;
641 	struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS];
642 	struct msix_entry irq_entries[NFP_NET_MAX_IRQS];
643 
644 	irq_handler_t lsc_handler;
645 	char lsc_name[IFNAMSIZ + 8];
646 
647 	irq_handler_t exn_handler;
648 	char exn_name[IFNAMSIZ + 8];
649 
650 	irq_handler_t shared_handler;
651 	char shared_name[IFNAMSIZ + 8];
652 
653 	u32 me_freq_mhz;
654 
655 	bool link_up;
656 	spinlock_t link_status_lock;
657 
658 	spinlock_t reconfig_lock;
659 	u32 reconfig_posted;
660 	bool reconfig_timer_active;
661 	bool reconfig_sync_present;
662 	struct timer_list reconfig_timer;
663 	u32 reconfig_in_progress_update;
664 
665 	struct semaphore bar_lock;
666 
667 	bool rx_coalesce_adapt_on;
668 	bool tx_coalesce_adapt_on;
669 	u32 rx_coalesce_usecs;
670 	u32 rx_coalesce_max_frames;
671 	u32 tx_coalesce_usecs;
672 	u32 tx_coalesce_max_frames;
673 
674 	u8 __iomem *qcp_cfg;
675 
676 	u8 __iomem *tx_bar;
677 	u8 __iomem *rx_bar;
678 
679 	struct nfp_net_tlv_caps tlv_caps;
680 
681 	unsigned int ktls_tx_conn_cnt;
682 	unsigned int ktls_rx_conn_cnt;
683 
684 	atomic64_t ktls_conn_id_gen;
685 
686 	atomic_t ktls_no_space;
687 	atomic_t ktls_rx_resync_req;
688 	atomic_t ktls_rx_resync_ign;
689 	atomic_t ktls_rx_resync_sent;
690 
691 	struct {
692 		struct sk_buff_head queue;
693 		wait_queue_head_t wq;
694 		struct workqueue_struct *workq;
695 		struct work_struct wait_work;
696 		struct work_struct runq_work;
697 		u16 tag;
698 	} mbox_cmsg;
699 
700 	struct dentry *debugfs_dir;
701 
702 	struct list_head vnic_list;
703 
704 	struct pci_dev *pdev;
705 	struct nfp_app *app;
706 
707 	bool vnic_no_name;
708 
709 	struct nfp_port *port;
710 
711 	void *app_priv;
712 };
713 
714 /* Functions to read/write from/to a BAR
715  * Performs any endian conversion necessary.
716  */
nn_readb(struct nfp_net * nn,int off)717 static inline u16 nn_readb(struct nfp_net *nn, int off)
718 {
719 	return readb(nn->dp.ctrl_bar + off);
720 }
721 
nn_writeb(struct nfp_net * nn,int off,u8 val)722 static inline void nn_writeb(struct nfp_net *nn, int off, u8 val)
723 {
724 	writeb(val, nn->dp.ctrl_bar + off);
725 }
726 
nn_readw(struct nfp_net * nn,int off)727 static inline u16 nn_readw(struct nfp_net *nn, int off)
728 {
729 	return readw(nn->dp.ctrl_bar + off);
730 }
731 
nn_writew(struct nfp_net * nn,int off,u16 val)732 static inline void nn_writew(struct nfp_net *nn, int off, u16 val)
733 {
734 	writew(val, nn->dp.ctrl_bar + off);
735 }
736 
nn_readl(struct nfp_net * nn,int off)737 static inline u32 nn_readl(struct nfp_net *nn, int off)
738 {
739 	return readl(nn->dp.ctrl_bar + off);
740 }
741 
nn_writel(struct nfp_net * nn,int off,u32 val)742 static inline void nn_writel(struct nfp_net *nn, int off, u32 val)
743 {
744 	writel(val, nn->dp.ctrl_bar + off);
745 }
746 
nn_readq(struct nfp_net * nn,int off)747 static inline u64 nn_readq(struct nfp_net *nn, int off)
748 {
749 	return readq(nn->dp.ctrl_bar + off);
750 }
751 
nn_writeq(struct nfp_net * nn,int off,u64 val)752 static inline void nn_writeq(struct nfp_net *nn, int off, u64 val)
753 {
754 	writeq(val, nn->dp.ctrl_bar + off);
755 }
756 
757 /* Flush posted PCI writes by reading something without side effects */
nn_pci_flush(struct nfp_net * nn)758 static inline void nn_pci_flush(struct nfp_net *nn)
759 {
760 	nn_readl(nn, NFP_NET_CFG_VERSION);
761 }
762 
763 /* Queue Controller Peripheral access functions and definitions.
764  *
765  * Some of the BARs of the NFP are mapped to portions of the Queue
766  * Controller Peripheral (QCP) address space on the NFP.  A QCP queue
767  * has a read and a write pointer (as well as a size and flags,
768  * indicating overflow etc).  The QCP offers a number of different
769  * operation on queue pointers, but here we only offer function to
770  * either add to a pointer or to read the pointer value.
771  */
772 #define NFP_QCP_QUEUE_ADDR_SZ			0x800
773 #define NFP_QCP_QUEUE_AREA_SZ			0x80000
774 #define NFP_QCP_QUEUE_OFF(_x)			((_x) * NFP_QCP_QUEUE_ADDR_SZ)
775 #define NFP_QCP_QUEUE_ADD_RPTR			0x0000
776 #define NFP_QCP_QUEUE_ADD_WPTR			0x0004
777 #define NFP_QCP_QUEUE_STS_LO			0x0008
778 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask	0x3ffff
779 #define NFP_QCP_QUEUE_STS_HI			0x000c
780 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask	0x3ffff
781 
782 /* The offset of a QCP queues in the PCIe Target */
783 #define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
784 
785 /* nfp_qcp_ptr - Read or Write Pointer of a queue */
786 enum nfp_qcp_ptr {
787 	NFP_QCP_READ_PTR = 0,
788 	NFP_QCP_WRITE_PTR
789 };
790 
791 /* There appear to be an *undocumented* upper limit on the value which
792  * one can add to a queue and that value is either 0x3f or 0x7f.  We
793  * go with 0x3f as a conservative measure.
794  */
795 #define NFP_QCP_MAX_ADD				0x3f
796 
_nfp_qcp_ptr_add(u8 __iomem * q,enum nfp_qcp_ptr ptr,u32 val)797 static inline void _nfp_qcp_ptr_add(u8 __iomem *q,
798 				    enum nfp_qcp_ptr ptr, u32 val)
799 {
800 	u32 off;
801 
802 	if (ptr == NFP_QCP_READ_PTR)
803 		off = NFP_QCP_QUEUE_ADD_RPTR;
804 	else
805 		off = NFP_QCP_QUEUE_ADD_WPTR;
806 
807 	while (val > NFP_QCP_MAX_ADD) {
808 		writel(NFP_QCP_MAX_ADD, q + off);
809 		val -= NFP_QCP_MAX_ADD;
810 	}
811 
812 	writel(val, q + off);
813 }
814 
815 /**
816  * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue
817  *
818  * @q:   Base address for queue structure
819  * @val: Value to add to the queue pointer
820  *
821  * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
822  */
nfp_qcp_rd_ptr_add(u8 __iomem * q,u32 val)823 static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val)
824 {
825 	_nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val);
826 }
827 
828 /**
829  * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue
830  *
831  * @q:   Base address for queue structure
832  * @val: Value to add to the queue pointer
833  *
834  * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
835  */
nfp_qcp_wr_ptr_add(u8 __iomem * q,u32 val)836 static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val)
837 {
838 	_nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val);
839 }
840 
_nfp_qcp_read(u8 __iomem * q,enum nfp_qcp_ptr ptr)841 static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr)
842 {
843 	u32 off;
844 	u32 val;
845 
846 	if (ptr == NFP_QCP_READ_PTR)
847 		off = NFP_QCP_QUEUE_STS_LO;
848 	else
849 		off = NFP_QCP_QUEUE_STS_HI;
850 
851 	val = readl(q + off);
852 
853 	if (ptr == NFP_QCP_READ_PTR)
854 		return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;
855 	else
856 		return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;
857 }
858 
859 /**
860  * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue
861  * @q:  Base address for queue structure
862  *
863  * Return: Value read.
864  */
nfp_qcp_rd_ptr_read(u8 __iomem * q)865 static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q)
866 {
867 	return _nfp_qcp_read(q, NFP_QCP_READ_PTR);
868 }
869 
870 /**
871  * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue
872  * @q:  Base address for queue structure
873  *
874  * Return: Value read.
875  */
nfp_qcp_wr_ptr_read(u8 __iomem * q)876 static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
877 {
878 	return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
879 }
880 
nfp_net_is_data_vnic(struct nfp_net * nn)881 static inline bool nfp_net_is_data_vnic(struct nfp_net *nn)
882 {
883 	WARN_ON_ONCE(!nn->dp.netdev && nn->port);
884 	return !!nn->dp.netdev;
885 }
886 
nfp_net_running(struct nfp_net * nn)887 static inline bool nfp_net_running(struct nfp_net *nn)
888 {
889 	return nn->dp.ctrl & NFP_NET_CFG_CTRL_ENABLE;
890 }
891 
nfp_net_name(struct nfp_net * nn)892 static inline const char *nfp_net_name(struct nfp_net *nn)
893 {
894 	return nn->dp.netdev ? nn->dp.netdev->name : "ctrl";
895 }
896 
nfp_ctrl_lock(struct nfp_net * nn)897 static inline void nfp_ctrl_lock(struct nfp_net *nn)
898 	__acquires(&nn->r_vecs[0].lock)
899 {
900 	spin_lock_bh(&nn->r_vecs[0].lock);
901 }
902 
nfp_ctrl_unlock(struct nfp_net * nn)903 static inline void nfp_ctrl_unlock(struct nfp_net *nn)
904 	__releases(&nn->r_vecs[0].lock)
905 {
906 	spin_unlock_bh(&nn->r_vecs[0].lock);
907 }
908 
nn_ctrl_bar_lock(struct nfp_net * nn)909 static inline void nn_ctrl_bar_lock(struct nfp_net *nn)
910 {
911 	down(&nn->bar_lock);
912 }
913 
nn_ctrl_bar_trylock(struct nfp_net * nn)914 static inline bool nn_ctrl_bar_trylock(struct nfp_net *nn)
915 {
916 	return !down_trylock(&nn->bar_lock);
917 }
918 
nn_ctrl_bar_unlock(struct nfp_net * nn)919 static inline void nn_ctrl_bar_unlock(struct nfp_net *nn)
920 {
921 	up(&nn->bar_lock);
922 }
923 
924 /* Globals */
925 extern const char nfp_driver_version[];
926 
927 extern const struct net_device_ops nfp_net_netdev_ops;
928 
nfp_netdev_is_nfp_net(struct net_device * netdev)929 static inline bool nfp_netdev_is_nfp_net(struct net_device *netdev)
930 {
931 	return netdev->netdev_ops == &nfp_net_netdev_ops;
932 }
933 
nfp_net_coalesce_para_check(u32 usecs,u32 pkts)934 static inline int nfp_net_coalesce_para_check(u32 usecs, u32 pkts)
935 {
936 	if ((usecs >= ((1 << 16) - 1)) || (pkts >= ((1 << 16) - 1)))
937 		return -EINVAL;
938 
939 	return 0;
940 }
941 
942 /* Prototypes */
943 void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
944 			    void __iomem *ctrl_bar);
945 
946 struct nfp_net *
947 nfp_net_alloc(struct pci_dev *pdev, void __iomem *ctrl_bar, bool needs_netdev,
948 	      unsigned int max_tx_rings, unsigned int max_rx_rings);
949 void nfp_net_free(struct nfp_net *nn);
950 
951 int nfp_net_init(struct nfp_net *nn);
952 void nfp_net_clean(struct nfp_net *nn);
953 
954 int nfp_ctrl_open(struct nfp_net *nn);
955 void nfp_ctrl_close(struct nfp_net *nn);
956 
957 void nfp_net_set_ethtool_ops(struct net_device *netdev);
958 void nfp_net_info(struct nfp_net *nn);
959 int __nfp_net_reconfig(struct nfp_net *nn, u32 update);
960 int nfp_net_reconfig(struct nfp_net *nn, u32 update);
961 unsigned int nfp_net_rss_key_sz(struct nfp_net *nn);
962 void nfp_net_rss_write_itbl(struct nfp_net *nn);
963 void nfp_net_rss_write_key(struct nfp_net *nn);
964 void nfp_net_coalesce_write_cfg(struct nfp_net *nn);
965 int nfp_net_mbox_lock(struct nfp_net *nn, unsigned int data_size);
966 int nfp_net_mbox_reconfig(struct nfp_net *nn, u32 mbox_cmd);
967 int nfp_net_mbox_reconfig_and_unlock(struct nfp_net *nn, u32 mbox_cmd);
968 void nfp_net_mbox_reconfig_post(struct nfp_net *nn, u32 update);
969 int nfp_net_mbox_reconfig_wait_posted(struct nfp_net *nn);
970 
971 unsigned int
972 nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries,
973 		   unsigned int min_irqs, unsigned int want_irqs);
974 void nfp_net_irqs_disable(struct pci_dev *pdev);
975 void
976 nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries,
977 		    unsigned int n);
978 
979 struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn);
980 int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
981 			  struct netlink_ext_ack *extack);
982 
983 #ifdef CONFIG_NFP_DEBUG
984 void nfp_net_debugfs_create(void);
985 void nfp_net_debugfs_destroy(void);
986 struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev);
987 void nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir);
988 void nfp_net_debugfs_dir_clean(struct dentry **dir);
989 #else
nfp_net_debugfs_create(void)990 static inline void nfp_net_debugfs_create(void)
991 {
992 }
993 
nfp_net_debugfs_destroy(void)994 static inline void nfp_net_debugfs_destroy(void)
995 {
996 }
997 
nfp_net_debugfs_device_add(struct pci_dev * pdev)998 static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev)
999 {
1000 	return NULL;
1001 }
1002 
1003 static inline void
nfp_net_debugfs_vnic_add(struct nfp_net * nn,struct dentry * ddir)1004 nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir)
1005 {
1006 }
1007 
nfp_net_debugfs_dir_clean(struct dentry ** dir)1008 static inline void nfp_net_debugfs_dir_clean(struct dentry **dir)
1009 {
1010 }
1011 #endif /* CONFIG_NFP_DEBUG */
1012 
1013 #endif /* _NFP_NET_H_ */
1014