1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3 This contains the functions to handle the platform driver.
4
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
6
7
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
10
11 #include <linux/platform_device.h>
12 #include <linux/module.h>
13 #include <linux/io.h>
14 #include <linux/of.h>
15 #include <linux/of_net.h>
16 #include <linux/of_device.h>
17 #include <linux/of_mdio.h>
18
19 #include "stmmac.h"
20 #include "stmmac_platform.h"
21
22 #ifdef CONFIG_OF
23
24 /**
25 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
26 * @dev: struct device of the platform device
27 * @mcast_bins: Multicast filtering bins
28 * Description:
29 * this function validates the number of Multicast filtering bins specified
30 * by the configuration through the device tree. The Synopsys GMAC supports
31 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
32 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
33 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
34 * invalid and will cause the filtering algorithm to use Multicast
35 * promiscuous mode.
36 */
dwmac1000_validate_mcast_bins(struct device * dev,int mcast_bins)37 static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)
38 {
39 int x = mcast_bins;
40
41 switch (x) {
42 case HASH_TABLE_SIZE:
43 case 128:
44 case 256:
45 break;
46 default:
47 x = 0;
48 dev_info(dev, "Hash table entries set to unexpected value %d\n",
49 mcast_bins);
50 break;
51 }
52 return x;
53 }
54
55 /**
56 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
57 * @dev: struct device of the platform device
58 * @ucast_entries: number of Unicast address entries
59 * Description:
60 * This function validates the number of Unicast address entries supported
61 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
62 * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
63 * logic. This function validates a valid, supported configuration is
64 * selected, and defaults to 1 Unicast address if an unsupported
65 * configuration is selected.
66 */
dwmac1000_validate_ucast_entries(struct device * dev,int ucast_entries)67 static int dwmac1000_validate_ucast_entries(struct device *dev,
68 int ucast_entries)
69 {
70 int x = ucast_entries;
71
72 switch (x) {
73 case 1 ... 32:
74 case 64:
75 case 128:
76 break;
77 default:
78 x = 1;
79 dev_info(dev, "Unicast table entries set to unexpected value %d\n",
80 ucast_entries);
81 break;
82 }
83 return x;
84 }
85
86 /**
87 * stmmac_axi_setup - parse DT parameters for programming the AXI register
88 * @pdev: platform device
89 * Description:
90 * if required, from device-tree the AXI internal register can be tuned
91 * by using platform parameters.
92 */
stmmac_axi_setup(struct platform_device * pdev)93 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
94 {
95 struct device_node *np;
96 struct stmmac_axi *axi;
97
98 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
99 if (!np)
100 return NULL;
101
102 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
103 if (!axi) {
104 of_node_put(np);
105 return ERR_PTR(-ENOMEM);
106 }
107
108 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
109 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
110 axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
111 axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
112 axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
113 axi->axi_rb = of_property_read_bool(np, "snps,axi_rb");
114
115 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
116 axi->axi_wr_osr_lmt = 1;
117 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
118 axi->axi_rd_osr_lmt = 1;
119 of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
120 of_node_put(np);
121
122 return axi;
123 }
124
125 /**
126 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
127 * @pdev: platform device
128 * @plat: enet data
129 */
stmmac_mtl_setup(struct platform_device * pdev,struct plat_stmmacenet_data * plat)130 static int stmmac_mtl_setup(struct platform_device *pdev,
131 struct plat_stmmacenet_data *plat)
132 {
133 struct device_node *q_node;
134 struct device_node *rx_node;
135 struct device_node *tx_node;
136 u8 queue = 0;
137 int ret = 0;
138
139 /* For backwards-compatibility with device trees that don't have any
140 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
141 * to one RX and TX queues each.
142 */
143 plat->rx_queues_to_use = 1;
144 plat->tx_queues_to_use = 1;
145
146 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
147 * to always set this, otherwise Queue will be classified as AVB
148 * (because MTL_QUEUE_AVB = 0).
149 */
150 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
151 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
152
153 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
154 if (!rx_node)
155 return ret;
156
157 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
158 if (!tx_node) {
159 of_node_put(rx_node);
160 return ret;
161 }
162
163 /* Processing RX queues common config */
164 if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
165 &plat->rx_queues_to_use))
166 plat->rx_queues_to_use = 1;
167
168 if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
169 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
170 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
171 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
172 else
173 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
174
175 /* Processing individual RX queue config */
176 for_each_child_of_node(rx_node, q_node) {
177 if (queue >= plat->rx_queues_to_use)
178 break;
179
180 if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
181 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
182 else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
183 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
184 else
185 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
186
187 if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
188 &plat->rx_queues_cfg[queue].chan))
189 plat->rx_queues_cfg[queue].chan = queue;
190 /* TODO: Dynamic mapping to be included in the future */
191
192 if (of_property_read_u32(q_node, "snps,priority",
193 &plat->rx_queues_cfg[queue].prio)) {
194 plat->rx_queues_cfg[queue].prio = 0;
195 plat->rx_queues_cfg[queue].use_prio = false;
196 } else {
197 plat->rx_queues_cfg[queue].use_prio = true;
198 }
199
200 /* RX queue specific packet type routing */
201 if (of_property_read_bool(q_node, "snps,route-avcp"))
202 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
203 else if (of_property_read_bool(q_node, "snps,route-ptp"))
204 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
205 else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
206 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
207 else if (of_property_read_bool(q_node, "snps,route-up"))
208 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
209 else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
210 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
211 else
212 plat->rx_queues_cfg[queue].pkt_route = 0x0;
213
214 queue++;
215 }
216 if (queue != plat->rx_queues_to_use) {
217 ret = -EINVAL;
218 dev_err(&pdev->dev, "Not all RX queues were configured\n");
219 goto out;
220 }
221
222 /* Processing TX queues common config */
223 if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
224 &plat->tx_queues_to_use))
225 plat->tx_queues_to_use = 1;
226
227 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
228 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
229 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
230 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
231 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
232 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
233 else if (of_property_read_bool(tx_node, "snps,tx-sched-sp"))
234 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
235 else
236 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
237
238 queue = 0;
239
240 /* Processing individual TX queue config */
241 for_each_child_of_node(tx_node, q_node) {
242 if (queue >= plat->tx_queues_to_use)
243 break;
244
245 if (of_property_read_u32(q_node, "snps,weight",
246 &plat->tx_queues_cfg[queue].weight))
247 plat->tx_queues_cfg[queue].weight = 0x10 + queue;
248
249 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
250 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
251 } else if (of_property_read_bool(q_node,
252 "snps,avb-algorithm")) {
253 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
254
255 /* Credit Base Shaper parameters used by AVB */
256 if (of_property_read_u32(q_node, "snps,send_slope",
257 &plat->tx_queues_cfg[queue].send_slope))
258 plat->tx_queues_cfg[queue].send_slope = 0x0;
259 if (of_property_read_u32(q_node, "snps,idle_slope",
260 &plat->tx_queues_cfg[queue].idle_slope))
261 plat->tx_queues_cfg[queue].idle_slope = 0x0;
262 if (of_property_read_u32(q_node, "snps,high_credit",
263 &plat->tx_queues_cfg[queue].high_credit))
264 plat->tx_queues_cfg[queue].high_credit = 0x0;
265 if (of_property_read_u32(q_node, "snps,low_credit",
266 &plat->tx_queues_cfg[queue].low_credit))
267 plat->tx_queues_cfg[queue].low_credit = 0x0;
268 } else {
269 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
270 }
271
272 if (of_property_read_u32(q_node, "snps,priority",
273 &plat->tx_queues_cfg[queue].prio)) {
274 plat->tx_queues_cfg[queue].prio = 0;
275 plat->tx_queues_cfg[queue].use_prio = false;
276 } else {
277 plat->tx_queues_cfg[queue].use_prio = true;
278 }
279
280 queue++;
281 }
282 if (queue != plat->tx_queues_to_use) {
283 ret = -EINVAL;
284 dev_err(&pdev->dev, "Not all TX queues were configured\n");
285 goto out;
286 }
287
288 out:
289 of_node_put(rx_node);
290 of_node_put(tx_node);
291 of_node_put(q_node);
292
293 return ret;
294 }
295
296 /**
297 * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
298 * @plat: driver data platform structure
299 * @np: device tree node
300 * @dev: device pointer
301 * Description:
302 * The mdio bus will be allocated in case of a phy transceiver is on board;
303 * it will be NULL if the fixed-link is configured.
304 * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
305 * in any case (for DSA, mdio must be registered even if fixed-link).
306 * The table below sums the supported configurations:
307 * -------------------------------
308 * snps,phy-addr | Y
309 * -------------------------------
310 * phy-handle | Y
311 * -------------------------------
312 * fixed-link | N
313 * -------------------------------
314 * snps,dwmac-mdio |
315 * even if | Y
316 * fixed-link |
317 * -------------------------------
318 *
319 * It returns 0 in case of success otherwise -ENODEV.
320 */
stmmac_dt_phy(struct plat_stmmacenet_data * plat,struct device_node * np,struct device * dev)321 static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
322 struct device_node *np, struct device *dev)
323 {
324 bool mdio = !of_phy_is_fixed_link(np);
325 static const struct of_device_id need_mdio_ids[] = {
326 { .compatible = "snps,dwc-qos-ethernet-4.10" },
327 {},
328 };
329
330 if (of_match_node(need_mdio_ids, np)) {
331 plat->mdio_node = of_get_child_by_name(np, "mdio");
332 } else {
333 /**
334 * If snps,dwmac-mdio is passed from DT, always register
335 * the MDIO
336 */
337 for_each_child_of_node(np, plat->mdio_node) {
338 if (of_device_is_compatible(plat->mdio_node,
339 "snps,dwmac-mdio"))
340 break;
341 }
342 }
343
344 if (plat->mdio_node) {
345 dev_dbg(dev, "Found MDIO subnode\n");
346 mdio = true;
347 }
348
349 if (mdio) {
350 plat->mdio_bus_data =
351 devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
352 GFP_KERNEL);
353 if (!plat->mdio_bus_data)
354 return -ENOMEM;
355
356 plat->mdio_bus_data->needs_reset = true;
357 }
358
359 return 0;
360 }
361
362 /**
363 * stmmac_of_get_mac_mode - retrieves the interface of the MAC
364 * @np: - device-tree node
365 * Description:
366 * Similar to `of_get_phy_mode()`, this function will retrieve (from
367 * the device-tree) the interface mode on the MAC side. This assumes
368 * that there is mode converter in-between the MAC & PHY
369 * (e.g. GMII-to-RGMII).
370 */
stmmac_of_get_mac_mode(struct device_node * np)371 static int stmmac_of_get_mac_mode(struct device_node *np)
372 {
373 const char *pm;
374 int err, i;
375
376 err = of_property_read_string(np, "mac-mode", &pm);
377 if (err < 0)
378 return err;
379
380 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
381 if (!strcasecmp(pm, phy_modes(i)))
382 return i;
383 }
384
385 return -ENODEV;
386 }
387
388 /**
389 * stmmac_probe_config_dt - parse device-tree driver parameters
390 * @pdev: platform_device structure
391 * @mac: MAC address to use
392 * Description:
393 * this function is to read the driver parameters from device-tree and
394 * set some private fields that will be used by the main at runtime.
395 */
396 struct plat_stmmacenet_data *
stmmac_probe_config_dt(struct platform_device * pdev,const char ** mac)397 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
398 {
399 struct device_node *np = pdev->dev.of_node;
400 struct plat_stmmacenet_data *plat;
401 struct stmmac_dma_cfg *dma_cfg;
402 int rc;
403
404 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
405 if (!plat)
406 return ERR_PTR(-ENOMEM);
407
408 *mac = of_get_mac_address(np);
409 if (IS_ERR(*mac)) {
410 if (PTR_ERR(*mac) == -EPROBE_DEFER)
411 return ERR_CAST(*mac);
412
413 *mac = NULL;
414 }
415
416 plat->phy_interface = device_get_phy_mode(&pdev->dev);
417 if (plat->phy_interface < 0)
418 return ERR_PTR(plat->phy_interface);
419
420 plat->interface = stmmac_of_get_mac_mode(np);
421 if (plat->interface < 0)
422 plat->interface = plat->phy_interface;
423
424 /* Some wrapper drivers still rely on phy_node. Let's save it while
425 * they are not converted to phylink. */
426 plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
427
428 /* PHYLINK automatically parses the phy-handle property */
429 plat->phylink_node = np;
430
431 /* Get max speed of operation from device tree */
432 if (of_property_read_u32(np, "max-speed", &plat->max_speed))
433 plat->max_speed = -1;
434
435 plat->bus_id = of_alias_get_id(np, "ethernet");
436 if (plat->bus_id < 0)
437 plat->bus_id = 0;
438
439 /* Default to phy auto-detection */
440 plat->phy_addr = -1;
441
442 /* Default to get clk_csr from stmmac_clk_crs_set(),
443 * or get clk_csr from device tree.
444 */
445 plat->clk_csr = -1;
446 of_property_read_u32(np, "clk_csr", &plat->clk_csr);
447
448 /* "snps,phy-addr" is not a standard property. Mark it as deprecated
449 * and warn of its use. Remove this when phy node support is added.
450 */
451 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
452 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
453
454 /* To Configure PHY by using all device-tree supported properties */
455 rc = stmmac_dt_phy(plat, np, &pdev->dev);
456 if (rc)
457 return ERR_PTR(rc);
458
459 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
460
461 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
462
463 plat->force_sf_dma_mode =
464 of_property_read_bool(np, "snps,force_sf_dma_mode");
465
466 plat->en_tx_lpi_clockgating =
467 of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
468
469 /* Set the maxmtu to a default of JUMBO_LEN in case the
470 * parameter is not present in the device tree.
471 */
472 plat->maxmtu = JUMBO_LEN;
473
474 /* Set default value for multicast hash bins */
475 plat->multicast_filter_bins = HASH_TABLE_SIZE;
476
477 /* Set default value for unicast filter entries */
478 plat->unicast_filter_entries = 1;
479
480 /*
481 * Currently only the properties needed on SPEAr600
482 * are provided. All other properties should be added
483 * once needed on other platforms.
484 */
485 if (of_device_is_compatible(np, "st,spear600-gmac") ||
486 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
487 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
488 of_device_is_compatible(np, "snps,dwmac")) {
489 /* Note that the max-frame-size parameter as defined in the
490 * ePAPR v1.1 spec is defined as max-frame-size, it's
491 * actually used as the IEEE definition of MAC Client
492 * data, or MTU. The ePAPR specification is confusing as
493 * the definition is max-frame-size, but usage examples
494 * are clearly MTUs
495 */
496 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
497 of_property_read_u32(np, "snps,multicast-filter-bins",
498 &plat->multicast_filter_bins);
499 of_property_read_u32(np, "snps,perfect-filter-entries",
500 &plat->unicast_filter_entries);
501 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
502 &pdev->dev, plat->unicast_filter_entries);
503 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
504 &pdev->dev, plat->multicast_filter_bins);
505 plat->has_gmac = 1;
506 plat->pmt = 1;
507 }
508
509 if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
510 of_device_is_compatible(np, "snps,dwmac-4.10a") ||
511 of_device_is_compatible(np, "snps,dwmac-4.20a") ||
512 of_device_is_compatible(np, "snps,dwmac-5.10a")) {
513 plat->has_gmac4 = 1;
514 plat->has_gmac = 0;
515 plat->pmt = 1;
516 plat->tso_en = of_property_read_bool(np, "snps,tso");
517 }
518
519 if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
520 of_device_is_compatible(np, "snps,dwmac-3.710")) {
521 plat->enh_desc = 1;
522 plat->bugged_jumbo = 1;
523 plat->force_sf_dma_mode = 1;
524 }
525
526 if (of_device_is_compatible(np, "snps,dwxgmac")) {
527 plat->has_xgmac = 1;
528 plat->pmt = 1;
529 plat->tso_en = of_property_read_bool(np, "snps,tso");
530 }
531
532 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
533 GFP_KERNEL);
534 if (!dma_cfg) {
535 stmmac_remove_config_dt(pdev, plat);
536 return ERR_PTR(-ENOMEM);
537 }
538 plat->dma_cfg = dma_cfg;
539
540 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
541 if (!dma_cfg->pbl)
542 dma_cfg->pbl = DEFAULT_DMA_PBL;
543 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
544 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
545 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
546
547 dma_cfg->aal = of_property_read_bool(np, "snps,aal");
548 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
549 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
550
551 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
552 if (plat->force_thresh_dma_mode) {
553 plat->force_sf_dma_mode = 0;
554 dev_warn(&pdev->dev,
555 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
556 }
557
558 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
559
560 plat->axi = stmmac_axi_setup(pdev);
561
562 rc = stmmac_mtl_setup(pdev, plat);
563 if (rc) {
564 stmmac_remove_config_dt(pdev, plat);
565 return ERR_PTR(rc);
566 }
567
568 /* clock setup */
569 if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
570 plat->stmmac_clk = devm_clk_get(&pdev->dev,
571 STMMAC_RESOURCE_NAME);
572 if (IS_ERR(plat->stmmac_clk)) {
573 dev_warn(&pdev->dev, "Cannot get CSR clock\n");
574 plat->stmmac_clk = NULL;
575 }
576 clk_prepare_enable(plat->stmmac_clk);
577 }
578
579 plat->pclk = devm_clk_get(&pdev->dev, "pclk");
580 if (IS_ERR(plat->pclk)) {
581 if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
582 goto error_pclk_get;
583
584 plat->pclk = NULL;
585 }
586 clk_prepare_enable(plat->pclk);
587
588 /* Fall-back to main clock in case of no PTP ref is passed */
589 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
590 if (IS_ERR(plat->clk_ptp_ref)) {
591 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
592 plat->clk_ptp_ref = NULL;
593 dev_info(&pdev->dev, "PTP uses main clock\n");
594 } else {
595 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
596 dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
597 }
598
599 plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
600 STMMAC_RESOURCE_NAME);
601 if (IS_ERR(plat->stmmac_rst)) {
602 if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
603 goto error_hw_init;
604
605 dev_info(&pdev->dev, "no reset control found\n");
606 plat->stmmac_rst = NULL;
607 }
608
609 return plat;
610
611 error_hw_init:
612 clk_disable_unprepare(plat->pclk);
613 error_pclk_get:
614 clk_disable_unprepare(plat->stmmac_clk);
615
616 return ERR_PTR(-EPROBE_DEFER);
617 }
618
619 /**
620 * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
621 * @pdev: platform_device structure
622 * @plat: driver data platform structure
623 *
624 * Release resources claimed by stmmac_probe_config_dt().
625 */
stmmac_remove_config_dt(struct platform_device * pdev,struct plat_stmmacenet_data * plat)626 void stmmac_remove_config_dt(struct platform_device *pdev,
627 struct plat_stmmacenet_data *plat)
628 {
629 of_node_put(plat->phy_node);
630 of_node_put(plat->mdio_node);
631 }
632 #else
633 struct plat_stmmacenet_data *
stmmac_probe_config_dt(struct platform_device * pdev,const char ** mac)634 stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
635 {
636 return ERR_PTR(-EINVAL);
637 }
638
stmmac_remove_config_dt(struct platform_device * pdev,struct plat_stmmacenet_data * plat)639 void stmmac_remove_config_dt(struct platform_device *pdev,
640 struct plat_stmmacenet_data *plat)
641 {
642 }
643 #endif /* CONFIG_OF */
644 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
645 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
646
stmmac_get_platform_resources(struct platform_device * pdev,struct stmmac_resources * stmmac_res)647 int stmmac_get_platform_resources(struct platform_device *pdev,
648 struct stmmac_resources *stmmac_res)
649 {
650 memset(stmmac_res, 0, sizeof(*stmmac_res));
651
652 /* Get IRQ information early to have an ability to ask for deferred
653 * probe if needed before we went too far with resource allocation.
654 */
655 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
656 if (stmmac_res->irq < 0)
657 return stmmac_res->irq;
658
659 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
660 * The external wake up irq can be passed through the platform code
661 * named as "eth_wake_irq"
662 *
663 * In case the wake up interrupt is not passed from the platform
664 * so the driver will continue to use the mac irq (ndev->irq)
665 */
666 stmmac_res->wol_irq =
667 platform_get_irq_byname_optional(pdev, "eth_wake_irq");
668 if (stmmac_res->wol_irq < 0) {
669 if (stmmac_res->wol_irq == -EPROBE_DEFER)
670 return -EPROBE_DEFER;
671 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n");
672 stmmac_res->wol_irq = stmmac_res->irq;
673 }
674
675 stmmac_res->lpi_irq =
676 platform_get_irq_byname_optional(pdev, "eth_lpi");
677 if (stmmac_res->lpi_irq < 0) {
678 if (stmmac_res->lpi_irq == -EPROBE_DEFER)
679 return -EPROBE_DEFER;
680 dev_info(&pdev->dev, "IRQ eth_lpi not found\n");
681 }
682
683 stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
684
685 return PTR_ERR_OR_ZERO(stmmac_res->addr);
686 }
687 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
688
689 /**
690 * stmmac_pltfr_remove
691 * @pdev: platform device pointer
692 * Description: this function calls the main to free the net resources
693 * and calls the platforms hook and release the resources (e.g. mem).
694 */
stmmac_pltfr_remove(struct platform_device * pdev)695 int stmmac_pltfr_remove(struct platform_device *pdev)
696 {
697 struct net_device *ndev = platform_get_drvdata(pdev);
698 struct stmmac_priv *priv = netdev_priv(ndev);
699 struct plat_stmmacenet_data *plat = priv->plat;
700 int ret = stmmac_dvr_remove(&pdev->dev);
701
702 if (plat->exit)
703 plat->exit(pdev, plat->bsp_priv);
704
705 stmmac_remove_config_dt(pdev, plat);
706
707 return ret;
708 }
709 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
710
711 #ifdef CONFIG_PM_SLEEP
712 /**
713 * stmmac_pltfr_suspend
714 * @dev: device pointer
715 * Description: this function is invoked when suspend the driver and it direcly
716 * call the main suspend function and then, if required, on some platform, it
717 * can call an exit helper.
718 */
stmmac_pltfr_suspend(struct device * dev)719 static int stmmac_pltfr_suspend(struct device *dev)
720 {
721 int ret;
722 struct net_device *ndev = dev_get_drvdata(dev);
723 struct stmmac_priv *priv = netdev_priv(ndev);
724 struct platform_device *pdev = to_platform_device(dev);
725
726 ret = stmmac_suspend(dev);
727 if (priv->plat->exit)
728 priv->plat->exit(pdev, priv->plat->bsp_priv);
729
730 return ret;
731 }
732
733 /**
734 * stmmac_pltfr_resume
735 * @dev: device pointer
736 * Description: this function is invoked when resume the driver before calling
737 * the main resume function, on some platforms, it can call own init helper
738 * if required.
739 */
stmmac_pltfr_resume(struct device * dev)740 static int stmmac_pltfr_resume(struct device *dev)
741 {
742 struct net_device *ndev = dev_get_drvdata(dev);
743 struct stmmac_priv *priv = netdev_priv(ndev);
744 struct platform_device *pdev = to_platform_device(dev);
745
746 if (priv->plat->init)
747 priv->plat->init(pdev, priv->plat->bsp_priv);
748
749 return stmmac_resume(dev);
750 }
751 #endif /* CONFIG_PM_SLEEP */
752
753 SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,
754 stmmac_pltfr_resume);
755 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
756
757 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
758 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
759 MODULE_LICENSE("GPL");
760
