1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * STMicroelectronics st_lsm6dsx sensor driver
4 *
5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
7 * interface standard output.
8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
10 * +-125/+-245/+-500/+-1000/+-2000 dps
11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
12 * allowing dynamic batching of sensor data.
13 * LSM9DSx series is similar but includes an additional magnetometer, handled
14 * by a different driver.
15 *
16 * Supported sensors:
17 * - LSM6DS3:
18 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416
19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
21 * - FIFO size: 8KB
22 *
23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C:
24 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416
25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
27 * - FIFO size: 4KB
28 *
29 * - LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX:
30 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416
31 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
32 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
33 * - FIFO size: 3KB
34 *
35 * - LSM9DS1:
36 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
37 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
38 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
39 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
40 * - FIFO size: 32
41 *
42 * Copyright 2016 STMicroelectronics Inc.
43 *
44 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
45 * Denis Ciocca <denis.ciocca@st.com>
46 */
47
48 #include <linux/kernel.h>
49 #include <linux/module.h>
50 #include <linux/delay.h>
51 #include <linux/iio/iio.h>
52 #include <linux/iio/sysfs.h>
53 #include <linux/pm.h>
54 #include <linux/regmap.h>
55 #include <linux/bitfield.h>
56
57 #include <linux/platform_data/st_sensors_pdata.h>
58
59 #include "st_lsm6dsx.h"
60
61 #define ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK BIT(3)
62 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
63 #define ST_LSM6DSX_REG_RESET_MASK BIT(0)
64 #define ST_LSM6DSX_REG_BOOT_MASK BIT(7)
65 #define ST_LSM6DSX_REG_BDU_ADDR 0x12
66 #define ST_LSM6DSX_REG_BDU_MASK BIT(6)
67
68 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
69 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
70 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
71 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
72 IIO_CHAN_SOFT_TIMESTAMP(3),
73 };
74
75 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
76 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
77 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
78 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
79 IIO_CHAN_SOFT_TIMESTAMP(3),
80 };
81
82 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
83 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
84 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
85 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
86 IIO_CHAN_SOFT_TIMESTAMP(3),
87 };
88
89 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
90 {
91 .wai = 0x68,
92 .int1_addr = 0x0c,
93 .int2_addr = 0x0d,
94 .reset_addr = 0x22,
95 .max_fifo_size = 32,
96 .id = {
97 {
98 .hw_id = ST_LSM9DS1_ID,
99 .name = ST_LSM9DS1_DEV_NAME,
100 },
101 },
102 .channels = {
103 [ST_LSM6DSX_ID_ACC] = {
104 .chan = st_lsm6dsx_acc_channels,
105 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
106 },
107 [ST_LSM6DSX_ID_GYRO] = {
108 .chan = st_lsm6ds0_gyro_channels,
109 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
110 },
111 },
112 .odr_table = {
113 [ST_LSM6DSX_ID_ACC] = {
114 .reg = {
115 .addr = 0x20,
116 .mask = GENMASK(7, 5),
117 },
118 .odr_avl[0] = { 10, 0x01 },
119 .odr_avl[1] = { 50, 0x02 },
120 .odr_avl[2] = { 119, 0x03 },
121 .odr_avl[3] = { 238, 0x04 },
122 .odr_avl[4] = { 476, 0x05 },
123 .odr_avl[5] = { 952, 0x06 },
124 },
125 [ST_LSM6DSX_ID_GYRO] = {
126 .reg = {
127 .addr = 0x10,
128 .mask = GENMASK(7, 5),
129 },
130 .odr_avl[0] = { 15, 0x01 },
131 .odr_avl[1] = { 60, 0x02 },
132 .odr_avl[2] = { 119, 0x03 },
133 .odr_avl[3] = { 238, 0x04 },
134 .odr_avl[4] = { 476, 0x05 },
135 .odr_avl[5] = { 952, 0x06 },
136 },
137 },
138 .fs_table = {
139 [ST_LSM6DSX_ID_ACC] = {
140 .reg = {
141 .addr = 0x20,
142 .mask = GENMASK(4, 3),
143 },
144 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
145 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
146 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
147 .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 },
148 .fs_len = 4,
149 },
150 [ST_LSM6DSX_ID_GYRO] = {
151 .reg = {
152 .addr = 0x10,
153 .mask = GENMASK(4, 3),
154 },
155 .fs_avl[0] = { IIO_DEGREE_TO_RAD(245), 0x0 },
156 .fs_avl[1] = { IIO_DEGREE_TO_RAD(500), 0x1 },
157 .fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 },
158 .fs_len = 3,
159 },
160 },
161 },
162 {
163 .wai = 0x69,
164 .int1_addr = 0x0d,
165 .int2_addr = 0x0e,
166 .reset_addr = 0x12,
167 .max_fifo_size = 1365,
168 .id = {
169 {
170 .hw_id = ST_LSM6DS3_ID,
171 .name = ST_LSM6DS3_DEV_NAME,
172 },
173 },
174 .channels = {
175 [ST_LSM6DSX_ID_ACC] = {
176 .chan = st_lsm6dsx_acc_channels,
177 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
178 },
179 [ST_LSM6DSX_ID_GYRO] = {
180 .chan = st_lsm6dsx_gyro_channels,
181 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
182 },
183 },
184 .odr_table = {
185 [ST_LSM6DSX_ID_ACC] = {
186 .reg = {
187 .addr = 0x10,
188 .mask = GENMASK(7, 4),
189 },
190 .odr_avl[0] = { 13, 0x01 },
191 .odr_avl[1] = { 26, 0x02 },
192 .odr_avl[2] = { 52, 0x03 },
193 .odr_avl[3] = { 104, 0x04 },
194 .odr_avl[4] = { 208, 0x05 },
195 .odr_avl[5] = { 416, 0x06 },
196 },
197 [ST_LSM6DSX_ID_GYRO] = {
198 .reg = {
199 .addr = 0x11,
200 .mask = GENMASK(7, 4),
201 },
202 .odr_avl[0] = { 13, 0x01 },
203 .odr_avl[1] = { 26, 0x02 },
204 .odr_avl[2] = { 52, 0x03 },
205 .odr_avl[3] = { 104, 0x04 },
206 .odr_avl[4] = { 208, 0x05 },
207 .odr_avl[5] = { 416, 0x06 },
208 },
209 },
210 .fs_table = {
211 [ST_LSM6DSX_ID_ACC] = {
212 .reg = {
213 .addr = 0x10,
214 .mask = GENMASK(3, 2),
215 },
216 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
217 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
218 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
219 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
220 .fs_len = 4,
221 },
222 [ST_LSM6DSX_ID_GYRO] = {
223 .reg = {
224 .addr = 0x11,
225 .mask = GENMASK(3, 2),
226 },
227 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
228 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
229 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
230 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
231 .fs_len = 4,
232 },
233 },
234 .decimator = {
235 [ST_LSM6DSX_ID_ACC] = {
236 .addr = 0x08,
237 .mask = GENMASK(2, 0),
238 },
239 [ST_LSM6DSX_ID_GYRO] = {
240 .addr = 0x08,
241 .mask = GENMASK(5, 3),
242 },
243 },
244 .fifo_ops = {
245 .update_fifo = st_lsm6dsx_update_fifo,
246 .read_fifo = st_lsm6dsx_read_fifo,
247 .fifo_th = {
248 .addr = 0x06,
249 .mask = GENMASK(11, 0),
250 },
251 .fifo_diff = {
252 .addr = 0x3a,
253 .mask = GENMASK(11, 0),
254 },
255 .th_wl = 3, /* 1LSB = 2B */
256 },
257 .ts_settings = {
258 .timer_en = {
259 .addr = 0x58,
260 .mask = BIT(7),
261 },
262 .hr_timer = {
263 .addr = 0x5c,
264 .mask = BIT(4),
265 },
266 .fifo_en = {
267 .addr = 0x07,
268 .mask = BIT(7),
269 },
270 .decimator = {
271 .addr = 0x09,
272 .mask = GENMASK(5, 3),
273 },
274 },
275 },
276 {
277 .wai = 0x69,
278 .int1_addr = 0x0d,
279 .int2_addr = 0x0e,
280 .reset_addr = 0x12,
281 .max_fifo_size = 682,
282 .id = {
283 {
284 .hw_id = ST_LSM6DS3H_ID,
285 .name = ST_LSM6DS3H_DEV_NAME,
286 },
287 },
288 .channels = {
289 [ST_LSM6DSX_ID_ACC] = {
290 .chan = st_lsm6dsx_acc_channels,
291 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
292 },
293 [ST_LSM6DSX_ID_GYRO] = {
294 .chan = st_lsm6dsx_gyro_channels,
295 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
296 },
297 },
298 .odr_table = {
299 [ST_LSM6DSX_ID_ACC] = {
300 .reg = {
301 .addr = 0x10,
302 .mask = GENMASK(7, 4),
303 },
304 .odr_avl[0] = { 13, 0x01 },
305 .odr_avl[1] = { 26, 0x02 },
306 .odr_avl[2] = { 52, 0x03 },
307 .odr_avl[3] = { 104, 0x04 },
308 .odr_avl[4] = { 208, 0x05 },
309 .odr_avl[5] = { 416, 0x06 },
310 },
311 [ST_LSM6DSX_ID_GYRO] = {
312 .reg = {
313 .addr = 0x11,
314 .mask = GENMASK(7, 4),
315 },
316 .odr_avl[0] = { 13, 0x01 },
317 .odr_avl[1] = { 26, 0x02 },
318 .odr_avl[2] = { 52, 0x03 },
319 .odr_avl[3] = { 104, 0x04 },
320 .odr_avl[4] = { 208, 0x05 },
321 .odr_avl[5] = { 416, 0x06 },
322 },
323 },
324 .fs_table = {
325 [ST_LSM6DSX_ID_ACC] = {
326 .reg = {
327 .addr = 0x10,
328 .mask = GENMASK(3, 2),
329 },
330 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
331 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
332 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
333 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
334 .fs_len = 4,
335 },
336 [ST_LSM6DSX_ID_GYRO] = {
337 .reg = {
338 .addr = 0x11,
339 .mask = GENMASK(3, 2),
340 },
341 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
342 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
343 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
344 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
345 .fs_len = 4,
346 },
347 },
348 .decimator = {
349 [ST_LSM6DSX_ID_ACC] = {
350 .addr = 0x08,
351 .mask = GENMASK(2, 0),
352 },
353 [ST_LSM6DSX_ID_GYRO] = {
354 .addr = 0x08,
355 .mask = GENMASK(5, 3),
356 },
357 },
358 .fifo_ops = {
359 .update_fifo = st_lsm6dsx_update_fifo,
360 .read_fifo = st_lsm6dsx_read_fifo,
361 .fifo_th = {
362 .addr = 0x06,
363 .mask = GENMASK(11, 0),
364 },
365 .fifo_diff = {
366 .addr = 0x3a,
367 .mask = GENMASK(11, 0),
368 },
369 .th_wl = 3, /* 1LSB = 2B */
370 },
371 .ts_settings = {
372 .timer_en = {
373 .addr = 0x58,
374 .mask = BIT(7),
375 },
376 .hr_timer = {
377 .addr = 0x5c,
378 .mask = BIT(4),
379 },
380 .fifo_en = {
381 .addr = 0x07,
382 .mask = BIT(7),
383 },
384 .decimator = {
385 .addr = 0x09,
386 .mask = GENMASK(5, 3),
387 },
388 },
389 },
390 {
391 .wai = 0x6a,
392 .int1_addr = 0x0d,
393 .int2_addr = 0x0e,
394 .reset_addr = 0x12,
395 .max_fifo_size = 682,
396 .id = {
397 {
398 .hw_id = ST_LSM6DSL_ID,
399 .name = ST_LSM6DSL_DEV_NAME,
400 }, {
401 .hw_id = ST_LSM6DSM_ID,
402 .name = ST_LSM6DSM_DEV_NAME,
403 }, {
404 .hw_id = ST_ISM330DLC_ID,
405 .name = ST_ISM330DLC_DEV_NAME,
406 }, {
407 .hw_id = ST_LSM6DS3TRC_ID,
408 .name = ST_LSM6DS3TRC_DEV_NAME,
409 },
410 },
411 .channels = {
412 [ST_LSM6DSX_ID_ACC] = {
413 .chan = st_lsm6dsx_acc_channels,
414 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
415 },
416 [ST_LSM6DSX_ID_GYRO] = {
417 .chan = st_lsm6dsx_gyro_channels,
418 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
419 },
420 },
421 .odr_table = {
422 [ST_LSM6DSX_ID_ACC] = {
423 .reg = {
424 .addr = 0x10,
425 .mask = GENMASK(7, 4),
426 },
427 .odr_avl[0] = { 13, 0x01 },
428 .odr_avl[1] = { 26, 0x02 },
429 .odr_avl[2] = { 52, 0x03 },
430 .odr_avl[3] = { 104, 0x04 },
431 .odr_avl[4] = { 208, 0x05 },
432 .odr_avl[5] = { 416, 0x06 },
433 },
434 [ST_LSM6DSX_ID_GYRO] = {
435 .reg = {
436 .addr = 0x11,
437 .mask = GENMASK(7, 4),
438 },
439 .odr_avl[0] = { 13, 0x01 },
440 .odr_avl[1] = { 26, 0x02 },
441 .odr_avl[2] = { 52, 0x03 },
442 .odr_avl[3] = { 104, 0x04 },
443 .odr_avl[4] = { 208, 0x05 },
444 .odr_avl[5] = { 416, 0x06 },
445 },
446 },
447 .fs_table = {
448 [ST_LSM6DSX_ID_ACC] = {
449 .reg = {
450 .addr = 0x10,
451 .mask = GENMASK(3, 2),
452 },
453 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
454 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
455 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
456 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
457 .fs_len = 4,
458 },
459 [ST_LSM6DSX_ID_GYRO] = {
460 .reg = {
461 .addr = 0x11,
462 .mask = GENMASK(3, 2),
463 },
464 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
465 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
466 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
467 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
468 .fs_len = 4,
469 },
470 },
471 .decimator = {
472 [ST_LSM6DSX_ID_ACC] = {
473 .addr = 0x08,
474 .mask = GENMASK(2, 0),
475 },
476 [ST_LSM6DSX_ID_GYRO] = {
477 .addr = 0x08,
478 .mask = GENMASK(5, 3),
479 },
480 },
481 .fifo_ops = {
482 .update_fifo = st_lsm6dsx_update_fifo,
483 .read_fifo = st_lsm6dsx_read_fifo,
484 .fifo_th = {
485 .addr = 0x06,
486 .mask = GENMASK(10, 0),
487 },
488 .fifo_diff = {
489 .addr = 0x3a,
490 .mask = GENMASK(10, 0),
491 },
492 .th_wl = 3, /* 1LSB = 2B */
493 },
494 .ts_settings = {
495 .timer_en = {
496 .addr = 0x19,
497 .mask = BIT(5),
498 },
499 .hr_timer = {
500 .addr = 0x5c,
501 .mask = BIT(4),
502 },
503 .fifo_en = {
504 .addr = 0x07,
505 .mask = BIT(7),
506 },
507 .decimator = {
508 .addr = 0x09,
509 .mask = GENMASK(5, 3),
510 },
511 },
512 },
513 {
514 .wai = 0x6c,
515 .int1_addr = 0x0d,
516 .int2_addr = 0x0e,
517 .reset_addr = 0x12,
518 .max_fifo_size = 512,
519 .id = {
520 {
521 .hw_id = ST_LSM6DSO_ID,
522 .name = ST_LSM6DSO_DEV_NAME,
523 }, {
524 .hw_id = ST_LSM6DSOX_ID,
525 .name = ST_LSM6DSOX_DEV_NAME,
526 },
527 },
528 .channels = {
529 [ST_LSM6DSX_ID_ACC] = {
530 .chan = st_lsm6dsx_acc_channels,
531 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
532 },
533 [ST_LSM6DSX_ID_GYRO] = {
534 .chan = st_lsm6dsx_gyro_channels,
535 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
536 },
537 },
538 .odr_table = {
539 [ST_LSM6DSX_ID_ACC] = {
540 .reg = {
541 .addr = 0x10,
542 .mask = GENMASK(7, 4),
543 },
544 .odr_avl[0] = { 13, 0x01 },
545 .odr_avl[1] = { 26, 0x02 },
546 .odr_avl[2] = { 52, 0x03 },
547 .odr_avl[3] = { 104, 0x04 },
548 .odr_avl[4] = { 208, 0x05 },
549 .odr_avl[5] = { 416, 0x06 },
550 },
551 [ST_LSM6DSX_ID_GYRO] = {
552 .reg = {
553 .addr = 0x11,
554 .mask = GENMASK(7, 4),
555 },
556 .odr_avl[0] = { 13, 0x01 },
557 .odr_avl[1] = { 26, 0x02 },
558 .odr_avl[2] = { 52, 0x03 },
559 .odr_avl[3] = { 104, 0x04 },
560 .odr_avl[4] = { 208, 0x05 },
561 .odr_avl[5] = { 416, 0x06 },
562 },
563 },
564 .fs_table = {
565 [ST_LSM6DSX_ID_ACC] = {
566 .reg = {
567 .addr = 0x10,
568 .mask = GENMASK(3, 2),
569 },
570 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
571 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
572 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
573 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
574 .fs_len = 4,
575 },
576 [ST_LSM6DSX_ID_GYRO] = {
577 .reg = {
578 .addr = 0x11,
579 .mask = GENMASK(3, 2),
580 },
581 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
582 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
583 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
584 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
585 .fs_len = 4,
586 },
587 },
588 .batch = {
589 [ST_LSM6DSX_ID_ACC] = {
590 .addr = 0x09,
591 .mask = GENMASK(3, 0),
592 },
593 [ST_LSM6DSX_ID_GYRO] = {
594 .addr = 0x09,
595 .mask = GENMASK(7, 4),
596 },
597 },
598 .fifo_ops = {
599 .update_fifo = st_lsm6dsx_update_fifo,
600 .read_fifo = st_lsm6dsx_read_tagged_fifo,
601 .fifo_th = {
602 .addr = 0x07,
603 .mask = GENMASK(8, 0),
604 },
605 .fifo_diff = {
606 .addr = 0x3a,
607 .mask = GENMASK(9, 0),
608 },
609 .th_wl = 1,
610 },
611 .ts_settings = {
612 .timer_en = {
613 .addr = 0x19,
614 .mask = BIT(5),
615 },
616 .decimator = {
617 .addr = 0x0a,
618 .mask = GENMASK(7, 6),
619 },
620 },
621 .shub_settings = {
622 .page_mux = {
623 .addr = 0x01,
624 .mask = BIT(6),
625 },
626 .master_en = {
627 .addr = 0x14,
628 .mask = BIT(2),
629 },
630 .pullup_en = {
631 .addr = 0x14,
632 .mask = BIT(3),
633 },
634 .aux_sens = {
635 .addr = 0x14,
636 .mask = GENMASK(1, 0),
637 },
638 .wr_once = {
639 .addr = 0x14,
640 .mask = BIT(6),
641 },
642 .shub_out = 0x02,
643 .slv0_addr = 0x15,
644 .dw_slv0_addr = 0x21,
645 .batch_en = BIT(3),
646 }
647 },
648 {
649 .wai = 0x6b,
650 .int1_addr = 0x0d,
651 .int2_addr = 0x0e,
652 .reset_addr = 0x12,
653 .max_fifo_size = 512,
654 .id = {
655 {
656 .hw_id = ST_ASM330LHH_ID,
657 .name = ST_ASM330LHH_DEV_NAME,
658 },
659 },
660 .channels = {
661 [ST_LSM6DSX_ID_ACC] = {
662 .chan = st_lsm6dsx_acc_channels,
663 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
664 },
665 [ST_LSM6DSX_ID_GYRO] = {
666 .chan = st_lsm6dsx_gyro_channels,
667 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
668 },
669 },
670 .odr_table = {
671 [ST_LSM6DSX_ID_ACC] = {
672 .reg = {
673 .addr = 0x10,
674 .mask = GENMASK(7, 4),
675 },
676 .odr_avl[0] = { 13, 0x01 },
677 .odr_avl[1] = { 26, 0x02 },
678 .odr_avl[2] = { 52, 0x03 },
679 .odr_avl[3] = { 104, 0x04 },
680 .odr_avl[4] = { 208, 0x05 },
681 .odr_avl[5] = { 416, 0x06 },
682 },
683 [ST_LSM6DSX_ID_GYRO] = {
684 .reg = {
685 .addr = 0x11,
686 .mask = GENMASK(7, 4),
687 },
688 .odr_avl[0] = { 13, 0x01 },
689 .odr_avl[1] = { 26, 0x02 },
690 .odr_avl[2] = { 52, 0x03 },
691 .odr_avl[3] = { 104, 0x04 },
692 .odr_avl[4] = { 208, 0x05 },
693 .odr_avl[5] = { 416, 0x06 },
694 },
695 },
696 .fs_table = {
697 [ST_LSM6DSX_ID_ACC] = {
698 .reg = {
699 .addr = 0x10,
700 .mask = GENMASK(3, 2),
701 },
702 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
703 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
704 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
705 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
706 .fs_len = 4,
707 },
708 [ST_LSM6DSX_ID_GYRO] = {
709 .reg = {
710 .addr = 0x11,
711 .mask = GENMASK(3, 2),
712 },
713 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
714 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
715 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
716 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
717 .fs_len = 4,
718 },
719 },
720 .batch = {
721 [ST_LSM6DSX_ID_ACC] = {
722 .addr = 0x09,
723 .mask = GENMASK(3, 0),
724 },
725 [ST_LSM6DSX_ID_GYRO] = {
726 .addr = 0x09,
727 .mask = GENMASK(7, 4),
728 },
729 },
730 .fifo_ops = {
731 .update_fifo = st_lsm6dsx_update_fifo,
732 .read_fifo = st_lsm6dsx_read_tagged_fifo,
733 .fifo_th = {
734 .addr = 0x07,
735 .mask = GENMASK(8, 0),
736 },
737 .fifo_diff = {
738 .addr = 0x3a,
739 .mask = GENMASK(9, 0),
740 },
741 .th_wl = 1,
742 },
743 .ts_settings = {
744 .timer_en = {
745 .addr = 0x19,
746 .mask = BIT(5),
747 },
748 .decimator = {
749 .addr = 0x0a,
750 .mask = GENMASK(7, 6),
751 },
752 },
753 },
754 {
755 .wai = 0x6b,
756 .int1_addr = 0x0d,
757 .int2_addr = 0x0e,
758 .reset_addr = 0x12,
759 .max_fifo_size = 512,
760 .id = {
761 {
762 .hw_id = ST_LSM6DSR_ID,
763 .name = ST_LSM6DSR_DEV_NAME,
764 }, {
765 .hw_id = ST_ISM330DHCX_ID,
766 .name = ST_ISM330DHCX_DEV_NAME,
767 },
768 },
769 .channels = {
770 [ST_LSM6DSX_ID_ACC] = {
771 .chan = st_lsm6dsx_acc_channels,
772 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
773 },
774 [ST_LSM6DSX_ID_GYRO] = {
775 .chan = st_lsm6dsx_gyro_channels,
776 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
777 },
778 },
779 .odr_table = {
780 [ST_LSM6DSX_ID_ACC] = {
781 .reg = {
782 .addr = 0x10,
783 .mask = GENMASK(7, 4),
784 },
785 .odr_avl[0] = { 13, 0x01 },
786 .odr_avl[1] = { 26, 0x02 },
787 .odr_avl[2] = { 52, 0x03 },
788 .odr_avl[3] = { 104, 0x04 },
789 .odr_avl[4] = { 208, 0x05 },
790 .odr_avl[5] = { 416, 0x06 },
791 },
792 [ST_LSM6DSX_ID_GYRO] = {
793 .reg = {
794 .addr = 0x11,
795 .mask = GENMASK(7, 4),
796 },
797 .odr_avl[0] = { 13, 0x01 },
798 .odr_avl[1] = { 26, 0x02 },
799 .odr_avl[2] = { 52, 0x03 },
800 .odr_avl[3] = { 104, 0x04 },
801 .odr_avl[4] = { 208, 0x05 },
802 .odr_avl[5] = { 416, 0x06 },
803 },
804 },
805 .fs_table = {
806 [ST_LSM6DSX_ID_ACC] = {
807 .reg = {
808 .addr = 0x10,
809 .mask = GENMASK(3, 2),
810 },
811 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
812 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
813 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
814 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
815 .fs_len = 4,
816 },
817 [ST_LSM6DSX_ID_GYRO] = {
818 .reg = {
819 .addr = 0x11,
820 .mask = GENMASK(3, 2),
821 },
822 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
823 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
824 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
825 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
826 .fs_len = 4,
827 },
828 },
829 .batch = {
830 [ST_LSM6DSX_ID_ACC] = {
831 .addr = 0x09,
832 .mask = GENMASK(3, 0),
833 },
834 [ST_LSM6DSX_ID_GYRO] = {
835 .addr = 0x09,
836 .mask = GENMASK(7, 4),
837 },
838 },
839 .fifo_ops = {
840 .update_fifo = st_lsm6dsx_update_fifo,
841 .read_fifo = st_lsm6dsx_read_tagged_fifo,
842 .fifo_th = {
843 .addr = 0x07,
844 .mask = GENMASK(8, 0),
845 },
846 .fifo_diff = {
847 .addr = 0x3a,
848 .mask = GENMASK(9, 0),
849 },
850 .th_wl = 1,
851 },
852 .ts_settings = {
853 .timer_en = {
854 .addr = 0x19,
855 .mask = BIT(5),
856 },
857 .decimator = {
858 .addr = 0x0a,
859 .mask = GENMASK(7, 6),
860 },
861 },
862 .shub_settings = {
863 .page_mux = {
864 .addr = 0x01,
865 .mask = BIT(6),
866 },
867 .master_en = {
868 .addr = 0x14,
869 .mask = BIT(2),
870 },
871 .pullup_en = {
872 .addr = 0x14,
873 .mask = BIT(3),
874 },
875 .aux_sens = {
876 .addr = 0x14,
877 .mask = GENMASK(1, 0),
878 },
879 .wr_once = {
880 .addr = 0x14,
881 .mask = BIT(6),
882 },
883 .shub_out = 0x02,
884 .slv0_addr = 0x15,
885 .dw_slv0_addr = 0x21,
886 .batch_en = BIT(3),
887 }
888 },
889 };
890
st_lsm6dsx_set_page(struct st_lsm6dsx_hw * hw,bool enable)891 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
892 {
893 const struct st_lsm6dsx_shub_settings *hub_settings;
894 unsigned int data;
895 int err;
896
897 hub_settings = &hw->settings->shub_settings;
898 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
899 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
900 hub_settings->page_mux.mask, data);
901 usleep_range(100, 150);
902
903 return err;
904 }
905
st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw * hw,int id,const char ** name)906 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
907 const char **name)
908 {
909 int err, i, j, data;
910
911 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
912 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
913 if (id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
914 break;
915 }
916 if (j < ST_LSM6DSX_MAX_ID)
917 break;
918 }
919
920 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
921 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
922 return -ENODEV;
923 }
924
925 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
926 if (err < 0) {
927 dev_err(hw->dev, "failed to read whoami register\n");
928 return err;
929 }
930
931 if (data != st_lsm6dsx_sensor_settings[i].wai) {
932 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
933 return -ENODEV;
934 }
935
936 *name = st_lsm6dsx_sensor_settings[i].id[j].name;
937 hw->settings = &st_lsm6dsx_sensor_settings[i];
938
939 return 0;
940 }
941
st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor * sensor,u32 gain)942 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
943 u32 gain)
944 {
945 const struct st_lsm6dsx_fs_table_entry *fs_table;
946 unsigned int data;
947 int i, err;
948
949 fs_table = &sensor->hw->settings->fs_table[sensor->id];
950 for (i = 0; i < fs_table->fs_len; i++) {
951 if (fs_table->fs_avl[i].gain == gain)
952 break;
953 }
954
955 if (i == fs_table->fs_len)
956 return -EINVAL;
957
958 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
959 fs_table->reg.mask);
960 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
961 fs_table->reg.mask, data);
962 if (err < 0)
963 return err;
964
965 sensor->gain = gain;
966
967 return 0;
968 }
969
st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor * sensor,u16 odr,u8 * val)970 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val)
971 {
972 const struct st_lsm6dsx_odr_table_entry *odr_table;
973 int i;
974
975 odr_table = &sensor->hw->settings->odr_table[sensor->id];
976 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++)
977 /*
978 * ext devices can run at different odr respect to
979 * accel sensor
980 */
981 if (odr_table->odr_avl[i].hz >= odr)
982 break;
983
984 if (i == ST_LSM6DSX_ODR_LIST_SIZE)
985 return -EINVAL;
986
987 *val = odr_table->odr_avl[i].val;
988
989 return 0;
990 }
991
st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw * hw,u16 odr,enum st_lsm6dsx_sensor_id id)992 static u16 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u16 odr,
993 enum st_lsm6dsx_sensor_id id)
994 {
995 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
996
997 if (odr > 0) {
998 if (hw->enable_mask & BIT(id))
999 return max_t(u16, ref->odr, odr);
1000 else
1001 return odr;
1002 } else {
1003 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1004 }
1005 }
1006
st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor * sensor,u16 req_odr)1007 static int st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u16 req_odr)
1008 {
1009 struct st_lsm6dsx_sensor *ref_sensor = sensor;
1010 struct st_lsm6dsx_hw *hw = sensor->hw;
1011 const struct st_lsm6dsx_reg *reg;
1012 unsigned int data;
1013 u8 val = 0;
1014 int err;
1015
1016 switch (sensor->id) {
1017 case ST_LSM6DSX_ID_EXT0:
1018 case ST_LSM6DSX_ID_EXT1:
1019 case ST_LSM6DSX_ID_EXT2:
1020 case ST_LSM6DSX_ID_ACC: {
1021 u16 odr;
1022 int i;
1023
1024 /*
1025 * i2c embedded controller relies on the accelerometer sensor as
1026 * bus read/write trigger so we need to enable accel device
1027 * at odr = max(accel_odr, ext_odr) in order to properly
1028 * communicate with i2c slave devices
1029 */
1030 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1031 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1032 if (!hw->iio_devs[i] || i == sensor->id)
1033 continue;
1034
1035 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1036 if (odr != req_odr)
1037 /* device already configured */
1038 return 0;
1039 }
1040 break;
1041 }
1042 default:
1043 break;
1044 }
1045
1046 if (req_odr > 0) {
1047 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1048 if (err < 0)
1049 return err;
1050 }
1051
1052 reg = &hw->settings->odr_table[ref_sensor->id].reg;
1053 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1054 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1055 }
1056
st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1057 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1058 bool enable)
1059 {
1060 struct st_lsm6dsx_hw *hw = sensor->hw;
1061 u16 odr = enable ? sensor->odr : 0;
1062 int err;
1063
1064 err = st_lsm6dsx_set_odr(sensor, odr);
1065 if (err < 0)
1066 return err;
1067
1068 if (enable)
1069 hw->enable_mask |= BIT(sensor->id);
1070 else
1071 hw->enable_mask &= ~BIT(sensor->id);
1072
1073 return 0;
1074 }
1075
st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor * sensor,u8 addr,int * val)1076 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1077 u8 addr, int *val)
1078 {
1079 struct st_lsm6dsx_hw *hw = sensor->hw;
1080 int err, delay;
1081 __le16 data;
1082
1083 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1084 if (err < 0)
1085 return err;
1086
1087 delay = 1000000 / sensor->odr;
1088 usleep_range(delay, 2 * delay);
1089
1090 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1091 if (err < 0)
1092 return err;
1093
1094 st_lsm6dsx_sensor_set_enable(sensor, false);
1095
1096 *val = (s16)le16_to_cpu(data);
1097
1098 return IIO_VAL_INT;
1099 }
1100
st_lsm6dsx_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)1101 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1102 struct iio_chan_spec const *ch,
1103 int *val, int *val2, long mask)
1104 {
1105 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1106 int ret;
1107
1108 switch (mask) {
1109 case IIO_CHAN_INFO_RAW:
1110 ret = iio_device_claim_direct_mode(iio_dev);
1111 if (ret)
1112 break;
1113
1114 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1115 iio_device_release_direct_mode(iio_dev);
1116 break;
1117 case IIO_CHAN_INFO_SAMP_FREQ:
1118 *val = sensor->odr;
1119 ret = IIO_VAL_INT;
1120 break;
1121 case IIO_CHAN_INFO_SCALE:
1122 *val = 0;
1123 *val2 = sensor->gain;
1124 ret = IIO_VAL_INT_PLUS_MICRO;
1125 break;
1126 default:
1127 ret = -EINVAL;
1128 break;
1129 }
1130
1131 return ret;
1132 }
1133
st_lsm6dsx_write_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)1134 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1135 struct iio_chan_spec const *chan,
1136 int val, int val2, long mask)
1137 {
1138 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1139 int err;
1140
1141 err = iio_device_claim_direct_mode(iio_dev);
1142 if (err)
1143 return err;
1144
1145 switch (mask) {
1146 case IIO_CHAN_INFO_SCALE:
1147 err = st_lsm6dsx_set_full_scale(sensor, val2);
1148 break;
1149 case IIO_CHAN_INFO_SAMP_FREQ: {
1150 u8 data;
1151
1152 err = st_lsm6dsx_check_odr(sensor, val, &data);
1153 if (!err)
1154 sensor->odr = val;
1155 break;
1156 }
1157 default:
1158 err = -EINVAL;
1159 break;
1160 }
1161
1162 iio_device_release_direct_mode(iio_dev);
1163
1164 return err;
1165 }
1166
st_lsm6dsx_set_watermark(struct iio_dev * iio_dev,unsigned int val)1167 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
1168 {
1169 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1170 struct st_lsm6dsx_hw *hw = sensor->hw;
1171 int err;
1172
1173 if (val < 1 || val > hw->settings->max_fifo_size)
1174 return -EINVAL;
1175
1176 mutex_lock(&hw->conf_lock);
1177
1178 err = st_lsm6dsx_update_watermark(sensor, val);
1179
1180 mutex_unlock(&hw->conf_lock);
1181
1182 if (err < 0)
1183 return err;
1184
1185 sensor->watermark = val;
1186
1187 return 0;
1188 }
1189
1190 static ssize_t
st_lsm6dsx_sysfs_sampling_frequency_avail(struct device * dev,struct device_attribute * attr,char * buf)1191 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
1192 struct device_attribute *attr,
1193 char *buf)
1194 {
1195 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1196 enum st_lsm6dsx_sensor_id id = sensor->id;
1197 struct st_lsm6dsx_hw *hw = sensor->hw;
1198 int i, len = 0;
1199
1200 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++)
1201 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
1202 hw->settings->odr_table[id].odr_avl[i].hz);
1203 buf[len - 1] = '\n';
1204
1205 return len;
1206 }
1207
st_lsm6dsx_sysfs_scale_avail(struct device * dev,struct device_attribute * attr,char * buf)1208 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
1209 struct device_attribute *attr,
1210 char *buf)
1211 {
1212 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1213 const struct st_lsm6dsx_fs_table_entry *fs_table;
1214 struct st_lsm6dsx_hw *hw = sensor->hw;
1215 int i, len = 0;
1216
1217 fs_table = &hw->settings->fs_table[sensor->id];
1218 for (i = 0; i < fs_table->fs_len; i++)
1219 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ",
1220 fs_table->fs_avl[i].gain);
1221 buf[len - 1] = '\n';
1222
1223 return len;
1224 }
1225
1226 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
1227 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
1228 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1229 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
1230 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1231
1232 static struct attribute *st_lsm6dsx_acc_attributes[] = {
1233 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1234 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
1235 NULL,
1236 };
1237
1238 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
1239 .attrs = st_lsm6dsx_acc_attributes,
1240 };
1241
1242 static const struct iio_info st_lsm6dsx_acc_info = {
1243 .attrs = &st_lsm6dsx_acc_attribute_group,
1244 .read_raw = st_lsm6dsx_read_raw,
1245 .write_raw = st_lsm6dsx_write_raw,
1246 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1247 };
1248
1249 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
1250 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1251 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
1252 NULL,
1253 };
1254
1255 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
1256 .attrs = st_lsm6dsx_gyro_attributes,
1257 };
1258
1259 static const struct iio_info st_lsm6dsx_gyro_info = {
1260 .attrs = &st_lsm6dsx_gyro_attribute_group,
1261 .read_raw = st_lsm6dsx_read_raw,
1262 .write_raw = st_lsm6dsx_write_raw,
1263 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1264 };
1265
st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw * hw,int * drdy_pin)1266 static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
1267 {
1268 struct device_node *np = hw->dev->of_node;
1269
1270 if (!np)
1271 return -EINVAL;
1272
1273 return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin);
1274 }
1275
st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw * hw,u8 * drdy_reg)1276 static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg)
1277 {
1278 int err = 0, drdy_pin;
1279
1280 if (st_lsm6dsx_of_get_drdy_pin(hw, &drdy_pin) < 0) {
1281 struct st_sensors_platform_data *pdata;
1282 struct device *dev = hw->dev;
1283
1284 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1285 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
1286 }
1287
1288 switch (drdy_pin) {
1289 case 1:
1290 *drdy_reg = hw->settings->int1_addr;
1291 break;
1292 case 2:
1293 *drdy_reg = hw->settings->int2_addr;
1294 break;
1295 default:
1296 dev_err(hw->dev, "unsupported data ready pin\n");
1297 err = -EINVAL;
1298 break;
1299 }
1300
1301 return err;
1302 }
1303
st_lsm6dsx_init_shub(struct st_lsm6dsx_hw * hw)1304 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
1305 {
1306 const struct st_lsm6dsx_shub_settings *hub_settings;
1307 struct device_node *np = hw->dev->of_node;
1308 struct st_sensors_platform_data *pdata;
1309 unsigned int data;
1310 int err = 0;
1311
1312 hub_settings = &hw->settings->shub_settings;
1313
1314 pdata = (struct st_sensors_platform_data *)hw->dev->platform_data;
1315 if ((np && of_property_read_bool(np, "st,pullups")) ||
1316 (pdata && pdata->pullups)) {
1317 err = st_lsm6dsx_set_page(hw, true);
1318 if (err < 0)
1319 return err;
1320
1321 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
1322 err = regmap_update_bits(hw->regmap,
1323 hub_settings->pullup_en.addr,
1324 hub_settings->pullup_en.mask, data);
1325
1326 st_lsm6dsx_set_page(hw, false);
1327
1328 if (err < 0)
1329 return err;
1330 }
1331
1332 if (hub_settings->aux_sens.addr) {
1333 /* configure aux sensors */
1334 err = st_lsm6dsx_set_page(hw, true);
1335 if (err < 0)
1336 return err;
1337
1338 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
1339 err = regmap_update_bits(hw->regmap,
1340 hub_settings->aux_sens.addr,
1341 hub_settings->aux_sens.mask, data);
1342
1343 st_lsm6dsx_set_page(hw, false);
1344 }
1345
1346 return err;
1347 }
1348
st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw * hw)1349 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
1350 {
1351 const struct st_lsm6dsx_hw_ts_settings *ts_settings;
1352 int err, val;
1353
1354 ts_settings = &hw->settings->ts_settings;
1355 /* enable hw timestamp generation if necessary */
1356 if (ts_settings->timer_en.addr) {
1357 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
1358 err = regmap_update_bits(hw->regmap,
1359 ts_settings->timer_en.addr,
1360 ts_settings->timer_en.mask, val);
1361 if (err < 0)
1362 return err;
1363 }
1364
1365 /* enable high resolution for hw ts timer if necessary */
1366 if (ts_settings->hr_timer.addr) {
1367 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
1368 err = regmap_update_bits(hw->regmap,
1369 ts_settings->hr_timer.addr,
1370 ts_settings->hr_timer.mask, val);
1371 if (err < 0)
1372 return err;
1373 }
1374
1375 /* enable ts queueing in FIFO if necessary */
1376 if (ts_settings->fifo_en.addr) {
1377 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
1378 err = regmap_update_bits(hw->regmap,
1379 ts_settings->fifo_en.addr,
1380 ts_settings->fifo_en.mask, val);
1381 if (err < 0)
1382 return err;
1383 }
1384 return 0;
1385 }
1386
st_lsm6dsx_init_device(struct st_lsm6dsx_hw * hw)1387 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
1388 {
1389 u8 drdy_int_reg;
1390 int err;
1391
1392 /* device sw reset */
1393 err = regmap_update_bits(hw->regmap, hw->settings->reset_addr,
1394 ST_LSM6DSX_REG_RESET_MASK,
1395 FIELD_PREP(ST_LSM6DSX_REG_RESET_MASK, 1));
1396 if (err < 0)
1397 return err;
1398
1399 msleep(50);
1400
1401 /* reload trimming parameter */
1402 err = regmap_update_bits(hw->regmap, hw->settings->reset_addr,
1403 ST_LSM6DSX_REG_BOOT_MASK,
1404 FIELD_PREP(ST_LSM6DSX_REG_BOOT_MASK, 1));
1405 if (err < 0)
1406 return err;
1407
1408 msleep(50);
1409
1410 /* enable Block Data Update */
1411 err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_BDU_ADDR,
1412 ST_LSM6DSX_REG_BDU_MASK,
1413 FIELD_PREP(ST_LSM6DSX_REG_BDU_MASK, 1));
1414 if (err < 0)
1415 return err;
1416
1417 /* enable FIFO watermak interrupt */
1418 err = st_lsm6dsx_get_drdy_reg(hw, &drdy_int_reg);
1419 if (err < 0)
1420 return err;
1421
1422 err = regmap_update_bits(hw->regmap, drdy_int_reg,
1423 ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK,
1424 FIELD_PREP(ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK,
1425 1));
1426 if (err < 0)
1427 return err;
1428
1429 err = st_lsm6dsx_init_shub(hw);
1430 if (err < 0)
1431 return err;
1432
1433 return st_lsm6dsx_init_hw_timer(hw);
1434 }
1435
st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_sensor_id id,const char * name)1436 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
1437 enum st_lsm6dsx_sensor_id id,
1438 const char *name)
1439 {
1440 struct st_lsm6dsx_sensor *sensor;
1441 struct iio_dev *iio_dev;
1442
1443 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
1444 if (!iio_dev)
1445 return NULL;
1446
1447 iio_dev->modes = INDIO_DIRECT_MODE;
1448 iio_dev->dev.parent = hw->dev;
1449 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
1450 iio_dev->channels = hw->settings->channels[id].chan;
1451 iio_dev->num_channels = hw->settings->channels[id].len;
1452
1453 sensor = iio_priv(iio_dev);
1454 sensor->id = id;
1455 sensor->hw = hw;
1456 sensor->odr = hw->settings->odr_table[id].odr_avl[0].hz;
1457 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
1458 sensor->watermark = 1;
1459
1460 switch (id) {
1461 case ST_LSM6DSX_ID_ACC:
1462 iio_dev->info = &st_lsm6dsx_acc_info;
1463 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
1464 name);
1465 break;
1466 case ST_LSM6DSX_ID_GYRO:
1467 iio_dev->info = &st_lsm6dsx_gyro_info;
1468 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
1469 name);
1470 break;
1471 default:
1472 return NULL;
1473 }
1474 iio_dev->name = sensor->name;
1475
1476 return iio_dev;
1477 }
1478
st_lsm6dsx_probe(struct device * dev,int irq,int hw_id,struct regmap * regmap)1479 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
1480 struct regmap *regmap)
1481 {
1482 const struct st_lsm6dsx_shub_settings *hub_settings;
1483 struct st_lsm6dsx_hw *hw;
1484 const char *name = NULL;
1485 int i, err;
1486
1487 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
1488 if (!hw)
1489 return -ENOMEM;
1490
1491 dev_set_drvdata(dev, (void *)hw);
1492
1493 mutex_init(&hw->fifo_lock);
1494 mutex_init(&hw->conf_lock);
1495 mutex_init(&hw->page_lock);
1496
1497 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
1498 if (!hw->buff)
1499 return -ENOMEM;
1500
1501 hw->dev = dev;
1502 hw->irq = irq;
1503 hw->regmap = regmap;
1504
1505 err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
1506 if (err < 0)
1507 return err;
1508
1509 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
1510 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
1511 if (!hw->iio_devs[i])
1512 return -ENOMEM;
1513 }
1514
1515 err = st_lsm6dsx_init_device(hw);
1516 if (err < 0)
1517 return err;
1518
1519 hub_settings = &hw->settings->shub_settings;
1520 if (hub_settings->master_en.addr) {
1521 err = st_lsm6dsx_shub_probe(hw, name);
1522 if (err < 0)
1523 return err;
1524 }
1525
1526 if (hw->irq > 0) {
1527 err = st_lsm6dsx_fifo_setup(hw);
1528 if (err < 0)
1529 return err;
1530 }
1531
1532 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
1533 if (!hw->iio_devs[i])
1534 continue;
1535
1536 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
1537 if (err)
1538 return err;
1539 }
1540
1541 return 0;
1542 }
1543 EXPORT_SYMBOL(st_lsm6dsx_probe);
1544
st_lsm6dsx_suspend(struct device * dev)1545 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev)
1546 {
1547 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
1548 struct st_lsm6dsx_sensor *sensor;
1549 int i, err = 0;
1550
1551 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
1552 if (!hw->iio_devs[i])
1553 continue;
1554
1555 sensor = iio_priv(hw->iio_devs[i]);
1556 if (!(hw->enable_mask & BIT(sensor->id)))
1557 continue;
1558
1559 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
1560 sensor->id == ST_LSM6DSX_ID_EXT1 ||
1561 sensor->id == ST_LSM6DSX_ID_EXT2)
1562 err = st_lsm6dsx_shub_set_enable(sensor, false);
1563 else
1564 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1565 if (err < 0)
1566 return err;
1567
1568 hw->suspend_mask |= BIT(sensor->id);
1569 }
1570
1571 if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS)
1572 err = st_lsm6dsx_flush_fifo(hw);
1573
1574 return err;
1575 }
1576
st_lsm6dsx_resume(struct device * dev)1577 static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
1578 {
1579 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
1580 struct st_lsm6dsx_sensor *sensor;
1581 int i, err = 0;
1582
1583 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
1584 if (!hw->iio_devs[i])
1585 continue;
1586
1587 sensor = iio_priv(hw->iio_devs[i]);
1588 if (!(hw->suspend_mask & BIT(sensor->id)))
1589 continue;
1590
1591 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
1592 sensor->id == ST_LSM6DSX_ID_EXT1 ||
1593 sensor->id == ST_LSM6DSX_ID_EXT2)
1594 err = st_lsm6dsx_shub_set_enable(sensor, true);
1595 else
1596 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1597 if (err < 0)
1598 return err;
1599
1600 hw->suspend_mask &= ~BIT(sensor->id);
1601 }
1602
1603 if (hw->enable_mask)
1604 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
1605
1606 return err;
1607 }
1608
1609 const struct dev_pm_ops st_lsm6dsx_pm_ops = {
1610 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume)
1611 };
1612 EXPORT_SYMBOL(st_lsm6dsx_pm_ops);
1613
1614 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
1615 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
1616 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
1617 MODULE_LICENSE("GPL v2");
1618
