1 /*
2 * Routines for control of the AK4117 via 4-wire serial interface
3 * IEC958 (S/PDIF) receiver by Asahi Kasei
4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23 #include <linux/slab.h>
24 #include <linux/delay.h>
25 #include <linux/module.h>
26 #include <sound/core.h>
27 #include <sound/control.h>
28 #include <sound/pcm.h>
29 #include <sound/ak4117.h>
30 #include <sound/asoundef.h>
31
32 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
33 MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
34 MODULE_LICENSE("GPL");
35
36 #define AK4117_ADDR 0x00 /* fixed address */
37
38 static void snd_ak4117_timer(struct timer_list *t);
39
reg_write(struct ak4117 * ak4117,unsigned char reg,unsigned char val)40 static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
41 {
42 ak4117->write(ak4117->private_data, reg, val);
43 if (reg < sizeof(ak4117->regmap))
44 ak4117->regmap[reg] = val;
45 }
46
reg_read(struct ak4117 * ak4117,unsigned char reg)47 static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
48 {
49 return ak4117->read(ak4117->private_data, reg);
50 }
51
52 #if 0
53 static void reg_dump(struct ak4117 *ak4117)
54 {
55 int i;
56
57 printk(KERN_DEBUG "AK4117 REG DUMP:\n");
58 for (i = 0; i < 0x1b; i++)
59 printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
60 }
61 #endif
62
snd_ak4117_free(struct ak4117 * chip)63 static void snd_ak4117_free(struct ak4117 *chip)
64 {
65 del_timer_sync(&chip->timer);
66 kfree(chip);
67 }
68
snd_ak4117_dev_free(struct snd_device * device)69 static int snd_ak4117_dev_free(struct snd_device *device)
70 {
71 struct ak4117 *chip = device->device_data;
72 snd_ak4117_free(chip);
73 return 0;
74 }
75
snd_ak4117_create(struct snd_card * card,ak4117_read_t * read,ak4117_write_t * write,const unsigned char pgm[5],void * private_data,struct ak4117 ** r_ak4117)76 int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
77 const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
78 {
79 struct ak4117 *chip;
80 int err = 0;
81 unsigned char reg;
82 static struct snd_device_ops ops = {
83 .dev_free = snd_ak4117_dev_free,
84 };
85
86 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
87 if (chip == NULL)
88 return -ENOMEM;
89 spin_lock_init(&chip->lock);
90 chip->card = card;
91 chip->read = read;
92 chip->write = write;
93 chip->private_data = private_data;
94 timer_setup(&chip->timer, snd_ak4117_timer, 0);
95
96 for (reg = 0; reg < 5; reg++)
97 chip->regmap[reg] = pgm[reg];
98 snd_ak4117_reinit(chip);
99
100 chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
101 chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
102 chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
103
104 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
105 goto __fail;
106
107 if (r_ak4117)
108 *r_ak4117 = chip;
109 return 0;
110
111 __fail:
112 snd_ak4117_free(chip);
113 return err;
114 }
115
snd_ak4117_reg_write(struct ak4117 * chip,unsigned char reg,unsigned char mask,unsigned char val)116 void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
117 {
118 if (reg >= 5)
119 return;
120 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
121 }
122
snd_ak4117_reinit(struct ak4117 * chip)123 void snd_ak4117_reinit(struct ak4117 *chip)
124 {
125 unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
126
127 del_timer(&chip->timer);
128 chip->init = 1;
129 /* bring the chip to reset state and powerdown state */
130 reg_write(chip, AK4117_REG_PWRDN, 0);
131 udelay(200);
132 /* release reset, but leave powerdown */
133 reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
134 udelay(200);
135 for (reg = 1; reg < 5; reg++)
136 reg_write(chip, reg, chip->regmap[reg]);
137 /* release powerdown, everything is initialized now */
138 reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
139 chip->init = 0;
140 mod_timer(&chip->timer, 1 + jiffies);
141 }
142
external_rate(unsigned char rcs1)143 static unsigned int external_rate(unsigned char rcs1)
144 {
145 switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
146 case AK4117_FS_32000HZ: return 32000;
147 case AK4117_FS_44100HZ: return 44100;
148 case AK4117_FS_48000HZ: return 48000;
149 case AK4117_FS_88200HZ: return 88200;
150 case AK4117_FS_96000HZ: return 96000;
151 case AK4117_FS_176400HZ: return 176400;
152 case AK4117_FS_192000HZ: return 192000;
153 default: return 0;
154 }
155 }
156
snd_ak4117_in_error_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)157 static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
158 struct snd_ctl_elem_info *uinfo)
159 {
160 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
161 uinfo->count = 1;
162 uinfo->value.integer.min = 0;
163 uinfo->value.integer.max = LONG_MAX;
164 return 0;
165 }
166
snd_ak4117_in_error_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)167 static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
168 struct snd_ctl_elem_value *ucontrol)
169 {
170 struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
171
172 spin_lock_irq(&chip->lock);
173 ucontrol->value.integer.value[0] =
174 chip->errors[kcontrol->private_value];
175 chip->errors[kcontrol->private_value] = 0;
176 spin_unlock_irq(&chip->lock);
177 return 0;
178 }
179
180 #define snd_ak4117_in_bit_info snd_ctl_boolean_mono_info
181
snd_ak4117_in_bit_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)182 static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
183 struct snd_ctl_elem_value *ucontrol)
184 {
185 struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
186 unsigned char reg = kcontrol->private_value & 0xff;
187 unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
188 unsigned char inv = (kcontrol->private_value >> 31) & 1;
189
190 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
191 return 0;
192 }
193
snd_ak4117_rx_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)194 static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
195 struct snd_ctl_elem_info *uinfo)
196 {
197 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
198 uinfo->count = 1;
199 uinfo->value.integer.min = 0;
200 uinfo->value.integer.max = 1;
201 return 0;
202 }
203
snd_ak4117_rx_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)204 static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
205 struct snd_ctl_elem_value *ucontrol)
206 {
207 struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
208
209 ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
210 return 0;
211 }
212
snd_ak4117_rx_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)213 static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
214 struct snd_ctl_elem_value *ucontrol)
215 {
216 struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
217 int change;
218 u8 old_val;
219
220 spin_lock_irq(&chip->lock);
221 old_val = chip->regmap[AK4117_REG_IO];
222 change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
223 if (change)
224 reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
225 spin_unlock_irq(&chip->lock);
226 return change;
227 }
228
snd_ak4117_rate_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)229 static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
230 struct snd_ctl_elem_info *uinfo)
231 {
232 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
233 uinfo->count = 1;
234 uinfo->value.integer.min = 0;
235 uinfo->value.integer.max = 192000;
236 return 0;
237 }
238
snd_ak4117_rate_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)239 static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
240 struct snd_ctl_elem_value *ucontrol)
241 {
242 struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
243
244 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
245 return 0;
246 }
247
snd_ak4117_spdif_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)248 static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
249 {
250 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
251 uinfo->count = 1;
252 return 0;
253 }
254
snd_ak4117_spdif_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)255 static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
256 struct snd_ctl_elem_value *ucontrol)
257 {
258 struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
259 unsigned i;
260
261 for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
262 ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
263 return 0;
264 }
265
snd_ak4117_spdif_mask_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)266 static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
267 {
268 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
269 uinfo->count = 1;
270 return 0;
271 }
272
snd_ak4117_spdif_mask_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)273 static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
274 struct snd_ctl_elem_value *ucontrol)
275 {
276 memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
277 return 0;
278 }
279
snd_ak4117_spdif_pinfo(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)280 static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
281 {
282 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
283 uinfo->value.integer.min = 0;
284 uinfo->value.integer.max = 0xffff;
285 uinfo->count = 4;
286 return 0;
287 }
288
snd_ak4117_spdif_pget(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)289 static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
290 struct snd_ctl_elem_value *ucontrol)
291 {
292 struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
293 unsigned short tmp;
294
295 ucontrol->value.integer.value[0] = 0xf8f2;
296 ucontrol->value.integer.value[1] = 0x4e1f;
297 tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
298 ucontrol->value.integer.value[2] = tmp;
299 tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
300 ucontrol->value.integer.value[3] = tmp;
301 return 0;
302 }
303
snd_ak4117_spdif_qinfo(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)304 static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
305 {
306 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
307 uinfo->count = AK4117_REG_QSUB_SIZE;
308 return 0;
309 }
310
snd_ak4117_spdif_qget(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)311 static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
312 struct snd_ctl_elem_value *ucontrol)
313 {
314 struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
315 unsigned i;
316
317 for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
318 ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
319 return 0;
320 }
321
322 /* Don't forget to change AK4117_CONTROLS define!!! */
323 static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
324 {
325 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
326 .name = "IEC958 Parity Errors",
327 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
328 .info = snd_ak4117_in_error_info,
329 .get = snd_ak4117_in_error_get,
330 .private_value = AK4117_PARITY_ERRORS,
331 },
332 {
333 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
334 .name = "IEC958 V-Bit Errors",
335 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
336 .info = snd_ak4117_in_error_info,
337 .get = snd_ak4117_in_error_get,
338 .private_value = AK4117_V_BIT_ERRORS,
339 },
340 {
341 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
342 .name = "IEC958 C-CRC Errors",
343 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
344 .info = snd_ak4117_in_error_info,
345 .get = snd_ak4117_in_error_get,
346 .private_value = AK4117_CCRC_ERRORS,
347 },
348 {
349 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
350 .name = "IEC958 Q-CRC Errors",
351 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
352 .info = snd_ak4117_in_error_info,
353 .get = snd_ak4117_in_error_get,
354 .private_value = AK4117_QCRC_ERRORS,
355 },
356 {
357 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
358 .name = "IEC958 External Rate",
359 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
360 .info = snd_ak4117_rate_info,
361 .get = snd_ak4117_rate_get,
362 },
363 {
364 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
365 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
366 .access = SNDRV_CTL_ELEM_ACCESS_READ,
367 .info = snd_ak4117_spdif_mask_info,
368 .get = snd_ak4117_spdif_mask_get,
369 },
370 {
371 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
372 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
373 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
374 .info = snd_ak4117_spdif_info,
375 .get = snd_ak4117_spdif_get,
376 },
377 {
378 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
379 .name = "IEC958 Preamble Capture Default",
380 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
381 .info = snd_ak4117_spdif_pinfo,
382 .get = snd_ak4117_spdif_pget,
383 },
384 {
385 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
386 .name = "IEC958 Q-subcode Capture Default",
387 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
388 .info = snd_ak4117_spdif_qinfo,
389 .get = snd_ak4117_spdif_qget,
390 },
391 {
392 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
393 .name = "IEC958 Audio",
394 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
395 .info = snd_ak4117_in_bit_info,
396 .get = snd_ak4117_in_bit_get,
397 .private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
398 },
399 {
400 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
401 .name = "IEC958 Non-PCM Bitstream",
402 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
403 .info = snd_ak4117_in_bit_info,
404 .get = snd_ak4117_in_bit_get,
405 .private_value = (5<<8) | AK4117_REG_RCS1,
406 },
407 {
408 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
409 .name = "IEC958 DTS Bitstream",
410 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
411 .info = snd_ak4117_in_bit_info,
412 .get = snd_ak4117_in_bit_get,
413 .private_value = (6<<8) | AK4117_REG_RCS1,
414 },
415 {
416 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
417 .name = "AK4117 Input Select",
418 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
419 .info = snd_ak4117_rx_info,
420 .get = snd_ak4117_rx_get,
421 .put = snd_ak4117_rx_put,
422 }
423 };
424
snd_ak4117_build(struct ak4117 * ak4117,struct snd_pcm_substream * cap_substream)425 int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
426 {
427 struct snd_kcontrol *kctl;
428 unsigned int idx;
429 int err;
430
431 if (snd_BUG_ON(!cap_substream))
432 return -EINVAL;
433 ak4117->substream = cap_substream;
434 for (idx = 0; idx < AK4117_CONTROLS; idx++) {
435 kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
436 if (kctl == NULL)
437 return -ENOMEM;
438 kctl->id.device = cap_substream->pcm->device;
439 kctl->id.subdevice = cap_substream->number;
440 err = snd_ctl_add(ak4117->card, kctl);
441 if (err < 0)
442 return err;
443 ak4117->kctls[idx] = kctl;
444 }
445 return 0;
446 }
447
snd_ak4117_external_rate(struct ak4117 * ak4117)448 int snd_ak4117_external_rate(struct ak4117 *ak4117)
449 {
450 unsigned char rcs1;
451
452 rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
453 return external_rate(rcs1);
454 }
455
snd_ak4117_check_rate_and_errors(struct ak4117 * ak4117,unsigned int flags)456 int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
457 {
458 struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
459 unsigned long _flags;
460 int res = 0;
461 unsigned char rcs0, rcs1, rcs2;
462 unsigned char c0, c1;
463
464 rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
465 if (flags & AK4117_CHECK_NO_STAT)
466 goto __rate;
467 rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
468 rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
469 // printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
470 spin_lock_irqsave(&ak4117->lock, _flags);
471 if (rcs0 & AK4117_PAR)
472 ak4117->errors[AK4117_PARITY_ERRORS]++;
473 if (rcs0 & AK4117_V)
474 ak4117->errors[AK4117_V_BIT_ERRORS]++;
475 if (rcs2 & AK4117_CCRC)
476 ak4117->errors[AK4117_CCRC_ERRORS]++;
477 if (rcs2 & AK4117_QCRC)
478 ak4117->errors[AK4117_QCRC_ERRORS]++;
479 c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
480 (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
481 c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
482 (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
483 ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
484 ak4117->rcs1 = rcs1;
485 ak4117->rcs2 = rcs2;
486 spin_unlock_irqrestore(&ak4117->lock, _flags);
487
488 if (rcs0 & AK4117_PAR)
489 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
490 if (rcs0 & AK4117_V)
491 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
492 if (rcs2 & AK4117_CCRC)
493 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
494 if (rcs2 & AK4117_QCRC)
495 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
496
497 /* rate change */
498 if (c1 & 0x0f)
499 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
500
501 if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
502 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
503 if (c0 & AK4117_QINT)
504 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
505
506 if (c0 & AK4117_AUDION)
507 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
508 if (c1 & AK4117_NPCM)
509 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
510 if (c1 & AK4117_DTSCD)
511 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
512
513 if (ak4117->change_callback && (c0 | c1) != 0)
514 ak4117->change_callback(ak4117, c0, c1);
515
516 __rate:
517 /* compare rate */
518 res = external_rate(rcs1);
519 if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
520 snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
521 if (snd_pcm_running(ak4117->substream)) {
522 // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
523 snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
524 wake_up(&runtime->sleep);
525 res = 1;
526 }
527 snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
528 }
529 return res;
530 }
531
snd_ak4117_timer(struct timer_list * t)532 static void snd_ak4117_timer(struct timer_list *t)
533 {
534 struct ak4117 *chip = from_timer(chip, t, timer);
535
536 if (chip->init)
537 return;
538 snd_ak4117_check_rate_and_errors(chip, 0);
539 mod_timer(&chip->timer, 1 + jiffies);
540 }
541
542 EXPORT_SYMBOL(snd_ak4117_create);
543 EXPORT_SYMBOL(snd_ak4117_reg_write);
544 EXPORT_SYMBOL(snd_ak4117_reinit);
545 EXPORT_SYMBOL(snd_ak4117_build);
546 EXPORT_SYMBOL(snd_ak4117_external_rate);
547 EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);
548
