1 /*
2 * intel_mid_sfi.c: Intel MID SFI initialization code
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/interrupt.h>
16 #include <linux/scatterlist.h>
17 #include <linux/sfi.h>
18 #include <linux/spi/spi.h>
19 #include <linux/i2c.h>
20 #include <linux/skbuff.h>
21 #include <linux/gpio.h>
22 #include <linux/gpio_keys.h>
23 #include <linux/input.h>
24 #include <linux/platform_device.h>
25 #include <linux/irq.h>
26 #include <linux/export.h>
27 #include <linux/notifier.h>
28 #include <linux/mmc/core.h>
29 #include <linux/mmc/card.h>
30 #include <linux/blkdev.h>
31
32 #include <asm/setup.h>
33 #include <asm/mpspec_def.h>
34 #include <asm/hw_irq.h>
35 #include <asm/apic.h>
36 #include <asm/io_apic.h>
37 #include <asm/intel-mid.h>
38 #include <asm/intel_mid_vrtc.h>
39 #include <asm/io.h>
40 #include <asm/i8259.h>
41 #include <asm/intel_scu_ipc.h>
42 #include <asm/apb_timer.h>
43 #include <asm/reboot.h>
44
45 #define SFI_SIG_OEM0 "OEM0"
46 #define MAX_IPCDEVS 24
47 #define MAX_SCU_SPI 24
48 #define MAX_SCU_I2C 24
49
50 static struct platform_device *ipc_devs[MAX_IPCDEVS];
51 static struct spi_board_info *spi_devs[MAX_SCU_SPI];
52 static struct i2c_board_info *i2c_devs[MAX_SCU_I2C];
53 static struct sfi_gpio_table_entry *gpio_table;
54 static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
55 static int ipc_next_dev;
56 static int spi_next_dev;
57 static int i2c_next_dev;
58 static int i2c_bus[MAX_SCU_I2C];
59 static int gpio_num_entry;
60 static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
61 int sfi_mrtc_num;
62 int sfi_mtimer_num;
63
64 struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
65 EXPORT_SYMBOL_GPL(sfi_mrtc_array);
66
67 struct blocking_notifier_head intel_scu_notifier =
68 BLOCKING_NOTIFIER_INIT(intel_scu_notifier);
69 EXPORT_SYMBOL_GPL(intel_scu_notifier);
70
71 #define intel_mid_sfi_get_pdata(dev, priv) \
72 ((dev)->get_platform_data ? (dev)->get_platform_data(priv) : NULL)
73
74 /* parse all the mtimer info to a static mtimer array */
sfi_parse_mtmr(struct sfi_table_header * table)75 int __init sfi_parse_mtmr(struct sfi_table_header *table)
76 {
77 struct sfi_table_simple *sb;
78 struct sfi_timer_table_entry *pentry;
79 struct mpc_intsrc mp_irq;
80 int totallen;
81
82 sb = (struct sfi_table_simple *)table;
83 if (!sfi_mtimer_num) {
84 sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb,
85 struct sfi_timer_table_entry);
86 pentry = (struct sfi_timer_table_entry *) sb->pentry;
87 totallen = sfi_mtimer_num * sizeof(*pentry);
88 memcpy(sfi_mtimer_array, pentry, totallen);
89 }
90
91 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num);
92 pentry = sfi_mtimer_array;
93 for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) {
94 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n",
95 totallen, (u32)pentry->phys_addr,
96 pentry->freq_hz, pentry->irq);
97 mp_irq.type = MP_INTSRC;
98 mp_irq.irqtype = mp_INT;
99 mp_irq.irqflag = MP_IRQTRIG_EDGE | MP_IRQPOL_ACTIVE_HIGH;
100 mp_irq.srcbus = MP_BUS_ISA;
101 mp_irq.srcbusirq = pentry->irq; /* IRQ */
102 mp_irq.dstapic = MP_APIC_ALL;
103 mp_irq.dstirq = pentry->irq;
104 mp_save_irq(&mp_irq);
105 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL);
106 }
107
108 return 0;
109 }
110
sfi_get_mtmr(int hint)111 struct sfi_timer_table_entry *sfi_get_mtmr(int hint)
112 {
113 int i;
114 if (hint < sfi_mtimer_num) {
115 if (!sfi_mtimer_usage[hint]) {
116 pr_debug("hint taken for timer %d irq %d\n",
117 hint, sfi_mtimer_array[hint].irq);
118 sfi_mtimer_usage[hint] = 1;
119 return &sfi_mtimer_array[hint];
120 }
121 }
122 /* take the first timer available */
123 for (i = 0; i < sfi_mtimer_num;) {
124 if (!sfi_mtimer_usage[i]) {
125 sfi_mtimer_usage[i] = 1;
126 return &sfi_mtimer_array[i];
127 }
128 i++;
129 }
130 return NULL;
131 }
132
sfi_free_mtmr(struct sfi_timer_table_entry * mtmr)133 void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr)
134 {
135 int i;
136 for (i = 0; i < sfi_mtimer_num;) {
137 if (mtmr->irq == sfi_mtimer_array[i].irq) {
138 sfi_mtimer_usage[i] = 0;
139 return;
140 }
141 i++;
142 }
143 }
144
145 /* parse all the mrtc info to a global mrtc array */
sfi_parse_mrtc(struct sfi_table_header * table)146 int __init sfi_parse_mrtc(struct sfi_table_header *table)
147 {
148 struct sfi_table_simple *sb;
149 struct sfi_rtc_table_entry *pentry;
150 struct mpc_intsrc mp_irq;
151
152 int totallen;
153
154 sb = (struct sfi_table_simple *)table;
155 if (!sfi_mrtc_num) {
156 sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb,
157 struct sfi_rtc_table_entry);
158 pentry = (struct sfi_rtc_table_entry *)sb->pentry;
159 totallen = sfi_mrtc_num * sizeof(*pentry);
160 memcpy(sfi_mrtc_array, pentry, totallen);
161 }
162
163 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num);
164 pentry = sfi_mrtc_array;
165 for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) {
166 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n",
167 totallen, (u32)pentry->phys_addr, pentry->irq);
168 mp_irq.type = MP_INTSRC;
169 mp_irq.irqtype = mp_INT;
170 mp_irq.irqflag = MP_IRQTRIG_LEVEL | MP_IRQPOL_ACTIVE_LOW;
171 mp_irq.srcbus = MP_BUS_ISA;
172 mp_irq.srcbusirq = pentry->irq; /* IRQ */
173 mp_irq.dstapic = MP_APIC_ALL;
174 mp_irq.dstirq = pentry->irq;
175 mp_save_irq(&mp_irq);
176 mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL);
177 }
178 return 0;
179 }
180
181
182 /*
183 * Parsing GPIO table first, since the DEVS table will need this table
184 * to map the pin name to the actual pin.
185 */
sfi_parse_gpio(struct sfi_table_header * table)186 static int __init sfi_parse_gpio(struct sfi_table_header *table)
187 {
188 struct sfi_table_simple *sb;
189 struct sfi_gpio_table_entry *pentry;
190 int num, i;
191
192 if (gpio_table)
193 return 0;
194 sb = (struct sfi_table_simple *)table;
195 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry);
196 pentry = (struct sfi_gpio_table_entry *)sb->pentry;
197
198 gpio_table = kmemdup(pentry, num * sizeof(*pentry), GFP_KERNEL);
199 if (!gpio_table)
200 return -1;
201 gpio_num_entry = num;
202
203 pr_debug("GPIO pin info:\n");
204 for (i = 0; i < num; i++, pentry++)
205 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s,"
206 " pin = %d\n", i,
207 pentry->controller_name,
208 pentry->pin_name,
209 pentry->pin_no);
210 return 0;
211 }
212
get_gpio_by_name(const char * name)213 int get_gpio_by_name(const char *name)
214 {
215 struct sfi_gpio_table_entry *pentry = gpio_table;
216 int i;
217
218 if (!pentry)
219 return -1;
220 for (i = 0; i < gpio_num_entry; i++, pentry++) {
221 if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN))
222 return pentry->pin_no;
223 }
224 return -EINVAL;
225 }
226
intel_scu_ipc_device_register(struct platform_device * pdev)227 static void __init intel_scu_ipc_device_register(struct platform_device *pdev)
228 {
229 if (ipc_next_dev == MAX_IPCDEVS)
230 pr_err("too many SCU IPC devices");
231 else
232 ipc_devs[ipc_next_dev++] = pdev;
233 }
234
intel_scu_spi_device_register(struct spi_board_info * sdev)235 static void __init intel_scu_spi_device_register(struct spi_board_info *sdev)
236 {
237 struct spi_board_info *new_dev;
238
239 if (spi_next_dev == MAX_SCU_SPI) {
240 pr_err("too many SCU SPI devices");
241 return;
242 }
243
244 new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL);
245 if (!new_dev) {
246 pr_err("failed to alloc mem for delayed spi dev %s\n",
247 sdev->modalias);
248 return;
249 }
250 *new_dev = *sdev;
251
252 spi_devs[spi_next_dev++] = new_dev;
253 }
254
intel_scu_i2c_device_register(int bus,struct i2c_board_info * idev)255 static void __init intel_scu_i2c_device_register(int bus,
256 struct i2c_board_info *idev)
257 {
258 struct i2c_board_info *new_dev;
259
260 if (i2c_next_dev == MAX_SCU_I2C) {
261 pr_err("too many SCU I2C devices");
262 return;
263 }
264
265 new_dev = kzalloc(sizeof(*idev), GFP_KERNEL);
266 if (!new_dev) {
267 pr_err("failed to alloc mem for delayed i2c dev %s\n",
268 idev->type);
269 return;
270 }
271 *new_dev = *idev;
272
273 i2c_bus[i2c_next_dev] = bus;
274 i2c_devs[i2c_next_dev++] = new_dev;
275 }
276
277 /* Called by IPC driver */
intel_scu_devices_create(void)278 void intel_scu_devices_create(void)
279 {
280 int i;
281
282 for (i = 0; i < ipc_next_dev; i++)
283 platform_device_add(ipc_devs[i]);
284
285 for (i = 0; i < spi_next_dev; i++)
286 spi_register_board_info(spi_devs[i], 1);
287
288 for (i = 0; i < i2c_next_dev; i++) {
289 struct i2c_adapter *adapter;
290 struct i2c_client *client;
291
292 adapter = i2c_get_adapter(i2c_bus[i]);
293 if (adapter) {
294 client = i2c_new_device(adapter, i2c_devs[i]);
295 if (!client)
296 pr_err("can't create i2c device %s\n",
297 i2c_devs[i]->type);
298 } else
299 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1);
300 }
301 intel_scu_notifier_post(SCU_AVAILABLE, NULL);
302 }
303 EXPORT_SYMBOL_GPL(intel_scu_devices_create);
304
305 /* Called by IPC driver */
intel_scu_devices_destroy(void)306 void intel_scu_devices_destroy(void)
307 {
308 int i;
309
310 intel_scu_notifier_post(SCU_DOWN, NULL);
311
312 for (i = 0; i < ipc_next_dev; i++)
313 platform_device_del(ipc_devs[i]);
314 }
315 EXPORT_SYMBOL_GPL(intel_scu_devices_destroy);
316
install_irq_resource(struct platform_device * pdev,int irq)317 static void __init install_irq_resource(struct platform_device *pdev, int irq)
318 {
319 /* Single threaded */
320 static struct resource res __initdata = {
321 .name = "IRQ",
322 .flags = IORESOURCE_IRQ,
323 };
324 res.start = irq;
325 platform_device_add_resources(pdev, &res, 1);
326 }
327
sfi_handle_ipc_dev(struct sfi_device_table_entry * pentry,struct devs_id * dev)328 static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *pentry,
329 struct devs_id *dev)
330 {
331 struct platform_device *pdev;
332 void *pdata = NULL;
333
334 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n",
335 pentry->name, pentry->irq);
336
337 /*
338 * We need to call platform init of IPC devices to fill misc_pdata
339 * structure. It will be used in msic_init for initialization.
340 */
341 pdata = intel_mid_sfi_get_pdata(dev, pentry);
342 if (IS_ERR(pdata))
343 return;
344
345 /*
346 * On Medfield the platform device creation is handled by the MSIC
347 * MFD driver so we don't need to do it here.
348 */
349 if (dev->msic && intel_mid_has_msic())
350 return;
351
352 pdev = platform_device_alloc(pentry->name, 0);
353 if (pdev == NULL) {
354 pr_err("out of memory for SFI platform device '%s'.\n",
355 pentry->name);
356 return;
357 }
358 install_irq_resource(pdev, pentry->irq);
359
360 pdev->dev.platform_data = pdata;
361 if (dev->delay)
362 intel_scu_ipc_device_register(pdev);
363 else
364 platform_device_add(pdev);
365 }
366
sfi_handle_spi_dev(struct sfi_device_table_entry * pentry,struct devs_id * dev)367 static void __init sfi_handle_spi_dev(struct sfi_device_table_entry *pentry,
368 struct devs_id *dev)
369 {
370 struct spi_board_info spi_info;
371 void *pdata = NULL;
372
373 memset(&spi_info, 0, sizeof(spi_info));
374 strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN);
375 spi_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
376 spi_info.bus_num = pentry->host_num;
377 spi_info.chip_select = pentry->addr;
378 spi_info.max_speed_hz = pentry->max_freq;
379 pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n",
380 spi_info.bus_num,
381 spi_info.modalias,
382 spi_info.irq,
383 spi_info.max_speed_hz,
384 spi_info.chip_select);
385
386 pdata = intel_mid_sfi_get_pdata(dev, &spi_info);
387 if (IS_ERR(pdata))
388 return;
389
390 spi_info.platform_data = pdata;
391 if (dev->delay)
392 intel_scu_spi_device_register(&spi_info);
393 else
394 spi_register_board_info(&spi_info, 1);
395 }
396
sfi_handle_i2c_dev(struct sfi_device_table_entry * pentry,struct devs_id * dev)397 static void __init sfi_handle_i2c_dev(struct sfi_device_table_entry *pentry,
398 struct devs_id *dev)
399 {
400 struct i2c_board_info i2c_info;
401 void *pdata = NULL;
402
403 memset(&i2c_info, 0, sizeof(i2c_info));
404 strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN);
405 i2c_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
406 i2c_info.addr = pentry->addr;
407 pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n",
408 pentry->host_num,
409 i2c_info.type,
410 i2c_info.irq,
411 i2c_info.addr);
412 pdata = intel_mid_sfi_get_pdata(dev, &i2c_info);
413 i2c_info.platform_data = pdata;
414 if (IS_ERR(pdata))
415 return;
416
417 if (dev->delay)
418 intel_scu_i2c_device_register(pentry->host_num, &i2c_info);
419 else
420 i2c_register_board_info(pentry->host_num, &i2c_info, 1);
421 }
422
sfi_handle_sd_dev(struct sfi_device_table_entry * pentry,struct devs_id * dev)423 static void __init sfi_handle_sd_dev(struct sfi_device_table_entry *pentry,
424 struct devs_id *dev)
425 {
426 struct mid_sd_board_info sd_info;
427 void *pdata;
428
429 memset(&sd_info, 0, sizeof(sd_info));
430 strncpy(sd_info.name, pentry->name, SFI_NAME_LEN);
431 sd_info.bus_num = pentry->host_num;
432 sd_info.max_clk = pentry->max_freq;
433 sd_info.addr = pentry->addr;
434 pr_debug("SD bus = %d, name = %16.16s, max_clk = %d, addr = 0x%x\n",
435 sd_info.bus_num,
436 sd_info.name,
437 sd_info.max_clk,
438 sd_info.addr);
439 pdata = intel_mid_sfi_get_pdata(dev, &sd_info);
440 if (IS_ERR(pdata))
441 return;
442
443 /* Nothing we can do with this for now */
444 sd_info.platform_data = pdata;
445
446 pr_debug("Successfully registered %16.16s", sd_info.name);
447 }
448
449 extern struct devs_id *const __x86_intel_mid_dev_start[],
450 *const __x86_intel_mid_dev_end[];
451
get_device_id(u8 type,char * name)452 static struct devs_id __init *get_device_id(u8 type, char *name)
453 {
454 struct devs_id *const *dev_table;
455
456 for (dev_table = __x86_intel_mid_dev_start;
457 dev_table < __x86_intel_mid_dev_end; dev_table++) {
458 struct devs_id *dev = *dev_table;
459 if (dev->type == type &&
460 !strncmp(dev->name, name, SFI_NAME_LEN)) {
461 return dev;
462 }
463 }
464
465 return NULL;
466 }
467
sfi_parse_devs(struct sfi_table_header * table)468 static int __init sfi_parse_devs(struct sfi_table_header *table)
469 {
470 struct sfi_table_simple *sb;
471 struct sfi_device_table_entry *pentry;
472 struct devs_id *dev = NULL;
473 int num, i, ret;
474 int polarity;
475 struct irq_alloc_info info;
476
477 sb = (struct sfi_table_simple *)table;
478 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
479 pentry = (struct sfi_device_table_entry *)sb->pentry;
480
481 for (i = 0; i < num; i++, pentry++) {
482 int irq = pentry->irq;
483
484 if (irq != (u8)0xff) { /* native RTE case */
485 /* these SPI2 devices are not exposed to system as PCI
486 * devices, but they have separate RTE entry in IOAPIC
487 * so we have to enable them one by one here
488 */
489 if (intel_mid_identify_cpu() ==
490 INTEL_MID_CPU_CHIP_TANGIER) {
491 if (!strncmp(pentry->name, "r69001-ts-i2c", 13))
492 /* active low */
493 polarity = 1;
494 else if (!strncmp(pentry->name,
495 "synaptics_3202", 14))
496 /* active low */
497 polarity = 1;
498 else if (irq == 41)
499 /* fast_int_1 */
500 polarity = 1;
501 else
502 /* active high */
503 polarity = 0;
504 } else {
505 /* PNW and CLV go with active low */
506 polarity = 1;
507 }
508
509 ioapic_set_alloc_attr(&info, NUMA_NO_NODE, 1, polarity);
510 ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC, &info);
511 WARN_ON(ret < 0);
512 }
513
514 dev = get_device_id(pentry->type, pentry->name);
515
516 if (!dev)
517 continue;
518
519 switch (pentry->type) {
520 case SFI_DEV_TYPE_IPC:
521 sfi_handle_ipc_dev(pentry, dev);
522 break;
523 case SFI_DEV_TYPE_SPI:
524 sfi_handle_spi_dev(pentry, dev);
525 break;
526 case SFI_DEV_TYPE_I2C:
527 sfi_handle_i2c_dev(pentry, dev);
528 break;
529 case SFI_DEV_TYPE_SD:
530 sfi_handle_sd_dev(pentry, dev);
531 break;
532 case SFI_DEV_TYPE_UART:
533 case SFI_DEV_TYPE_HSI:
534 default:
535 break;
536 }
537 }
538 return 0;
539 }
540
intel_mid_platform_init(void)541 static int __init intel_mid_platform_init(void)
542 {
543 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio);
544 sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs);
545 return 0;
546 }
547 arch_initcall(intel_mid_platform_init);
548
