1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Common library for ADIS16XXX devices
4 *
5 * Copyright 2012 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 */
8
9 #ifndef __IIO_ADIS_H__
10 #define __IIO_ADIS_H__
11
12 #include <linux/spi/spi.h>
13 #include <linux/interrupt.h>
14 #include <linux/iio/types.h>
15
16 #define ADIS_WRITE_REG(reg) ((0x80 | (reg)))
17 #define ADIS_READ_REG(reg) ((reg) & 0x7f)
18
19 #define ADIS_PAGE_SIZE 0x80
20 #define ADIS_REG_PAGE_ID 0x00
21
22 struct adis;
23
24 /**
25 * struct adis_timeouts - ADIS chip variant timeouts
26 * @reset_ms - Wait time after rst pin goes inactive
27 * @sw_reset_ms - Wait time after sw reset command
28 * @self_test_ms - Wait time after self test command
29 */
30 struct adis_timeout {
31 u16 reset_ms;
32 u16 sw_reset_ms;
33 u16 self_test_ms;
34 };
35 /**
36 * struct adis_data - ADIS chip variant specific data
37 * @read_delay: SPI delay for read operations in us
38 * @write_delay: SPI delay for write operations in us
39 * @cs_change_delay: SPI delay between CS changes in us
40 * @glob_cmd_reg: Register address of the GLOB_CMD register
41 * @msc_ctrl_reg: Register address of the MSC_CTRL register
42 * @diag_stat_reg: Register address of the DIAG_STAT register
43 * @prod_id_reg: Register address of the PROD_ID register
44 * @prod_id: Product ID code that should be expected when reading @prod_id_reg
45 * @self_test_mask: Bitmask of supported self-test operations
46 * @self_test_reg: Register address to request self test command
47 * @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg
48 * @status_error_msgs: Array of error messgaes
49 * @status_error_mask: Bitmask of errors supported by the device
50 * @timeouts: Chip specific delays
51 * @enable_irq: Hook for ADIS devices that have a special IRQ enable/disable
52 * @has_paging: True if ADIS device has paged registers
53 * @burst_reg_cmd: Register command that triggers burst
54 * @burst_len: Burst size in the SPI RX buffer. If @burst_max_len is defined,
55 * this should be the minimum size supported by the device.
56 * @burst_max_len: Holds the maximum burst size when the device supports
57 * more than one burst mode with different sizes
58 */
59 struct adis_data {
60 unsigned int read_delay;
61 unsigned int write_delay;
62 unsigned int cs_change_delay;
63
64 unsigned int glob_cmd_reg;
65 unsigned int msc_ctrl_reg;
66 unsigned int diag_stat_reg;
67 unsigned int prod_id_reg;
68
69 unsigned int prod_id;
70
71 unsigned int self_test_mask;
72 unsigned int self_test_reg;
73 bool self_test_no_autoclear;
74 const struct adis_timeout *timeouts;
75
76 const char * const *status_error_msgs;
77 unsigned int status_error_mask;
78
79 int (*enable_irq)(struct adis *adis, bool enable);
80
81 bool has_paging;
82
83 unsigned int burst_reg_cmd;
84 unsigned int burst_len;
85 unsigned int burst_max_len;
86 };
87
88 /**
89 * struct adis - ADIS device instance data
90 * @spi: Reference to SPI device which owns this ADIS IIO device
91 * @trig: IIO trigger object data
92 * @data: ADIS chip variant specific data
93 * @burst: ADIS burst transfer information
94 * @burst_extra_len: Burst extra length. Should only be used by devices that can
95 * dynamically change their burst mode length.
96 * @state_lock: Lock used by the device to protect state
97 * @msg: SPI message object
98 * @xfer: SPI transfer objects to be used for a @msg
99 * @current_page: Some ADIS devices have registers, this selects current page
100 * @irq_flag: IRQ handling flags as passed to request_irq()
101 * @buffer: Data buffer for information read from the device
102 * @tx: DMA safe TX buffer for SPI transfers
103 * @rx: DMA safe RX buffer for SPI transfers
104 */
105 struct adis {
106 struct spi_device *spi;
107 struct iio_trigger *trig;
108
109 const struct adis_data *data;
110 unsigned int burst_extra_len;
111 /**
112 * The state_lock is meant to be used during operations that require
113 * a sequence of SPI R/W in order to protect the SPI transfer
114 * information (fields 'xfer', 'msg' & 'current_page') between
115 * potential concurrent accesses.
116 * This lock is used by all "adis_{functions}" that have to read/write
117 * registers. These functions also have unlocked variants
118 * (see "__adis_{functions}"), which don't hold this lock.
119 * This allows users of the ADIS library to group SPI R/W into
120 * the drivers, but they also must manage this lock themselves.
121 */
122 struct mutex state_lock;
123 struct spi_message msg;
124 struct spi_transfer *xfer;
125 unsigned int current_page;
126 unsigned long irq_flag;
127 void *buffer;
128
129 uint8_t tx[10] ____cacheline_aligned;
130 uint8_t rx[4];
131 };
132
133 int adis_init(struct adis *adis, struct iio_dev *indio_dev,
134 struct spi_device *spi, const struct adis_data *data);
135 int __adis_reset(struct adis *adis);
136
137 /**
138 * adis_reset() - Reset the device
139 * @adis: The adis device
140 *
141 * Returns 0 on success, a negative error code otherwise
142 */
adis_reset(struct adis * adis)143 static inline int adis_reset(struct adis *adis)
144 {
145 int ret;
146
147 mutex_lock(&adis->state_lock);
148 ret = __adis_reset(adis);
149 mutex_unlock(&adis->state_lock);
150
151 return ret;
152 }
153
154 int __adis_write_reg(struct adis *adis, unsigned int reg,
155 unsigned int val, unsigned int size);
156 int __adis_read_reg(struct adis *adis, unsigned int reg,
157 unsigned int *val, unsigned int size);
158
159 /**
160 * __adis_write_reg_8() - Write single byte to a register (unlocked)
161 * @adis: The adis device
162 * @reg: The address of the register to be written
163 * @value: The value to write
164 */
__adis_write_reg_8(struct adis * adis,unsigned int reg,uint8_t val)165 static inline int __adis_write_reg_8(struct adis *adis, unsigned int reg,
166 uint8_t val)
167 {
168 return __adis_write_reg(adis, reg, val, 1);
169 }
170
171 /**
172 * __adis_write_reg_16() - Write 2 bytes to a pair of registers (unlocked)
173 * @adis: The adis device
174 * @reg: The address of the lower of the two registers
175 * @value: Value to be written
176 */
__adis_write_reg_16(struct adis * adis,unsigned int reg,uint16_t val)177 static inline int __adis_write_reg_16(struct adis *adis, unsigned int reg,
178 uint16_t val)
179 {
180 return __adis_write_reg(adis, reg, val, 2);
181 }
182
183 /**
184 * __adis_write_reg_32() - write 4 bytes to four registers (unlocked)
185 * @adis: The adis device
186 * @reg: The address of the lower of the four register
187 * @value: Value to be written
188 */
__adis_write_reg_32(struct adis * adis,unsigned int reg,uint32_t val)189 static inline int __adis_write_reg_32(struct adis *adis, unsigned int reg,
190 uint32_t val)
191 {
192 return __adis_write_reg(adis, reg, val, 4);
193 }
194
195 /**
196 * __adis_read_reg_16() - read 2 bytes from a 16-bit register (unlocked)
197 * @adis: The adis device
198 * @reg: The address of the lower of the two registers
199 * @val: The value read back from the device
200 */
__adis_read_reg_16(struct adis * adis,unsigned int reg,uint16_t * val)201 static inline int __adis_read_reg_16(struct adis *adis, unsigned int reg,
202 uint16_t *val)
203 {
204 unsigned int tmp;
205 int ret;
206
207 ret = __adis_read_reg(adis, reg, &tmp, 2);
208 if (ret == 0)
209 *val = tmp;
210
211 return ret;
212 }
213
214 /**
215 * __adis_read_reg_32() - read 4 bytes from a 32-bit register (unlocked)
216 * @adis: The adis device
217 * @reg: The address of the lower of the two registers
218 * @val: The value read back from the device
219 */
__adis_read_reg_32(struct adis * adis,unsigned int reg,uint32_t * val)220 static inline int __adis_read_reg_32(struct adis *adis, unsigned int reg,
221 uint32_t *val)
222 {
223 unsigned int tmp;
224 int ret;
225
226 ret = __adis_read_reg(adis, reg, &tmp, 4);
227 if (ret == 0)
228 *val = tmp;
229
230 return ret;
231 }
232
233 /**
234 * adis_write_reg() - write N bytes to register
235 * @adis: The adis device
236 * @reg: The address of the lower of the two registers
237 * @value: The value to write to device (up to 4 bytes)
238 * @size: The size of the @value (in bytes)
239 */
adis_write_reg(struct adis * adis,unsigned int reg,unsigned int val,unsigned int size)240 static inline int adis_write_reg(struct adis *adis, unsigned int reg,
241 unsigned int val, unsigned int size)
242 {
243 int ret;
244
245 mutex_lock(&adis->state_lock);
246 ret = __adis_write_reg(adis, reg, val, size);
247 mutex_unlock(&adis->state_lock);
248
249 return ret;
250 }
251
252 /**
253 * adis_read_reg() - read N bytes from register
254 * @adis: The adis device
255 * @reg: The address of the lower of the two registers
256 * @val: The value read back from the device
257 * @size: The size of the @val buffer
258 */
adis_read_reg(struct adis * adis,unsigned int reg,unsigned int * val,unsigned int size)259 static int adis_read_reg(struct adis *adis, unsigned int reg,
260 unsigned int *val, unsigned int size)
261 {
262 int ret;
263
264 mutex_lock(&adis->state_lock);
265 ret = __adis_read_reg(adis, reg, val, size);
266 mutex_unlock(&adis->state_lock);
267
268 return ret;
269 }
270
271 /**
272 * adis_write_reg_8() - Write single byte to a register
273 * @adis: The adis device
274 * @reg: The address of the register to be written
275 * @value: The value to write
276 */
adis_write_reg_8(struct adis * adis,unsigned int reg,uint8_t val)277 static inline int adis_write_reg_8(struct adis *adis, unsigned int reg,
278 uint8_t val)
279 {
280 return adis_write_reg(adis, reg, val, 1);
281 }
282
283 /**
284 * adis_write_reg_16() - Write 2 bytes to a pair of registers
285 * @adis: The adis device
286 * @reg: The address of the lower of the two registers
287 * @value: Value to be written
288 */
adis_write_reg_16(struct adis * adis,unsigned int reg,uint16_t val)289 static inline int adis_write_reg_16(struct adis *adis, unsigned int reg,
290 uint16_t val)
291 {
292 return adis_write_reg(adis, reg, val, 2);
293 }
294
295 /**
296 * adis_write_reg_32() - write 4 bytes to four registers
297 * @adis: The adis device
298 * @reg: The address of the lower of the four register
299 * @value: Value to be written
300 */
adis_write_reg_32(struct adis * adis,unsigned int reg,uint32_t val)301 static inline int adis_write_reg_32(struct adis *adis, unsigned int reg,
302 uint32_t val)
303 {
304 return adis_write_reg(adis, reg, val, 4);
305 }
306
307 /**
308 * adis_read_reg_16() - read 2 bytes from a 16-bit register
309 * @adis: The adis device
310 * @reg: The address of the lower of the two registers
311 * @val: The value read back from the device
312 */
adis_read_reg_16(struct adis * adis,unsigned int reg,uint16_t * val)313 static inline int adis_read_reg_16(struct adis *adis, unsigned int reg,
314 uint16_t *val)
315 {
316 unsigned int tmp;
317 int ret;
318
319 ret = adis_read_reg(adis, reg, &tmp, 2);
320 if (ret == 0)
321 *val = tmp;
322
323 return ret;
324 }
325
326 /**
327 * adis_read_reg_32() - read 4 bytes from a 32-bit register
328 * @adis: The adis device
329 * @reg: The address of the lower of the two registers
330 * @val: The value read back from the device
331 */
adis_read_reg_32(struct adis * adis,unsigned int reg,uint32_t * val)332 static inline int adis_read_reg_32(struct adis *adis, unsigned int reg,
333 uint32_t *val)
334 {
335 unsigned int tmp;
336 int ret;
337
338 ret = adis_read_reg(adis, reg, &tmp, 4);
339 if (ret == 0)
340 *val = tmp;
341
342 return ret;
343 }
344
345 int __adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask,
346 const u32 val, u8 size);
347 /**
348 * adis_update_bits_base() - ADIS Update bits function - Locked version
349 * @adis: The adis device
350 * @reg: The address of the lower of the two registers
351 * @mask: Bitmask to change
352 * @val: Value to be written
353 * @size: Size of the register to update
354 *
355 * Updates the desired bits of @reg in accordance with @mask and @val.
356 */
adis_update_bits_base(struct adis * adis,unsigned int reg,const u32 mask,const u32 val,u8 size)357 static inline int adis_update_bits_base(struct adis *adis, unsigned int reg,
358 const u32 mask, const u32 val, u8 size)
359 {
360 int ret;
361
362 mutex_lock(&adis->state_lock);
363 ret = __adis_update_bits_base(adis, reg, mask, val, size);
364 mutex_unlock(&adis->state_lock);
365 return ret;
366 }
367
368 /**
369 * adis_update_bits() - Wrapper macro for adis_update_bits_base - Locked version
370 * @adis: The adis device
371 * @reg: The address of the lower of the two registers
372 * @mask: Bitmask to change
373 * @val: Value to be written
374 *
375 * This macro evaluates the sizeof of @val at compile time and calls
376 * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for
377 * @val can lead to undesired behavior if the register to update is 16bit.
378 */
379 #define adis_update_bits(adis, reg, mask, val) ({ \
380 BUILD_BUG_ON(sizeof(val) == 1 || sizeof(val) == 8); \
381 __builtin_choose_expr(sizeof(val) == 4, \
382 adis_update_bits_base(adis, reg, mask, val, 4), \
383 adis_update_bits_base(adis, reg, mask, val, 2)); \
384 })
385
386 /**
387 * adis_update_bits() - Wrapper macro for adis_update_bits_base
388 * @adis: The adis device
389 * @reg: The address of the lower of the two registers
390 * @mask: Bitmask to change
391 * @val: Value to be written
392 *
393 * This macro evaluates the sizeof of @val at compile time and calls
394 * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for
395 * @val can lead to undesired behavior if the register to update is 16bit.
396 */
397 #define __adis_update_bits(adis, reg, mask, val) ({ \
398 BUILD_BUG_ON(sizeof(val) == 1 || sizeof(val) == 8); \
399 __builtin_choose_expr(sizeof(val) == 4, \
400 __adis_update_bits_base(adis, reg, mask, val, 4), \
401 __adis_update_bits_base(adis, reg, mask, val, 2)); \
402 })
403
404 int adis_enable_irq(struct adis *adis, bool enable);
405 int __adis_check_status(struct adis *adis);
406 int __adis_initial_startup(struct adis *adis);
407
adis_check_status(struct adis * adis)408 static inline int adis_check_status(struct adis *adis)
409 {
410 int ret;
411
412 mutex_lock(&adis->state_lock);
413 ret = __adis_check_status(adis);
414 mutex_unlock(&adis->state_lock);
415
416 return ret;
417 }
418
419 /* locked version of __adis_initial_startup() */
adis_initial_startup(struct adis * adis)420 static inline int adis_initial_startup(struct adis *adis)
421 {
422 int ret;
423
424 mutex_lock(&adis->state_lock);
425 ret = __adis_initial_startup(adis);
426 mutex_unlock(&adis->state_lock);
427
428 return ret;
429 }
430
431 int adis_single_conversion(struct iio_dev *indio_dev,
432 const struct iio_chan_spec *chan, unsigned int error_mask,
433 int *val);
434
435 #define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
436 .type = IIO_VOLTAGE, \
437 .indexed = 1, \
438 .channel = (chan), \
439 .extend_name = name, \
440 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
441 BIT(IIO_CHAN_INFO_SCALE), \
442 .info_mask_shared_by_all = info_all, \
443 .address = (addr), \
444 .scan_index = (si), \
445 .scan_type = { \
446 .sign = 'u', \
447 .realbits = (bits), \
448 .storagebits = 16, \
449 .endianness = IIO_BE, \
450 }, \
451 }
452
453 #define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
454 ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
455
456 #define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
457 ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
458
459 #define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
460 .type = IIO_TEMP, \
461 .indexed = 1, \
462 .channel = 0, \
463 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
464 BIT(IIO_CHAN_INFO_SCALE) | \
465 BIT(IIO_CHAN_INFO_OFFSET), \
466 .info_mask_shared_by_all = info_all, \
467 .address = (addr), \
468 .scan_index = (si), \
469 .scan_type = { \
470 .sign = 'u', \
471 .realbits = (bits), \
472 .storagebits = 16, \
473 .endianness = IIO_BE, \
474 }, \
475 }
476
477 #define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
478 .type = (_type), \
479 .modified = 1, \
480 .channel2 = IIO_MOD_ ## mod, \
481 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
482 info_sep, \
483 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
484 .info_mask_shared_by_all = info_all, \
485 .address = (addr), \
486 .scan_index = (si), \
487 .scan_type = { \
488 .sign = 's', \
489 .realbits = (bits), \
490 .storagebits = 16, \
491 .endianness = IIO_BE, \
492 }, \
493 }
494
495 #define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
496 ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
497
498 #define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits) \
499 ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
500
501 #define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
502 ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
503
504 #define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
505 ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
506
507 #ifdef CONFIG_IIO_ADIS_LIB_BUFFER
508
509 int
510 devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
511 irq_handler_t trigger_handler);
512
513 int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
514
515 int adis_update_scan_mode(struct iio_dev *indio_dev,
516 const unsigned long *scan_mask);
517
518 #else /* CONFIG_IIO_BUFFER */
519
520 static inline int
devm_adis_setup_buffer_and_trigger(struct adis * adis,struct iio_dev * indio_dev,irq_handler_t trigger_handler)521 devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
522 irq_handler_t trigger_handler)
523 {
524 return 0;
525 }
526
devm_adis_probe_trigger(struct adis * adis,struct iio_dev * indio_dev)527 static inline int devm_adis_probe_trigger(struct adis *adis,
528 struct iio_dev *indio_dev)
529 {
530 return 0;
531 }
532
533 #define adis_update_scan_mode NULL
534
535 #endif /* CONFIG_IIO_BUFFER */
536
537 #ifdef CONFIG_DEBUG_FS
538
539 int adis_debugfs_reg_access(struct iio_dev *indio_dev,
540 unsigned int reg, unsigned int writeval, unsigned int *readval);
541
542 #else
543
544 #define adis_debugfs_reg_access NULL
545
546 #endif
547
548 #endif
549