1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 // http://www.samsung.com
5 //
6 // Base Samsung platform device definitions
7
8 #include <linux/gpio.h>
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/list.h>
13 #include <linux/timer.h>
14 #include <linux/init.h>
15 #include <linux/serial_core.h>
16 #include <linux/serial_s3c.h>
17 #include <linux/platform_device.h>
18 #include <linux/io.h>
19 #include <linux/slab.h>
20 #include <linux/string.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/fb.h>
23 #include <linux/gfp.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/onenand.h>
26 #include <linux/mtd/partitions.h>
27 #include <linux/mmc/host.h>
28 #include <linux/ioport.h>
29 #include <linux/sizes.h>
30 #include <linux/platform_data/s3c-hsudc.h>
31 #include <linux/platform_data/s3c-hsotg.h>
32 #include <linux/platform_data/dma-s3c24xx.h>
33
34 #include <linux/platform_data/media/s5p_hdmi.h>
35
36 #include <asm/irq.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/irq.h>
40
41 #include <mach/irqs.h>
42 #include "map.h"
43 #include "gpio-samsung.h"
44 #include "gpio-cfg.h"
45
46 #ifdef CONFIG_PLAT_S3C24XX
47 #include "regs-s3c2443-clock.h"
48 #endif /* CONFIG_PLAT_S3C24XX */
49
50 #include "cpu.h"
51 #include "devs.h"
52 #include <linux/soc/samsung/s3c-adc.h>
53 #include <linux/platform_data/ata-samsung_cf.h>
54 #include "fb.h"
55 #include <linux/platform_data/fb-s3c2410.h>
56 #include <linux/platform_data/hwmon-s3c.h>
57 #include <linux/platform_data/i2c-s3c2410.h>
58 #include "keypad.h"
59 #include <linux/platform_data/mmc-s3cmci.h>
60 #include <linux/platform_data/mtd-nand-s3c2410.h>
61 #include "pwm-core.h"
62 #include "sdhci.h"
63 #include <linux/platform_data/touchscreen-s3c2410.h>
64 #include <linux/platform_data/usb-s3c2410_udc.h>
65 #include <linux/platform_data/usb-ohci-s3c2410.h>
66 #include "usb-phy.h"
67 #include <linux/platform_data/asoc-s3c.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
69
70 #define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
71
72 /* AC97 */
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 };
78
79 struct platform_device s3c_device_ac97 = {
80 .name = "samsung-ac97",
81 .id = -1,
82 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
83 .resource = s3c_ac97_resource,
84 .dev = {
85 .dma_mask = &samsung_device_dma_mask,
86 .coherent_dma_mask = DMA_BIT_MASK(32),
87 }
88 };
89 #endif /* CONFIG_CPU_S3C2440 */
90
91 /* ADC */
92
93 #ifdef CONFIG_PLAT_S3C24XX
94 static struct resource s3c_adc_resource[] = {
95 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
96 [1] = DEFINE_RES_IRQ(IRQ_TC),
97 [2] = DEFINE_RES_IRQ(IRQ_ADC),
98 };
99
100 struct platform_device s3c_device_adc = {
101 .name = "s3c24xx-adc",
102 .id = -1,
103 .num_resources = ARRAY_SIZE(s3c_adc_resource),
104 .resource = s3c_adc_resource,
105 };
106 #endif /* CONFIG_PLAT_S3C24XX */
107
108 #if defined(CONFIG_SAMSUNG_DEV_ADC)
109 static struct resource s3c_adc_resource[] = {
110 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
111 [1] = DEFINE_RES_IRQ(IRQ_ADC),
112 [2] = DEFINE_RES_IRQ(IRQ_TC),
113 };
114
115 struct platform_device s3c_device_adc = {
116 .name = "exynos-adc",
117 .id = -1,
118 .num_resources = ARRAY_SIZE(s3c_adc_resource),
119 .resource = s3c_adc_resource,
120 };
121 #endif /* CONFIG_SAMSUNG_DEV_ADC */
122
123 /* Camif Controller */
124
125 #ifdef CONFIG_CPU_S3C2440
126 static struct resource s3c_camif_resource[] = {
127 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
128 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
129 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
130 };
131
132 struct platform_device s3c_device_camif = {
133 .name = "s3c2440-camif",
134 .id = -1,
135 .num_resources = ARRAY_SIZE(s3c_camif_resource),
136 .resource = s3c_camif_resource,
137 .dev = {
138 .dma_mask = &samsung_device_dma_mask,
139 .coherent_dma_mask = DMA_BIT_MASK(32),
140 }
141 };
142 #endif /* CONFIG_CPU_S3C2440 */
143
144 /* FB */
145
146 #ifdef CONFIG_S3C_DEV_FB
147 static struct resource s3c_fb_resource[] = {
148 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
149 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
150 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
151 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
152 };
153
154 struct platform_device s3c_device_fb = {
155 .name = "s3c-fb",
156 .id = -1,
157 .num_resources = ARRAY_SIZE(s3c_fb_resource),
158 .resource = s3c_fb_resource,
159 .dev = {
160 .dma_mask = &samsung_device_dma_mask,
161 .coherent_dma_mask = DMA_BIT_MASK(32),
162 },
163 };
164
s3c_fb_set_platdata(struct s3c_fb_platdata * pd)165 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
166 {
167 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
168 &s3c_device_fb);
169 }
170 #endif /* CONFIG_S3C_DEV_FB */
171
172 /* HWMON */
173
174 #ifdef CONFIG_S3C_DEV_HWMON
175 struct platform_device s3c_device_hwmon = {
176 .name = "s3c-hwmon",
177 .id = -1,
178 .dev.parent = &s3c_device_adc.dev,
179 };
180
s3c_hwmon_set_platdata(struct s3c_hwmon_pdata * pd)181 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
182 {
183 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
184 &s3c_device_hwmon);
185 }
186 #endif /* CONFIG_S3C_DEV_HWMON */
187
188 /* HSMMC */
189
190 #ifdef CONFIG_S3C_DEV_HSMMC
191 static struct resource s3c_hsmmc_resource[] = {
192 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
193 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
194 };
195
196 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
197 .max_width = 4,
198 .host_caps = (MMC_CAP_4_BIT_DATA |
199 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
200 };
201
202 struct platform_device s3c_device_hsmmc0 = {
203 .name = "s3c-sdhci",
204 .id = 0,
205 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
206 .resource = s3c_hsmmc_resource,
207 .dev = {
208 .dma_mask = &samsung_device_dma_mask,
209 .coherent_dma_mask = DMA_BIT_MASK(32),
210 .platform_data = &s3c_hsmmc0_def_platdata,
211 },
212 };
213
s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata * pd)214 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
215 {
216 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
217 }
218 #endif /* CONFIG_S3C_DEV_HSMMC */
219
220 #ifdef CONFIG_S3C_DEV_HSMMC1
221 static struct resource s3c_hsmmc1_resource[] = {
222 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
223 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
224 };
225
226 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
227 .max_width = 4,
228 .host_caps = (MMC_CAP_4_BIT_DATA |
229 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
230 };
231
232 struct platform_device s3c_device_hsmmc1 = {
233 .name = "s3c-sdhci",
234 .id = 1,
235 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
236 .resource = s3c_hsmmc1_resource,
237 .dev = {
238 .dma_mask = &samsung_device_dma_mask,
239 .coherent_dma_mask = DMA_BIT_MASK(32),
240 .platform_data = &s3c_hsmmc1_def_platdata,
241 },
242 };
243
s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata * pd)244 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
245 {
246 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
247 }
248 #endif /* CONFIG_S3C_DEV_HSMMC1 */
249
250 /* HSMMC2 */
251
252 #ifdef CONFIG_S3C_DEV_HSMMC2
253 static struct resource s3c_hsmmc2_resource[] = {
254 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
255 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
256 };
257
258 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
259 .max_width = 4,
260 .host_caps = (MMC_CAP_4_BIT_DATA |
261 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
262 };
263
264 struct platform_device s3c_device_hsmmc2 = {
265 .name = "s3c-sdhci",
266 .id = 2,
267 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
268 .resource = s3c_hsmmc2_resource,
269 .dev = {
270 .dma_mask = &samsung_device_dma_mask,
271 .coherent_dma_mask = DMA_BIT_MASK(32),
272 .platform_data = &s3c_hsmmc2_def_platdata,
273 },
274 };
275
s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata * pd)276 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
277 {
278 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
279 }
280 #endif /* CONFIG_S3C_DEV_HSMMC2 */
281
282 #ifdef CONFIG_S3C_DEV_HSMMC3
283 static struct resource s3c_hsmmc3_resource[] = {
284 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
285 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
286 };
287
288 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
289 .max_width = 4,
290 .host_caps = (MMC_CAP_4_BIT_DATA |
291 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
292 };
293
294 struct platform_device s3c_device_hsmmc3 = {
295 .name = "s3c-sdhci",
296 .id = 3,
297 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
298 .resource = s3c_hsmmc3_resource,
299 .dev = {
300 .dma_mask = &samsung_device_dma_mask,
301 .coherent_dma_mask = DMA_BIT_MASK(32),
302 .platform_data = &s3c_hsmmc3_def_platdata,
303 },
304 };
305
s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata * pd)306 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
307 {
308 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
309 }
310 #endif /* CONFIG_S3C_DEV_HSMMC3 */
311
312 /* I2C */
313
314 static struct resource s3c_i2c0_resource[] = {
315 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
316 [1] = DEFINE_RES_IRQ(IRQ_IIC),
317 };
318
319 struct platform_device s3c_device_i2c0 = {
320 .name = "s3c2410-i2c",
321 .id = 0,
322 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
323 .resource = s3c_i2c0_resource,
324 };
325
326 struct s3c2410_platform_i2c default_i2c_data __initdata = {
327 .flags = 0,
328 .slave_addr = 0x10,
329 .frequency = 100*1000,
330 .sda_delay = 100,
331 };
332
s3c_i2c0_set_platdata(struct s3c2410_platform_i2c * pd)333 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
334 {
335 struct s3c2410_platform_i2c *npd;
336
337 if (!pd) {
338 pd = &default_i2c_data;
339 pd->bus_num = 0;
340 }
341
342 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c0);
343
344 if (!npd->cfg_gpio)
345 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
346 }
347
348 #ifdef CONFIG_S3C_DEV_I2C1
349 static struct resource s3c_i2c1_resource[] = {
350 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
351 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
352 };
353
354 struct platform_device s3c_device_i2c1 = {
355 .name = "s3c2410-i2c",
356 .id = 1,
357 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
358 .resource = s3c_i2c1_resource,
359 };
360
s3c_i2c1_set_platdata(struct s3c2410_platform_i2c * pd)361 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
362 {
363 struct s3c2410_platform_i2c *npd;
364
365 if (!pd) {
366 pd = &default_i2c_data;
367 pd->bus_num = 1;
368 }
369
370 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c1);
371
372 if (!npd->cfg_gpio)
373 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
374 }
375 #endif /* CONFIG_S3C_DEV_I2C1 */
376
377 #ifdef CONFIG_S3C_DEV_I2C2
378 static struct resource s3c_i2c2_resource[] = {
379 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
380 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
381 };
382
383 struct platform_device s3c_device_i2c2 = {
384 .name = "s3c2410-i2c",
385 .id = 2,
386 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
387 .resource = s3c_i2c2_resource,
388 };
389
s3c_i2c2_set_platdata(struct s3c2410_platform_i2c * pd)390 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
391 {
392 struct s3c2410_platform_i2c *npd;
393
394 if (!pd) {
395 pd = &default_i2c_data;
396 pd->bus_num = 2;
397 }
398
399 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c2);
400
401 if (!npd->cfg_gpio)
402 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
403 }
404 #endif /* CONFIG_S3C_DEV_I2C2 */
405
406 #ifdef CONFIG_S3C_DEV_I2C3
407 static struct resource s3c_i2c3_resource[] = {
408 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
409 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
410 };
411
412 struct platform_device s3c_device_i2c3 = {
413 .name = "s3c2440-i2c",
414 .id = 3,
415 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
416 .resource = s3c_i2c3_resource,
417 };
418
s3c_i2c3_set_platdata(struct s3c2410_platform_i2c * pd)419 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
420 {
421 struct s3c2410_platform_i2c *npd;
422
423 if (!pd) {
424 pd = &default_i2c_data;
425 pd->bus_num = 3;
426 }
427
428 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c3);
429
430 if (!npd->cfg_gpio)
431 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
432 }
433 #endif /*CONFIG_S3C_DEV_I2C3 */
434
435 #ifdef CONFIG_S3C_DEV_I2C4
436 static struct resource s3c_i2c4_resource[] = {
437 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
438 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
439 };
440
441 struct platform_device s3c_device_i2c4 = {
442 .name = "s3c2440-i2c",
443 .id = 4,
444 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
445 .resource = s3c_i2c4_resource,
446 };
447
s3c_i2c4_set_platdata(struct s3c2410_platform_i2c * pd)448 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
449 {
450 struct s3c2410_platform_i2c *npd;
451
452 if (!pd) {
453 pd = &default_i2c_data;
454 pd->bus_num = 4;
455 }
456
457 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c4);
458
459 if (!npd->cfg_gpio)
460 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
461 }
462 #endif /*CONFIG_S3C_DEV_I2C4 */
463
464 #ifdef CONFIG_S3C_DEV_I2C5
465 static struct resource s3c_i2c5_resource[] = {
466 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
467 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
468 };
469
470 struct platform_device s3c_device_i2c5 = {
471 .name = "s3c2440-i2c",
472 .id = 5,
473 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
474 .resource = s3c_i2c5_resource,
475 };
476
s3c_i2c5_set_platdata(struct s3c2410_platform_i2c * pd)477 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
478 {
479 struct s3c2410_platform_i2c *npd;
480
481 if (!pd) {
482 pd = &default_i2c_data;
483 pd->bus_num = 5;
484 }
485
486 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c5);
487
488 if (!npd->cfg_gpio)
489 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
490 }
491 #endif /*CONFIG_S3C_DEV_I2C5 */
492
493 #ifdef CONFIG_S3C_DEV_I2C6
494 static struct resource s3c_i2c6_resource[] = {
495 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
496 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
497 };
498
499 struct platform_device s3c_device_i2c6 = {
500 .name = "s3c2440-i2c",
501 .id = 6,
502 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
503 .resource = s3c_i2c6_resource,
504 };
505
s3c_i2c6_set_platdata(struct s3c2410_platform_i2c * pd)506 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
507 {
508 struct s3c2410_platform_i2c *npd;
509
510 if (!pd) {
511 pd = &default_i2c_data;
512 pd->bus_num = 6;
513 }
514
515 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c6);
516
517 if (!npd->cfg_gpio)
518 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
519 }
520 #endif /* CONFIG_S3C_DEV_I2C6 */
521
522 #ifdef CONFIG_S3C_DEV_I2C7
523 static struct resource s3c_i2c7_resource[] = {
524 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
525 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
526 };
527
528 struct platform_device s3c_device_i2c7 = {
529 .name = "s3c2440-i2c",
530 .id = 7,
531 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
532 .resource = s3c_i2c7_resource,
533 };
534
s3c_i2c7_set_platdata(struct s3c2410_platform_i2c * pd)535 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
536 {
537 struct s3c2410_platform_i2c *npd;
538
539 if (!pd) {
540 pd = &default_i2c_data;
541 pd->bus_num = 7;
542 }
543
544 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c7);
545
546 if (!npd->cfg_gpio)
547 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
548 }
549 #endif /* CONFIG_S3C_DEV_I2C7 */
550
551 /* I2S */
552
553 #ifdef CONFIG_PLAT_S3C24XX
554 static struct resource s3c_iis_resource[] = {
555 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
556 };
557
558 struct platform_device s3c_device_iis = {
559 .name = "s3c24xx-iis",
560 .id = -1,
561 .num_resources = ARRAY_SIZE(s3c_iis_resource),
562 .resource = s3c_iis_resource,
563 .dev = {
564 .dma_mask = &samsung_device_dma_mask,
565 .coherent_dma_mask = DMA_BIT_MASK(32),
566 }
567 };
568 #endif /* CONFIG_PLAT_S3C24XX */
569
570 /* IDE CFCON */
571
572 #ifdef CONFIG_SAMSUNG_DEV_IDE
573 static struct resource s3c_cfcon_resource[] = {
574 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
575 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
576 };
577
578 struct platform_device s3c_device_cfcon = {
579 .id = 0,
580 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
581 .resource = s3c_cfcon_resource,
582 };
583
s3c_ide_set_platdata(struct s3c_ide_platdata * pdata)584 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
585 {
586 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
587 &s3c_device_cfcon);
588 }
589 #endif /* CONFIG_SAMSUNG_DEV_IDE */
590
591 /* KEYPAD */
592
593 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
594 static struct resource samsung_keypad_resources[] = {
595 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
596 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
597 };
598
599 struct platform_device samsung_device_keypad = {
600 .name = "samsung-keypad",
601 .id = -1,
602 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
603 .resource = samsung_keypad_resources,
604 };
605
samsung_keypad_set_platdata(struct samsung_keypad_platdata * pd)606 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
607 {
608 struct samsung_keypad_platdata *npd;
609
610 npd = s3c_set_platdata(pd, sizeof(*npd), &samsung_device_keypad);
611
612 if (!npd->cfg_gpio)
613 npd->cfg_gpio = samsung_keypad_cfg_gpio;
614 }
615 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
616
617 /* LCD Controller */
618
619 #ifdef CONFIG_PLAT_S3C24XX
620 static struct resource s3c_lcd_resource[] = {
621 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
622 [1] = DEFINE_RES_IRQ(IRQ_LCD),
623 };
624
625 struct platform_device s3c_device_lcd = {
626 .name = "s3c2410-lcd",
627 .id = -1,
628 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
629 .resource = s3c_lcd_resource,
630 .dev = {
631 .dma_mask = &samsung_device_dma_mask,
632 .coherent_dma_mask = DMA_BIT_MASK(32),
633 }
634 };
635
s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info * pd)636 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
637 {
638 struct s3c2410fb_mach_info *npd;
639
640 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
641 if (npd) {
642 npd->displays = kmemdup(pd->displays,
643 sizeof(struct s3c2410fb_display) * npd->num_displays,
644 GFP_KERNEL);
645 if (!npd->displays)
646 printk(KERN_ERR "no memory for LCD display data\n");
647 } else {
648 printk(KERN_ERR "no memory for LCD platform data\n");
649 }
650 }
651 #endif /* CONFIG_PLAT_S3C24XX */
652
653 /* NAND */
654
655 #ifdef CONFIG_S3C_DEV_NAND
656 static struct resource s3c_nand_resource[] = {
657 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
658 };
659
660 struct platform_device s3c_device_nand = {
661 .name = "s3c2410-nand",
662 .id = -1,
663 .num_resources = ARRAY_SIZE(s3c_nand_resource),
664 .resource = s3c_nand_resource,
665 };
666
667 /*
668 * s3c_nand_copy_set() - copy nand set data
669 * @set: The new structure, directly copied from the old.
670 *
671 * Copy all the fields from the NAND set field from what is probably __initdata
672 * to new kernel memory. The code returns 0 if the copy happened correctly or
673 * an error code for the calling function to display.
674 *
675 * Note, we currently do not try and look to see if we've already copied the
676 * data in a previous set.
677 */
s3c_nand_copy_set(struct s3c2410_nand_set * set)678 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
679 {
680 void *ptr;
681 int size;
682
683 size = sizeof(struct mtd_partition) * set->nr_partitions;
684 if (size) {
685 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
686 set->partitions = ptr;
687
688 if (!ptr)
689 return -ENOMEM;
690 }
691
692 if (set->nr_map && set->nr_chips) {
693 size = sizeof(int) * set->nr_chips;
694 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
695 set->nr_map = ptr;
696
697 if (!ptr)
698 return -ENOMEM;
699 }
700
701 return 0;
702 }
703
s3c_nand_set_platdata(struct s3c2410_platform_nand * nand)704 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
705 {
706 struct s3c2410_platform_nand *npd;
707 int size;
708 int ret;
709
710 /* note, if we get a failure in allocation, we simply drop out of the
711 * function. If there is so little memory available at initialisation
712 * time then there is little chance the system is going to run.
713 */
714
715 npd = s3c_set_platdata(nand, sizeof(*npd), &s3c_device_nand);
716 if (!npd)
717 return;
718
719 /* now see if we need to copy any of the nand set data */
720
721 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
722 if (size) {
723 struct s3c2410_nand_set *from = npd->sets;
724 struct s3c2410_nand_set *to;
725 int i;
726
727 to = kmemdup(from, size, GFP_KERNEL);
728 npd->sets = to; /* set, even if we failed */
729
730 if (!to) {
731 printk(KERN_ERR "%s: no memory for sets\n", __func__);
732 return;
733 }
734
735 for (i = 0; i < npd->nr_sets; i++) {
736 ret = s3c_nand_copy_set(to);
737 if (ret) {
738 printk(KERN_ERR "%s: failed to copy set %d\n",
739 __func__, i);
740 return;
741 }
742 to++;
743 }
744 }
745 }
746 #endif /* CONFIG_S3C_DEV_NAND */
747
748 /* ONENAND */
749
750 #ifdef CONFIG_S3C_DEV_ONENAND
751 static struct resource s3c_onenand_resources[] = {
752 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
753 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
754 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
755 };
756
757 struct platform_device s3c_device_onenand = {
758 .name = "samsung-onenand",
759 .id = 0,
760 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
761 .resource = s3c_onenand_resources,
762 };
763 #endif /* CONFIG_S3C_DEV_ONENAND */
764
765 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
766 static struct resource s3c64xx_onenand1_resources[] = {
767 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
768 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
769 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
770 };
771
772 struct platform_device s3c64xx_device_onenand1 = {
773 .name = "samsung-onenand",
774 .id = 1,
775 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
776 .resource = s3c64xx_onenand1_resources,
777 };
778
s3c64xx_onenand1_set_platdata(struct onenand_platform_data * pdata)779 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
780 {
781 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
782 &s3c64xx_device_onenand1);
783 }
784 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
785
786 /* PWM Timer */
787
788 #ifdef CONFIG_SAMSUNG_DEV_PWM
789 static struct resource samsung_pwm_resource[] = {
790 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
791 };
792
793 struct platform_device samsung_device_pwm = {
794 .name = "samsung-pwm",
795 .id = -1,
796 .num_resources = ARRAY_SIZE(samsung_pwm_resource),
797 .resource = samsung_pwm_resource,
798 };
799
samsung_pwm_set_platdata(struct samsung_pwm_variant * pd)800 void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
801 {
802 samsung_device_pwm.dev.platform_data = pd;
803 }
804 #endif /* CONFIG_SAMSUNG_DEV_PWM */
805
806 /* RTC */
807
808 #ifdef CONFIG_PLAT_S3C24XX
809 static struct resource s3c_rtc_resource[] = {
810 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
811 [1] = DEFINE_RES_IRQ(IRQ_RTC),
812 [2] = DEFINE_RES_IRQ(IRQ_TICK),
813 };
814
815 struct platform_device s3c_device_rtc = {
816 .name = "s3c2410-rtc",
817 .id = -1,
818 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
819 .resource = s3c_rtc_resource,
820 };
821 #endif /* CONFIG_PLAT_S3C24XX */
822
823 #ifdef CONFIG_S3C_DEV_RTC
824 static struct resource s3c_rtc_resource[] = {
825 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
826 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
827 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
828 };
829
830 struct platform_device s3c_device_rtc = {
831 .name = "s3c64xx-rtc",
832 .id = -1,
833 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
834 .resource = s3c_rtc_resource,
835 };
836 #endif /* CONFIG_S3C_DEV_RTC */
837
838 /* SDI */
839
840 #ifdef CONFIG_PLAT_S3C24XX
s3c24xx_mci_def_set_power(unsigned char power_mode,unsigned short vdd)841 void s3c24xx_mci_def_set_power(unsigned char power_mode, unsigned short vdd)
842 {
843 switch (power_mode) {
844 case MMC_POWER_ON:
845 case MMC_POWER_UP:
846 /* Configure GPE5...GPE10 pins in SD mode */
847 s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2),
848 S3C_GPIO_PULL_NONE);
849 break;
850
851 case MMC_POWER_OFF:
852 default:
853 gpio_direction_output(S3C2410_GPE(5), 0);
854 break;
855 }
856 }
857
858 static struct resource s3c_sdi_resource[] = {
859 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
860 [1] = DEFINE_RES_IRQ(IRQ_SDI),
861 };
862
863 static struct s3c24xx_mci_pdata s3cmci_def_pdata = {
864 /* This is currently here to avoid a number of if (host->pdata)
865 * checks. Any zero fields to ensure reasonable defaults are picked. */
866 .no_wprotect = 1,
867 .no_detect = 1,
868 .set_power = s3c24xx_mci_def_set_power,
869 };
870
871 struct platform_device s3c_device_sdi = {
872 .name = "s3c2410-sdi",
873 .id = -1,
874 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
875 .resource = s3c_sdi_resource,
876 .dev.platform_data = &s3cmci_def_pdata,
877 };
878
s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata * pdata)879 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
880 {
881 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
882 &s3c_device_sdi);
883 }
884 #endif /* CONFIG_PLAT_S3C24XX */
885
886 /* SPI */
887
888 #ifdef CONFIG_PLAT_S3C24XX
889 static struct resource s3c_spi0_resource[] = {
890 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
891 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
892 };
893
894 struct platform_device s3c_device_spi0 = {
895 .name = "s3c2410-spi",
896 .id = 0,
897 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
898 .resource = s3c_spi0_resource,
899 .dev = {
900 .dma_mask = &samsung_device_dma_mask,
901 .coherent_dma_mask = DMA_BIT_MASK(32),
902 }
903 };
904
905 static struct resource s3c_spi1_resource[] = {
906 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
907 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
908 };
909
910 struct platform_device s3c_device_spi1 = {
911 .name = "s3c2410-spi",
912 .id = 1,
913 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
914 .resource = s3c_spi1_resource,
915 .dev = {
916 .dma_mask = &samsung_device_dma_mask,
917 .coherent_dma_mask = DMA_BIT_MASK(32),
918 }
919 };
920 #endif /* CONFIG_PLAT_S3C24XX */
921
922 /* Touchscreen */
923
924 #ifdef CONFIG_PLAT_S3C24XX
925 static struct resource s3c_ts_resource[] = {
926 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
927 [1] = DEFINE_RES_IRQ(IRQ_TC),
928 };
929
930 struct platform_device s3c_device_ts = {
931 .name = "s3c2410-ts",
932 .id = -1,
933 .dev.parent = &s3c_device_adc.dev,
934 .num_resources = ARRAY_SIZE(s3c_ts_resource),
935 .resource = s3c_ts_resource,
936 };
937
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info * hard_s3c2410ts_info)938 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
939 {
940 s3c_set_platdata(hard_s3c2410ts_info,
941 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
942 }
943 #endif /* CONFIG_PLAT_S3C24XX */
944
945 #ifdef CONFIG_SAMSUNG_DEV_TS
946 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
947 .delay = 10000,
948 .presc = 49,
949 .oversampling_shift = 2,
950 };
951
s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info * pd)952 void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
953 {
954 if (!pd)
955 pd = &default_ts_data;
956
957 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
958 &s3c_device_adc);
959 }
960 #endif /* CONFIG_SAMSUNG_DEV_TS */
961
962 /* USB */
963
964 #ifdef CONFIG_S3C_DEV_USB_HOST
965 static struct resource s3c_usb_resource[] = {
966 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
967 [1] = DEFINE_RES_IRQ(IRQ_USBH),
968 };
969
970 struct platform_device s3c_device_ohci = {
971 .name = "s3c2410-ohci",
972 .id = -1,
973 .num_resources = ARRAY_SIZE(s3c_usb_resource),
974 .resource = s3c_usb_resource,
975 .dev = {
976 .dma_mask = &samsung_device_dma_mask,
977 .coherent_dma_mask = DMA_BIT_MASK(32),
978 }
979 };
980
981 /*
982 * s3c_ohci_set_platdata - initialise OHCI device platform data
983 * @info: The platform data.
984 *
985 * This call copies the @info passed in and sets the device .platform_data
986 * field to that copy. The @info is copied so that the original can be marked
987 * __initdata.
988 */
989
s3c_ohci_set_platdata(struct s3c2410_hcd_info * info)990 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
991 {
992 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
993 &s3c_device_ohci);
994 }
995 #endif /* CONFIG_S3C_DEV_USB_HOST */
996
997 /* USB Device (Gadget) */
998
999 #ifdef CONFIG_PLAT_S3C24XX
1000 static struct resource s3c_usbgadget_resource[] = {
1001 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1002 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1003 };
1004
1005 struct platform_device s3c_device_usbgadget = {
1006 .name = "s3c2410-usbgadget",
1007 .id = -1,
1008 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1009 .resource = s3c_usbgadget_resource,
1010 };
1011
s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info * pd)1012 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1013 {
1014 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1015 }
1016 #endif /* CONFIG_PLAT_S3C24XX */
1017
1018 /* USB HSOTG */
1019
1020 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1021 static struct resource s3c_usb_hsotg_resources[] = {
1022 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1023 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1024 };
1025
1026 struct platform_device s3c_device_usb_hsotg = {
1027 .name = "s3c-hsotg",
1028 .id = -1,
1029 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1030 .resource = s3c_usb_hsotg_resources,
1031 .dev = {
1032 .dma_mask = &samsung_device_dma_mask,
1033 .coherent_dma_mask = DMA_BIT_MASK(32),
1034 },
1035 };
1036
dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat * pd)1037 void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
1038 {
1039 struct dwc2_hsotg_plat *npd;
1040
1041 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_usb_hsotg);
1042
1043 if (!npd->phy_init)
1044 npd->phy_init = s3c_usb_phy_init;
1045 if (!npd->phy_exit)
1046 npd->phy_exit = s3c_usb_phy_exit;
1047 }
1048 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1049
1050 /* USB High Spped 2.0 Device (Gadget) */
1051
1052 #ifdef CONFIG_PLAT_S3C24XX
1053 static struct resource s3c_hsudc_resource[] = {
1054 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1055 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1056 };
1057
1058 struct platform_device s3c_device_usb_hsudc = {
1059 .name = "s3c-hsudc",
1060 .id = -1,
1061 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1062 .resource = s3c_hsudc_resource,
1063 .dev = {
1064 .dma_mask = &samsung_device_dma_mask,
1065 .coherent_dma_mask = DMA_BIT_MASK(32),
1066 },
1067 };
1068
s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata * pd)1069 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1070 {
1071 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1072 pd->phy_init = s3c_hsudc_init_phy;
1073 pd->phy_uninit = s3c_hsudc_uninit_phy;
1074 }
1075 #endif /* CONFIG_PLAT_S3C24XX */
1076
1077 /* WDT */
1078
1079 #ifdef CONFIG_S3C_DEV_WDT
1080 static struct resource s3c_wdt_resource[] = {
1081 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1082 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1083 };
1084
1085 struct platform_device s3c_device_wdt = {
1086 .name = "s3c2410-wdt",
1087 .id = -1,
1088 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1089 .resource = s3c_wdt_resource,
1090 };
1091 #endif /* CONFIG_S3C_DEV_WDT */
1092
1093 #ifdef CONFIG_S3C64XX_DEV_SPI0
1094 static struct resource s3c64xx_spi0_resource[] = {
1095 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1096 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1097 };
1098
1099 struct platform_device s3c64xx_device_spi0 = {
1100 .name = "s3c6410-spi",
1101 .id = 0,
1102 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1103 .resource = s3c64xx_spi0_resource,
1104 .dev = {
1105 .dma_mask = &samsung_device_dma_mask,
1106 .coherent_dma_mask = DMA_BIT_MASK(32),
1107 },
1108 };
1109
s3c64xx_spi0_set_platdata(int (* cfg_gpio)(void),int src_clk_nr,int num_cs)1110 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1111 int num_cs)
1112 {
1113 struct s3c64xx_spi_info pd;
1114
1115 /* Reject invalid configuration */
1116 if (!num_cs || src_clk_nr < 0) {
1117 pr_err("%s: Invalid SPI configuration\n", __func__);
1118 return;
1119 }
1120
1121 pd.num_cs = num_cs;
1122 pd.src_clk_nr = src_clk_nr;
1123 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1124
1125 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1126 }
1127 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1128
1129 #ifdef CONFIG_S3C64XX_DEV_SPI1
1130 static struct resource s3c64xx_spi1_resource[] = {
1131 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1132 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1133 };
1134
1135 struct platform_device s3c64xx_device_spi1 = {
1136 .name = "s3c6410-spi",
1137 .id = 1,
1138 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1139 .resource = s3c64xx_spi1_resource,
1140 .dev = {
1141 .dma_mask = &samsung_device_dma_mask,
1142 .coherent_dma_mask = DMA_BIT_MASK(32),
1143 },
1144 };
1145
s3c64xx_spi1_set_platdata(int (* cfg_gpio)(void),int src_clk_nr,int num_cs)1146 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1147 int num_cs)
1148 {
1149 struct s3c64xx_spi_info pd;
1150
1151 /* Reject invalid configuration */
1152 if (!num_cs || src_clk_nr < 0) {
1153 pr_err("%s: Invalid SPI configuration\n", __func__);
1154 return;
1155 }
1156
1157 pd.num_cs = num_cs;
1158 pd.src_clk_nr = src_clk_nr;
1159 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1160
1161 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1162 }
1163 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1164
1165 #ifdef CONFIG_S3C64XX_DEV_SPI2
1166 static struct resource s3c64xx_spi2_resource[] = {
1167 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1168 [1] = DEFINE_RES_IRQ(IRQ_SPI2),
1169 };
1170
1171 struct platform_device s3c64xx_device_spi2 = {
1172 .name = "s3c6410-spi",
1173 .id = 2,
1174 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1175 .resource = s3c64xx_spi2_resource,
1176 .dev = {
1177 .dma_mask = &samsung_device_dma_mask,
1178 .coherent_dma_mask = DMA_BIT_MASK(32),
1179 },
1180 };
1181
s3c64xx_spi2_set_platdata(int (* cfg_gpio)(void),int src_clk_nr,int num_cs)1182 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1183 int num_cs)
1184 {
1185 struct s3c64xx_spi_info pd;
1186
1187 /* Reject invalid configuration */
1188 if (!num_cs || src_clk_nr < 0) {
1189 pr_err("%s: Invalid SPI configuration\n", __func__);
1190 return;
1191 }
1192
1193 pd.num_cs = num_cs;
1194 pd.src_clk_nr = src_clk_nr;
1195 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1196
1197 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1198 }
1199 #endif /* CONFIG_S3C64XX_DEV_SPI2 */
1200
