1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 *
5 * Contact Information: wlanfae <wlanfae@realtek.com>
6 */
7 #include "rtl_core.h"
8 #include "rtl_dm.h"
9 #include "r8192E_hw.h"
10 #include "r8192E_phy.h"
11 #include "r8192E_phyreg.h"
12 #include "r8190P_rtl8256.h"
13 #include "r8192E_cmdpkt.h"
14
15 /*---------------------------Define Local Constant---------------------------*/
16 static u32 edca_setting_DL[HT_IOT_PEER_MAX] = {
17 0x5e4322,
18 0x5e4322,
19 0x5ea44f,
20 0x5e4322,
21 0x604322,
22 0xa44f,
23 0x5e4322,
24 0x5e4332
25 };
26
27 static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = {
28 0x5e4322,
29 0x5e4322,
30 0x5e4322,
31 0x5e4322,
32 0x604322,
33 0xa44f,
34 0x5e4322,
35 0x5e4322
36 };
37
38 static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
39 0x5e4322,
40 0xa44f,
41 0x5ea44f,
42 0x5e4322,
43 0x604322,
44 0x5e4322,
45 0x5e4322,
46 0x5e4332
47 };
48
49 const u32 dm_tx_bb_gain[TxBBGainTableLength] = {
50 0x7f8001fe, /* 12 dB */
51 0x788001e2, /* 11 dB */
52 0x71c001c7,
53 0x6b8001ae,
54 0x65400195,
55 0x5fc0017f,
56 0x5a400169,
57 0x55400155,
58 0x50800142,
59 0x4c000130,
60 0x47c0011f,
61 0x43c0010f,
62 0x40000100,
63 0x3c8000f2,
64 0x390000e4,
65 0x35c000d7,
66 0x32c000cb,
67 0x300000c0,
68 0x2d4000b5,
69 0x2ac000ab,
70 0x288000a2,
71 0x26000098,
72 0x24000090,
73 0x22000088,
74 0x20000080,
75 0x1a00006c,
76 0x1c800072,
77 0x18000060,
78 0x19800066,
79 0x15800056,
80 0x26c0005b,
81 0x14400051,
82 0x24400051,
83 0x1300004c,
84 0x12000048,
85 0x11000044,
86 0x10000040, /* -24 dB */
87 };
88
89 const u8 dm_cck_tx_bb_gain[CCKTxBBGainTableLength][8] = {
90 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
91 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},
92 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
93 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},
94 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
95 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},
96 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
97 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},
98 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
99 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},
100 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
101 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},
102 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
103 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},
104 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
105 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},
106 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
107 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},
108 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
109 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
110 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
111 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},
112 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
113 };
114
115 const u8 dm_cck_tx_bb_gain_ch14[CCKTxBBGainTableLength][8] = {
116 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
117 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},
118 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
119 {0x2d, 0x2d, 0x27, 0x17, 0x00, 0x00, 0x00, 0x00},
120 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
121 {0x28, 0x28, 0x22, 0x14, 0x00, 0x00, 0x00, 0x00},
122 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
123 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},
124 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
125 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},
126 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
127 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},
128 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
129 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},
130 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
131 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},
132 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
133 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},
134 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
135 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
136 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
137 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},
138 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
139 };
140
141 /*---------------------------Define Local Constant---------------------------*/
142
143
144 /*------------------------Define global variable-----------------------------*/
145 struct dig_t dm_digtable;
146
147 struct drx_path_sel DM_RxPathSelTable;
148 /*------------------------Define global variable-----------------------------*/
149
150
151 /*------------------------Define local variable------------------------------*/
152 /*------------------------Define local variable------------------------------*/
153
154
155
156 /*---------------------Define local function prototype-----------------------*/
157 static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev);
158
159 static void _rtl92e_dm_init_bandwidth_autoswitch(struct net_device *dev);
160 static void _rtl92e_dm_bandwidth_autoswitch(struct net_device *dev);
161
162
163 static void _rtl92e_dm_check_tx_power_tracking(struct net_device *dev);
164
165 static void _rtl92e_dm_bb_initialgain_restore(struct net_device *dev);
166 static void _rtl92e_dm_dig_init(struct net_device *dev);
167 static void _rtl92e_dm_ctrl_initgain_byrssi(struct net_device *dev);
168 static void _rtl92e_dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
169 static void _rtl92e_dm_ctrl_initgain_byrssi_driver(struct net_device *dev);
170 static void _rtl92e_dm_ctrl_initgain_byrssi_false_alarm(struct net_device *dev);
171 static void _rtl92e_dm_initial_gain(struct net_device *dev);
172 static void _rtl92e_dm_pd_th(struct net_device *dev);
173 static void _rtl92e_dm_cs_ratio(struct net_device *dev);
174
175 static void _rtl92e_dm_init_cts_to_self(struct net_device *dev);
176 static void _rtl92e_dm_init_wa_broadcom_iot(struct net_device *dev);
177
178 static void _rtl92e_dm_check_edca_turbo(struct net_device *dev);
179 static void _rtl92e_dm_check_rx_path_selection(struct net_device *dev);
180 static void _rtl92e_dm_init_rx_path_selection(struct net_device *dev);
181 static void _rtl92e_dm_rx_path_sel_byrssi(struct net_device *dev);
182
183
184 static void _rtl92e_dm_init_fsync(struct net_device *dev);
185 static void _rtl92e_dm_deinit_fsync(struct net_device *dev);
186
187 static void _rtl92e_dm_check_txrateandretrycount(struct net_device *dev);
188 static void _rtl92e_dm_check_ac_dc_power(struct net_device *dev);
189 static void _rtl92e_dm_check_fsync(struct net_device *dev);
190 static void _rtl92e_dm_check_rf_ctrl_gpio(void *data);
191 static void _rtl92e_dm_fsync_timer_callback(struct timer_list *t);
192
193 /*---------------------Define local function prototype-----------------------*/
194
195 static void _rtl92e_dm_init_dynamic_tx_power(struct net_device *dev);
196 static void _rtl92e_dm_dynamic_tx_power(struct net_device *dev);
197
198 static void _rtl92e_dm_send_rssi_to_fw(struct net_device *dev);
199 static void _rtl92e_dm_cts_to_self(struct net_device *dev);
200 /*---------------------------Define function prototype------------------------*/
201
rtl92e_dm_init(struct net_device * dev)202 void rtl92e_dm_init(struct net_device *dev)
203 {
204 struct r8192_priv *priv = rtllib_priv(dev);
205
206 priv->DM_Type = DM_Type_ByDriver;
207
208 priv->undecorated_smoothed_pwdb = -1;
209
210 _rtl92e_dm_init_dynamic_tx_power(dev);
211
212 rtl92e_init_adaptive_rate(dev);
213
214 _rtl92e_dm_dig_init(dev);
215 rtl92e_dm_init_edca_turbo(dev);
216 _rtl92e_dm_init_bandwidth_autoswitch(dev);
217 _rtl92e_dm_init_fsync(dev);
218 _rtl92e_dm_init_rx_path_selection(dev);
219 _rtl92e_dm_init_cts_to_self(dev);
220 if (IS_HARDWARE_TYPE_8192SE(dev))
221 _rtl92e_dm_init_wa_broadcom_iot(dev);
222
223 INIT_DELAYED_WORK_RSL(&priv->gpio_change_rf_wq,
224 (void *)_rtl92e_dm_check_rf_ctrl_gpio, dev);
225 }
226
rtl92e_dm_deinit(struct net_device * dev)227 void rtl92e_dm_deinit(struct net_device *dev)
228 {
229
230 _rtl92e_dm_deinit_fsync(dev);
231
232 }
233
rtl92e_dm_watchdog(struct net_device * dev)234 void rtl92e_dm_watchdog(struct net_device *dev)
235 {
236 struct r8192_priv *priv = rtllib_priv(dev);
237
238 if (priv->being_init_adapter)
239 return;
240
241 _rtl92e_dm_check_ac_dc_power(dev);
242
243 _rtl92e_dm_check_txrateandretrycount(dev);
244 _rtl92e_dm_check_edca_turbo(dev);
245
246 _rtl92e_dm_check_rate_adaptive(dev);
247 _rtl92e_dm_dynamic_tx_power(dev);
248 _rtl92e_dm_check_tx_power_tracking(dev);
249
250 _rtl92e_dm_ctrl_initgain_byrssi(dev);
251 _rtl92e_dm_bandwidth_autoswitch(dev);
252
253 _rtl92e_dm_check_rx_path_selection(dev);
254 _rtl92e_dm_check_fsync(dev);
255
256 _rtl92e_dm_send_rssi_to_fw(dev);
257 _rtl92e_dm_cts_to_self(dev);
258 }
259
_rtl92e_dm_check_ac_dc_power(struct net_device * dev)260 static void _rtl92e_dm_check_ac_dc_power(struct net_device *dev)
261 {
262 struct r8192_priv *priv = rtllib_priv(dev);
263 static const char ac_dc_script[] = "/etc/acpi/wireless-rtl-ac-dc-power.sh";
264 char *argv[] = {(char *)ac_dc_script, DRV_NAME, NULL};
265 static char *envp[] = {"HOME=/",
266 "TERM=linux",
267 "PATH=/usr/bin:/bin",
268 NULL};
269
270 if (priv->ResetProgress == RESET_TYPE_SILENT) {
271 return;
272 }
273
274 if (priv->rtllib->state != RTLLIB_LINKED)
275 return;
276 call_usermodehelper(ac_dc_script, argv, envp, UMH_WAIT_PROC);
277
278 return;
279 };
280
281
rtl92e_init_adaptive_rate(struct net_device * dev)282 void rtl92e_init_adaptive_rate(struct net_device *dev)
283 {
284
285 struct r8192_priv *priv = rtllib_priv(dev);
286 struct rate_adaptive *pra = &priv->rate_adaptive;
287
288 pra->ratr_state = DM_RATR_STA_MAX;
289 pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
290 pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
291 pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
292
293 pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
294 pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
295 pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
296
297 if (priv->CustomerID == RT_CID_819x_Netcore)
298 pra->ping_rssi_enable = 1;
299 else
300 pra->ping_rssi_enable = 0;
301 pra->ping_rssi_thresh_for_ra = 15;
302
303
304 if (priv->rf_type == RF_2T4R) {
305 pra->upper_rssi_threshold_ratr = 0x8f0f0000;
306 pra->middle_rssi_threshold_ratr = 0x8f0ff000;
307 pra->low_rssi_threshold_ratr = 0x8f0ff001;
308 pra->low_rssi_threshold_ratr_40M = 0x8f0ff005;
309 pra->low_rssi_threshold_ratr_20M = 0x8f0ff001;
310 pra->ping_rssi_ratr = 0x0000000d;
311 } else if (priv->rf_type == RF_1T2R) {
312 pra->upper_rssi_threshold_ratr = 0x000fc000;
313 pra->middle_rssi_threshold_ratr = 0x000ff000;
314 pra->low_rssi_threshold_ratr = 0x000ff001;
315 pra->low_rssi_threshold_ratr_40M = 0x000ff005;
316 pra->low_rssi_threshold_ratr_20M = 0x000ff001;
317 pra->ping_rssi_ratr = 0x0000000d;
318 }
319
320 }
321
322
_rtl92e_dm_check_rate_adaptive(struct net_device * dev)323 static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev)
324 {
325 struct r8192_priv *priv = rtllib_priv(dev);
326 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
327 struct rate_adaptive *pra = &priv->rate_adaptive;
328 u32 currentRATR, targetRATR = 0;
329 u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
330 bool bshort_gi_enabled = false;
331 static u8 ping_rssi_state;
332
333 if (!priv->up) {
334 return;
335 }
336
337 if (pra->rate_adaptive_disabled)
338 return;
339
340 if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
341 priv->rtllib->mode == WIRELESS_MODE_N_5G))
342 return;
343
344 if (priv->rtllib->state == RTLLIB_LINKED) {
345
346 bshort_gi_enabled = (pHTInfo->cur_tx_bw40mhz &&
347 pHTInfo->bCurShortGI40MHz) ||
348 (!pHTInfo->cur_tx_bw40mhz &&
349 pHTInfo->bCurShortGI20MHz);
350
351 pra->upper_rssi_threshold_ratr =
352 (pra->upper_rssi_threshold_ratr & (~BIT31)) |
353 ((bshort_gi_enabled) ? BIT31 : 0);
354
355 pra->middle_rssi_threshold_ratr =
356 (pra->middle_rssi_threshold_ratr & (~BIT31)) |
357 ((bshort_gi_enabled) ? BIT31 : 0);
358
359 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
360 pra->low_rssi_threshold_ratr =
361 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) |
362 ((bshort_gi_enabled) ? BIT31 : 0);
363 } else {
364 pra->low_rssi_threshold_ratr =
365 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) |
366 ((bshort_gi_enabled) ? BIT31 : 0);
367 }
368 pra->ping_rssi_ratr =
369 (pra->ping_rssi_ratr & (~BIT31)) |
370 ((bshort_gi_enabled) ? BIT31 : 0);
371
372 if (pra->ratr_state == DM_RATR_STA_HIGH) {
373 HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra;
374 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
375 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
376 } else if (pra->ratr_state == DM_RATR_STA_LOW) {
377 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
378 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
379 (pra->low2high_rssi_thresh_for_ra40M) : (pra->low2high_rssi_thresh_for_ra20M);
380 } else {
381 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
382 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
383 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
384 }
385
386 if (priv->undecorated_smoothed_pwdb >=
387 (long)HighRSSIThreshForRA) {
388 pra->ratr_state = DM_RATR_STA_HIGH;
389 targetRATR = pra->upper_rssi_threshold_ratr;
390 } else if (priv->undecorated_smoothed_pwdb >=
391 (long)LowRSSIThreshForRA) {
392 pra->ratr_state = DM_RATR_STA_MIDDLE;
393 targetRATR = pra->middle_rssi_threshold_ratr;
394 } else {
395 pra->ratr_state = DM_RATR_STA_LOW;
396 targetRATR = pra->low_rssi_threshold_ratr;
397 }
398
399 if (pra->ping_rssi_enable) {
400 if (priv->undecorated_smoothed_pwdb <
401 (long)(pra->ping_rssi_thresh_for_ra+5)) {
402 if ((priv->undecorated_smoothed_pwdb <
403 (long)pra->ping_rssi_thresh_for_ra) ||
404 ping_rssi_state) {
405 pra->ratr_state = DM_RATR_STA_LOW;
406 targetRATR = pra->ping_rssi_ratr;
407 ping_rssi_state = 1;
408 }
409 } else {
410 ping_rssi_state = 0;
411 }
412 }
413
414 if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev))
415 targetRATR &= 0xf00fffff;
416
417 currentRATR = rtl92e_readl(dev, RATR0);
418 if (targetRATR != currentRATR) {
419 u32 ratr_value;
420
421 ratr_value = targetRATR;
422 if (priv->rf_type == RF_1T2R)
423 ratr_value &= ~(RATE_ALL_OFDM_2SS);
424 rtl92e_writel(dev, RATR0, ratr_value);
425 rtl92e_writeb(dev, UFWP, 1);
426
427 pra->last_ratr = targetRATR;
428 }
429
430 } else {
431 pra->ratr_state = DM_RATR_STA_MAX;
432 }
433 }
434
_rtl92e_dm_init_bandwidth_autoswitch(struct net_device * dev)435 static void _rtl92e_dm_init_bandwidth_autoswitch(struct net_device *dev)
436 {
437 struct r8192_priv *priv = rtllib_priv(dev);
438
439 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
440 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
441 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
442 priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false;
443 }
444
_rtl92e_dm_bandwidth_autoswitch(struct net_device * dev)445 static void _rtl92e_dm_bandwidth_autoswitch(struct net_device *dev)
446 {
447 struct r8192_priv *priv = rtllib_priv(dev);
448
449 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||
450 !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable)
451 return;
452 if (!priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz) {
453 if (priv->undecorated_smoothed_pwdb <=
454 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
455 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
456 } else {
457 if (priv->undecorated_smoothed_pwdb >=
458 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
459 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
460 }
461 }
462
463 static u32 OFDMSwingTable[OFDM_Table_Length] = {
464 0x7f8001fe,
465 0x71c001c7,
466 0x65400195,
467 0x5a400169,
468 0x50800142,
469 0x47c0011f,
470 0x40000100,
471 0x390000e4,
472 0x32c000cb,
473 0x2d4000b5,
474 0x288000a2,
475 0x24000090,
476 0x20000080,
477 0x1c800072,
478 0x19800066,
479 0x26c0005b,
480 0x24400051,
481 0x12000048,
482 0x10000040
483 };
484
485 static u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
486 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
487 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
488 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
489 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
490 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
491 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
492 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
493 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
494 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
495 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
496 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
497 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
498 };
499
500 static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = {
501 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
502 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
503 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
504 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
505 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
506 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
507 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
508 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
509 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
510 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
511 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
512 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
513 };
514
515 #define Pw_Track_Flag 0x11d
516 #define Tssi_Mea_Value 0x13c
517 #define Tssi_Report_Value1 0x134
518 #define Tssi_Report_Value2 0x13e
519 #define FW_Busy_Flag 0x13f
520
_rtl92e_dm_tx_update_tssi_weak_signal(struct net_device * dev,u8 RF_Type)521 static void _rtl92e_dm_tx_update_tssi_weak_signal(struct net_device *dev,
522 u8 RF_Type)
523 {
524 struct r8192_priv *p = rtllib_priv(dev);
525
526 if (RF_Type == RF_2T4R) {
527 if ((p->rfa_txpowertrackingindex > 0) &&
528 (p->rfc_txpowertrackingindex > 0)) {
529 p->rfa_txpowertrackingindex--;
530 if (p->rfa_txpowertrackingindex_real > 4) {
531 p->rfa_txpowertrackingindex_real--;
532 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
533 bMaskDWord,
534 dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
535 }
536
537 p->rfc_txpowertrackingindex--;
538 if (p->rfc_txpowertrackingindex_real > 4) {
539 p->rfc_txpowertrackingindex_real--;
540 rtl92e_set_bb_reg(dev,
541 rOFDM0_XCTxIQImbalance,
542 bMaskDWord,
543 dm_tx_bb_gain[p->rfc_txpowertrackingindex_real]);
544 }
545 } else {
546 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
547 bMaskDWord,
548 dm_tx_bb_gain[4]);
549 rtl92e_set_bb_reg(dev,
550 rOFDM0_XCTxIQImbalance,
551 bMaskDWord, dm_tx_bb_gain[4]);
552 }
553 } else {
554 if (p->rfa_txpowertrackingindex > 0) {
555 p->rfa_txpowertrackingindex--;
556 if (p->rfa_txpowertrackingindex_real > 4) {
557 p->rfa_txpowertrackingindex_real--;
558 rtl92e_set_bb_reg(dev,
559 rOFDM0_XATxIQImbalance,
560 bMaskDWord,
561 dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
562 }
563 } else {
564 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
565 bMaskDWord, dm_tx_bb_gain[4]);
566 }
567 }
568 }
569
_rtl92e_dm_tx_update_tssi_strong_signal(struct net_device * dev,u8 RF_Type)570 static void _rtl92e_dm_tx_update_tssi_strong_signal(struct net_device *dev,
571 u8 RF_Type)
572 {
573 struct r8192_priv *p = rtllib_priv(dev);
574
575 if (RF_Type == RF_2T4R) {
576 if ((p->rfa_txpowertrackingindex < TxBBGainTableLength - 1) &&
577 (p->rfc_txpowertrackingindex < TxBBGainTableLength - 1)) {
578 p->rfa_txpowertrackingindex++;
579 p->rfa_txpowertrackingindex_real++;
580 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
581 bMaskDWord,
582 dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
583 p->rfc_txpowertrackingindex++;
584 p->rfc_txpowertrackingindex_real++;
585 rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance,
586 bMaskDWord,
587 dm_tx_bb_gain[p->rfc_txpowertrackingindex_real]);
588 } else {
589 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
590 bMaskDWord,
591 dm_tx_bb_gain[TxBBGainTableLength - 1]);
592 rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance,
593 bMaskDWord,
594 dm_tx_bb_gain[TxBBGainTableLength - 1]);
595 }
596 } else {
597 if (p->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) {
598 p->rfa_txpowertrackingindex++;
599 p->rfa_txpowertrackingindex_real++;
600 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
601 bMaskDWord,
602 dm_tx_bb_gain[p->rfa_txpowertrackingindex_real]);
603 } else {
604 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance,
605 bMaskDWord,
606 dm_tx_bb_gain[TxBBGainTableLength - 1]);
607 }
608 }
609 }
610
_rtl92e_dm_tx_power_tracking_callback_tssi(struct net_device * dev)611 static void _rtl92e_dm_tx_power_tracking_callback_tssi(struct net_device *dev)
612 {
613 struct r8192_priv *priv = rtllib_priv(dev);
614 bool viviflag = false;
615 struct dcmd_txcmd tx_cmd;
616 u8 powerlevelOFDM24G;
617 int i = 0, j = 0, k = 0;
618 u8 RF_Type, tmp_report[5] = {0, 0, 0, 0, 0};
619 u32 Value;
620 u8 Pwr_Flag;
621 u16 Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver = 0;
622 u32 delta = 0;
623
624 rtl92e_writeb(dev, Pw_Track_Flag, 0);
625 rtl92e_writeb(dev, FW_Busy_Flag, 0);
626 priv->rtllib->bdynamic_txpower_enable = false;
627
628 powerlevelOFDM24G = priv->Pwr_Track >> 24;
629 RF_Type = priv->rf_type;
630 Value = (RF_Type<<8) | powerlevelOFDM24G;
631
632 for (j = 0; j <= 30; j++) {
633
634 tx_cmd.Op = TXCMD_SET_TX_PWR_TRACKING;
635 tx_cmd.Length = 4;
636 tx_cmd.Value = Value;
637 rtl92e_send_cmd_pkt(dev, DESC_PACKET_TYPE_NORMAL, (u8 *)&tx_cmd,
638 sizeof(struct dcmd_txcmd));
639 mdelay(1);
640 for (i = 0; i <= 30; i++) {
641 Pwr_Flag = rtl92e_readb(dev, Pw_Track_Flag);
642
643 if (Pwr_Flag == 0) {
644 mdelay(1);
645
646 if (priv->bResetInProgress) {
647 rtl92e_writeb(dev, Pw_Track_Flag, 0);
648 rtl92e_writeb(dev, FW_Busy_Flag, 0);
649 return;
650 }
651 if (priv->rtllib->rf_power_state != rf_on) {
652 rtl92e_writeb(dev, Pw_Track_Flag, 0);
653 rtl92e_writeb(dev, FW_Busy_Flag, 0);
654 return;
655 }
656
657 continue;
658 }
659
660 Avg_TSSI_Meas = rtl92e_readw(dev, Tssi_Mea_Value);
661
662 if (Avg_TSSI_Meas == 0) {
663 rtl92e_writeb(dev, Pw_Track_Flag, 0);
664 rtl92e_writeb(dev, FW_Busy_Flag, 0);
665 return;
666 }
667
668 for (k = 0; k < 5; k++) {
669 if (k != 4)
670 tmp_report[k] = rtl92e_readb(dev,
671 Tssi_Report_Value1+k);
672 else
673 tmp_report[k] = rtl92e_readb(dev,
674 Tssi_Report_Value2);
675
676 if (tmp_report[k] <= 20) {
677 viviflag = true;
678 break;
679 }
680 }
681
682 if (viviflag) {
683 rtl92e_writeb(dev, Pw_Track_Flag, 0);
684 viviflag = false;
685 for (k = 0; k < 5; k++)
686 tmp_report[k] = 0;
687 break;
688 }
689
690 for (k = 0; k < 5; k++)
691 Avg_TSSI_Meas_from_driver += tmp_report[k];
692
693 Avg_TSSI_Meas_from_driver *= 100 / 5;
694 TSSI_13dBm = priv->TSSI_13dBm;
695
696 if (Avg_TSSI_Meas_from_driver > TSSI_13dBm)
697 delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
698 else
699 delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
700
701 if (delta <= E_FOR_TX_POWER_TRACK) {
702 priv->rtllib->bdynamic_txpower_enable = true;
703 rtl92e_writeb(dev, Pw_Track_Flag, 0);
704 rtl92e_writeb(dev, FW_Busy_Flag, 0);
705 return;
706 }
707 if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK)
708 _rtl92e_dm_tx_update_tssi_weak_signal(dev,
709 RF_Type);
710 else
711 _rtl92e_dm_tx_update_tssi_strong_signal(dev, RF_Type);
712
713 if (RF_Type == RF_2T4R) {
714 priv->CCKPresentAttentuation_difference
715 = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
716 } else {
717 priv->CCKPresentAttentuation_difference
718 = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
719 }
720
721 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
722 priv->CCKPresentAttentuation =
723 priv->CCKPresentAttentuation_20Mdefault +
724 priv->CCKPresentAttentuation_difference;
725 else
726 priv->CCKPresentAttentuation =
727 priv->CCKPresentAttentuation_40Mdefault +
728 priv->CCKPresentAttentuation_difference;
729
730 if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
731 priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
732 if (priv->CCKPresentAttentuation < 0)
733 priv->CCKPresentAttentuation = 0;
734
735 if (priv->CCKPresentAttentuation > -1 &&
736 priv->CCKPresentAttentuation < CCKTxBBGainTableLength) {
737 if (priv->rtllib->current_network.channel == 14 &&
738 !priv->bcck_in_ch14) {
739 priv->bcck_in_ch14 = true;
740 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
741 } else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14) {
742 priv->bcck_in_ch14 = false;
743 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
744 } else
745 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
746 }
747
748 if (priv->CCKPresentAttentuation_difference <= -12 ||
749 priv->CCKPresentAttentuation_difference >= 24) {
750 priv->rtllib->bdynamic_txpower_enable = true;
751 rtl92e_writeb(dev, Pw_Track_Flag, 0);
752 rtl92e_writeb(dev, FW_Busy_Flag, 0);
753 return;
754 }
755
756 rtl92e_writeb(dev, Pw_Track_Flag, 0);
757 Avg_TSSI_Meas_from_driver = 0;
758 for (k = 0; k < 5; k++)
759 tmp_report[k] = 0;
760 break;
761 }
762 rtl92e_writeb(dev, FW_Busy_Flag, 0);
763 }
764 priv->rtllib->bdynamic_txpower_enable = true;
765 rtl92e_writeb(dev, Pw_Track_Flag, 0);
766 }
767
_rtl92e_dm_tx_power_tracking_cb_thermal(struct net_device * dev)768 static void _rtl92e_dm_tx_power_tracking_cb_thermal(struct net_device *dev)
769 {
770 #define ThermalMeterVal 9
771 struct r8192_priv *priv = rtllib_priv(dev);
772 u32 tmpRegA, TempCCk;
773 u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
774 int i = 0, CCKSwingNeedUpdate = 0;
775
776 if (!priv->btxpower_trackingInit) {
777 tmpRegA = rtl92e_get_bb_reg(dev, rOFDM0_XATxIQImbalance,
778 bMaskDWord);
779 for (i = 0; i < OFDM_Table_Length; i++) {
780 if (tmpRegA == OFDMSwingTable[i]) {
781 priv->OFDM_index[0] = i;
782 }
783 }
784
785 TempCCk = rtl92e_get_bb_reg(dev, rCCK0_TxFilter1, bMaskByte2);
786 for (i = 0; i < CCK_Table_length; i++) {
787 if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
788 priv->CCK_index = i;
789 break;
790 }
791 }
792 priv->btxpower_trackingInit = true;
793 return;
794 }
795
796 tmpRegA = rtl92e_get_rf_reg(dev, RF90_PATH_A, 0x12, 0x078);
797 if (tmpRegA < 3 || tmpRegA > 13)
798 return;
799 if (tmpRegA >= 12)
800 tmpRegA = 12;
801 priv->ThermalMeter[0] = ThermalMeterVal;
802 priv->ThermalMeter[1] = ThermalMeterVal;
803
804 if (priv->ThermalMeter[0] >= (u8)tmpRegA) {
805 tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0] -
806 (u8)tmpRegA);
807 tmpCCK40Mindex = tmpCCK20Mindex - 6;
808 if (tmpOFDMindex >= OFDM_Table_Length)
809 tmpOFDMindex = OFDM_Table_Length-1;
810 if (tmpCCK20Mindex >= CCK_Table_length)
811 tmpCCK20Mindex = CCK_Table_length-1;
812 if (tmpCCK40Mindex >= CCK_Table_length)
813 tmpCCK40Mindex = CCK_Table_length-1;
814 } else {
815 tmpval = (u8)tmpRegA - priv->ThermalMeter[0];
816 if (tmpval >= 6) {
817 tmpOFDMindex = 0;
818 tmpCCK20Mindex = 0;
819 } else {
820 tmpOFDMindex = 6 - tmpval;
821 tmpCCK20Mindex = 6 - tmpval;
822 }
823 tmpCCK40Mindex = 0;
824 }
825 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
826 tmpCCKindex = tmpCCK40Mindex;
827 else
828 tmpCCKindex = tmpCCK20Mindex;
829
830 priv->Record_CCK_20Mindex = tmpCCK20Mindex;
831 priv->Record_CCK_40Mindex = tmpCCK40Mindex;
832
833 if (priv->rtllib->current_network.channel == 14 &&
834 !priv->bcck_in_ch14) {
835 priv->bcck_in_ch14 = true;
836 CCKSwingNeedUpdate = 1;
837 } else if (priv->rtllib->current_network.channel != 14 &&
838 priv->bcck_in_ch14) {
839 priv->bcck_in_ch14 = false;
840 CCKSwingNeedUpdate = 1;
841 }
842
843 if (priv->CCK_index != tmpCCKindex) {
844 priv->CCK_index = tmpCCKindex;
845 CCKSwingNeedUpdate = 1;
846 }
847
848 if (CCKSwingNeedUpdate)
849 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
850 if (priv->OFDM_index[0] != tmpOFDMindex) {
851 priv->OFDM_index[0] = tmpOFDMindex;
852 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
853 OFDMSwingTable[priv->OFDM_index[0]]);
854 }
855 priv->txpower_count = 0;
856 }
857
rtl92e_dm_txpower_tracking_wq(void * data)858 void rtl92e_dm_txpower_tracking_wq(void *data)
859 {
860 struct r8192_priv *priv = container_of_dwork_rsl(data,
861 struct r8192_priv, txpower_tracking_wq);
862 struct net_device *dev = priv->rtllib->dev;
863
864 if (priv->IC_Cut >= IC_VersionCut_D)
865 _rtl92e_dm_tx_power_tracking_callback_tssi(dev);
866 else
867 _rtl92e_dm_tx_power_tracking_cb_thermal(dev);
868 }
869
_rtl92e_dm_initialize_tx_power_tracking_tssi(struct net_device * dev)870 static void _rtl92e_dm_initialize_tx_power_tracking_tssi(struct net_device *dev)
871 {
872
873 struct r8192_priv *priv = rtllib_priv(dev);
874
875 priv->btxpower_tracking = true;
876 priv->txpower_count = 0;
877 priv->btxpower_trackingInit = false;
878
879 }
880
_rtl92e_dm_init_tx_power_tracking_thermal(struct net_device * dev)881 static void _rtl92e_dm_init_tx_power_tracking_thermal(struct net_device *dev)
882 {
883 struct r8192_priv *priv = rtllib_priv(dev);
884
885
886 if (priv->rtllib->FwRWRF)
887 priv->btxpower_tracking = true;
888 else
889 priv->btxpower_tracking = false;
890 priv->txpower_count = 0;
891 priv->btxpower_trackingInit = false;
892 }
893
rtl92e_dm_init_txpower_tracking(struct net_device * dev)894 void rtl92e_dm_init_txpower_tracking(struct net_device *dev)
895 {
896 struct r8192_priv *priv = rtllib_priv(dev);
897
898 if (priv->IC_Cut >= IC_VersionCut_D)
899 _rtl92e_dm_initialize_tx_power_tracking_tssi(dev);
900 else
901 _rtl92e_dm_init_tx_power_tracking_thermal(dev);
902 }
903
_rtl92e_dm_check_tx_power_tracking_tssi(struct net_device * dev)904 static void _rtl92e_dm_check_tx_power_tracking_tssi(struct net_device *dev)
905 {
906 struct r8192_priv *priv = rtllib_priv(dev);
907 static u32 tx_power_track_counter;
908
909 if (rtl92e_readb(dev, 0x11e) == 1)
910 return;
911 if (!priv->btxpower_tracking)
912 return;
913 tx_power_track_counter++;
914
915
916 if (tx_power_track_counter >= 180) {
917 schedule_delayed_work(&priv->txpower_tracking_wq, 0);
918 tx_power_track_counter = 0;
919 }
920
921 }
922
_rtl92e_dm_check_tx_power_tracking_thermal(struct net_device * dev)923 static void _rtl92e_dm_check_tx_power_tracking_thermal(struct net_device *dev)
924 {
925 struct r8192_priv *priv = rtllib_priv(dev);
926 static u8 TM_Trigger;
927 u8 TxPowerCheckCnt = 0;
928
929 if (IS_HARDWARE_TYPE_8192SE(dev))
930 TxPowerCheckCnt = 5;
931 else
932 TxPowerCheckCnt = 2;
933 if (!priv->btxpower_tracking)
934 return;
935
936 if (priv->txpower_count <= TxPowerCheckCnt) {
937 priv->txpower_count++;
938 return;
939 }
940
941 if (!TM_Trigger) {
942 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
943 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
944 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
945 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
946 TM_Trigger = 1;
947 return;
948 }
949 netdev_info(dev, "===============>Schedule TxPowerTrackingWorkItem\n");
950 schedule_delayed_work(&priv->txpower_tracking_wq, 0);
951 TM_Trigger = 0;
952
953 }
954
_rtl92e_dm_check_tx_power_tracking(struct net_device * dev)955 static void _rtl92e_dm_check_tx_power_tracking(struct net_device *dev)
956 {
957 struct r8192_priv *priv = rtllib_priv(dev);
958
959 if (priv->IC_Cut >= IC_VersionCut_D)
960 _rtl92e_dm_check_tx_power_tracking_tssi(dev);
961 else
962 _rtl92e_dm_check_tx_power_tracking_thermal(dev);
963 }
964
_rtl92e_dm_cck_tx_power_adjust_tssi(struct net_device * dev,bool bInCH14)965 static void _rtl92e_dm_cck_tx_power_adjust_tssi(struct net_device *dev,
966 bool bInCH14)
967 {
968 u32 TempVal;
969 struct r8192_priv *priv = rtllib_priv(dev);
970 u8 attenuation = priv->CCKPresentAttentuation;
971
972 TempVal = 0;
973 if (!bInCH14) {
974 TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][0] +
975 (dm_cck_tx_bb_gain[attenuation][1] << 8));
976
977 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
978 TempVal = (u32)((dm_cck_tx_bb_gain[attenuation][2]) +
979 (dm_cck_tx_bb_gain[attenuation][3] << 8) +
980 (dm_cck_tx_bb_gain[attenuation][4] << 16)+
981 (dm_cck_tx_bb_gain[attenuation][5] << 24));
982 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
983 TempVal = (u32)(dm_cck_tx_bb_gain[attenuation][6] +
984 (dm_cck_tx_bb_gain[attenuation][7] << 8));
985
986 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
987 } else {
988 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][0]) +
989 (dm_cck_tx_bb_gain_ch14[attenuation][1] << 8));
990
991 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
992 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][2]) +
993 (dm_cck_tx_bb_gain_ch14[attenuation][3] << 8) +
994 (dm_cck_tx_bb_gain_ch14[attenuation][4] << 16)+
995 (dm_cck_tx_bb_gain_ch14[attenuation][5] << 24));
996 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
997 TempVal = (u32)((dm_cck_tx_bb_gain_ch14[attenuation][6]) +
998 (dm_cck_tx_bb_gain_ch14[attenuation][7] << 8));
999
1000 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1001 }
1002 }
1003
_rtl92e_dm_cck_tx_power_adjust_thermal_meter(struct net_device * dev,bool bInCH14)1004 static void _rtl92e_dm_cck_tx_power_adjust_thermal_meter(struct net_device *dev,
1005 bool bInCH14)
1006 {
1007 u32 TempVal;
1008 struct r8192_priv *priv = rtllib_priv(dev);
1009
1010 TempVal = 0;
1011 if (!bInCH14) {
1012 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
1013 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1] << 8);
1014 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1015 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
1016 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3] << 8) +
1017 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4] << 16)+
1018 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5] << 24);
1019 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1020 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
1021 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7] << 8);
1022
1023 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1024 } else {
1025 TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
1026 (CCKSwingTable_Ch14[priv->CCK_index][1] << 8);
1027
1028 rtl92e_set_bb_reg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1029 TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] +
1030 (CCKSwingTable_Ch14[priv->CCK_index][3] << 8) +
1031 (CCKSwingTable_Ch14[priv->CCK_index][4] << 16)+
1032 (CCKSwingTable_Ch14[priv->CCK_index][5] << 24);
1033 rtl92e_set_bb_reg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1034 TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
1035 (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
1036
1037 rtl92e_set_bb_reg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1038 }
1039 }
1040
rtl92e_dm_cck_txpower_adjust(struct net_device * dev,bool binch14)1041 void rtl92e_dm_cck_txpower_adjust(struct net_device *dev, bool binch14)
1042 {
1043 struct r8192_priv *priv = rtllib_priv(dev);
1044
1045 if (priv->IC_Cut >= IC_VersionCut_D)
1046 _rtl92e_dm_cck_tx_power_adjust_tssi(dev, binch14);
1047 else
1048 _rtl92e_dm_cck_tx_power_adjust_thermal_meter(dev, binch14);
1049 }
1050
_rtl92e_dm_tx_power_reset_recovery(struct net_device * dev)1051 static void _rtl92e_dm_tx_power_reset_recovery(struct net_device *dev)
1052 {
1053 struct r8192_priv *priv = rtllib_priv(dev);
1054
1055 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
1056 dm_tx_bb_gain[priv->rfa_txpowertrackingindex]);
1057 rtl92e_dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
1058
1059 rtl92e_set_bb_reg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord,
1060 dm_tx_bb_gain[priv->rfc_txpowertrackingindex]);
1061 }
1062
rtl92e_dm_restore_state(struct net_device * dev)1063 void rtl92e_dm_restore_state(struct net_device *dev)
1064 {
1065 struct r8192_priv *priv = rtllib_priv(dev);
1066 u32 reg_ratr = priv->rate_adaptive.last_ratr;
1067 u32 ratr_value;
1068
1069 if (!priv->up) {
1070 return;
1071 }
1072
1073 if (priv->rate_adaptive.rate_adaptive_disabled)
1074 return;
1075 if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
1076 priv->rtllib->mode == WIRELESS_MODE_N_5G))
1077 return;
1078 ratr_value = reg_ratr;
1079 if (priv->rf_type == RF_1T2R)
1080 ratr_value &= ~(RATE_ALL_OFDM_2SS);
1081 rtl92e_writel(dev, RATR0, ratr_value);
1082 rtl92e_writeb(dev, UFWP, 1);
1083 if (priv->btxpower_trackingInit && priv->btxpower_tracking)
1084 _rtl92e_dm_tx_power_reset_recovery(dev);
1085
1086 _rtl92e_dm_bb_initialgain_restore(dev);
1087
1088 }
1089
_rtl92e_dm_bb_initialgain_restore(struct net_device * dev)1090 static void _rtl92e_dm_bb_initialgain_restore(struct net_device *dev)
1091 {
1092 struct r8192_priv *priv = rtllib_priv(dev);
1093 u32 bit_mask = 0x7f;
1094
1095 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1096 return;
1097
1098 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1099 rtl92e_set_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask,
1100 (u32)priv->initgain_backup.xaagccore1);
1101 rtl92e_set_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask,
1102 (u32)priv->initgain_backup.xbagccore1);
1103 rtl92e_set_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask,
1104 (u32)priv->initgain_backup.xcagccore1);
1105 rtl92e_set_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask,
1106 (u32)priv->initgain_backup.xdagccore1);
1107 bit_mask = bMaskByte2;
1108 rtl92e_set_bb_reg(dev, rCCK0_CCA, bit_mask,
1109 (u32)priv->initgain_backup.cca);
1110 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1111
1112 }
1113
rtl92e_dm_backup_state(struct net_device * dev)1114 void rtl92e_dm_backup_state(struct net_device *dev)
1115 {
1116 struct r8192_priv *priv = rtllib_priv(dev);
1117 u32 bit_mask = bMaskByte0;
1118
1119 priv->bswitch_fsync = false;
1120 priv->bfsync_processing = false;
1121
1122 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1123 return;
1124
1125 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1126 priv->initgain_backup.xaagccore1 = rtl92e_get_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask);
1127 priv->initgain_backup.xbagccore1 = rtl92e_get_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask);
1128 priv->initgain_backup.xcagccore1 = rtl92e_get_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask);
1129 priv->initgain_backup.xdagccore1 = rtl92e_get_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask);
1130 bit_mask = bMaskByte2;
1131 priv->initgain_backup.cca = (u8)rtl92e_get_bb_reg(dev, rCCK0_CCA, bit_mask);
1132 }
1133
_rtl92e_dm_dig_init(struct net_device * dev)1134 static void _rtl92e_dm_dig_init(struct net_device *dev)
1135 {
1136 struct r8192_priv *priv = rtllib_priv(dev);
1137
1138 dm_digtable.dig_enable_flag = true;
1139
1140 dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
1141
1142 dm_digtable.dig_algorithm_switch = 0;
1143
1144 dm_digtable.dig_state = DM_STA_DIG_MAX;
1145 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1146 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
1147 dm_digtable.PreSTAConnectState = DIG_STA_DISCONNECT;
1148
1149 dm_digtable.rssi_low_thresh = DM_DIG_THRESH_LOW;
1150 dm_digtable.rssi_high_thresh = DM_DIG_THRESH_HIGH;
1151
1152 dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
1153 dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
1154
1155 dm_digtable.rssi_val = 50;
1156 dm_digtable.backoff_val = DM_DIG_BACKOFF;
1157 dm_digtable.rx_gain_range_max = DM_DIG_MAX;
1158 if (priv->CustomerID == RT_CID_819x_Netcore)
1159 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
1160 else
1161 dm_digtable.rx_gain_range_min = DM_DIG_MIN;
1162 }
1163
_rtl92e_dm_ctrl_initgain_byrssi(struct net_device * dev)1164 static void _rtl92e_dm_ctrl_initgain_byrssi(struct net_device *dev)
1165 {
1166
1167 if (!dm_digtable.dig_enable_flag)
1168 return;
1169
1170 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1171 _rtl92e_dm_ctrl_initgain_byrssi_false_alarm(dev);
1172 else if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1173 _rtl92e_dm_ctrl_initgain_byrssi_driver(dev);
1174 else
1175 return;
1176 }
1177
1178 /*-----------------------------------------------------------------------------
1179 * Function: dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm()
1180 *
1181 * Overview: Driver monitor RSSI and False Alarm to change initial gain.
1182 Only change initial gain during link in progress.
1183 *
1184 * Input: IN PADAPTER pAdapter
1185 *
1186 * Output: NONE
1187 *
1188 * Return: NONE
1189 *
1190 * Revised History:
1191 * When Who Remark
1192 * 03/04/2009 hpfan Create Version 0.
1193 *
1194 ******************************************************************************/
1195
_rtl92e_dm_ctrl_initgain_byrssi_driver(struct net_device * dev)1196 static void _rtl92e_dm_ctrl_initgain_byrssi_driver(struct net_device *dev)
1197 {
1198 struct r8192_priv *priv = rtllib_priv(dev);
1199 u8 i;
1200 static u8 fw_dig;
1201
1202 if (!dm_digtable.dig_enable_flag)
1203 return;
1204
1205 if (dm_digtable.dig_algorithm_switch)
1206 fw_dig = 0;
1207 if (fw_dig <= 3) {
1208 for (i = 0; i < 3; i++)
1209 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1210 fw_dig++;
1211 dm_digtable.dig_state = DM_STA_DIG_OFF;
1212 }
1213
1214 if (priv->rtllib->state == RTLLIB_LINKED)
1215 dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
1216 else
1217 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
1218
1219
1220 dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
1221 _rtl92e_dm_initial_gain(dev);
1222 _rtl92e_dm_pd_th(dev);
1223 _rtl92e_dm_cs_ratio(dev);
1224 if (dm_digtable.dig_algorithm_switch)
1225 dm_digtable.dig_algorithm_switch = 0;
1226 dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
1227
1228 }
1229
_rtl92e_dm_ctrl_initgain_byrssi_false_alarm(struct net_device * dev)1230 static void _rtl92e_dm_ctrl_initgain_byrssi_false_alarm(struct net_device *dev)
1231 {
1232 struct r8192_priv *priv = rtllib_priv(dev);
1233 static u32 reset_cnt;
1234 u8 i;
1235
1236 if (!dm_digtable.dig_enable_flag)
1237 return;
1238
1239 if (dm_digtable.dig_algorithm_switch) {
1240 dm_digtable.dig_state = DM_STA_DIG_MAX;
1241 for (i = 0; i < 3; i++)
1242 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1243 dm_digtable.dig_algorithm_switch = 0;
1244 }
1245
1246 if (priv->rtllib->state != RTLLIB_LINKED)
1247 return;
1248
1249 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
1250 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
1251 return;
1252 if (priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh) {
1253 if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
1254 (priv->reset_count == reset_cnt))
1255 return;
1256 reset_cnt = priv->reset_count;
1257
1258 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1259 dm_digtable.dig_state = DM_STA_DIG_OFF;
1260
1261 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8);
1262
1263 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x17);
1264 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x17);
1265 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x17);
1266 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x17);
1267
1268 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1269 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00);
1270 else
1271 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
1272
1273 rtl92e_writeb(dev, 0xa0a, 0x08);
1274
1275 return;
1276 }
1277
1278 if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
1279 u8 reset_flag = 0;
1280
1281 if (dm_digtable.dig_state == DM_STA_DIG_ON &&
1282 (priv->reset_count == reset_cnt)) {
1283 _rtl92e_dm_ctrl_initgain_byrssi_highpwr(dev);
1284 return;
1285 }
1286 if (priv->reset_count != reset_cnt)
1287 reset_flag = 1;
1288
1289 reset_cnt = priv->reset_count;
1290
1291 dm_digtable.dig_state = DM_STA_DIG_ON;
1292
1293 if (reset_flag == 1) {
1294 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x2c);
1295 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x2c);
1296 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x2c);
1297 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x2c);
1298 } else {
1299 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, 0x20);
1300 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, 0x20);
1301 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, 0x20);
1302 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, 0x20);
1303 }
1304
1305 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1306 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1307 else
1308 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1309
1310 rtl92e_writeb(dev, 0xa0a, 0xcd);
1311
1312 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1);
1313 }
1314 _rtl92e_dm_ctrl_initgain_byrssi_highpwr(dev);
1315 }
1316
1317
_rtl92e_dm_ctrl_initgain_byrssi_highpwr(struct net_device * dev)1318 static void _rtl92e_dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev)
1319 {
1320 struct r8192_priv *priv = rtllib_priv(dev);
1321 static u32 reset_cnt_highpwr;
1322
1323 if ((priv->undecorated_smoothed_pwdb >
1324 dm_digtable.rssi_high_power_lowthresh) &&
1325 (priv->undecorated_smoothed_pwdb <
1326 dm_digtable.rssi_high_power_highthresh))
1327 return;
1328
1329 if (priv->undecorated_smoothed_pwdb >=
1330 dm_digtable.rssi_high_power_highthresh) {
1331 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
1332 (priv->reset_count == reset_cnt_highpwr))
1333 return;
1334 dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
1335
1336 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1337 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10);
1338 else
1339 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
1340 } else {
1341 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
1342 (priv->reset_count == reset_cnt_highpwr))
1343 return;
1344 dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
1345
1346 if ((priv->undecorated_smoothed_pwdb <
1347 dm_digtable.rssi_high_power_lowthresh) &&
1348 (priv->undecorated_smoothed_pwdb >=
1349 dm_digtable.rssi_high_thresh)) {
1350 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1351 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1352 else
1353 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1354 }
1355 }
1356 reset_cnt_highpwr = priv->reset_count;
1357 }
1358
_rtl92e_dm_initial_gain(struct net_device * dev)1359 static void _rtl92e_dm_initial_gain(struct net_device *dev)
1360 {
1361 struct r8192_priv *priv = rtllib_priv(dev);
1362 u8 initial_gain = 0;
1363 static u8 initialized, force_write;
1364 static u32 reset_cnt;
1365
1366 if (dm_digtable.dig_algorithm_switch) {
1367 initialized = 0;
1368 reset_cnt = 0;
1369 }
1370
1371 if (rtllib_act_scanning(priv->rtllib, true)) {
1372 force_write = 1;
1373 return;
1374 }
1375
1376 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1377 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1378 long gain_range = dm_digtable.rssi_val + 10 -
1379 dm_digtable.backoff_val;
1380 gain_range = clamp_t(long, gain_range,
1381 dm_digtable.rx_gain_range_min,
1382 dm_digtable.rx_gain_range_max);
1383 dm_digtable.cur_ig_value = gain_range;
1384 } else {
1385 if (dm_digtable.cur_ig_value == 0)
1386 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
1387 else
1388 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
1389 }
1390 } else {
1391 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
1392 dm_digtable.pre_ig_value = 0;
1393 }
1394
1395 if (priv->reset_count != reset_cnt) {
1396 force_write = 1;
1397 reset_cnt = priv->reset_count;
1398 }
1399
1400 if (dm_digtable.pre_ig_value != rtl92e_readb(dev, rOFDM0_XAAGCCore1))
1401 force_write = 1;
1402
1403 if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
1404 || !initialized || force_write) {
1405 initial_gain = dm_digtable.cur_ig_value;
1406 rtl92e_writeb(dev, rOFDM0_XAAGCCore1, initial_gain);
1407 rtl92e_writeb(dev, rOFDM0_XBAGCCore1, initial_gain);
1408 rtl92e_writeb(dev, rOFDM0_XCAGCCore1, initial_gain);
1409 rtl92e_writeb(dev, rOFDM0_XDAGCCore1, initial_gain);
1410 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
1411 initialized = 1;
1412 force_write = 0;
1413 }
1414 }
1415
_rtl92e_dm_pd_th(struct net_device * dev)1416 static void _rtl92e_dm_pd_th(struct net_device *dev)
1417 {
1418 struct r8192_priv *priv = rtllib_priv(dev);
1419 static u8 initialized, force_write;
1420 static u32 reset_cnt;
1421
1422 if (dm_digtable.dig_algorithm_switch) {
1423 initialized = 0;
1424 reset_cnt = 0;
1425 }
1426
1427 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1428 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1429 if (dm_digtable.rssi_val >=
1430 dm_digtable.rssi_high_power_highthresh)
1431 dm_digtable.curpd_thstate =
1432 DIG_PD_AT_HIGH_POWER;
1433 else if (dm_digtable.rssi_val <=
1434 dm_digtable.rssi_low_thresh)
1435 dm_digtable.curpd_thstate =
1436 DIG_PD_AT_LOW_POWER;
1437 else if ((dm_digtable.rssi_val >=
1438 dm_digtable.rssi_high_thresh) &&
1439 (dm_digtable.rssi_val <
1440 dm_digtable.rssi_high_power_lowthresh))
1441 dm_digtable.curpd_thstate =
1442 DIG_PD_AT_NORMAL_POWER;
1443 else
1444 dm_digtable.curpd_thstate =
1445 dm_digtable.prepd_thstate;
1446 } else {
1447 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
1448 }
1449 } else {
1450 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
1451 }
1452
1453 if (priv->reset_count != reset_cnt) {
1454 force_write = 1;
1455 reset_cnt = priv->reset_count;
1456 }
1457
1458 if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
1459 (initialized <= 3) || force_write) {
1460 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) {
1461 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1462 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x00);
1463 else
1464 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x42);
1465 } else if (dm_digtable.curpd_thstate ==
1466 DIG_PD_AT_NORMAL_POWER) {
1467 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1468 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x20);
1469 else
1470 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x44);
1471 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) {
1472 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1473 rtl92e_writeb(dev, (rOFDM0_XATxAFE+3), 0x10);
1474 else
1475 rtl92e_writeb(dev, rOFDM0_RxDetector1, 0x43);
1476 }
1477 dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
1478 if (initialized <= 3)
1479 initialized++;
1480 force_write = 0;
1481 }
1482 }
1483
_rtl92e_dm_cs_ratio(struct net_device * dev)1484 static void _rtl92e_dm_cs_ratio(struct net_device *dev)
1485 {
1486 struct r8192_priv *priv = rtllib_priv(dev);
1487 static u8 initialized, force_write;
1488 static u32 reset_cnt;
1489
1490 if (dm_digtable.dig_algorithm_switch) {
1491 initialized = 0;
1492 reset_cnt = 0;
1493 }
1494
1495 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1496 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1497 if (dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh)
1498 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1499 else if (dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh)
1500 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
1501 else
1502 dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
1503 } else {
1504 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1505 }
1506 } else {
1507 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
1508 }
1509
1510 if (priv->reset_count != reset_cnt) {
1511 force_write = 1;
1512 reset_cnt = priv->reset_count;
1513 }
1514
1515
1516 if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
1517 !initialized || force_write) {
1518 if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
1519 rtl92e_writeb(dev, 0xa0a, 0x08);
1520 else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
1521 rtl92e_writeb(dev, 0xa0a, 0xcd);
1522 dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
1523 initialized = 1;
1524 force_write = 0;
1525 }
1526 }
1527
rtl92e_dm_init_edca_turbo(struct net_device * dev)1528 void rtl92e_dm_init_edca_turbo(struct net_device *dev)
1529 {
1530 struct r8192_priv *priv = rtllib_priv(dev);
1531
1532 priv->bcurrent_turbo_EDCA = false;
1533 priv->rtllib->bis_any_nonbepkts = false;
1534 priv->bis_cur_rdlstate = false;
1535 }
1536
_rtl92e_dm_check_edca_turbo(struct net_device * dev)1537 static void _rtl92e_dm_check_edca_turbo(struct net_device *dev)
1538 {
1539 struct r8192_priv *priv = rtllib_priv(dev);
1540 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1541
1542 static unsigned long lastTxOkCnt;
1543 static unsigned long lastRxOkCnt;
1544 unsigned long curTxOkCnt = 0;
1545 unsigned long curRxOkCnt = 0;
1546
1547 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
1548 goto dm_CheckEdcaTurbo_EXIT;
1549 if (priv->rtllib->state != RTLLIB_LINKED)
1550 goto dm_CheckEdcaTurbo_EXIT;
1551 if (priv->rtllib->pHTInfo->iot_action & HT_IOT_ACT_DISABLE_EDCA_TURBO)
1552 goto dm_CheckEdcaTurbo_EXIT;
1553
1554 if (!priv->rtllib->bis_any_nonbepkts) {
1555 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
1556 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
1557 if (pHTInfo->iot_action & HT_IOT_ACT_EDCA_BIAS_ON_RX) {
1558 if (curTxOkCnt > 4*curRxOkCnt) {
1559 if (priv->bis_cur_rdlstate ||
1560 !priv->bcurrent_turbo_EDCA) {
1561 rtl92e_writel(dev, EDCAPARA_BE,
1562 edca_setting_UL[pHTInfo->IOTPeer]);
1563 priv->bis_cur_rdlstate = false;
1564 }
1565 } else {
1566 if (!priv->bis_cur_rdlstate ||
1567 !priv->bcurrent_turbo_EDCA) {
1568 if (priv->rtllib->mode == WIRELESS_MODE_G)
1569 rtl92e_writel(dev, EDCAPARA_BE,
1570 edca_setting_DL_GMode[pHTInfo->IOTPeer]);
1571 else
1572 rtl92e_writel(dev, EDCAPARA_BE,
1573 edca_setting_DL[pHTInfo->IOTPeer]);
1574 priv->bis_cur_rdlstate = true;
1575 }
1576 }
1577 priv->bcurrent_turbo_EDCA = true;
1578 } else {
1579 if (curRxOkCnt > 4*curTxOkCnt) {
1580 if (!priv->bis_cur_rdlstate ||
1581 !priv->bcurrent_turbo_EDCA) {
1582 if (priv->rtllib->mode == WIRELESS_MODE_G)
1583 rtl92e_writel(dev, EDCAPARA_BE,
1584 edca_setting_DL_GMode[pHTInfo->IOTPeer]);
1585 else
1586 rtl92e_writel(dev, EDCAPARA_BE,
1587 edca_setting_DL[pHTInfo->IOTPeer]);
1588 priv->bis_cur_rdlstate = true;
1589 }
1590 } else {
1591 if (priv->bis_cur_rdlstate ||
1592 !priv->bcurrent_turbo_EDCA) {
1593 rtl92e_writel(dev, EDCAPARA_BE,
1594 edca_setting_UL[pHTInfo->IOTPeer]);
1595 priv->bis_cur_rdlstate = false;
1596 }
1597
1598 }
1599
1600 priv->bcurrent_turbo_EDCA = true;
1601 }
1602 } else {
1603 if (priv->bcurrent_turbo_EDCA) {
1604 u8 tmp = AC0_BE;
1605
1606 priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM,
1607 (u8 *)(&tmp));
1608 priv->bcurrent_turbo_EDCA = false;
1609 }
1610 }
1611
1612
1613 dm_CheckEdcaTurbo_EXIT:
1614 priv->rtllib->bis_any_nonbepkts = false;
1615 lastTxOkCnt = priv->stats.txbytesunicast;
1616 lastRxOkCnt = priv->stats.rxbytesunicast;
1617 }
1618
_rtl92e_dm_init_cts_to_self(struct net_device * dev)1619 static void _rtl92e_dm_init_cts_to_self(struct net_device *dev)
1620 {
1621 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1622
1623 priv->rtllib->bCTSToSelfEnable = true;
1624 }
1625
_rtl92e_dm_cts_to_self(struct net_device * dev)1626 static void _rtl92e_dm_cts_to_self(struct net_device *dev)
1627 {
1628 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1629 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1630 static unsigned long lastTxOkCnt;
1631 static unsigned long lastRxOkCnt;
1632 unsigned long curTxOkCnt = 0;
1633 unsigned long curRxOkCnt = 0;
1634
1635 if (!priv->rtllib->bCTSToSelfEnable) {
1636 pHTInfo->iot_action &= ~HT_IOT_ACT_FORCED_CTS2SELF;
1637 return;
1638 }
1639 if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
1640 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
1641 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
1642 if (curRxOkCnt > 4*curTxOkCnt)
1643 pHTInfo->iot_action &= ~HT_IOT_ACT_FORCED_CTS2SELF;
1644 else
1645 pHTInfo->iot_action |= HT_IOT_ACT_FORCED_CTS2SELF;
1646
1647 lastTxOkCnt = priv->stats.txbytesunicast;
1648 lastRxOkCnt = priv->stats.rxbytesunicast;
1649 }
1650 }
1651
1652
_rtl92e_dm_init_wa_broadcom_iot(struct net_device * dev)1653 static void _rtl92e_dm_init_wa_broadcom_iot(struct net_device *dev)
1654 {
1655 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
1656 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
1657
1658 pHTInfo->bWAIotBroadcom = false;
1659 pHTInfo->WAIotTH = WAIotTHVal;
1660 }
1661
_rtl92e_dm_check_rf_ctrl_gpio(void * data)1662 static void _rtl92e_dm_check_rf_ctrl_gpio(void *data)
1663 {
1664 struct r8192_priv *priv = container_of_dwork_rsl(data,
1665 struct r8192_priv, gpio_change_rf_wq);
1666 struct net_device *dev = priv->rtllib->dev;
1667 u8 tmp1byte;
1668 enum rt_rf_power_state rf_power_state_to_set;
1669 bool bActuallySet = false;
1670 char *argv[3];
1671 static const char RadioPowerPath[] = "/etc/acpi/events/RadioPower.sh";
1672 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin",
1673 NULL};
1674
1675 bActuallySet = false;
1676
1677 if ((priv->up_first_time == 1) || (priv->being_init_adapter))
1678 return;
1679
1680 if (priv->bfirst_after_down) {
1681 priv->bfirst_after_down = true;
1682 return;
1683 }
1684
1685 tmp1byte = rtl92e_readb(dev, GPI);
1686
1687 rf_power_state_to_set = (tmp1byte&BIT1) ? rf_on : rf_off;
1688
1689 if (priv->hw_radio_off && (rf_power_state_to_set == rf_on)) {
1690 netdev_info(dev, "gpiochangeRF - HW Radio ON\n");
1691 priv->hw_radio_off = false;
1692 bActuallySet = true;
1693 } else if (!priv->hw_radio_off && (rf_power_state_to_set == rf_off)) {
1694 netdev_info(dev, "gpiochangeRF - HW Radio OFF\n");
1695 priv->hw_radio_off = true;
1696 bActuallySet = true;
1697 }
1698
1699 if (bActuallySet) {
1700 mdelay(1000);
1701 priv->bHwRfOffAction = 1;
1702 rtl92e_set_rf_state(dev, rf_power_state_to_set, RF_CHANGE_BY_HW);
1703 if (priv->hw_radio_off)
1704 argv[1] = "RFOFF";
1705 else
1706 argv[1] = "RFON";
1707
1708 argv[0] = (char *)RadioPowerPath;
1709 argv[2] = NULL;
1710 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
1711 }
1712 }
1713
rtl92e_dm_rf_pathcheck_wq(void * data)1714 void rtl92e_dm_rf_pathcheck_wq(void *data)
1715 {
1716 struct r8192_priv *priv = container_of_dwork_rsl(data,
1717 struct r8192_priv,
1718 rfpath_check_wq);
1719 struct net_device *dev = priv->rtllib->dev;
1720 u8 rfpath, i;
1721
1722 rfpath = rtl92e_readb(dev, 0xc04);
1723
1724 for (i = 0; i < RF90_PATH_MAX; i++) {
1725 if (rfpath & (0x01<<i))
1726 priv->brfpath_rxenable[i] = true;
1727 else
1728 priv->brfpath_rxenable[i] = false;
1729 }
1730 if (!DM_RxPathSelTable.Enable)
1731 return;
1732
1733 _rtl92e_dm_rx_path_sel_byrssi(dev);
1734 }
1735
_rtl92e_dm_init_rx_path_selection(struct net_device * dev)1736 static void _rtl92e_dm_init_rx_path_selection(struct net_device *dev)
1737 {
1738 u8 i;
1739 struct r8192_priv *priv = rtllib_priv(dev);
1740
1741 DM_RxPathSelTable.Enable = 1;
1742 DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
1743 DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
1744 if (priv->CustomerID == RT_CID_819x_Netcore)
1745 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
1746 else
1747 DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
1748 DM_RxPathSelTable.disabledRF = 0;
1749 for (i = 0; i < 4; i++) {
1750 DM_RxPathSelTable.rf_rssi[i] = 50;
1751 DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
1752 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
1753 }
1754 }
1755
1756 #define PWDB_IN_RANGE ((cur_cck_pwdb < tmp_cck_max_pwdb) && \
1757 (cur_cck_pwdb > tmp_cck_sec_pwdb))
1758
_rtl92e_dm_rx_path_sel_byrssi(struct net_device * dev)1759 static void _rtl92e_dm_rx_path_sel_byrssi(struct net_device *dev)
1760 {
1761 struct r8192_priv *priv = rtllib_priv(dev);
1762 u8 i, max_rssi_index = 0, min_rssi_index = 0;
1763 u8 sec_rssi_index = 0, rf_num = 0;
1764 u8 tmp_max_rssi = 0, tmp_min_rssi = 0, tmp_sec_rssi = 0;
1765 u8 cck_default_Rx = 0x2;
1766 u8 cck_optional_Rx = 0x3;
1767 long tmp_cck_max_pwdb = 0, tmp_cck_min_pwdb = 0, tmp_cck_sec_pwdb = 0;
1768 u8 cck_rx_ver2_max_index = 0;
1769 u8 cck_rx_ver2_sec_index = 0;
1770 u8 cur_rf_rssi;
1771 long cur_cck_pwdb;
1772 static u8 disabled_rf_cnt, cck_Rx_Path_initialized;
1773 u8 update_cck_rx_path;
1774
1775 if (priv->rf_type != RF_2T4R)
1776 return;
1777
1778 if (!cck_Rx_Path_initialized) {
1779 DM_RxPathSelTable.cck_Rx_path = (rtl92e_readb(dev, 0xa07)&0xf);
1780 cck_Rx_Path_initialized = 1;
1781 }
1782
1783 DM_RxPathSelTable.disabledRF = 0xf;
1784 DM_RxPathSelTable.disabledRF &= ~(rtl92e_readb(dev, 0xc04));
1785
1786 if (priv->rtllib->mode == WIRELESS_MODE_B)
1787 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
1788
1789 for (i = 0; i < RF90_PATH_MAX; i++) {
1790 DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
1791
1792 if (priv->brfpath_rxenable[i]) {
1793 rf_num++;
1794 cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
1795
1796 if (rf_num == 1) {
1797 max_rssi_index = min_rssi_index = sec_rssi_index = i;
1798 tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
1799 } else if (rf_num == 2) {
1800 if (cur_rf_rssi >= tmp_max_rssi) {
1801 tmp_max_rssi = cur_rf_rssi;
1802 max_rssi_index = i;
1803 } else {
1804 tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
1805 sec_rssi_index = min_rssi_index = i;
1806 }
1807 } else {
1808 if (cur_rf_rssi > tmp_max_rssi) {
1809 tmp_sec_rssi = tmp_max_rssi;
1810 sec_rssi_index = max_rssi_index;
1811 tmp_max_rssi = cur_rf_rssi;
1812 max_rssi_index = i;
1813 } else if (cur_rf_rssi == tmp_max_rssi) {
1814 tmp_sec_rssi = cur_rf_rssi;
1815 sec_rssi_index = i;
1816 } else if ((cur_rf_rssi < tmp_max_rssi) &&
1817 (cur_rf_rssi > tmp_sec_rssi)) {
1818 tmp_sec_rssi = cur_rf_rssi;
1819 sec_rssi_index = i;
1820 } else if (cur_rf_rssi == tmp_sec_rssi) {
1821 if (tmp_sec_rssi == tmp_min_rssi) {
1822 tmp_sec_rssi = cur_rf_rssi;
1823 sec_rssi_index = i;
1824 }
1825 } else if ((cur_rf_rssi < tmp_sec_rssi) &&
1826 (cur_rf_rssi > tmp_min_rssi)) {
1827 ;
1828 } else if (cur_rf_rssi == tmp_min_rssi) {
1829 if (tmp_sec_rssi == tmp_min_rssi) {
1830 tmp_min_rssi = cur_rf_rssi;
1831 min_rssi_index = i;
1832 }
1833 } else if (cur_rf_rssi < tmp_min_rssi) {
1834 tmp_min_rssi = cur_rf_rssi;
1835 min_rssi_index = i;
1836 }
1837 }
1838 }
1839 }
1840
1841 rf_num = 0;
1842 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
1843 for (i = 0; i < RF90_PATH_MAX; i++) {
1844 if (priv->brfpath_rxenable[i]) {
1845 rf_num++;
1846 cur_cck_pwdb =
1847 DM_RxPathSelTable.cck_pwdb_sta[i];
1848
1849 if (rf_num == 1) {
1850 cck_rx_ver2_max_index = i;
1851 cck_rx_ver2_sec_index = i;
1852 tmp_cck_max_pwdb = cur_cck_pwdb;
1853 tmp_cck_min_pwdb = cur_cck_pwdb;
1854 tmp_cck_sec_pwdb = cur_cck_pwdb;
1855 } else if (rf_num == 2) {
1856 if (cur_cck_pwdb >= tmp_cck_max_pwdb) {
1857 tmp_cck_max_pwdb = cur_cck_pwdb;
1858 cck_rx_ver2_max_index = i;
1859 } else {
1860 tmp_cck_sec_pwdb = cur_cck_pwdb;
1861 tmp_cck_min_pwdb = cur_cck_pwdb;
1862 cck_rx_ver2_sec_index = i;
1863 }
1864 } else {
1865 if (cur_cck_pwdb > tmp_cck_max_pwdb) {
1866 tmp_cck_sec_pwdb =
1867 tmp_cck_max_pwdb;
1868 cck_rx_ver2_sec_index =
1869 cck_rx_ver2_max_index;
1870 tmp_cck_max_pwdb = cur_cck_pwdb;
1871 cck_rx_ver2_max_index = i;
1872 } else if (cur_cck_pwdb ==
1873 tmp_cck_max_pwdb) {
1874 tmp_cck_sec_pwdb = cur_cck_pwdb;
1875 cck_rx_ver2_sec_index = i;
1876 } else if (PWDB_IN_RANGE) {
1877 tmp_cck_sec_pwdb = cur_cck_pwdb;
1878 cck_rx_ver2_sec_index = i;
1879 } else if (cur_cck_pwdb ==
1880 tmp_cck_sec_pwdb) {
1881 if (tmp_cck_sec_pwdb ==
1882 tmp_cck_min_pwdb) {
1883 tmp_cck_sec_pwdb =
1884 cur_cck_pwdb;
1885 cck_rx_ver2_sec_index =
1886 i;
1887 }
1888 } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) &&
1889 (cur_cck_pwdb > tmp_cck_min_pwdb)) {
1890 ;
1891 } else if (cur_cck_pwdb == tmp_cck_min_pwdb) {
1892 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb)
1893 tmp_cck_min_pwdb = cur_cck_pwdb;
1894 } else if (cur_cck_pwdb < tmp_cck_min_pwdb) {
1895 tmp_cck_min_pwdb = cur_cck_pwdb;
1896 }
1897 }
1898
1899 }
1900 }
1901 }
1902
1903 update_cck_rx_path = 0;
1904 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
1905 cck_default_Rx = cck_rx_ver2_max_index;
1906 cck_optional_Rx = cck_rx_ver2_sec_index;
1907 if (tmp_cck_max_pwdb != -64)
1908 update_cck_rx_path = 1;
1909 }
1910
1911 if (tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2) {
1912 if ((tmp_max_rssi - tmp_min_rssi) >=
1913 DM_RxPathSelTable.diff_TH) {
1914 DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] =
1915 tmp_max_rssi+5;
1916 rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable,
1917 0x1<<min_rssi_index, 0x0);
1918 rtl92e_set_bb_reg(dev, rOFDM1_TRxPathEnable,
1919 0x1<<min_rssi_index, 0x0);
1920 disabled_rf_cnt++;
1921 }
1922 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_1) {
1923 cck_default_Rx = max_rssi_index;
1924 cck_optional_Rx = sec_rssi_index;
1925 if (tmp_max_rssi)
1926 update_cck_rx_path = 1;
1927 }
1928 }
1929
1930 if (update_cck_rx_path) {
1931 DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2) |
1932 (cck_optional_Rx);
1933 rtl92e_set_bb_reg(dev, rCCK0_AFESetting, 0x0f000000,
1934 DM_RxPathSelTable.cck_Rx_path);
1935 }
1936
1937 if (DM_RxPathSelTable.disabledRF) {
1938 for (i = 0; i < 4; i++) {
1939 if ((DM_RxPathSelTable.disabledRF>>i) & 0x1) {
1940 if (tmp_max_rssi >=
1941 DM_RxPathSelTable.rf_enable_rssi_th[i]) {
1942 rtl92e_set_bb_reg(dev,
1943 rOFDM0_TRxPathEnable,
1944 0x1 << i, 0x1);
1945 rtl92e_set_bb_reg(dev,
1946 rOFDM1_TRxPathEnable,
1947 0x1 << i, 0x1);
1948 DM_RxPathSelTable.rf_enable_rssi_th[i]
1949 = 100;
1950 disabled_rf_cnt--;
1951 }
1952 }
1953 }
1954 }
1955 }
1956
_rtl92e_dm_check_rx_path_selection(struct net_device * dev)1957 static void _rtl92e_dm_check_rx_path_selection(struct net_device *dev)
1958 {
1959 struct r8192_priv *priv = rtllib_priv(dev);
1960
1961 schedule_delayed_work(&priv->rfpath_check_wq, 0);
1962 }
1963
1964
_rtl92e_dm_init_fsync(struct net_device * dev)1965 static void _rtl92e_dm_init_fsync(struct net_device *dev)
1966 {
1967 struct r8192_priv *priv = rtllib_priv(dev);
1968
1969 priv->rtllib->fsync_time_interval = 500;
1970 priv->rtllib->fsync_rate_bitmap = 0x0f000800;
1971 priv->rtllib->fsync_rssi_threshold = 30;
1972 priv->rtllib->bfsync_enable = false;
1973 priv->rtllib->fsync_multiple_timeinterval = 3;
1974 priv->rtllib->fsync_firstdiff_ratethreshold = 100;
1975 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
1976 priv->rtllib->fsync_state = Default_Fsync;
1977 priv->framesyncMonitor = 1;
1978
1979 timer_setup(&priv->fsync_timer, _rtl92e_dm_fsync_timer_callback, 0);
1980 }
1981
1982
_rtl92e_dm_deinit_fsync(struct net_device * dev)1983 static void _rtl92e_dm_deinit_fsync(struct net_device *dev)
1984 {
1985 struct r8192_priv *priv = rtllib_priv(dev);
1986
1987 del_timer_sync(&priv->fsync_timer);
1988 }
1989
_rtl92e_dm_fsync_timer_callback(struct timer_list * t)1990 static void _rtl92e_dm_fsync_timer_callback(struct timer_list *t)
1991 {
1992 struct r8192_priv *priv = from_timer(priv, t, fsync_timer);
1993 struct net_device *dev = priv->rtllib->dev;
1994 u32 rate_index, rate_count = 0, rate_count_diff = 0;
1995 bool bSwitchFromCountDiff = false;
1996 bool bDoubleTimeInterval = false;
1997
1998 if (priv->rtllib->state == RTLLIB_LINKED &&
1999 priv->rtllib->bfsync_enable &&
2000 (priv->rtllib->pHTInfo->iot_action & HT_IOT_ACT_CDD_FSYNC)) {
2001 u32 rate_bitmap;
2002
2003 for (rate_index = 0; rate_index <= 27; rate_index++) {
2004 rate_bitmap = 1 << rate_index;
2005 if (priv->rtllib->fsync_rate_bitmap & rate_bitmap)
2006 rate_count +=
2007 priv->stats.received_rate_histogram[1]
2008 [rate_index];
2009 }
2010
2011 if (rate_count < priv->rate_record)
2012 rate_count_diff = 0xffffffff - rate_count +
2013 priv->rate_record;
2014 else
2015 rate_count_diff = rate_count - priv->rate_record;
2016 if (rate_count_diff < priv->rateCountDiffRecord) {
2017
2018 u32 DiffNum = priv->rateCountDiffRecord -
2019 rate_count_diff;
2020 if (DiffNum >=
2021 priv->rtllib->fsync_seconddiff_ratethreshold)
2022 priv->ContinueDiffCount++;
2023 else
2024 priv->ContinueDiffCount = 0;
2025
2026 if (priv->ContinueDiffCount >= 2) {
2027 bSwitchFromCountDiff = true;
2028 priv->ContinueDiffCount = 0;
2029 }
2030 } else {
2031 priv->ContinueDiffCount = 0;
2032 }
2033
2034 if (rate_count_diff <=
2035 priv->rtllib->fsync_firstdiff_ratethreshold) {
2036 bSwitchFromCountDiff = true;
2037 priv->ContinueDiffCount = 0;
2038 }
2039 priv->rate_record = rate_count;
2040 priv->rateCountDiffRecord = rate_count_diff;
2041 if (priv->undecorated_smoothed_pwdb >
2042 priv->rtllib->fsync_rssi_threshold &&
2043 bSwitchFromCountDiff) {
2044 bDoubleTimeInterval = true;
2045 priv->bswitch_fsync = !priv->bswitch_fsync;
2046 if (priv->bswitch_fsync) {
2047 rtl92e_writeb(dev, 0xC36, 0x1c);
2048 rtl92e_writeb(dev, 0xC3e, 0x90);
2049 } else {
2050 rtl92e_writeb(dev, 0xC36, 0x5c);
2051 rtl92e_writeb(dev, 0xC3e, 0x96);
2052 }
2053 } else if (priv->undecorated_smoothed_pwdb <=
2054 priv->rtllib->fsync_rssi_threshold) {
2055 if (priv->bswitch_fsync) {
2056 priv->bswitch_fsync = false;
2057 rtl92e_writeb(dev, 0xC36, 0x5c);
2058 rtl92e_writeb(dev, 0xC3e, 0x96);
2059 }
2060 }
2061 if (bDoubleTimeInterval) {
2062 if (timer_pending(&priv->fsync_timer))
2063 del_timer_sync(&priv->fsync_timer);
2064 priv->fsync_timer.expires = jiffies +
2065 msecs_to_jiffies(priv->rtllib->fsync_time_interval *
2066 priv->rtllib->fsync_multiple_timeinterval);
2067 add_timer(&priv->fsync_timer);
2068 } else {
2069 if (timer_pending(&priv->fsync_timer))
2070 del_timer_sync(&priv->fsync_timer);
2071 priv->fsync_timer.expires = jiffies +
2072 msecs_to_jiffies(priv->rtllib->fsync_time_interval);
2073 add_timer(&priv->fsync_timer);
2074 }
2075 } else {
2076 if (priv->bswitch_fsync) {
2077 priv->bswitch_fsync = false;
2078 rtl92e_writeb(dev, 0xC36, 0x5c);
2079 rtl92e_writeb(dev, 0xC3e, 0x96);
2080 }
2081 priv->ContinueDiffCount = 0;
2082 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2083 }
2084 }
2085
_rtl92e_dm_start_hw_fsync(struct net_device * dev)2086 static void _rtl92e_dm_start_hw_fsync(struct net_device *dev)
2087 {
2088 u8 rf_timing = 0x77;
2089 struct r8192_priv *priv = rtllib_priv(dev);
2090
2091 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cf);
2092 priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING,
2093 (u8 *)(&rf_timing));
2094 rtl92e_writeb(dev, 0xc3b, 0x41);
2095 }
2096
_rtl92e_dm_end_hw_fsync(struct net_device * dev)2097 static void _rtl92e_dm_end_hw_fsync(struct net_device *dev)
2098 {
2099 u8 rf_timing = 0xaa;
2100 struct r8192_priv *priv = rtllib_priv(dev);
2101
2102 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2103 priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8 *)
2104 (&rf_timing));
2105 rtl92e_writeb(dev, 0xc3b, 0x49);
2106 }
2107
_rtl92e_dm_end_sw_fsync(struct net_device * dev)2108 static void _rtl92e_dm_end_sw_fsync(struct net_device *dev)
2109 {
2110 struct r8192_priv *priv = rtllib_priv(dev);
2111
2112 del_timer_sync(&(priv->fsync_timer));
2113
2114 if (priv->bswitch_fsync) {
2115 priv->bswitch_fsync = false;
2116
2117 rtl92e_writeb(dev, 0xC36, 0x5c);
2118
2119 rtl92e_writeb(dev, 0xC3e, 0x96);
2120 }
2121
2122 priv->ContinueDiffCount = 0;
2123 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c52cd);
2124 }
2125
_rtl92e_dm_start_sw_fsync(struct net_device * dev)2126 static void _rtl92e_dm_start_sw_fsync(struct net_device *dev)
2127 {
2128 struct r8192_priv *priv = rtllib_priv(dev);
2129 u32 rateIndex;
2130 u32 rateBitmap;
2131
2132 priv->rate_record = 0;
2133 priv->ContinueDiffCount = 0;
2134 priv->rateCountDiffRecord = 0;
2135 priv->bswitch_fsync = false;
2136
2137 if (priv->rtllib->mode == WIRELESS_MODE_N_24G) {
2138 priv->rtllib->fsync_firstdiff_ratethreshold = 600;
2139 priv->rtllib->fsync_seconddiff_ratethreshold = 0xffff;
2140 } else {
2141 priv->rtllib->fsync_firstdiff_ratethreshold = 200;
2142 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2143 }
2144 for (rateIndex = 0; rateIndex <= 27; rateIndex++) {
2145 rateBitmap = 1 << rateIndex;
2146 if (priv->rtllib->fsync_rate_bitmap & rateBitmap)
2147 priv->rate_record +=
2148 priv->stats.received_rate_histogram[1]
2149 [rateIndex];
2150 }
2151 if (timer_pending(&priv->fsync_timer))
2152 del_timer_sync(&priv->fsync_timer);
2153 priv->fsync_timer.expires = jiffies +
2154 msecs_to_jiffies(priv->rtllib->fsync_time_interval);
2155 add_timer(&priv->fsync_timer);
2156
2157 rtl92e_writel(dev, rOFDM0_RxDetector2, 0x465c12cd);
2158
2159 }
2160
_rtl92e_dm_check_fsync(struct net_device * dev)2161 static void _rtl92e_dm_check_fsync(struct net_device *dev)
2162 {
2163 #define RegC38_Default 0
2164 #define RegC38_NonFsync_Other_AP 1
2165 #define RegC38_Fsync_AP_BCM 2
2166 struct r8192_priv *priv = rtllib_priv(dev);
2167 static u8 reg_c38_State = RegC38_Default;
2168 static u32 reset_cnt;
2169
2170 if (priv->rtllib->state == RTLLIB_LINKED &&
2171 priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
2172 if (priv->rtllib->bfsync_enable == 0) {
2173 switch (priv->rtllib->fsync_state) {
2174 case Default_Fsync:
2175 _rtl92e_dm_start_hw_fsync(dev);
2176 priv->rtllib->fsync_state = HW_Fsync;
2177 break;
2178 case SW_Fsync:
2179 _rtl92e_dm_end_sw_fsync(dev);
2180 _rtl92e_dm_start_hw_fsync(dev);
2181 priv->rtllib->fsync_state = HW_Fsync;
2182 break;
2183 case HW_Fsync:
2184 default:
2185 break;
2186 }
2187 } else {
2188 switch (priv->rtllib->fsync_state) {
2189 case Default_Fsync:
2190 _rtl92e_dm_start_sw_fsync(dev);
2191 priv->rtllib->fsync_state = SW_Fsync;
2192 break;
2193 case HW_Fsync:
2194 _rtl92e_dm_end_hw_fsync(dev);
2195 _rtl92e_dm_start_sw_fsync(dev);
2196 priv->rtllib->fsync_state = SW_Fsync;
2197 break;
2198 case SW_Fsync:
2199 default:
2200 break;
2201
2202 }
2203 }
2204 if (priv->framesyncMonitor) {
2205 if (reg_c38_State != RegC38_Fsync_AP_BCM) {
2206 rtl92e_writeb(dev, rOFDM0_RxDetector3, 0x95);
2207
2208 reg_c38_State = RegC38_Fsync_AP_BCM;
2209 }
2210 }
2211 } else {
2212 switch (priv->rtllib->fsync_state) {
2213 case HW_Fsync:
2214 _rtl92e_dm_end_hw_fsync(dev);
2215 priv->rtllib->fsync_state = Default_Fsync;
2216 break;
2217 case SW_Fsync:
2218 _rtl92e_dm_end_sw_fsync(dev);
2219 priv->rtllib->fsync_state = Default_Fsync;
2220 break;
2221 case Default_Fsync:
2222 default:
2223 break;
2224 }
2225
2226 if (priv->framesyncMonitor) {
2227 if (priv->rtllib->state == RTLLIB_LINKED) {
2228 if (priv->undecorated_smoothed_pwdb <=
2229 RegC38_TH) {
2230 if (reg_c38_State !=
2231 RegC38_NonFsync_Other_AP) {
2232 rtl92e_writeb(dev,
2233 rOFDM0_RxDetector3,
2234 0x90);
2235
2236 reg_c38_State =
2237 RegC38_NonFsync_Other_AP;
2238 }
2239 } else if (priv->undecorated_smoothed_pwdb >=
2240 (RegC38_TH+5)) {
2241 if (reg_c38_State) {
2242 rtl92e_writeb(dev,
2243 rOFDM0_RxDetector3,
2244 priv->framesync);
2245 reg_c38_State = RegC38_Default;
2246 }
2247 }
2248 } else {
2249 if (reg_c38_State) {
2250 rtl92e_writeb(dev, rOFDM0_RxDetector3,
2251 priv->framesync);
2252 reg_c38_State = RegC38_Default;
2253 }
2254 }
2255 }
2256 }
2257 if (priv->framesyncMonitor) {
2258 if (priv->reset_count != reset_cnt) {
2259 rtl92e_writeb(dev, rOFDM0_RxDetector3,
2260 priv->framesync);
2261 reg_c38_State = RegC38_Default;
2262 reset_cnt = priv->reset_count;
2263 }
2264 } else {
2265 if (reg_c38_State) {
2266 rtl92e_writeb(dev, rOFDM0_RxDetector3,
2267 priv->framesync);
2268 reg_c38_State = RegC38_Default;
2269 }
2270 }
2271 }
2272
2273 /*---------------------------Define function prototype------------------------*/
_rtl92e_dm_init_dynamic_tx_power(struct net_device * dev)2274 static void _rtl92e_dm_init_dynamic_tx_power(struct net_device *dev)
2275 {
2276 struct r8192_priv *priv = rtllib_priv(dev);
2277
2278 priv->rtllib->bdynamic_txpower_enable = true;
2279 priv->bLastDTPFlag_High = false;
2280 priv->bLastDTPFlag_Low = false;
2281 priv->bDynamicTxHighPower = false;
2282 priv->bDynamicTxLowPower = false;
2283 }
2284
_rtl92e_dm_dynamic_tx_power(struct net_device * dev)2285 static void _rtl92e_dm_dynamic_tx_power(struct net_device *dev)
2286 {
2287 struct r8192_priv *priv = rtllib_priv(dev);
2288 unsigned int txhipower_threshold = 0;
2289 unsigned int txlowpower_threshold = 0;
2290
2291 if (!priv->rtllib->bdynamic_txpower_enable) {
2292 priv->bDynamicTxHighPower = false;
2293 priv->bDynamicTxLowPower = false;
2294 return;
2295 }
2296 if ((priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) &&
2297 (priv->rtllib->mode == IEEE_G)) {
2298 txhipower_threshold = TX_POWER_ATHEROAP_THRESH_HIGH;
2299 txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
2300 } else {
2301 txhipower_threshold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
2302 txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
2303 }
2304
2305 if (priv->rtllib->state == RTLLIB_LINKED) {
2306 if (priv->undecorated_smoothed_pwdb >= txhipower_threshold) {
2307 priv->bDynamicTxHighPower = true;
2308 priv->bDynamicTxLowPower = false;
2309 } else {
2310 if (priv->undecorated_smoothed_pwdb <
2311 txlowpower_threshold && priv->bDynamicTxHighPower)
2312 priv->bDynamicTxHighPower = false;
2313 if (priv->undecorated_smoothed_pwdb < 35)
2314 priv->bDynamicTxLowPower = true;
2315 else if (priv->undecorated_smoothed_pwdb >= 40)
2316 priv->bDynamicTxLowPower = false;
2317 }
2318 } else {
2319 priv->bDynamicTxHighPower = false;
2320 priv->bDynamicTxLowPower = false;
2321 }
2322
2323 if ((priv->bDynamicTxHighPower != priv->bLastDTPFlag_High) ||
2324 (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low)) {
2325 rtl92e_set_tx_power(dev, priv->rtllib->current_network.channel);
2326 }
2327 priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
2328 priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
2329
2330 }
2331
_rtl92e_dm_check_txrateandretrycount(struct net_device * dev)2332 static void _rtl92e_dm_check_txrateandretrycount(struct net_device *dev)
2333 {
2334 struct r8192_priv *priv = rtllib_priv(dev);
2335 struct rtllib_device *ieee = priv->rtllib;
2336
2337 ieee->softmac_stats.CurrentShowTxate = rtl92e_readb(dev, CURRENT_TX_RATE_REG);
2338 ieee->softmac_stats.last_packet_rate = rtl92e_readb(dev, INITIAL_TX_RATE_REG);
2339 ieee->softmac_stats.txretrycount = rtl92e_readl(dev, TX_RETRY_COUNT_REG);
2340 }
2341
_rtl92e_dm_send_rssi_to_fw(struct net_device * dev)2342 static void _rtl92e_dm_send_rssi_to_fw(struct net_device *dev)
2343 {
2344 struct r8192_priv *priv = rtllib_priv(dev);
2345
2346 rtl92e_writeb(dev, DRIVER_RSSI, priv->undecorated_smoothed_pwdb);
2347 }
2348
