1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 #include "../wifi.h"
27 #include "../base.h"
28 #include "../core.h"
29 #include "reg.h"
30 #include "def.h"
31 #include "phy.h"
32 #include "dm.h"
33 #include "fw.h"
34
35 #define UNDEC_SM_PWDB entry_min_undec_sm_pwdb
36
37 static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
38 0x7f8001fe, /* 0, +6.0dB */
39 0x788001e2, /* 1, +5.5dB */
40 0x71c001c7, /* 2, +5.0dB */
41 0x6b8001ae, /* 3, +4.5dB */
42 0x65400195, /* 4, +4.0dB */
43 0x5fc0017f, /* 5, +3.5dB */
44 0x5a400169, /* 6, +3.0dB */
45 0x55400155, /* 7, +2.5dB */
46 0x50800142, /* 8, +2.0dB */
47 0x4c000130, /* 9, +1.5dB */
48 0x47c0011f, /* 10, +1.0dB */
49 0x43c0010f, /* 11, +0.5dB */
50 0x40000100, /* 12, +0dB */
51 0x3c8000f2, /* 13, -0.5dB */
52 0x390000e4, /* 14, -1.0dB */
53 0x35c000d7, /* 15, -1.5dB */
54 0x32c000cb, /* 16, -2.0dB */
55 0x300000c0, /* 17, -2.5dB */
56 0x2d4000b5, /* 18, -3.0dB */
57 0x2ac000ab, /* 19, -3.5dB */
58 0x288000a2, /* 20, -4.0dB */
59 0x26000098, /* 21, -4.5dB */
60 0x24000090, /* 22, -5.0dB */
61 0x22000088, /* 23, -5.5dB */
62 0x20000080, /* 24, -6.0dB */
63 0x1e400079, /* 25, -6.5dB */
64 0x1c800072, /* 26, -7.0dB */
65 0x1b00006c, /* 27. -7.5dB */
66 0x19800066, /* 28, -8.0dB */
67 0x18000060, /* 29, -8.5dB */
68 0x16c0005b, /* 30, -9.0dB */
69 0x15800056, /* 31, -9.5dB */
70 0x14400051, /* 32, -10.0dB */
71 0x1300004c, /* 33, -10.5dB */
72 0x12000048, /* 34, -11.0dB */
73 0x11000044, /* 35, -11.5dB */
74 0x10000040, /* 36, -12.0dB */
75 0x0f00003c, /* 37, -12.5dB */
76 0x0e400039, /* 38, -13.0dB */
77 0x0d800036, /* 39, -13.5dB */
78 0x0cc00033, /* 40, -14.0dB */
79 0x0c000030, /* 41, -14.5dB */
80 0x0b40002d, /* 42, -15.0dB */
81 };
82
83 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
84 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
85 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
86 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
87 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
88 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
89 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
90 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
91 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
92 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
93 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
94 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
95 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
96 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
97 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
98 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
99 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
100 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
101 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
102 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
103 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
104 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
105 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
106 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
107 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
108 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
109 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
110 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
111 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
112 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
113 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
114 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
115 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
116 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
117 };
118
119 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
120 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
121 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
122 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
123 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
124 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
125 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
126 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
127 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
128 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
129 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
130 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
131 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
132 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
133 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
134 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
135 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
136 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
137 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
138 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
139 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
140 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
141 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
142 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
143 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
144 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
145 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
146 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
147 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
148 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
149 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
150 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
151 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
152 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
153 };
154
rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw * hw)155 static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
156 {
157 u32 ret_value;
158 struct rtl_priv *rtlpriv = rtl_priv(hw);
159 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
160 unsigned long flag = 0;
161
162 /* hold ofdm counter */
163 rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
164 rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
165
166 ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, MASKDWORD);
167 falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
168 falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
169 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
170 falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
171 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
172 falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
173 falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
174 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
175 falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
176 falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
177 falsealm_cnt->cnt_rate_illegal +
178 falsealm_cnt->cnt_crc8_fail +
179 falsealm_cnt->cnt_mcs_fail +
180 falsealm_cnt->cnt_fast_fsync_fail +
181 falsealm_cnt->cnt_sb_search_fail;
182
183 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
184 /* hold cck counter */
185 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
186 ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
187 falsealm_cnt->cnt_cck_fail = ret_value;
188 ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
189 falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
190 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
191 } else {
192 falsealm_cnt->cnt_cck_fail = 0;
193 }
194
195 /* reset false alarm counter registers */
196 falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
197 falsealm_cnt->cnt_sb_search_fail +
198 falsealm_cnt->cnt_parity_fail +
199 falsealm_cnt->cnt_rate_illegal +
200 falsealm_cnt->cnt_crc8_fail +
201 falsealm_cnt->cnt_mcs_fail +
202 falsealm_cnt->cnt_cck_fail;
203
204 rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
205 /* update ofdm counter */
206 rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
207 /* update page C counter */
208 rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
209 /* update page D counter */
210 rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
211 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
212 /* reset cck counter */
213 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
214 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
215 /* enable cck counter */
216 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
217 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
218 }
219 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
220 "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n",
221 falsealm_cnt->cnt_fast_fsync_fail,
222 falsealm_cnt->cnt_sb_search_fail);
223 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
224 "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n",
225 falsealm_cnt->cnt_parity_fail,
226 falsealm_cnt->cnt_rate_illegal,
227 falsealm_cnt->cnt_crc8_fail,
228 falsealm_cnt->cnt_mcs_fail);
229 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
230 "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n",
231 falsealm_cnt->cnt_ofdm_fail,
232 falsealm_cnt->cnt_cck_fail,
233 falsealm_cnt->cnt_all);
234 }
235
rtl92d_dm_find_minimum_rssi(struct ieee80211_hw * hw)236 static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
237 {
238 struct rtl_priv *rtlpriv = rtl_priv(hw);
239 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
240 struct rtl_mac *mac = rtl_mac(rtlpriv);
241
242 /* Determine the minimum RSSI */
243 if ((mac->link_state < MAC80211_LINKED) &&
244 (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
245 de_digtable->min_undec_pwdb_for_dm = 0;
246 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
247 "Not connected to any\n");
248 }
249 if (mac->link_state >= MAC80211_LINKED) {
250 if (mac->opmode == NL80211_IFTYPE_AP ||
251 mac->opmode == NL80211_IFTYPE_ADHOC) {
252 de_digtable->min_undec_pwdb_for_dm =
253 rtlpriv->dm.UNDEC_SM_PWDB;
254 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
255 "AP Client PWDB = 0x%lx\n",
256 rtlpriv->dm.UNDEC_SM_PWDB);
257 } else {
258 de_digtable->min_undec_pwdb_for_dm =
259 rtlpriv->dm.undec_sm_pwdb;
260 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
261 "STA Default Port PWDB = 0x%x\n",
262 de_digtable->min_undec_pwdb_for_dm);
263 }
264 } else {
265 de_digtable->min_undec_pwdb_for_dm = rtlpriv->dm.UNDEC_SM_PWDB;
266 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
267 "AP Ext Port or disconnect PWDB = 0x%x\n",
268 de_digtable->min_undec_pwdb_for_dm);
269 }
270
271 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
272 de_digtable->min_undec_pwdb_for_dm);
273 }
274
rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw * hw)275 static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
276 {
277 struct rtl_priv *rtlpriv = rtl_priv(hw);
278 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
279 unsigned long flag = 0;
280
281 if (de_digtable->cursta_cstate == DIG_STA_CONNECT) {
282 if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
283 if (de_digtable->min_undec_pwdb_for_dm <= 25)
284 de_digtable->cur_cck_pd_state =
285 CCK_PD_STAGE_LOWRSSI;
286 else
287 de_digtable->cur_cck_pd_state =
288 CCK_PD_STAGE_HIGHRSSI;
289 } else {
290 if (de_digtable->min_undec_pwdb_for_dm <= 20)
291 de_digtable->cur_cck_pd_state =
292 CCK_PD_STAGE_LOWRSSI;
293 else
294 de_digtable->cur_cck_pd_state =
295 CCK_PD_STAGE_HIGHRSSI;
296 }
297 } else {
298 de_digtable->cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
299 }
300 if (de_digtable->pre_cck_pd_state != de_digtable->cur_cck_pd_state) {
301 if (de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
302 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
303 rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0x83);
304 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
305 } else {
306 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
307 rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
308 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
309 }
310 de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state;
311 }
312 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",
313 de_digtable->cursta_cstate == DIG_STA_CONNECT ?
314 "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");
315 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",
316 de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
317 "Low RSSI " : "High RSSI ");
318 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",
319 IS_92D_SINGLEPHY(rtlpriv->rtlhal.version));
320
321 }
322
rtl92d_dm_write_dig(struct ieee80211_hw * hw)323 void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
324 {
325 struct rtl_priv *rtlpriv = rtl_priv(hw);
326 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
327
328 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
329 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n",
330 de_digtable->cur_igvalue, de_digtable->pre_igvalue,
331 de_digtable->back_val);
332 if (de_digtable->dig_enable_flag == false) {
333 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");
334 de_digtable->pre_igvalue = 0x17;
335 return;
336 }
337 if (de_digtable->pre_igvalue != de_digtable->cur_igvalue) {
338 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
339 de_digtable->cur_igvalue);
340 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
341 de_digtable->cur_igvalue);
342 de_digtable->pre_igvalue = de_digtable->cur_igvalue;
343 }
344 }
345
rtl92d_early_mode_enabled(struct rtl_priv * rtlpriv)346 static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
347 {
348 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
349
350 if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
351 (rtlpriv->mac80211.vendor == PEER_CISCO)) {
352 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");
353 if (de_digtable->last_min_undec_pwdb_for_dm >= 50
354 && de_digtable->min_undec_pwdb_for_dm < 50) {
355 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
356 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
357 "Early Mode Off\n");
358 } else if (de_digtable->last_min_undec_pwdb_for_dm <= 55 &&
359 de_digtable->min_undec_pwdb_for_dm > 55) {
360 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
361 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
362 "Early Mode On\n");
363 }
364 } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
365 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
366 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n");
367 }
368 }
369
rtl92d_dm_dig(struct ieee80211_hw * hw)370 static void rtl92d_dm_dig(struct ieee80211_hw *hw)
371 {
372 struct rtl_priv *rtlpriv = rtl_priv(hw);
373 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
374 u8 value_igi = de_digtable->cur_igvalue;
375 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
376
377 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n");
378 if (rtlpriv->rtlhal.earlymode_enable) {
379 rtl92d_early_mode_enabled(rtlpriv);
380 de_digtable->last_min_undec_pwdb_for_dm =
381 de_digtable->min_undec_pwdb_for_dm;
382 }
383 if (!rtlpriv->dm.dm_initialgain_enable)
384 return;
385
386 /* because we will send data pkt when scanning
387 * this will cause some ap like gear-3700 wep TP
388 * lower if we return here, this is the diff of
389 * mac80211 driver vs ieee80211 driver */
390 /* if (rtlpriv->mac80211.act_scanning)
391 * return; */
392
393 /* Not STA mode return tmp */
394 if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
395 return;
396 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");
397 /* Decide the current status and if modify initial gain or not */
398 if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
399 de_digtable->cursta_cstate = DIG_STA_CONNECT;
400 else
401 de_digtable->cursta_cstate = DIG_STA_DISCONNECT;
402
403 /* adjust initial gain according to false alarm counter */
404 if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
405 value_igi--;
406 else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
407 value_igi += 0;
408 else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
409 value_igi++;
410 else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
411 value_igi += 2;
412 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
413 "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
414 de_digtable->large_fa_hit, de_digtable->forbidden_igi);
415 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
416 "dm_DIG() Before: Recover_cnt=%d, rx_gain_min=%x\n",
417 de_digtable->recover_cnt, de_digtable->rx_gain_min);
418
419 /* deal with abnormally large false alarm */
420 if (falsealm_cnt->cnt_all > 10000) {
421 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
422 "dm_DIG(): Abnormally false alarm case\n");
423
424 de_digtable->large_fa_hit++;
425 if (de_digtable->forbidden_igi < de_digtable->cur_igvalue) {
426 de_digtable->forbidden_igi = de_digtable->cur_igvalue;
427 de_digtable->large_fa_hit = 1;
428 }
429 if (de_digtable->large_fa_hit >= 3) {
430 if ((de_digtable->forbidden_igi + 1) > DM_DIG_MAX)
431 de_digtable->rx_gain_min = DM_DIG_MAX;
432 else
433 de_digtable->rx_gain_min =
434 (de_digtable->forbidden_igi + 1);
435 de_digtable->recover_cnt = 3600; /* 3600=2hr */
436 }
437 } else {
438 /* Recovery mechanism for IGI lower bound */
439 if (de_digtable->recover_cnt != 0) {
440 de_digtable->recover_cnt--;
441 } else {
442 if (de_digtable->large_fa_hit == 0) {
443 if ((de_digtable->forbidden_igi - 1) <
444 DM_DIG_FA_LOWER) {
445 de_digtable->forbidden_igi =
446 DM_DIG_FA_LOWER;
447 de_digtable->rx_gain_min =
448 DM_DIG_FA_LOWER;
449
450 } else {
451 de_digtable->forbidden_igi--;
452 de_digtable->rx_gain_min =
453 (de_digtable->forbidden_igi + 1);
454 }
455 } else if (de_digtable->large_fa_hit == 3) {
456 de_digtable->large_fa_hit = 0;
457 }
458 }
459 }
460 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
461 "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
462 de_digtable->large_fa_hit, de_digtable->forbidden_igi);
463 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
464 "dm_DIG() After: recover_cnt=%d, rx_gain_min=%x\n",
465 de_digtable->recover_cnt, de_digtable->rx_gain_min);
466
467 if (value_igi > DM_DIG_MAX)
468 value_igi = DM_DIG_MAX;
469 else if (value_igi < de_digtable->rx_gain_min)
470 value_igi = de_digtable->rx_gain_min;
471 de_digtable->cur_igvalue = value_igi;
472 rtl92d_dm_write_dig(hw);
473 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
474 rtl92d_dm_cck_packet_detection_thresh(hw);
475 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n");
476 }
477
rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw * hw)478 static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
479 {
480 struct rtl_priv *rtlpriv = rtl_priv(hw);
481
482 rtlpriv->dm.dynamic_txpower_enable = true;
483 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
484 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
485 }
486
rtl92d_dm_dynamic_txpower(struct ieee80211_hw * hw)487 static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
488 {
489 struct rtl_priv *rtlpriv = rtl_priv(hw);
490 struct rtl_phy *rtlphy = &(rtlpriv->phy);
491 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
492 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
493 long undec_sm_pwdb;
494
495 if ((!rtlpriv->dm.dynamic_txpower_enable)
496 || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
497 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
498 return;
499 }
500 if ((mac->link_state < MAC80211_LINKED) &&
501 (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
502 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
503 "Not connected to any\n");
504 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
505 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
506 return;
507 }
508 if (mac->link_state >= MAC80211_LINKED) {
509 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
510 undec_sm_pwdb =
511 rtlpriv->dm.UNDEC_SM_PWDB;
512 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
513 "IBSS Client PWDB = 0x%lx\n",
514 undec_sm_pwdb);
515 } else {
516 undec_sm_pwdb =
517 rtlpriv->dm.undec_sm_pwdb;
518 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
519 "STA Default Port PWDB = 0x%lx\n",
520 undec_sm_pwdb);
521 }
522 } else {
523 undec_sm_pwdb =
524 rtlpriv->dm.UNDEC_SM_PWDB;
525
526 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
527 "AP Ext Port PWDB = 0x%lx\n",
528 undec_sm_pwdb);
529 }
530 if (rtlhal->current_bandtype == BAND_ON_5G) {
531 if (undec_sm_pwdb >= 0x33) {
532 rtlpriv->dm.dynamic_txhighpower_lvl =
533 TXHIGHPWRLEVEL_LEVEL2;
534 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
535 "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
536 } else if ((undec_sm_pwdb < 0x33)
537 && (undec_sm_pwdb >= 0x2b)) {
538 rtlpriv->dm.dynamic_txhighpower_lvl =
539 TXHIGHPWRLEVEL_LEVEL1;
540 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
541 "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
542 } else if (undec_sm_pwdb < 0x2b) {
543 rtlpriv->dm.dynamic_txhighpower_lvl =
544 TXHIGHPWRLEVEL_NORMAL;
545 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
546 "5G:TxHighPwrLevel_Normal\n");
547 }
548 } else {
549 if (undec_sm_pwdb >=
550 TX_POWER_NEAR_FIELD_THRESH_LVL2) {
551 rtlpriv->dm.dynamic_txhighpower_lvl =
552 TXHIGHPWRLEVEL_LEVEL2;
553 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
554 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
555 } else
556 if ((undec_sm_pwdb <
557 (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
558 && (undec_sm_pwdb >=
559 TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
560
561 rtlpriv->dm.dynamic_txhighpower_lvl =
562 TXHIGHPWRLEVEL_LEVEL1;
563 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
564 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
565 } else if (undec_sm_pwdb <
566 (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
567 rtlpriv->dm.dynamic_txhighpower_lvl =
568 TXHIGHPWRLEVEL_NORMAL;
569 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
570 "TXHIGHPWRLEVEL_NORMAL\n");
571 }
572 }
573 if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
574 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
575 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
576 rtlphy->current_channel);
577 rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
578 }
579 rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
580 }
581
rtl92d_dm_pwdb_monitor(struct ieee80211_hw * hw)582 static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
583 {
584 struct rtl_priv *rtlpriv = rtl_priv(hw);
585
586 /* AP & ADHOC & MESH will return tmp */
587 if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
588 return;
589 /* Indicate Rx signal strength to FW. */
590 if (rtlpriv->dm.useramask) {
591 u32 temp = rtlpriv->dm.undec_sm_pwdb;
592
593 temp <<= 16;
594 temp |= 0x100;
595 /* fw v12 cmdid 5:use max macid ,for nic ,
596 * default macid is 0 ,max macid is 1 */
597 rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
598 } else {
599 rtl_write_byte(rtlpriv, 0x4fe,
600 (u8) rtlpriv->dm.undec_sm_pwdb);
601 }
602 }
603
rtl92d_dm_init_edca_turbo(struct ieee80211_hw * hw)604 void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
605 {
606 struct rtl_priv *rtlpriv = rtl_priv(hw);
607
608 rtlpriv->dm.current_turbo_edca = false;
609 rtlpriv->dm.is_any_nonbepkts = false;
610 rtlpriv->dm.is_cur_rdlstate = false;
611 }
612
rtl92d_dm_check_edca_turbo(struct ieee80211_hw * hw)613 static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
614 {
615 struct rtl_priv *rtlpriv = rtl_priv(hw);
616 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
617 static u64 last_txok_cnt;
618 static u64 last_rxok_cnt;
619 u64 cur_txok_cnt;
620 u64 cur_rxok_cnt;
621 u32 edca_be_ul = 0x5ea42b;
622 u32 edca_be_dl = 0x5ea42b;
623
624 if (mac->link_state != MAC80211_LINKED) {
625 rtlpriv->dm.current_turbo_edca = false;
626 goto exit;
627 }
628
629 /* Enable BEQ TxOP limit configuration in wireless G-mode. */
630 /* To check whether we shall force turn on TXOP configuration. */
631 if ((!rtlpriv->dm.disable_framebursting) &&
632 (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
633 rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
634 rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
635 /* Force TxOP limit to 0x005e for UL. */
636 if (!(edca_be_ul & 0xffff0000))
637 edca_be_ul |= 0x005e0000;
638 /* Force TxOP limit to 0x005e for DL. */
639 if (!(edca_be_dl & 0xffff0000))
640 edca_be_dl |= 0x005e0000;
641 }
642
643 if ((!rtlpriv->dm.is_any_nonbepkts) &&
644 (!rtlpriv->dm.disable_framebursting)) {
645 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
646 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
647 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
648 if (!rtlpriv->dm.is_cur_rdlstate ||
649 !rtlpriv->dm.current_turbo_edca) {
650 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
651 edca_be_dl);
652 rtlpriv->dm.is_cur_rdlstate = true;
653 }
654 } else {
655 if (rtlpriv->dm.is_cur_rdlstate ||
656 !rtlpriv->dm.current_turbo_edca) {
657 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
658 edca_be_ul);
659 rtlpriv->dm.is_cur_rdlstate = false;
660 }
661 }
662 rtlpriv->dm.current_turbo_edca = true;
663 } else {
664 if (rtlpriv->dm.current_turbo_edca) {
665 u8 tmp = AC0_BE;
666 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
667 &tmp);
668 rtlpriv->dm.current_turbo_edca = false;
669 }
670 }
671
672 exit:
673 rtlpriv->dm.is_any_nonbepkts = false;
674 last_txok_cnt = rtlpriv->stats.txbytesunicast;
675 last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
676 }
677
rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw * hw)678 static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
679 {
680 struct rtl_priv *rtlpriv = rtl_priv(hw);
681 u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
682 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
683 0x0a, 0x09, 0x08, 0x07, 0x06,
684 0x05, 0x04, 0x04, 0x03, 0x02
685 };
686 int i;
687 u32 u4tmp;
688
689 u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
690 rtlpriv->dm.thermalvalue_rxgain)]) << 12;
691 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
692 "===> Rx Gain %x\n", u4tmp);
693 for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
694 rtl_set_rfreg(hw, i, 0x3C, RFREG_OFFSET_MASK,
695 (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
696 }
697
rtl92d_bandtype_2_4G(struct ieee80211_hw * hw,long * temp_cckg,u8 * cck_index_old)698 static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
699 u8 *cck_index_old)
700 {
701 struct rtl_priv *rtlpriv = rtl_priv(hw);
702 int i;
703 unsigned long flag = 0;
704 long temp_cck;
705
706 /* Query CCK default setting From 0xa24 */
707 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
708 temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
709 MASKDWORD) & MASKCCK;
710 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
711 for (i = 0; i < CCK_TABLE_LENGTH; i++) {
712 if (rtlpriv->dm.cck_inch14) {
713 if (!memcmp((void *)&temp_cck,
714 (void *)&cckswing_table_ch14[i][2], 4)) {
715 *cck_index_old = (u8) i;
716 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
717 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
718 RCCK0_TXFILTER2, temp_cck,
719 *cck_index_old,
720 rtlpriv->dm.cck_inch14);
721 break;
722 }
723 } else {
724 if (!memcmp((void *) &temp_cck,
725 &cckswing_table_ch1ch13[i][2], 4)) {
726 *cck_index_old = (u8) i;
727 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
728 "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
729 RCCK0_TXFILTER2, temp_cck,
730 *cck_index_old,
731 rtlpriv->dm.cck_inch14);
732 break;
733 }
734 }
735 }
736 *temp_cckg = temp_cck;
737 }
738
rtl92d_bandtype_5G(struct rtl_hal * rtlhal,u8 * ofdm_index,bool * internal_pa,u8 thermalvalue,u8 delta,u8 rf,struct rtl_efuse * rtlefuse,struct rtl_priv * rtlpriv,struct rtl_phy * rtlphy,u8 index_mapping[5][INDEX_MAPPING_NUM],u8 index_mapping_pa[8][INDEX_MAPPING_NUM])739 static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
740 bool *internal_pa, u8 thermalvalue, u8 delta,
741 u8 rf, struct rtl_efuse *rtlefuse,
742 struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
743 u8 index_mapping[5][INDEX_MAPPING_NUM],
744 u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
745 {
746 int i;
747 u8 index;
748 u8 offset = 0;
749
750 for (i = 0; i < rf; i++) {
751 if (rtlhal->macphymode == DUALMAC_DUALPHY &&
752 rtlhal->interfaceindex == 1) /* MAC 1 5G */
753 *internal_pa = rtlefuse->internal_pa_5g[1];
754 else
755 *internal_pa = rtlefuse->internal_pa_5g[i];
756 if (*internal_pa) {
757 if (rtlhal->interfaceindex == 1 || i == rf)
758 offset = 4;
759 else
760 offset = 0;
761 if (rtlphy->current_channel >= 100 &&
762 rtlphy->current_channel <= 165)
763 offset += 2;
764 } else {
765 if (rtlhal->interfaceindex == 1 || i == rf)
766 offset = 2;
767 else
768 offset = 0;
769 }
770 if (thermalvalue > rtlefuse->eeprom_thermalmeter)
771 offset++;
772 if (*internal_pa) {
773 if (delta > INDEX_MAPPING_NUM - 1)
774 index = index_mapping_pa[offset]
775 [INDEX_MAPPING_NUM - 1];
776 else
777 index =
778 index_mapping_pa[offset][delta];
779 } else {
780 if (delta > INDEX_MAPPING_NUM - 1)
781 index =
782 index_mapping[offset][INDEX_MAPPING_NUM - 1];
783 else
784 index = index_mapping[offset][delta];
785 }
786 if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
787 if (*internal_pa && thermalvalue > 0x12) {
788 ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
789 ((delta / 2) * 3 + (delta % 2));
790 } else {
791 ofdm_index[i] -= index;
792 }
793 } else {
794 ofdm_index[i] += index;
795 }
796 }
797 }
798
rtl92d_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw * hw)799 static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
800 struct ieee80211_hw *hw)
801 {
802 struct rtl_priv *rtlpriv = rtl_priv(hw);
803 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
804 struct rtl_phy *rtlphy = &(rtlpriv->phy);
805 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
806 u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
807 u8 offset, thermalvalue_avg_count = 0;
808 u32 thermalvalue_avg = 0;
809 bool internal_pa = false;
810 long ele_a = 0, ele_d, temp_cck, val_x, value32;
811 long val_y, ele_c = 0;
812 u8 ofdm_index[3];
813 s8 cck_index = 0;
814 u8 ofdm_index_old[3] = {0, 0, 0};
815 s8 cck_index_old = 0;
816 u8 index;
817 int i;
818 bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
819 u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
820 u8 indexforchannel =
821 rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
822 u8 index_mapping[5][INDEX_MAPPING_NUM] = {
823 /* 5G, path A/MAC 0, decrease power */
824 {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
825 /* 5G, path A/MAC 0, increase power */
826 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
827 /* 5G, path B/MAC 1, decrease power */
828 {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
829 /* 5G, path B/MAC 1, increase power */
830 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
831 /* 2.4G, for decreas power */
832 {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
833 };
834 u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
835 /* 5G, path A/MAC 0, ch36-64, decrease power */
836 {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
837 /* 5G, path A/MAC 0, ch36-64, increase power */
838 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
839 /* 5G, path A/MAC 0, ch100-165, decrease power */
840 {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
841 /* 5G, path A/MAC 0, ch100-165, increase power */
842 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
843 /* 5G, path B/MAC 1, ch36-64, decrease power */
844 {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
845 /* 5G, path B/MAC 1, ch36-64, increase power */
846 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
847 /* 5G, path B/MAC 1, ch100-165, decrease power */
848 {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
849 /* 5G, path B/MAC 1, ch100-165, increase power */
850 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
851 };
852
853 rtlpriv->dm.txpower_trackinginit = true;
854 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
855 thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
856 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
857 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
858 thermalvalue,
859 rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
860 rtl92d_phy_ap_calibrate(hw, (thermalvalue -
861 rtlefuse->eeprom_thermalmeter));
862 if (is2t)
863 rf = 2;
864 else
865 rf = 1;
866 if (thermalvalue) {
867 ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
868 MASKDWORD) & MASKOFDM_D;
869 for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
870 if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
871 ofdm_index_old[0] = (u8) i;
872
873 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
874 "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
875 ROFDM0_XATxIQIMBALANCE,
876 ele_d, ofdm_index_old[0]);
877 break;
878 }
879 }
880 if (is2t) {
881 ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
882 MASKDWORD) & MASKOFDM_D;
883 for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
884 if (ele_d ==
885 (ofdmswing_table[i] & MASKOFDM_D)) {
886 ofdm_index_old[1] = (u8) i;
887 RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
888 DBG_LOUD,
889 "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
890 ROFDM0_XBTxIQIMBALANCE, ele_d,
891 ofdm_index_old[1]);
892 break;
893 }
894 }
895 }
896 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
897 rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
898 } else {
899 temp_cck = 0x090e1317;
900 cck_index_old = 12;
901 }
902
903 if (!rtlpriv->dm.thermalvalue) {
904 rtlpriv->dm.thermalvalue =
905 rtlefuse->eeprom_thermalmeter;
906 rtlpriv->dm.thermalvalue_lck = thermalvalue;
907 rtlpriv->dm.thermalvalue_iqk = thermalvalue;
908 rtlpriv->dm.thermalvalue_rxgain =
909 rtlefuse->eeprom_thermalmeter;
910 for (i = 0; i < rf; i++)
911 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
912 rtlpriv->dm.cck_index = cck_index_old;
913 }
914 if (rtlhal->reloadtxpowerindex) {
915 for (i = 0; i < rf; i++)
916 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
917 rtlpriv->dm.cck_index = cck_index_old;
918 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
919 "reload ofdm index for band switch\n");
920 }
921 rtlpriv->dm.thermalvalue_avg
922 [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
923 rtlpriv->dm.thermalvalue_avg_index++;
924 if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
925 rtlpriv->dm.thermalvalue_avg_index = 0;
926 for (i = 0; i < AVG_THERMAL_NUM; i++) {
927 if (rtlpriv->dm.thermalvalue_avg[i]) {
928 thermalvalue_avg +=
929 rtlpriv->dm.thermalvalue_avg[i];
930 thermalvalue_avg_count++;
931 }
932 }
933 if (thermalvalue_avg_count)
934 thermalvalue = (u8) (thermalvalue_avg /
935 thermalvalue_avg_count);
936 if (rtlhal->reloadtxpowerindex) {
937 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
938 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
939 (rtlefuse->eeprom_thermalmeter - thermalvalue);
940 rtlhal->reloadtxpowerindex = false;
941 rtlpriv->dm.done_txpower = false;
942 } else if (rtlpriv->dm.done_txpower) {
943 delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
944 (thermalvalue - rtlpriv->dm.thermalvalue) :
945 (rtlpriv->dm.thermalvalue - thermalvalue);
946 } else {
947 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
948 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
949 (rtlefuse->eeprom_thermalmeter - thermalvalue);
950 }
951 delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
952 (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
953 (rtlpriv->dm.thermalvalue_lck - thermalvalue);
954 delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
955 (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
956 (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
957 delta_rxgain =
958 (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
959 (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
960 (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
961 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
962 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
963 thermalvalue, rtlpriv->dm.thermalvalue,
964 rtlefuse->eeprom_thermalmeter, delta, delta_lck,
965 delta_iqk);
966 if ((delta_lck > rtlefuse->delta_lck) &&
967 (rtlefuse->delta_lck != 0)) {
968 rtlpriv->dm.thermalvalue_lck = thermalvalue;
969 rtl92d_phy_lc_calibrate(hw);
970 }
971 if (delta > 0 && rtlpriv->dm.txpower_track_control) {
972 rtlpriv->dm.done_txpower = true;
973 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
974 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
975 (rtlefuse->eeprom_thermalmeter - thermalvalue);
976 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
977 offset = 4;
978 if (delta > INDEX_MAPPING_NUM - 1)
979 index = index_mapping[offset]
980 [INDEX_MAPPING_NUM - 1];
981 else
982 index = index_mapping[offset][delta];
983 if (thermalvalue > rtlpriv->dm.thermalvalue) {
984 for (i = 0; i < rf; i++)
985 ofdm_index[i] -= delta;
986 cck_index -= delta;
987 } else {
988 for (i = 0; i < rf; i++)
989 ofdm_index[i] += index;
990 cck_index += index;
991 }
992 } else if (rtlhal->current_bandtype == BAND_ON_5G) {
993 rtl92d_bandtype_5G(rtlhal, ofdm_index,
994 &internal_pa, thermalvalue,
995 delta, rf, rtlefuse, rtlpriv,
996 rtlphy, index_mapping,
997 index_mapping_internal_pa);
998 }
999 if (is2t) {
1000 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1001 "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
1002 rtlpriv->dm.ofdm_index[0],
1003 rtlpriv->dm.ofdm_index[1],
1004 rtlpriv->dm.cck_index);
1005 } else {
1006 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1007 "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
1008 rtlpriv->dm.ofdm_index[0],
1009 rtlpriv->dm.cck_index);
1010 }
1011 for (i = 0; i < rf; i++) {
1012 if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
1013 ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
1014 else if (ofdm_index[i] < ofdm_min_index)
1015 ofdm_index[i] = ofdm_min_index;
1016 }
1017 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1018 if (cck_index > CCK_TABLE_SIZE - 1) {
1019 cck_index = CCK_TABLE_SIZE - 1;
1020 } else if (internal_pa ||
1021 rtlhal->current_bandtype ==
1022 BAND_ON_2_4G) {
1023 if (ofdm_index[i] <
1024 ofdm_min_index_internal_pa)
1025 ofdm_index[i] =
1026 ofdm_min_index_internal_pa;
1027 } else if (cck_index < 0) {
1028 cck_index = 0;
1029 }
1030 }
1031 if (is2t) {
1032 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1033 "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
1034 ofdm_index[0], ofdm_index[1],
1035 cck_index);
1036 } else {
1037 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1038 "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
1039 ofdm_index[0], cck_index);
1040 }
1041 ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
1042 0xFFC00000) >> 22;
1043 val_x = rtlphy->iqk_matrix
1044 [indexforchannel].value[0][0];
1045 val_y = rtlphy->iqk_matrix
1046 [indexforchannel].value[0][1];
1047 if (val_x != 0) {
1048 if ((val_x & 0x00000200) != 0)
1049 val_x = val_x | 0xFFFFFC00;
1050 ele_a =
1051 ((val_x * ele_d) >> 8) & 0x000003FF;
1052
1053 /* new element C = element D x Y */
1054 if ((val_y & 0x00000200) != 0)
1055 val_y = val_y | 0xFFFFFC00;
1056 ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
1057
1058 /* wirte new elements A, C, D to regC80 and
1059 * regC94, element B is always 0 */
1060 value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
1061 16) | ele_a;
1062 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1063 MASKDWORD, value32);
1064
1065 value32 = (ele_c & 0x000003C0) >> 6;
1066 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, MASKH4BITS,
1067 value32);
1068
1069 value32 = ((val_x * ele_d) >> 7) & 0x01;
1070 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
1071 value32);
1072
1073 } else {
1074 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1075 MASKDWORD,
1076 ofdmswing_table
1077 [(u8)ofdm_index[0]]);
1078 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, MASKH4BITS,
1079 0x00);
1080 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1081 BIT(24), 0x00);
1082 }
1083
1084 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1085 "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n",
1086 rtlhal->interfaceindex,
1087 val_x, val_y, ele_a, ele_c, ele_d,
1088 val_x, val_y);
1089
1090 if (cck_index >= CCK_TABLE_SIZE)
1091 cck_index = CCK_TABLE_SIZE - 1;
1092 if (cck_index < 0)
1093 cck_index = 0;
1094 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1095 /* Adjust CCK according to IQK result */
1096 if (!rtlpriv->dm.cck_inch14) {
1097 rtl_write_byte(rtlpriv, 0xa22,
1098 cckswing_table_ch1ch13
1099 [(u8)cck_index][0]);
1100 rtl_write_byte(rtlpriv, 0xa23,
1101 cckswing_table_ch1ch13
1102 [(u8)cck_index][1]);
1103 rtl_write_byte(rtlpriv, 0xa24,
1104 cckswing_table_ch1ch13
1105 [(u8)cck_index][2]);
1106 rtl_write_byte(rtlpriv, 0xa25,
1107 cckswing_table_ch1ch13
1108 [(u8)cck_index][3]);
1109 rtl_write_byte(rtlpriv, 0xa26,
1110 cckswing_table_ch1ch13
1111 [(u8)cck_index][4]);
1112 rtl_write_byte(rtlpriv, 0xa27,
1113 cckswing_table_ch1ch13
1114 [(u8)cck_index][5]);
1115 rtl_write_byte(rtlpriv, 0xa28,
1116 cckswing_table_ch1ch13
1117 [(u8)cck_index][6]);
1118 rtl_write_byte(rtlpriv, 0xa29,
1119 cckswing_table_ch1ch13
1120 [(u8)cck_index][7]);
1121 } else {
1122 rtl_write_byte(rtlpriv, 0xa22,
1123 cckswing_table_ch14
1124 [(u8)cck_index][0]);
1125 rtl_write_byte(rtlpriv, 0xa23,
1126 cckswing_table_ch14
1127 [(u8)cck_index][1]);
1128 rtl_write_byte(rtlpriv, 0xa24,
1129 cckswing_table_ch14
1130 [(u8)cck_index][2]);
1131 rtl_write_byte(rtlpriv, 0xa25,
1132 cckswing_table_ch14
1133 [(u8)cck_index][3]);
1134 rtl_write_byte(rtlpriv, 0xa26,
1135 cckswing_table_ch14
1136 [(u8)cck_index][4]);
1137 rtl_write_byte(rtlpriv, 0xa27,
1138 cckswing_table_ch14
1139 [(u8)cck_index][5]);
1140 rtl_write_byte(rtlpriv, 0xa28,
1141 cckswing_table_ch14
1142 [(u8)cck_index][6]);
1143 rtl_write_byte(rtlpriv, 0xa29,
1144 cckswing_table_ch14
1145 [(u8)cck_index][7]);
1146 }
1147 }
1148 if (is2t) {
1149 ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
1150 0xFFC00000) >> 22;
1151 val_x = rtlphy->iqk_matrix
1152 [indexforchannel].value[0][4];
1153 val_y = rtlphy->iqk_matrix
1154 [indexforchannel].value[0][5];
1155 if (val_x != 0) {
1156 if ((val_x & 0x00000200) != 0)
1157 /* consider minus */
1158 val_x = val_x | 0xFFFFFC00;
1159 ele_a = ((val_x * ele_d) >> 8) &
1160 0x000003FF;
1161 /* new element C = element D x Y */
1162 if ((val_y & 0x00000200) != 0)
1163 val_y =
1164 val_y | 0xFFFFFC00;
1165 ele_c =
1166 ((val_y *
1167 ele_d) >> 8) & 0x00003FF;
1168 /* write new elements A, C, D to regC88
1169 * and regC9C, element B is always 0
1170 */
1171 value32 = (ele_d << 22) |
1172 ((ele_c & 0x3F) << 16) |
1173 ele_a;
1174 rtl_set_bbreg(hw,
1175 ROFDM0_XBTxIQIMBALANCE,
1176 MASKDWORD, value32);
1177 value32 = (ele_c & 0x000003C0) >> 6;
1178 rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1179 MASKH4BITS, value32);
1180 value32 = ((val_x * ele_d) >> 7) & 0x01;
1181 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1182 BIT(28), value32);
1183 } else {
1184 rtl_set_bbreg(hw,
1185 ROFDM0_XBTxIQIMBALANCE,
1186 MASKDWORD,
1187 ofdmswing_table
1188 [(u8) ofdm_index[1]]);
1189 rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1190 MASKH4BITS, 0x00);
1191 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1192 BIT(28), 0x00);
1193 }
1194 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1195 "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n",
1196 val_x, val_y, ele_a, ele_c,
1197 ele_d, val_x, val_y);
1198 }
1199 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1200 "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n",
1201 rtl_get_bbreg(hw, 0xc80, MASKDWORD),
1202 rtl_get_bbreg(hw, 0xc94, MASKDWORD),
1203 rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
1204 RFREG_OFFSET_MASK));
1205 }
1206 if ((delta_iqk > rtlefuse->delta_iqk) &&
1207 (rtlefuse->delta_iqk != 0)) {
1208 rtl92d_phy_reset_iqk_result(hw);
1209 rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1210 rtl92d_phy_iq_calibrate(hw);
1211 }
1212 if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
1213 && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
1214 rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
1215 rtl92d_dm_rxgain_tracking_thermalmeter(hw);
1216 }
1217 if (rtlpriv->dm.txpower_track_control)
1218 rtlpriv->dm.thermalvalue = thermalvalue;
1219 }
1220
1221 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
1222 }
1223
rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw * hw)1224 static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1225 {
1226 struct rtl_priv *rtlpriv = rtl_priv(hw);
1227
1228 rtlpriv->dm.txpower_tracking = true;
1229 rtlpriv->dm.txpower_trackinginit = false;
1230 rtlpriv->dm.txpower_track_control = true;
1231 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1232 "pMgntInfo->txpower_tracking = %d\n",
1233 rtlpriv->dm.txpower_tracking);
1234 }
1235
rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw * hw)1236 void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
1237 {
1238 struct rtl_priv *rtlpriv = rtl_priv(hw);
1239
1240 if (!rtlpriv->dm.txpower_tracking)
1241 return;
1242
1243 if (!rtlpriv->dm.tm_trigger) {
1244 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
1245 BIT(16), 0x03);
1246 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1247 "Trigger 92S Thermal Meter!!\n");
1248 rtlpriv->dm.tm_trigger = 1;
1249 return;
1250 } else {
1251 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1252 "Schedule TxPowerTracking direct call!!\n");
1253 rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
1254 rtlpriv->dm.tm_trigger = 0;
1255 }
1256 }
1257
rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw * hw)1258 void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1259 {
1260 struct rtl_priv *rtlpriv = rtl_priv(hw);
1261 struct rate_adaptive *ra = &(rtlpriv->ra);
1262
1263 ra->ratr_state = DM_RATR_STA_INIT;
1264 ra->pre_ratr_state = DM_RATR_STA_INIT;
1265 if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1266 rtlpriv->dm.useramask = true;
1267 else
1268 rtlpriv->dm.useramask = false;
1269 }
1270
rtl92d_dm_init(struct ieee80211_hw * hw)1271 void rtl92d_dm_init(struct ieee80211_hw *hw)
1272 {
1273 struct rtl_priv *rtlpriv = rtl_priv(hw);
1274
1275 rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1276 rtl_dm_diginit(hw, 0x20);
1277 rtlpriv->dm_digtable.rx_gain_max = DM_DIG_FA_UPPER;
1278 rtlpriv->dm_digtable.rx_gain_min = DM_DIG_FA_LOWER;
1279 rtl92d_dm_init_dynamic_txpower(hw);
1280 rtl92d_dm_init_edca_turbo(hw);
1281 rtl92d_dm_init_rate_adaptive_mask(hw);
1282 rtl92d_dm_initialize_txpower_tracking(hw);
1283 }
1284
rtl92d_dm_watchdog(struct ieee80211_hw * hw)1285 void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
1286 {
1287 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1288 bool fw_current_inpsmode = false;
1289 bool fwps_awake = true;
1290
1291 /* 1. RF is OFF. (No need to do DM.)
1292 * 2. Fw is under power saving mode for FwLPS.
1293 * (Prevent from SW/FW I/O racing.)
1294 * 3. IPS workitem is scheduled. (Prevent from IPS sequence
1295 * to be swapped with DM.
1296 * 4. RFChangeInProgress is TRUE.
1297 * (Prevent from broken by IPS/HW/SW Rf off.) */
1298
1299 if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
1300 fwps_awake) && (!ppsc->rfchange_inprogress)) {
1301 rtl92d_dm_pwdb_monitor(hw);
1302 rtl92d_dm_false_alarm_counter_statistics(hw);
1303 rtl92d_dm_find_minimum_rssi(hw);
1304 rtl92d_dm_dig(hw);
1305 /* rtl92d_dm_dynamic_bb_powersaving(hw); */
1306 rtl92d_dm_dynamic_txpower(hw);
1307 /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
1308 /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
1309 /* rtl92d_dm_interrupt_migration(hw); */
1310 rtl92d_dm_check_edca_turbo(hw);
1311 }
1312 }
1313
