1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Filename: core.c
4 *
5 * Authors: Joshua Morris <josh.h.morris@us.ibm.com>
6 * Philip Kelleher <pjk1939@linux.vnet.ibm.com>
7 *
8 * (C) Copyright 2013 IBM Corporation
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/module.h>
15 #include <linux/pci.h>
16 #include <linux/reboot.h>
17 #include <linux/slab.h>
18 #include <linux/bitops.h>
19 #include <linux/delay.h>
20 #include <linux/debugfs.h>
21 #include <linux/seq_file.h>
22
23 #include <linux/genhd.h>
24 #include <linux/idr.h>
25
26 #include "rsxx_priv.h"
27 #include "rsxx_cfg.h"
28
29 #define NO_LEGACY 0
30 #define SYNC_START_TIMEOUT (10 * 60) /* 10 minutes */
31
32 MODULE_DESCRIPTION("IBM Flash Adapter 900GB Full Height Device Driver");
33 MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM");
34 MODULE_LICENSE("GPL");
35 MODULE_VERSION(DRIVER_VERSION);
36
37 static unsigned int force_legacy = NO_LEGACY;
38 module_param(force_legacy, uint, 0444);
39 MODULE_PARM_DESC(force_legacy, "Force the use of legacy type PCI interrupts");
40
41 static unsigned int sync_start = 1;
42 module_param(sync_start, uint, 0444);
43 MODULE_PARM_DESC(sync_start, "On by Default: Driver load will not complete "
44 "until the card startup has completed.");
45
46 static DEFINE_IDA(rsxx_disk_ida);
47
48 /* --------------------Debugfs Setup ------------------- */
49
rsxx_attr_pci_regs_show(struct seq_file * m,void * p)50 static int rsxx_attr_pci_regs_show(struct seq_file *m, void *p)
51 {
52 struct rsxx_cardinfo *card = m->private;
53
54 seq_printf(m, "HWID 0x%08x\n",
55 ioread32(card->regmap + HWID));
56 seq_printf(m, "SCRATCH 0x%08x\n",
57 ioread32(card->regmap + SCRATCH));
58 seq_printf(m, "IER 0x%08x\n",
59 ioread32(card->regmap + IER));
60 seq_printf(m, "IPR 0x%08x\n",
61 ioread32(card->regmap + IPR));
62 seq_printf(m, "CREG_CMD 0x%08x\n",
63 ioread32(card->regmap + CREG_CMD));
64 seq_printf(m, "CREG_ADD 0x%08x\n",
65 ioread32(card->regmap + CREG_ADD));
66 seq_printf(m, "CREG_CNT 0x%08x\n",
67 ioread32(card->regmap + CREG_CNT));
68 seq_printf(m, "CREG_STAT 0x%08x\n",
69 ioread32(card->regmap + CREG_STAT));
70 seq_printf(m, "CREG_DATA0 0x%08x\n",
71 ioread32(card->regmap + CREG_DATA0));
72 seq_printf(m, "CREG_DATA1 0x%08x\n",
73 ioread32(card->regmap + CREG_DATA1));
74 seq_printf(m, "CREG_DATA2 0x%08x\n",
75 ioread32(card->regmap + CREG_DATA2));
76 seq_printf(m, "CREG_DATA3 0x%08x\n",
77 ioread32(card->regmap + CREG_DATA3));
78 seq_printf(m, "CREG_DATA4 0x%08x\n",
79 ioread32(card->regmap + CREG_DATA4));
80 seq_printf(m, "CREG_DATA5 0x%08x\n",
81 ioread32(card->regmap + CREG_DATA5));
82 seq_printf(m, "CREG_DATA6 0x%08x\n",
83 ioread32(card->regmap + CREG_DATA6));
84 seq_printf(m, "CREG_DATA7 0x%08x\n",
85 ioread32(card->regmap + CREG_DATA7));
86 seq_printf(m, "INTR_COAL 0x%08x\n",
87 ioread32(card->regmap + INTR_COAL));
88 seq_printf(m, "HW_ERROR 0x%08x\n",
89 ioread32(card->regmap + HW_ERROR));
90 seq_printf(m, "DEBUG0 0x%08x\n",
91 ioread32(card->regmap + PCI_DEBUG0));
92 seq_printf(m, "DEBUG1 0x%08x\n",
93 ioread32(card->regmap + PCI_DEBUG1));
94 seq_printf(m, "DEBUG2 0x%08x\n",
95 ioread32(card->regmap + PCI_DEBUG2));
96 seq_printf(m, "DEBUG3 0x%08x\n",
97 ioread32(card->regmap + PCI_DEBUG3));
98 seq_printf(m, "DEBUG4 0x%08x\n",
99 ioread32(card->regmap + PCI_DEBUG4));
100 seq_printf(m, "DEBUG5 0x%08x\n",
101 ioread32(card->regmap + PCI_DEBUG5));
102 seq_printf(m, "DEBUG6 0x%08x\n",
103 ioread32(card->regmap + PCI_DEBUG6));
104 seq_printf(m, "DEBUG7 0x%08x\n",
105 ioread32(card->regmap + PCI_DEBUG7));
106 seq_printf(m, "RECONFIG 0x%08x\n",
107 ioread32(card->regmap + PCI_RECONFIG));
108
109 return 0;
110 }
111
rsxx_attr_stats_show(struct seq_file * m,void * p)112 static int rsxx_attr_stats_show(struct seq_file *m, void *p)
113 {
114 struct rsxx_cardinfo *card = m->private;
115 int i;
116
117 for (i = 0; i < card->n_targets; i++) {
118 seq_printf(m, "Ctrl %d CRC Errors = %d\n",
119 i, card->ctrl[i].stats.crc_errors);
120 seq_printf(m, "Ctrl %d Hard Errors = %d\n",
121 i, card->ctrl[i].stats.hard_errors);
122 seq_printf(m, "Ctrl %d Soft Errors = %d\n",
123 i, card->ctrl[i].stats.soft_errors);
124 seq_printf(m, "Ctrl %d Writes Issued = %d\n",
125 i, card->ctrl[i].stats.writes_issued);
126 seq_printf(m, "Ctrl %d Writes Failed = %d\n",
127 i, card->ctrl[i].stats.writes_failed);
128 seq_printf(m, "Ctrl %d Reads Issued = %d\n",
129 i, card->ctrl[i].stats.reads_issued);
130 seq_printf(m, "Ctrl %d Reads Failed = %d\n",
131 i, card->ctrl[i].stats.reads_failed);
132 seq_printf(m, "Ctrl %d Reads Retried = %d\n",
133 i, card->ctrl[i].stats.reads_retried);
134 seq_printf(m, "Ctrl %d Discards Issued = %d\n",
135 i, card->ctrl[i].stats.discards_issued);
136 seq_printf(m, "Ctrl %d Discards Failed = %d\n",
137 i, card->ctrl[i].stats.discards_failed);
138 seq_printf(m, "Ctrl %d DMA SW Errors = %d\n",
139 i, card->ctrl[i].stats.dma_sw_err);
140 seq_printf(m, "Ctrl %d DMA HW Faults = %d\n",
141 i, card->ctrl[i].stats.dma_hw_fault);
142 seq_printf(m, "Ctrl %d DMAs Cancelled = %d\n",
143 i, card->ctrl[i].stats.dma_cancelled);
144 seq_printf(m, "Ctrl %d SW Queue Depth = %d\n",
145 i, card->ctrl[i].stats.sw_q_depth);
146 seq_printf(m, "Ctrl %d HW Queue Depth = %d\n",
147 i, atomic_read(&card->ctrl[i].stats.hw_q_depth));
148 }
149
150 return 0;
151 }
152
rsxx_attr_stats_open(struct inode * inode,struct file * file)153 static int rsxx_attr_stats_open(struct inode *inode, struct file *file)
154 {
155 return single_open(file, rsxx_attr_stats_show, inode->i_private);
156 }
157
rsxx_attr_pci_regs_open(struct inode * inode,struct file * file)158 static int rsxx_attr_pci_regs_open(struct inode *inode, struct file *file)
159 {
160 return single_open(file, rsxx_attr_pci_regs_show, inode->i_private);
161 }
162
rsxx_cram_read(struct file * fp,char __user * ubuf,size_t cnt,loff_t * ppos)163 static ssize_t rsxx_cram_read(struct file *fp, char __user *ubuf,
164 size_t cnt, loff_t *ppos)
165 {
166 struct rsxx_cardinfo *card = file_inode(fp)->i_private;
167 char *buf;
168 ssize_t st;
169
170 buf = kzalloc(cnt, GFP_KERNEL);
171 if (!buf)
172 return -ENOMEM;
173
174 st = rsxx_creg_read(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1);
175 if (!st)
176 st = copy_to_user(ubuf, buf, cnt);
177 kfree(buf);
178 if (st)
179 return st;
180 *ppos += cnt;
181 return cnt;
182 }
183
rsxx_cram_write(struct file * fp,const char __user * ubuf,size_t cnt,loff_t * ppos)184 static ssize_t rsxx_cram_write(struct file *fp, const char __user *ubuf,
185 size_t cnt, loff_t *ppos)
186 {
187 struct rsxx_cardinfo *card = file_inode(fp)->i_private;
188 char *buf;
189 ssize_t st;
190
191 buf = memdup_user(ubuf, cnt);
192 if (IS_ERR(buf))
193 return PTR_ERR(buf);
194
195 st = rsxx_creg_write(card, CREG_ADD_CRAM + (u32)*ppos, cnt, buf, 1);
196 kfree(buf);
197 if (st)
198 return st;
199 *ppos += cnt;
200 return cnt;
201 }
202
203 static const struct file_operations debugfs_cram_fops = {
204 .owner = THIS_MODULE,
205 .read = rsxx_cram_read,
206 .write = rsxx_cram_write,
207 };
208
209 static const struct file_operations debugfs_stats_fops = {
210 .owner = THIS_MODULE,
211 .open = rsxx_attr_stats_open,
212 .read = seq_read,
213 .llseek = seq_lseek,
214 .release = single_release,
215 };
216
217 static const struct file_operations debugfs_pci_regs_fops = {
218 .owner = THIS_MODULE,
219 .open = rsxx_attr_pci_regs_open,
220 .read = seq_read,
221 .llseek = seq_lseek,
222 .release = single_release,
223 };
224
rsxx_debugfs_dev_new(struct rsxx_cardinfo * card)225 static void rsxx_debugfs_dev_new(struct rsxx_cardinfo *card)
226 {
227 struct dentry *debugfs_stats;
228 struct dentry *debugfs_pci_regs;
229 struct dentry *debugfs_cram;
230
231 card->debugfs_dir = debugfs_create_dir(card->gendisk->disk_name, NULL);
232 if (IS_ERR_OR_NULL(card->debugfs_dir))
233 goto failed_debugfs_dir;
234
235 debugfs_stats = debugfs_create_file("stats", 0444,
236 card->debugfs_dir, card,
237 &debugfs_stats_fops);
238 if (IS_ERR_OR_NULL(debugfs_stats))
239 goto failed_debugfs_stats;
240
241 debugfs_pci_regs = debugfs_create_file("pci_regs", 0444,
242 card->debugfs_dir, card,
243 &debugfs_pci_regs_fops);
244 if (IS_ERR_OR_NULL(debugfs_pci_regs))
245 goto failed_debugfs_pci_regs;
246
247 debugfs_cram = debugfs_create_file("cram", 0644,
248 card->debugfs_dir, card,
249 &debugfs_cram_fops);
250 if (IS_ERR_OR_NULL(debugfs_cram))
251 goto failed_debugfs_cram;
252
253 return;
254 failed_debugfs_cram:
255 debugfs_remove(debugfs_pci_regs);
256 failed_debugfs_pci_regs:
257 debugfs_remove(debugfs_stats);
258 failed_debugfs_stats:
259 debugfs_remove(card->debugfs_dir);
260 failed_debugfs_dir:
261 card->debugfs_dir = NULL;
262 }
263
264 /*----------------- Interrupt Control & Handling -------------------*/
265
rsxx_mask_interrupts(struct rsxx_cardinfo * card)266 static void rsxx_mask_interrupts(struct rsxx_cardinfo *card)
267 {
268 card->isr_mask = 0;
269 card->ier_mask = 0;
270 }
271
__enable_intr(unsigned int * mask,unsigned int intr)272 static void __enable_intr(unsigned int *mask, unsigned int intr)
273 {
274 *mask |= intr;
275 }
276
__disable_intr(unsigned int * mask,unsigned int intr)277 static void __disable_intr(unsigned int *mask, unsigned int intr)
278 {
279 *mask &= ~intr;
280 }
281
282 /*
283 * NOTE: Disabling the IER will disable the hardware interrupt.
284 * Disabling the ISR will disable the software handling of the ISR bit.
285 *
286 * Enable/Disable interrupt functions assume the card->irq_lock
287 * is held by the caller.
288 */
rsxx_enable_ier(struct rsxx_cardinfo * card,unsigned int intr)289 void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr)
290 {
291 if (unlikely(card->halt) ||
292 unlikely(card->eeh_state))
293 return;
294
295 __enable_intr(&card->ier_mask, intr);
296 iowrite32(card->ier_mask, card->regmap + IER);
297 }
298
rsxx_disable_ier(struct rsxx_cardinfo * card,unsigned int intr)299 void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr)
300 {
301 if (unlikely(card->eeh_state))
302 return;
303
304 __disable_intr(&card->ier_mask, intr);
305 iowrite32(card->ier_mask, card->regmap + IER);
306 }
307
rsxx_enable_ier_and_isr(struct rsxx_cardinfo * card,unsigned int intr)308 void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card,
309 unsigned int intr)
310 {
311 if (unlikely(card->halt) ||
312 unlikely(card->eeh_state))
313 return;
314
315 __enable_intr(&card->isr_mask, intr);
316 __enable_intr(&card->ier_mask, intr);
317 iowrite32(card->ier_mask, card->regmap + IER);
318 }
rsxx_disable_ier_and_isr(struct rsxx_cardinfo * card,unsigned int intr)319 void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card,
320 unsigned int intr)
321 {
322 if (unlikely(card->eeh_state))
323 return;
324
325 __disable_intr(&card->isr_mask, intr);
326 __disable_intr(&card->ier_mask, intr);
327 iowrite32(card->ier_mask, card->regmap + IER);
328 }
329
rsxx_isr(int irq,void * pdata)330 static irqreturn_t rsxx_isr(int irq, void *pdata)
331 {
332 struct rsxx_cardinfo *card = pdata;
333 unsigned int isr;
334 int handled = 0;
335 int reread_isr;
336 int i;
337
338 spin_lock(&card->irq_lock);
339
340 do {
341 reread_isr = 0;
342
343 if (unlikely(card->eeh_state))
344 break;
345
346 isr = ioread32(card->regmap + ISR);
347 if (isr == 0xffffffff) {
348 /*
349 * A few systems seem to have an intermittent issue
350 * where PCI reads return all Fs, but retrying the read
351 * a little later will return as expected.
352 */
353 dev_info(CARD_TO_DEV(card),
354 "ISR = 0xFFFFFFFF, retrying later\n");
355 break;
356 }
357
358 isr &= card->isr_mask;
359 if (!isr)
360 break;
361
362 for (i = 0; i < card->n_targets; i++) {
363 if (isr & CR_INTR_DMA(i)) {
364 if (card->ier_mask & CR_INTR_DMA(i)) {
365 rsxx_disable_ier(card, CR_INTR_DMA(i));
366 reread_isr = 1;
367 }
368 queue_work(card->ctrl[i].done_wq,
369 &card->ctrl[i].dma_done_work);
370 handled++;
371 }
372 }
373
374 if (isr & CR_INTR_CREG) {
375 queue_work(card->creg_ctrl.creg_wq,
376 &card->creg_ctrl.done_work);
377 handled++;
378 }
379
380 if (isr & CR_INTR_EVENT) {
381 queue_work(card->event_wq, &card->event_work);
382 rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
383 handled++;
384 }
385 } while (reread_isr);
386
387 spin_unlock(&card->irq_lock);
388
389 return handled ? IRQ_HANDLED : IRQ_NONE;
390 }
391
392 /*----------------- Card Event Handler -------------------*/
rsxx_card_state_to_str(unsigned int state)393 static const char * const rsxx_card_state_to_str(unsigned int state)
394 {
395 static const char * const state_strings[] = {
396 "Unknown", "Shutdown", "Starting", "Formatting",
397 "Uninitialized", "Good", "Shutting Down",
398 "Fault", "Read Only Fault", "dStroying"
399 };
400
401 return state_strings[ffs(state)];
402 }
403
card_state_change(struct rsxx_cardinfo * card,unsigned int new_state)404 static void card_state_change(struct rsxx_cardinfo *card,
405 unsigned int new_state)
406 {
407 int st;
408
409 dev_info(CARD_TO_DEV(card),
410 "card state change detected.(%s -> %s)\n",
411 rsxx_card_state_to_str(card->state),
412 rsxx_card_state_to_str(new_state));
413
414 card->state = new_state;
415
416 /* Don't attach DMA interfaces if the card has an invalid config */
417 if (!card->config_valid)
418 return;
419
420 switch (new_state) {
421 case CARD_STATE_RD_ONLY_FAULT:
422 dev_crit(CARD_TO_DEV(card),
423 "Hardware has entered read-only mode!\n");
424 /*
425 * Fall through so the DMA devices can be attached and
426 * the user can attempt to pull off their data.
427 */
428 fallthrough;
429 case CARD_STATE_GOOD:
430 st = rsxx_get_card_size8(card, &card->size8);
431 if (st)
432 dev_err(CARD_TO_DEV(card),
433 "Failed attaching DMA devices\n");
434
435 if (card->config_valid)
436 set_capacity(card->gendisk, card->size8 >> 9);
437 break;
438
439 case CARD_STATE_FAULT:
440 dev_crit(CARD_TO_DEV(card),
441 "Hardware Fault reported!\n");
442 fallthrough;
443
444 /* Everything else, detach DMA interface if it's attached. */
445 case CARD_STATE_SHUTDOWN:
446 case CARD_STATE_STARTING:
447 case CARD_STATE_FORMATTING:
448 case CARD_STATE_UNINITIALIZED:
449 case CARD_STATE_SHUTTING_DOWN:
450 /*
451 * dStroy is a term coined by marketing to represent the low level
452 * secure erase.
453 */
454 case CARD_STATE_DSTROYING:
455 set_capacity(card->gendisk, 0);
456 break;
457 }
458 }
459
card_event_handler(struct work_struct * work)460 static void card_event_handler(struct work_struct *work)
461 {
462 struct rsxx_cardinfo *card;
463 unsigned int state;
464 unsigned long flags;
465 int st;
466
467 card = container_of(work, struct rsxx_cardinfo, event_work);
468
469 if (unlikely(card->halt))
470 return;
471
472 /*
473 * Enable the interrupt now to avoid any weird race conditions where a
474 * state change might occur while rsxx_get_card_state() is
475 * processing a returned creg cmd.
476 */
477 spin_lock_irqsave(&card->irq_lock, flags);
478 rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
479 spin_unlock_irqrestore(&card->irq_lock, flags);
480
481 st = rsxx_get_card_state(card, &state);
482 if (st) {
483 dev_info(CARD_TO_DEV(card),
484 "Failed reading state after event.\n");
485 return;
486 }
487
488 if (card->state != state)
489 card_state_change(card, state);
490
491 if (card->creg_ctrl.creg_stats.stat & CREG_STAT_LOG_PENDING)
492 rsxx_read_hw_log(card);
493 }
494
495 /*----------------- Card Operations -------------------*/
card_shutdown(struct rsxx_cardinfo * card)496 static int card_shutdown(struct rsxx_cardinfo *card)
497 {
498 unsigned int state;
499 signed long start;
500 const int timeout = msecs_to_jiffies(120000);
501 int st;
502
503 /* We can't issue a shutdown if the card is in a transition state */
504 start = jiffies;
505 do {
506 st = rsxx_get_card_state(card, &state);
507 if (st)
508 return st;
509 } while (state == CARD_STATE_STARTING &&
510 (jiffies - start < timeout));
511
512 if (state == CARD_STATE_STARTING)
513 return -ETIMEDOUT;
514
515 /* Only issue a shutdown if we need to */
516 if ((state != CARD_STATE_SHUTTING_DOWN) &&
517 (state != CARD_STATE_SHUTDOWN)) {
518 st = rsxx_issue_card_cmd(card, CARD_CMD_SHUTDOWN);
519 if (st)
520 return st;
521 }
522
523 start = jiffies;
524 do {
525 st = rsxx_get_card_state(card, &state);
526 if (st)
527 return st;
528 } while (state != CARD_STATE_SHUTDOWN &&
529 (jiffies - start < timeout));
530
531 if (state != CARD_STATE_SHUTDOWN)
532 return -ETIMEDOUT;
533
534 return 0;
535 }
536
rsxx_eeh_frozen(struct pci_dev * dev)537 static int rsxx_eeh_frozen(struct pci_dev *dev)
538 {
539 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
540 int i;
541 int st;
542
543 dev_warn(&dev->dev, "IBM Flash Adapter PCI: preparing for slot reset.\n");
544
545 card->eeh_state = 1;
546 rsxx_mask_interrupts(card);
547
548 /*
549 * We need to guarantee that the write for eeh_state and masking
550 * interrupts does not become reordered. This will prevent a possible
551 * race condition with the EEH code.
552 */
553 wmb();
554
555 pci_disable_device(dev);
556
557 st = rsxx_eeh_save_issued_dmas(card);
558 if (st)
559 return st;
560
561 rsxx_eeh_save_issued_creg(card);
562
563 for (i = 0; i < card->n_targets; i++) {
564 if (card->ctrl[i].status.buf)
565 dma_free_coherent(&card->dev->dev,
566 STATUS_BUFFER_SIZE8,
567 card->ctrl[i].status.buf,
568 card->ctrl[i].status.dma_addr);
569 if (card->ctrl[i].cmd.buf)
570 dma_free_coherent(&card->dev->dev,
571 COMMAND_BUFFER_SIZE8,
572 card->ctrl[i].cmd.buf,
573 card->ctrl[i].cmd.dma_addr);
574 }
575
576 return 0;
577 }
578
rsxx_eeh_failure(struct pci_dev * dev)579 static void rsxx_eeh_failure(struct pci_dev *dev)
580 {
581 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
582 int i;
583 int cnt = 0;
584
585 dev_err(&dev->dev, "IBM Flash Adapter PCI: disabling failed card.\n");
586
587 card->eeh_state = 1;
588 card->halt = 1;
589
590 for (i = 0; i < card->n_targets; i++) {
591 spin_lock_bh(&card->ctrl[i].queue_lock);
592 cnt = rsxx_cleanup_dma_queue(&card->ctrl[i],
593 &card->ctrl[i].queue,
594 COMPLETE_DMA);
595 spin_unlock_bh(&card->ctrl[i].queue_lock);
596
597 cnt += rsxx_dma_cancel(&card->ctrl[i]);
598
599 if (cnt)
600 dev_info(CARD_TO_DEV(card),
601 "Freed %d queued DMAs on channel %d\n",
602 cnt, card->ctrl[i].id);
603 }
604 }
605
rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo * card)606 static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card)
607 {
608 unsigned int status;
609 int iter = 0;
610
611 /* We need to wait for the hardware to reset */
612 while (iter++ < 10) {
613 status = ioread32(card->regmap + PCI_RECONFIG);
614
615 if (status & RSXX_FLUSH_BUSY) {
616 ssleep(1);
617 continue;
618 }
619
620 if (status & RSXX_FLUSH_TIMEOUT)
621 dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n");
622 return 0;
623 }
624
625 /* Hardware failed resetting itself. */
626 return -1;
627 }
628
rsxx_error_detected(struct pci_dev * dev,pci_channel_state_t error)629 static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev,
630 pci_channel_state_t error)
631 {
632 int st;
633
634 if (dev->revision < RSXX_EEH_SUPPORT)
635 return PCI_ERS_RESULT_NONE;
636
637 if (error == pci_channel_io_perm_failure) {
638 rsxx_eeh_failure(dev);
639 return PCI_ERS_RESULT_DISCONNECT;
640 }
641
642 st = rsxx_eeh_frozen(dev);
643 if (st) {
644 dev_err(&dev->dev, "Slot reset setup failed\n");
645 rsxx_eeh_failure(dev);
646 return PCI_ERS_RESULT_DISCONNECT;
647 }
648
649 return PCI_ERS_RESULT_NEED_RESET;
650 }
651
rsxx_slot_reset(struct pci_dev * dev)652 static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev)
653 {
654 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
655 unsigned long flags;
656 int i;
657 int st;
658
659 dev_warn(&dev->dev,
660 "IBM Flash Adapter PCI: recovering from slot reset.\n");
661
662 st = pci_enable_device(dev);
663 if (st)
664 goto failed_hw_setup;
665
666 pci_set_master(dev);
667
668 st = rsxx_eeh_fifo_flush_poll(card);
669 if (st)
670 goto failed_hw_setup;
671
672 rsxx_dma_queue_reset(card);
673
674 for (i = 0; i < card->n_targets; i++) {
675 st = rsxx_hw_buffers_init(dev, &card->ctrl[i]);
676 if (st)
677 goto failed_hw_buffers_init;
678 }
679
680 if (card->config_valid)
681 rsxx_dma_configure(card);
682
683 /* Clears the ISR register from spurious interrupts */
684 st = ioread32(card->regmap + ISR);
685
686 card->eeh_state = 0;
687
688 spin_lock_irqsave(&card->irq_lock, flags);
689 if (card->n_targets & RSXX_MAX_TARGETS)
690 rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G);
691 else
692 rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C);
693 spin_unlock_irqrestore(&card->irq_lock, flags);
694
695 rsxx_kick_creg_queue(card);
696
697 for (i = 0; i < card->n_targets; i++) {
698 spin_lock(&card->ctrl[i].queue_lock);
699 if (list_empty(&card->ctrl[i].queue)) {
700 spin_unlock(&card->ctrl[i].queue_lock);
701 continue;
702 }
703 spin_unlock(&card->ctrl[i].queue_lock);
704
705 queue_work(card->ctrl[i].issue_wq,
706 &card->ctrl[i].issue_dma_work);
707 }
708
709 dev_info(&dev->dev, "IBM Flash Adapter PCI: recovery complete.\n");
710
711 return PCI_ERS_RESULT_RECOVERED;
712
713 failed_hw_buffers_init:
714 for (i = 0; i < card->n_targets; i++) {
715 if (card->ctrl[i].status.buf)
716 dma_free_coherent(&card->dev->dev,
717 STATUS_BUFFER_SIZE8,
718 card->ctrl[i].status.buf,
719 card->ctrl[i].status.dma_addr);
720 if (card->ctrl[i].cmd.buf)
721 dma_free_coherent(&card->dev->dev,
722 COMMAND_BUFFER_SIZE8,
723 card->ctrl[i].cmd.buf,
724 card->ctrl[i].cmd.dma_addr);
725 }
726 failed_hw_setup:
727 rsxx_eeh_failure(dev);
728 return PCI_ERS_RESULT_DISCONNECT;
729
730 }
731
732 /*----------------- Driver Initialization & Setup -------------------*/
733 /* Returns: 0 if the driver is compatible with the device
734 -1 if the driver is NOT compatible with the device */
rsxx_compatibility_check(struct rsxx_cardinfo * card)735 static int rsxx_compatibility_check(struct rsxx_cardinfo *card)
736 {
737 unsigned char pci_rev;
738
739 pci_read_config_byte(card->dev, PCI_REVISION_ID, &pci_rev);
740
741 if (pci_rev > RS70_PCI_REV_SUPPORTED)
742 return -1;
743 return 0;
744 }
745
rsxx_pci_probe(struct pci_dev * dev,const struct pci_device_id * id)746 static int rsxx_pci_probe(struct pci_dev *dev,
747 const struct pci_device_id *id)
748 {
749 struct rsxx_cardinfo *card;
750 int st;
751 unsigned int sync_timeout;
752
753 dev_info(&dev->dev, "PCI-Flash SSD discovered\n");
754
755 card = kzalloc(sizeof(*card), GFP_KERNEL);
756 if (!card)
757 return -ENOMEM;
758
759 card->dev = dev;
760 pci_set_drvdata(dev, card);
761
762 st = ida_alloc(&rsxx_disk_ida, GFP_KERNEL);
763 if (st < 0)
764 goto failed_ida_get;
765 card->disk_id = st;
766
767 st = pci_enable_device(dev);
768 if (st)
769 goto failed_enable;
770
771 pci_set_master(dev);
772
773 st = dma_set_mask(&dev->dev, DMA_BIT_MASK(64));
774 if (st) {
775 dev_err(CARD_TO_DEV(card),
776 "No usable DMA configuration,aborting\n");
777 goto failed_dma_mask;
778 }
779
780 st = pci_request_regions(dev, DRIVER_NAME);
781 if (st) {
782 dev_err(CARD_TO_DEV(card),
783 "Failed to request memory region\n");
784 goto failed_request_regions;
785 }
786
787 if (pci_resource_len(dev, 0) == 0) {
788 dev_err(CARD_TO_DEV(card), "BAR0 has length 0!\n");
789 st = -ENOMEM;
790 goto failed_iomap;
791 }
792
793 card->regmap = pci_iomap(dev, 0, 0);
794 if (!card->regmap) {
795 dev_err(CARD_TO_DEV(card), "Failed to map BAR0\n");
796 st = -ENOMEM;
797 goto failed_iomap;
798 }
799
800 spin_lock_init(&card->irq_lock);
801 card->halt = 0;
802 card->eeh_state = 0;
803
804 spin_lock_irq(&card->irq_lock);
805 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
806 spin_unlock_irq(&card->irq_lock);
807
808 if (!force_legacy) {
809 st = pci_enable_msi(dev);
810 if (st)
811 dev_warn(CARD_TO_DEV(card),
812 "Failed to enable MSI\n");
813 }
814
815 st = request_irq(dev->irq, rsxx_isr, IRQF_SHARED,
816 DRIVER_NAME, card);
817 if (st) {
818 dev_err(CARD_TO_DEV(card),
819 "Failed requesting IRQ%d\n", dev->irq);
820 goto failed_irq;
821 }
822
823 /************* Setup Processor Command Interface *************/
824 st = rsxx_creg_setup(card);
825 if (st) {
826 dev_err(CARD_TO_DEV(card), "Failed to setup creg interface.\n");
827 goto failed_creg_setup;
828 }
829
830 spin_lock_irq(&card->irq_lock);
831 rsxx_enable_ier_and_isr(card, CR_INTR_CREG);
832 spin_unlock_irq(&card->irq_lock);
833
834 st = rsxx_compatibility_check(card);
835 if (st) {
836 dev_warn(CARD_TO_DEV(card),
837 "Incompatible driver detected. Please update the driver.\n");
838 st = -EINVAL;
839 goto failed_compatiblity_check;
840 }
841
842 /************* Load Card Config *************/
843 st = rsxx_load_config(card);
844 if (st)
845 dev_err(CARD_TO_DEV(card),
846 "Failed loading card config\n");
847
848 /************* Setup DMA Engine *************/
849 st = rsxx_get_num_targets(card, &card->n_targets);
850 if (st)
851 dev_info(CARD_TO_DEV(card),
852 "Failed reading the number of DMA targets\n");
853
854 card->ctrl = kcalloc(card->n_targets, sizeof(*card->ctrl),
855 GFP_KERNEL);
856 if (!card->ctrl) {
857 st = -ENOMEM;
858 goto failed_dma_setup;
859 }
860
861 st = rsxx_dma_setup(card);
862 if (st) {
863 dev_info(CARD_TO_DEV(card),
864 "Failed to setup DMA engine\n");
865 goto failed_dma_setup;
866 }
867
868 /************* Setup Card Event Handler *************/
869 card->event_wq = create_singlethread_workqueue(DRIVER_NAME"_event");
870 if (!card->event_wq) {
871 dev_err(CARD_TO_DEV(card), "Failed card event setup.\n");
872 goto failed_event_handler;
873 }
874
875 INIT_WORK(&card->event_work, card_event_handler);
876
877 st = rsxx_setup_dev(card);
878 if (st)
879 goto failed_create_dev;
880
881 rsxx_get_card_state(card, &card->state);
882
883 dev_info(CARD_TO_DEV(card),
884 "card state: %s\n",
885 rsxx_card_state_to_str(card->state));
886
887 /*
888 * Now that the DMA Engine and devices have been setup,
889 * we can enable the event interrupt(it kicks off actions in
890 * those layers so we couldn't enable it right away.)
891 */
892 spin_lock_irq(&card->irq_lock);
893 rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
894 spin_unlock_irq(&card->irq_lock);
895
896 if (card->state == CARD_STATE_SHUTDOWN) {
897 st = rsxx_issue_card_cmd(card, CARD_CMD_STARTUP);
898 if (st)
899 dev_crit(CARD_TO_DEV(card),
900 "Failed issuing card startup\n");
901 if (sync_start) {
902 sync_timeout = SYNC_START_TIMEOUT;
903
904 dev_info(CARD_TO_DEV(card),
905 "Waiting for card to startup\n");
906
907 do {
908 ssleep(1);
909 sync_timeout--;
910
911 rsxx_get_card_state(card, &card->state);
912 } while (sync_timeout &&
913 (card->state == CARD_STATE_STARTING));
914
915 if (card->state == CARD_STATE_STARTING) {
916 dev_warn(CARD_TO_DEV(card),
917 "Card startup timed out\n");
918 card->size8 = 0;
919 } else {
920 dev_info(CARD_TO_DEV(card),
921 "card state: %s\n",
922 rsxx_card_state_to_str(card->state));
923 st = rsxx_get_card_size8(card, &card->size8);
924 if (st)
925 card->size8 = 0;
926 }
927 }
928 } else if (card->state == CARD_STATE_GOOD ||
929 card->state == CARD_STATE_RD_ONLY_FAULT) {
930 st = rsxx_get_card_size8(card, &card->size8);
931 if (st)
932 card->size8 = 0;
933 }
934
935 rsxx_attach_dev(card);
936
937 /************* Setup Debugfs *************/
938 rsxx_debugfs_dev_new(card);
939
940 return 0;
941
942 failed_create_dev:
943 destroy_workqueue(card->event_wq);
944 card->event_wq = NULL;
945 failed_event_handler:
946 rsxx_dma_destroy(card);
947 failed_dma_setup:
948 failed_compatiblity_check:
949 destroy_workqueue(card->creg_ctrl.creg_wq);
950 card->creg_ctrl.creg_wq = NULL;
951 failed_creg_setup:
952 spin_lock_irq(&card->irq_lock);
953 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
954 spin_unlock_irq(&card->irq_lock);
955 free_irq(dev->irq, card);
956 if (!force_legacy)
957 pci_disable_msi(dev);
958 failed_irq:
959 pci_iounmap(dev, card->regmap);
960 failed_iomap:
961 pci_release_regions(dev);
962 failed_request_regions:
963 failed_dma_mask:
964 pci_disable_device(dev);
965 failed_enable:
966 ida_free(&rsxx_disk_ida, card->disk_id);
967 failed_ida_get:
968 kfree(card);
969
970 return st;
971 }
972
rsxx_pci_remove(struct pci_dev * dev)973 static void rsxx_pci_remove(struct pci_dev *dev)
974 {
975 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
976 unsigned long flags;
977 int st;
978 int i;
979
980 if (!card)
981 return;
982
983 dev_info(CARD_TO_DEV(card),
984 "Removing PCI-Flash SSD.\n");
985
986 rsxx_detach_dev(card);
987
988 for (i = 0; i < card->n_targets; i++) {
989 spin_lock_irqsave(&card->irq_lock, flags);
990 rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
991 spin_unlock_irqrestore(&card->irq_lock, flags);
992 }
993
994 st = card_shutdown(card);
995 if (st)
996 dev_crit(CARD_TO_DEV(card), "Shutdown failed!\n");
997
998 /* Sync outstanding event handlers. */
999 spin_lock_irqsave(&card->irq_lock, flags);
1000 rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
1001 spin_unlock_irqrestore(&card->irq_lock, flags);
1002
1003 cancel_work_sync(&card->event_work);
1004
1005 destroy_workqueue(card->event_wq);
1006 rsxx_destroy_dev(card);
1007 rsxx_dma_destroy(card);
1008 destroy_workqueue(card->creg_ctrl.creg_wq);
1009
1010 spin_lock_irqsave(&card->irq_lock, flags);
1011 rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
1012 spin_unlock_irqrestore(&card->irq_lock, flags);
1013
1014 /* Prevent work_structs from re-queuing themselves. */
1015 card->halt = 1;
1016
1017 debugfs_remove_recursive(card->debugfs_dir);
1018
1019 free_irq(dev->irq, card);
1020
1021 if (!force_legacy)
1022 pci_disable_msi(dev);
1023
1024 rsxx_creg_destroy(card);
1025
1026 pci_iounmap(dev, card->regmap);
1027
1028 pci_disable_device(dev);
1029 pci_release_regions(dev);
1030
1031 ida_free(&rsxx_disk_ida, card->disk_id);
1032 kfree(card);
1033 }
1034
rsxx_pci_suspend(struct pci_dev * dev,pm_message_t state)1035 static int rsxx_pci_suspend(struct pci_dev *dev, pm_message_t state)
1036 {
1037 /* We don't support suspend at this time. */
1038 return -ENOSYS;
1039 }
1040
rsxx_pci_shutdown(struct pci_dev * dev)1041 static void rsxx_pci_shutdown(struct pci_dev *dev)
1042 {
1043 struct rsxx_cardinfo *card = pci_get_drvdata(dev);
1044 unsigned long flags;
1045 int i;
1046
1047 if (!card)
1048 return;
1049
1050 dev_info(CARD_TO_DEV(card), "Shutting down PCI-Flash SSD.\n");
1051
1052 rsxx_detach_dev(card);
1053
1054 for (i = 0; i < card->n_targets; i++) {
1055 spin_lock_irqsave(&card->irq_lock, flags);
1056 rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
1057 spin_unlock_irqrestore(&card->irq_lock, flags);
1058 }
1059
1060 card_shutdown(card);
1061 }
1062
1063 static const struct pci_error_handlers rsxx_err_handler = {
1064 .error_detected = rsxx_error_detected,
1065 .slot_reset = rsxx_slot_reset,
1066 };
1067
1068 static const struct pci_device_id rsxx_pci_ids[] = {
1069 {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)},
1070 {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)},
1071 {0,},
1072 };
1073
1074 MODULE_DEVICE_TABLE(pci, rsxx_pci_ids);
1075
1076 static struct pci_driver rsxx_pci_driver = {
1077 .name = DRIVER_NAME,
1078 .id_table = rsxx_pci_ids,
1079 .probe = rsxx_pci_probe,
1080 .remove = rsxx_pci_remove,
1081 .suspend = rsxx_pci_suspend,
1082 .shutdown = rsxx_pci_shutdown,
1083 .err_handler = &rsxx_err_handler,
1084 };
1085
rsxx_core_init(void)1086 static int __init rsxx_core_init(void)
1087 {
1088 int st;
1089
1090 st = rsxx_dev_init();
1091 if (st)
1092 return st;
1093
1094 st = rsxx_dma_init();
1095 if (st)
1096 goto dma_init_failed;
1097
1098 st = rsxx_creg_init();
1099 if (st)
1100 goto creg_init_failed;
1101
1102 return pci_register_driver(&rsxx_pci_driver);
1103
1104 creg_init_failed:
1105 rsxx_dma_cleanup();
1106 dma_init_failed:
1107 rsxx_dev_cleanup();
1108
1109 return st;
1110 }
1111
rsxx_core_cleanup(void)1112 static void __exit rsxx_core_cleanup(void)
1113 {
1114 pci_unregister_driver(&rsxx_pci_driver);
1115 rsxx_creg_cleanup();
1116 rsxx_dma_cleanup();
1117 rsxx_dev_cleanup();
1118 }
1119
1120 module_init(rsxx_core_init);
1121 module_exit(rsxx_core_cleanup);
1122
