1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Regents of the University of California
4 */
5
6 #include <linux/cpu.h>
7 #include <linux/init.h>
8 #include <linux/seq_file.h>
9 #include <linux/of.h>
10 #include <asm/csr.h>
11 #include <asm/hwcap.h>
12 #include <asm/sbi.h>
13 #include <asm/smp.h>
14 #include <asm/pgtable.h>
15
16 /*
17 * Returns the hart ID of the given device tree node, or -ENODEV if the node
18 * isn't an enabled and valid RISC-V hart node.
19 */
riscv_of_processor_hartid(struct device_node * node,unsigned long * hart)20 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)
21 {
22 const char *isa;
23
24 if (!of_device_is_compatible(node, "riscv")) {
25 pr_warn("Found incompatible CPU\n");
26 return -ENODEV;
27 }
28
29 *hart = (unsigned long) of_get_cpu_hwid(node, 0);
30 if (*hart == ~0UL) {
31 pr_warn("Found CPU without hart ID\n");
32 return -ENODEV;
33 }
34
35 if (!of_device_is_available(node)) {
36 pr_info("CPU with hartid=%lu is not available\n", *hart);
37 return -ENODEV;
38 }
39
40 if (of_property_read_string(node, "riscv,isa", &isa)) {
41 pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);
42 return -ENODEV;
43 }
44 if (isa[0] != 'r' || isa[1] != 'v') {
45 pr_warn("CPU with hartid=%lu has an invalid ISA of \"%s\"\n", *hart, isa);
46 return -ENODEV;
47 }
48
49 return 0;
50 }
51
52 /*
53 * Find hart ID of the CPU DT node under which given DT node falls.
54 *
55 * To achieve this, we walk up the DT tree until we find an active
56 * RISC-V core (HART) node and extract the cpuid from it.
57 */
riscv_of_parent_hartid(struct device_node * node,unsigned long * hartid)58 int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
59 {
60 int rc;
61
62 for (; node; node = node->parent) {
63 if (of_device_is_compatible(node, "riscv")) {
64 rc = riscv_of_processor_hartid(node, hartid);
65 if (!rc)
66 return 0;
67 }
68 }
69
70 return -1;
71 }
72
73 #ifdef CONFIG_PROC_FS
74
75 struct riscv_cpuinfo {
76 unsigned long mvendorid;
77 unsigned long marchid;
78 unsigned long mimpid;
79 };
80 static DEFINE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo);
81
riscv_cpuinfo_starting(unsigned int cpu)82 static int riscv_cpuinfo_starting(unsigned int cpu)
83 {
84 struct riscv_cpuinfo *ci = this_cpu_ptr(&riscv_cpuinfo);
85
86 #if IS_ENABLED(CONFIG_RISCV_SBI)
87 ci->mvendorid = sbi_spec_is_0_1() ? 0 : sbi_get_mvendorid();
88 ci->marchid = sbi_spec_is_0_1() ? 0 : sbi_get_marchid();
89 ci->mimpid = sbi_spec_is_0_1() ? 0 : sbi_get_mimpid();
90 #elif IS_ENABLED(CONFIG_RISCV_M_MODE)
91 ci->mvendorid = csr_read(CSR_MVENDORID);
92 ci->marchid = csr_read(CSR_MARCHID);
93 ci->mimpid = csr_read(CSR_MIMPID);
94 #else
95 ci->mvendorid = 0;
96 ci->marchid = 0;
97 ci->mimpid = 0;
98 #endif
99
100 return 0;
101 }
102
riscv_cpuinfo_init(void)103 static int __init riscv_cpuinfo_init(void)
104 {
105 int ret;
106
107 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "riscv/cpuinfo:starting",
108 riscv_cpuinfo_starting, NULL);
109 if (ret < 0) {
110 pr_err("cpuinfo: failed to register hotplug callbacks.\n");
111 return ret;
112 }
113
114 return 0;
115 }
116 device_initcall(riscv_cpuinfo_init);
117
118 #define __RISCV_ISA_EXT_DATA(UPROP, EXTID) \
119 { \
120 .uprop = #UPROP, \
121 .isa_ext_id = EXTID, \
122 }
123 /*
124 * Here are the ordering rules of extension naming defined by RISC-V
125 * specification :
126 * 1. All extensions should be separated from other multi-letter extensions
127 * by an underscore.
128 * 2. The first letter following the 'Z' conventionally indicates the most
129 * closely related alphabetical extension category, IMAFDQLCBKJTPVH.
130 * If multiple 'Z' extensions are named, they should be ordered first
131 * by category, then alphabetically within a category.
132 * 3. Standard supervisor-level extensions (starts with 'S') should be
133 * listed after standard unprivileged extensions. If multiple
134 * supervisor-level extensions are listed, they should be ordered
135 * alphabetically.
136 * 4. Non-standard extensions (starts with 'X') must be listed after all
137 * standard extensions. They must be separated from other multi-letter
138 * extensions by an underscore.
139 */
140 static struct riscv_isa_ext_data isa_ext_arr[] = {
141 __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
142 __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
143 __RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL),
144 __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),
145 __RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),
146 __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
147 __RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),
148 };
149
print_isa_ext(struct seq_file * f)150 static void print_isa_ext(struct seq_file *f)
151 {
152 struct riscv_isa_ext_data *edata;
153 int i = 0, arr_sz;
154
155 arr_sz = ARRAY_SIZE(isa_ext_arr) - 1;
156
157 /* No extension support available */
158 if (arr_sz <= 0)
159 return;
160
161 for (i = 0; i <= arr_sz; i++) {
162 edata = &isa_ext_arr[i];
163 if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id))
164 continue;
165 seq_printf(f, "_%s", edata->uprop);
166 }
167 }
168
169 /*
170 * These are the only valid base (single letter) ISA extensions as per the spec.
171 * It also specifies the canonical order in which it appears in the spec.
172 * Some of the extension may just be a place holder for now (B, K, P, J).
173 * This should be updated once corresponding extensions are ratified.
174 */
175 static const char base_riscv_exts[13] = "imafdqcbkjpvh";
176
print_isa(struct seq_file * f,const char * isa)177 static void print_isa(struct seq_file *f, const char *isa)
178 {
179 int i;
180
181 seq_puts(f, "isa\t\t: ");
182 /* Print the rv[64/32] part */
183 seq_write(f, isa, 4);
184 for (i = 0; i < sizeof(base_riscv_exts); i++) {
185 if (__riscv_isa_extension_available(NULL, base_riscv_exts[i] - 'a'))
186 /* Print only enabled the base ISA extensions */
187 seq_write(f, &base_riscv_exts[i], 1);
188 }
189 print_isa_ext(f);
190 seq_puts(f, "\n");
191 }
192
print_mmu(struct seq_file * f)193 static void print_mmu(struct seq_file *f)
194 {
195 char sv_type[16];
196
197 #ifdef CONFIG_MMU
198 #if defined(CONFIG_32BIT)
199 strncpy(sv_type, "sv32", 5);
200 #elif defined(CONFIG_64BIT)
201 if (pgtable_l5_enabled)
202 strncpy(sv_type, "sv57", 5);
203 else if (pgtable_l4_enabled)
204 strncpy(sv_type, "sv48", 5);
205 else
206 strncpy(sv_type, "sv39", 5);
207 #endif
208 #else
209 strncpy(sv_type, "none", 5);
210 #endif /* CONFIG_MMU */
211 seq_printf(f, "mmu\t\t: %s\n", sv_type);
212 }
213
c_start(struct seq_file * m,loff_t * pos)214 static void *c_start(struct seq_file *m, loff_t *pos)
215 {
216 if (*pos == nr_cpu_ids)
217 return NULL;
218
219 *pos = cpumask_next(*pos - 1, cpu_online_mask);
220 if ((*pos) < nr_cpu_ids)
221 return (void *)(uintptr_t)(1 + *pos);
222 return NULL;
223 }
224
c_next(struct seq_file * m,void * v,loff_t * pos)225 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
226 {
227 (*pos)++;
228 return c_start(m, pos);
229 }
230
c_stop(struct seq_file * m,void * v)231 static void c_stop(struct seq_file *m, void *v)
232 {
233 }
234
c_show(struct seq_file * m,void * v)235 static int c_show(struct seq_file *m, void *v)
236 {
237 unsigned long cpu_id = (unsigned long)v - 1;
238 struct device_node *node = of_get_cpu_node(cpu_id, NULL);
239 struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id);
240 const char *compat, *isa;
241
242 seq_printf(m, "processor\t: %lu\n", cpu_id);
243 seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
244 if (!of_property_read_string(node, "riscv,isa", &isa))
245 print_isa(m, isa);
246 print_mmu(m);
247 if (!of_property_read_string(node, "compatible", &compat)
248 && strcmp(compat, "riscv"))
249 seq_printf(m, "uarch\t\t: %s\n", compat);
250 seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid);
251 seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid);
252 seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid);
253 seq_puts(m, "\n");
254 of_node_put(node);
255
256 return 0;
257 }
258
259 const struct seq_operations cpuinfo_op = {
260 .start = c_start,
261 .next = c_next,
262 .stop = c_stop,
263 .show = c_show
264 };
265
266 #endif /* CONFIG_PROC_FS */
267
