1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PARAVIRT_TYPES_H 3 #define _ASM_X86_PARAVIRT_TYPES_H 4 5 /* Bitmask of what can be clobbered: usually at least eax. */ 6 #define CLBR_NONE 0 7 #define CLBR_EAX (1 << 0) 8 #define CLBR_ECX (1 << 1) 9 #define CLBR_EDX (1 << 2) 10 #define CLBR_EDI (1 << 3) 11 12 #ifdef CONFIG_X86_32 13 /* CLBR_ANY should match all regs platform has. For i386, that's just it */ 14 #define CLBR_ANY ((1 << 4) - 1) 15 16 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX) 17 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX) 18 #define CLBR_SCRATCH (0) 19 #else 20 #define CLBR_RAX CLBR_EAX 21 #define CLBR_RCX CLBR_ECX 22 #define CLBR_RDX CLBR_EDX 23 #define CLBR_RDI CLBR_EDI 24 #define CLBR_RSI (1 << 4) 25 #define CLBR_R8 (1 << 5) 26 #define CLBR_R9 (1 << 6) 27 #define CLBR_R10 (1 << 7) 28 #define CLBR_R11 (1 << 8) 29 30 #define CLBR_ANY ((1 << 9) - 1) 31 32 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \ 33 CLBR_RCX | CLBR_R8 | CLBR_R9) 34 #define CLBR_RET_REG (CLBR_RAX) 35 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11) 36 37 #endif /* X86_64 */ 38 39 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG) 40 41 #ifndef __ASSEMBLY__ 42 43 #include <asm/desc_defs.h> 44 #include <asm/kmap_types.h> 45 #include <asm/pgtable_types.h> 46 #include <asm/nospec-branch.h> 47 48 struct page; 49 struct thread_struct; 50 struct desc_ptr; 51 struct tss_struct; 52 struct mm_struct; 53 struct desc_struct; 54 struct task_struct; 55 struct cpumask; 56 struct flush_tlb_info; 57 struct mmu_gather; 58 59 /* 60 * Wrapper type for pointers to code which uses the non-standard 61 * calling convention. See PV_CALL_SAVE_REGS_THUNK below. 62 */ 63 struct paravirt_callee_save { 64 void *func; 65 }; 66 67 /* general info */ 68 struct pv_info { 69 unsigned int kernel_rpl; 70 int shared_kernel_pmd; 71 72 #ifdef CONFIG_X86_64 73 u16 extra_user_64bit_cs; /* __USER_CS if none */ 74 #endif 75 76 const char *name; 77 }; 78 79 struct pv_init_ops { 80 /* 81 * Patch may replace one of the defined code sequences with 82 * arbitrary code, subject to the same register constraints. 83 * This generally means the code is not free to clobber any 84 * registers other than EAX. The patch function should return 85 * the number of bytes of code generated, as we nop pad the 86 * rest in generic code. 87 */ 88 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, 89 unsigned long addr, unsigned len); 90 } __no_randomize_layout; 91 92 93 struct pv_lazy_ops { 94 /* Set deferred update mode, used for batching operations. */ 95 void (*enter)(void); 96 void (*leave)(void); 97 void (*flush)(void); 98 } __no_randomize_layout; 99 100 struct pv_time_ops { 101 unsigned long long (*sched_clock)(void); 102 unsigned long long (*steal_clock)(int cpu); 103 } __no_randomize_layout; 104 105 struct pv_cpu_ops { 106 /* hooks for various privileged instructions */ 107 unsigned long (*get_debugreg)(int regno); 108 void (*set_debugreg)(int regno, unsigned long value); 109 110 unsigned long (*read_cr0)(void); 111 void (*write_cr0)(unsigned long); 112 113 void (*write_cr4)(unsigned long); 114 115 #ifdef CONFIG_X86_64 116 unsigned long (*read_cr8)(void); 117 void (*write_cr8)(unsigned long); 118 #endif 119 120 /* Segment descriptor handling */ 121 void (*load_tr_desc)(void); 122 void (*load_gdt)(const struct desc_ptr *); 123 void (*load_idt)(const struct desc_ptr *); 124 void (*set_ldt)(const void *desc, unsigned entries); 125 unsigned long (*store_tr)(void); 126 void (*load_tls)(struct thread_struct *t, unsigned int cpu); 127 #ifdef CONFIG_X86_64 128 void (*load_gs_index)(unsigned int idx); 129 #endif 130 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, 131 const void *desc); 132 void (*write_gdt_entry)(struct desc_struct *, 133 int entrynum, const void *desc, int size); 134 void (*write_idt_entry)(gate_desc *, 135 int entrynum, const gate_desc *gate); 136 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries); 137 void (*free_ldt)(struct desc_struct *ldt, unsigned entries); 138 139 void (*load_sp0)(unsigned long sp0); 140 141 void (*set_iopl_mask)(unsigned mask); 142 143 void (*wbinvd)(void); 144 void (*io_delay)(void); 145 146 /* cpuid emulation, mostly so that caps bits can be disabled */ 147 void (*cpuid)(unsigned int *eax, unsigned int *ebx, 148 unsigned int *ecx, unsigned int *edx); 149 150 /* Unsafe MSR operations. These will warn or panic on failure. */ 151 u64 (*read_msr)(unsigned int msr); 152 void (*write_msr)(unsigned int msr, unsigned low, unsigned high); 153 154 /* 155 * Safe MSR operations. 156 * read sets err to 0 or -EIO. write returns 0 or -EIO. 157 */ 158 u64 (*read_msr_safe)(unsigned int msr, int *err); 159 int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high); 160 161 u64 (*read_pmc)(int counter); 162 163 /* 164 * Switch to usermode gs and return to 64-bit usermode using 165 * sysret. Only used in 64-bit kernels to return to 64-bit 166 * processes. Usermode register state, including %rsp, must 167 * already be restored. 168 */ 169 void (*usergs_sysret64)(void); 170 171 /* Normal iret. Jump to this with the standard iret stack 172 frame set up. */ 173 void (*iret)(void); 174 175 void (*swapgs)(void); 176 177 void (*start_context_switch)(struct task_struct *prev); 178 void (*end_context_switch)(struct task_struct *next); 179 } __no_randomize_layout; 180 181 struct pv_irq_ops { 182 /* 183 * Get/set interrupt state. save_fl and restore_fl are only 184 * expected to use X86_EFLAGS_IF; all other bits 185 * returned from save_fl are undefined, and may be ignored by 186 * restore_fl. 187 * 188 * NOTE: These functions callers expect the callee to preserve 189 * more registers than the standard C calling convention. 190 */ 191 struct paravirt_callee_save save_fl; 192 struct paravirt_callee_save restore_fl; 193 struct paravirt_callee_save irq_disable; 194 struct paravirt_callee_save irq_enable; 195 196 void (*safe_halt)(void); 197 void (*halt)(void); 198 199 } __no_randomize_layout; 200 201 struct pv_mmu_ops { 202 unsigned long (*read_cr2)(void); 203 void (*write_cr2)(unsigned long); 204 205 unsigned long (*read_cr3)(void); 206 void (*write_cr3)(unsigned long); 207 208 /* 209 * Hooks for intercepting the creation/use/destruction of an 210 * mm_struct. 211 */ 212 void (*activate_mm)(struct mm_struct *prev, 213 struct mm_struct *next); 214 void (*dup_mmap)(struct mm_struct *oldmm, 215 struct mm_struct *mm); 216 void (*exit_mmap)(struct mm_struct *mm); 217 218 219 /* TLB operations */ 220 void (*flush_tlb_user)(void); 221 void (*flush_tlb_kernel)(void); 222 void (*flush_tlb_one_user)(unsigned long addr); 223 void (*flush_tlb_others)(const struct cpumask *cpus, 224 const struct flush_tlb_info *info); 225 226 void (*tlb_remove_table)(struct mmu_gather *tlb, void *table); 227 228 /* Hooks for allocating and freeing a pagetable top-level */ 229 int (*pgd_alloc)(struct mm_struct *mm); 230 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd); 231 232 /* 233 * Hooks for allocating/releasing pagetable pages when they're 234 * attached to a pagetable 235 */ 236 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn); 237 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn); 238 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn); 239 void (*alloc_p4d)(struct mm_struct *mm, unsigned long pfn); 240 void (*release_pte)(unsigned long pfn); 241 void (*release_pmd)(unsigned long pfn); 242 void (*release_pud)(unsigned long pfn); 243 void (*release_p4d)(unsigned long pfn); 244 245 /* Pagetable manipulation functions */ 246 void (*set_pte)(pte_t *ptep, pte_t pteval); 247 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, 248 pte_t *ptep, pte_t pteval); 249 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); 250 251 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr, 252 pte_t *ptep); 253 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, 254 pte_t *ptep, pte_t pte); 255 256 struct paravirt_callee_save pte_val; 257 struct paravirt_callee_save make_pte; 258 259 struct paravirt_callee_save pgd_val; 260 struct paravirt_callee_save make_pgd; 261 262 #if CONFIG_PGTABLE_LEVELS >= 3 263 #ifdef CONFIG_X86_PAE 264 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); 265 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, 266 pte_t *ptep); 267 void (*pmd_clear)(pmd_t *pmdp); 268 269 #endif /* CONFIG_X86_PAE */ 270 271 void (*set_pud)(pud_t *pudp, pud_t pudval); 272 273 struct paravirt_callee_save pmd_val; 274 struct paravirt_callee_save make_pmd; 275 276 #if CONFIG_PGTABLE_LEVELS >= 4 277 struct paravirt_callee_save pud_val; 278 struct paravirt_callee_save make_pud; 279 280 void (*set_p4d)(p4d_t *p4dp, p4d_t p4dval); 281 282 #if CONFIG_PGTABLE_LEVELS >= 5 283 struct paravirt_callee_save p4d_val; 284 struct paravirt_callee_save make_p4d; 285 286 void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval); 287 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ 288 289 #endif /* CONFIG_PGTABLE_LEVELS >= 4 */ 290 291 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */ 292 293 struct pv_lazy_ops lazy_mode; 294 295 /* dom0 ops */ 296 297 /* Sometimes the physical address is a pfn, and sometimes its 298 an mfn. We can tell which is which from the index. */ 299 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, 300 phys_addr_t phys, pgprot_t flags); 301 } __no_randomize_layout; 302 303 struct arch_spinlock; 304 #ifdef CONFIG_SMP 305 #include <asm/spinlock_types.h> 306 #endif 307 308 struct qspinlock; 309 310 struct pv_lock_ops { 311 void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); 312 struct paravirt_callee_save queued_spin_unlock; 313 314 void (*wait)(u8 *ptr, u8 val); 315 void (*kick)(int cpu); 316 317 struct paravirt_callee_save vcpu_is_preempted; 318 } __no_randomize_layout; 319 320 /* This contains all the paravirt structures: we get a convenient 321 * number for each function using the offset which we use to indicate 322 * what to patch. */ 323 struct paravirt_patch_template { 324 struct pv_init_ops pv_init_ops; 325 struct pv_time_ops pv_time_ops; 326 struct pv_cpu_ops pv_cpu_ops; 327 struct pv_irq_ops pv_irq_ops; 328 struct pv_mmu_ops pv_mmu_ops; 329 struct pv_lock_ops pv_lock_ops; 330 } __no_randomize_layout; 331 332 extern struct pv_info pv_info; 333 extern struct pv_init_ops pv_init_ops; 334 extern struct pv_time_ops pv_time_ops; 335 extern struct pv_cpu_ops pv_cpu_ops; 336 extern struct pv_irq_ops pv_irq_ops; 337 extern struct pv_mmu_ops pv_mmu_ops; 338 extern struct pv_lock_ops pv_lock_ops; 339 340 #define PARAVIRT_PATCH(x) \ 341 (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) 342 343 #define paravirt_type(op) \ 344 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ 345 [paravirt_opptr] "i" (&(op)) 346 #define paravirt_clobber(clobber) \ 347 [paravirt_clobber] "i" (clobber) 348 349 /* 350 * Generate some code, and mark it as patchable by the 351 * apply_paravirt() alternate instruction patcher. 352 */ 353 #define _paravirt_alt(insn_string, type, clobber) \ 354 "771:\n\t" insn_string "\n" "772:\n" \ 355 ".pushsection .parainstructions,\"a\"\n" \ 356 _ASM_ALIGN "\n" \ 357 _ASM_PTR " 771b\n" \ 358 " .byte " type "\n" \ 359 " .byte 772b-771b\n" \ 360 " .short " clobber "\n" \ 361 ".popsection\n" 362 363 /* Generate patchable code, with the default asm parameters. */ 364 #define paravirt_alt(insn_string) \ 365 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") 366 367 /* Simple instruction patching code. */ 368 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t" 369 370 #define DEF_NATIVE(ops, name, code) \ 371 __visible extern const char start_##ops##_##name[], end_##ops##_##name[]; \ 372 asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, name)) 373 374 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len); 375 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len); 376 unsigned paravirt_patch_call(void *insnbuf, 377 const void *target, u16 tgt_clobbers, 378 unsigned long addr, u16 site_clobbers, 379 unsigned len); 380 unsigned paravirt_patch_jmp(void *insnbuf, const void *target, 381 unsigned long addr, unsigned len); 382 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, 383 unsigned long addr, unsigned len); 384 385 unsigned paravirt_patch_insns(void *insnbuf, unsigned len, 386 const char *start, const char *end); 387 388 unsigned native_patch(u8 type, u16 clobbers, void *ibuf, 389 unsigned long addr, unsigned len); 390 391 int paravirt_disable_iospace(void); 392 393 /* 394 * This generates an indirect call based on the operation type number. 395 * The type number, computed in PARAVIRT_PATCH, is derived from the 396 * offset into the paravirt_patch_template structure, and can therefore be 397 * freely converted back into a structure offset. 398 */ 399 #define PARAVIRT_CALL \ 400 ANNOTATE_RETPOLINE_SAFE \ 401 "call *%c[paravirt_opptr];" 402 403 /* 404 * These macros are intended to wrap calls through one of the paravirt 405 * ops structs, so that they can be later identified and patched at 406 * runtime. 407 * 408 * Normally, a call to a pv_op function is a simple indirect call: 409 * (pv_op_struct.operations)(args...). 410 * 411 * Unfortunately, this is a relatively slow operation for modern CPUs, 412 * because it cannot necessarily determine what the destination 413 * address is. In this case, the address is a runtime constant, so at 414 * the very least we can patch the call to e a simple direct call, or 415 * ideally, patch an inline implementation into the callsite. (Direct 416 * calls are essentially free, because the call and return addresses 417 * are completely predictable.) 418 * 419 * For i386, these macros rely on the standard gcc "regparm(3)" calling 420 * convention, in which the first three arguments are placed in %eax, 421 * %edx, %ecx (in that order), and the remaining arguments are placed 422 * on the stack. All caller-save registers (eax,edx,ecx) are expected 423 * to be modified (either clobbered or used for return values). 424 * X86_64, on the other hand, already specifies a register-based calling 425 * conventions, returning at %rax, with parameteres going on %rdi, %rsi, 426 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any 427 * special handling for dealing with 4 arguments, unlike i386. 428 * However, x86_64 also have to clobber all caller saved registers, which 429 * unfortunately, are quite a bit (r8 - r11) 430 * 431 * The call instruction itself is marked by placing its start address 432 * and size into the .parainstructions section, so that 433 * apply_paravirt() in arch/i386/kernel/alternative.c can do the 434 * appropriate patching under the control of the backend pv_init_ops 435 * implementation. 436 * 437 * Unfortunately there's no way to get gcc to generate the args setup 438 * for the call, and then allow the call itself to be generated by an 439 * inline asm. Because of this, we must do the complete arg setup and 440 * return value handling from within these macros. This is fairly 441 * cumbersome. 442 * 443 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. 444 * It could be extended to more arguments, but there would be little 445 * to be gained from that. For each number of arguments, there are 446 * the two VCALL and CALL variants for void and non-void functions. 447 * 448 * When there is a return value, the invoker of the macro must specify 449 * the return type. The macro then uses sizeof() on that type to 450 * determine whether its a 32 or 64 bit value, and places the return 451 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for 452 * 64-bit). For x86_64 machines, it just returns at %rax regardless of 453 * the return value size. 454 * 455 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments 456 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments 457 * in low,high order 458 * 459 * Small structures are passed and returned in registers. The macro 460 * calling convention can't directly deal with this, so the wrapper 461 * functions must do this. 462 * 463 * These PVOP_* macros are only defined within this header. This 464 * means that all uses must be wrapped in inline functions. This also 465 * makes sure the incoming and outgoing types are always correct. 466 */ 467 #ifdef CONFIG_X86_32 468 #define PVOP_VCALL_ARGS \ 469 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx; 470 471 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 472 473 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) 474 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) 475 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) 476 477 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ 478 "=c" (__ecx) 479 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS 480 481 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx) 482 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 483 484 #define EXTRA_CLOBBERS 485 #define VEXTRA_CLOBBERS 486 #else /* CONFIG_X86_64 */ 487 /* [re]ax isn't an arg, but the return val */ 488 #define PVOP_VCALL_ARGS \ 489 unsigned long __edi = __edi, __esi = __esi, \ 490 __edx = __edx, __ecx = __ecx, __eax = __eax; 491 492 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 493 494 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) 495 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) 496 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) 497 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) 498 499 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ 500 "=S" (__esi), "=d" (__edx), \ 501 "=c" (__ecx) 502 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) 503 504 /* void functions are still allowed [re]ax for scratch */ 505 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) 506 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 507 508 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" 509 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" 510 #endif /* CONFIG_X86_32 */ 511 512 #ifdef CONFIG_PARAVIRT_DEBUG 513 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL) 514 #else 515 #define PVOP_TEST_NULL(op) ((void)op) 516 #endif 517 518 #define PVOP_RETMASK(rettype) \ 519 ({ unsigned long __mask = ~0UL; \ 520 switch (sizeof(rettype)) { \ 521 case 1: __mask = 0xffUL; break; \ 522 case 2: __mask = 0xffffUL; break; \ 523 case 4: __mask = 0xffffffffUL; break; \ 524 default: break; \ 525 } \ 526 __mask; \ 527 }) 528 529 530 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \ 531 pre, post, ...) \ 532 ({ \ 533 rettype __ret; \ 534 PVOP_CALL_ARGS; \ 535 PVOP_TEST_NULL(op); \ 536 /* This is 32-bit specific, but is okay in 64-bit */ \ 537 /* since this condition will never hold */ \ 538 if (sizeof(rettype) > sizeof(unsigned long)) { \ 539 asm volatile(pre \ 540 paravirt_alt(PARAVIRT_CALL) \ 541 post \ 542 : call_clbr, ASM_CALL_CONSTRAINT \ 543 : paravirt_type(op), \ 544 paravirt_clobber(clbr), \ 545 ##__VA_ARGS__ \ 546 : "memory", "cc" extra_clbr); \ 547 __ret = (rettype)((((u64)__edx) << 32) | __eax); \ 548 } else { \ 549 asm volatile(pre \ 550 paravirt_alt(PARAVIRT_CALL) \ 551 post \ 552 : call_clbr, ASM_CALL_CONSTRAINT \ 553 : paravirt_type(op), \ 554 paravirt_clobber(clbr), \ 555 ##__VA_ARGS__ \ 556 : "memory", "cc" extra_clbr); \ 557 __ret = (rettype)(__eax & PVOP_RETMASK(rettype)); \ 558 } \ 559 __ret; \ 560 }) 561 562 #define __PVOP_CALL(rettype, op, pre, post, ...) \ 563 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \ 564 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__) 565 566 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ 567 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ 568 PVOP_CALLEE_CLOBBERS, , \ 569 pre, post, ##__VA_ARGS__) 570 571 572 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ 573 ({ \ 574 PVOP_VCALL_ARGS; \ 575 PVOP_TEST_NULL(op); \ 576 asm volatile(pre \ 577 paravirt_alt(PARAVIRT_CALL) \ 578 post \ 579 : call_clbr, ASM_CALL_CONSTRAINT \ 580 : paravirt_type(op), \ 581 paravirt_clobber(clbr), \ 582 ##__VA_ARGS__ \ 583 : "memory", "cc" extra_clbr); \ 584 }) 585 586 #define __PVOP_VCALL(op, pre, post, ...) \ 587 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \ 588 VEXTRA_CLOBBERS, \ 589 pre, post, ##__VA_ARGS__) 590 591 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \ 592 ____PVOP_VCALL(op.func, CLBR_RET_REG, \ 593 PVOP_VCALLEE_CLOBBERS, , \ 594 pre, post, ##__VA_ARGS__) 595 596 597 598 #define PVOP_CALL0(rettype, op) \ 599 __PVOP_CALL(rettype, op, "", "") 600 #define PVOP_VCALL0(op) \ 601 __PVOP_VCALL(op, "", "") 602 603 #define PVOP_CALLEE0(rettype, op) \ 604 __PVOP_CALLEESAVE(rettype, op, "", "") 605 #define PVOP_VCALLEE0(op) \ 606 __PVOP_VCALLEESAVE(op, "", "") 607 608 609 #define PVOP_CALL1(rettype, op, arg1) \ 610 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 611 #define PVOP_VCALL1(op, arg1) \ 612 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1)) 613 614 #define PVOP_CALLEE1(rettype, op, arg1) \ 615 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 616 #define PVOP_VCALLEE1(op, arg1) \ 617 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1)) 618 619 620 #define PVOP_CALL2(rettype, op, arg1, arg2) \ 621 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 622 PVOP_CALL_ARG2(arg2)) 623 #define PVOP_VCALL2(op, arg1, arg2) \ 624 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 625 PVOP_CALL_ARG2(arg2)) 626 627 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \ 628 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 629 PVOP_CALL_ARG2(arg2)) 630 #define PVOP_VCALLEE2(op, arg1, arg2) \ 631 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \ 632 PVOP_CALL_ARG2(arg2)) 633 634 635 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ 636 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 637 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 638 #define PVOP_VCALL3(op, arg1, arg2, arg3) \ 639 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 640 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 641 642 /* This is the only difference in x86_64. We can make it much simpler */ 643 #ifdef CONFIG_X86_32 644 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 645 __PVOP_CALL(rettype, op, \ 646 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 647 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 648 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4))) 649 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 650 __PVOP_VCALL(op, \ 651 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 652 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ 653 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) 654 #else 655 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 656 __PVOP_CALL(rettype, op, "", "", \ 657 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 658 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 659 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 660 __PVOP_VCALL(op, "", "", \ 661 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 662 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 663 #endif 664 665 /* Lazy mode for batching updates / context switch */ 666 enum paravirt_lazy_mode { 667 PARAVIRT_LAZY_NONE, 668 PARAVIRT_LAZY_MMU, 669 PARAVIRT_LAZY_CPU, 670 }; 671 672 enum paravirt_lazy_mode paravirt_get_lazy_mode(void); 673 void paravirt_start_context_switch(struct task_struct *prev); 674 void paravirt_end_context_switch(struct task_struct *next); 675 676 void paravirt_enter_lazy_mmu(void); 677 void paravirt_leave_lazy_mmu(void); 678 void paravirt_flush_lazy_mmu(void); 679 680 void _paravirt_nop(void); 681 u32 _paravirt_ident_32(u32); 682 u64 _paravirt_ident_64(u64); 683 684 #define paravirt_nop ((void *)_paravirt_nop) 685 686 /* These all sit in the .parainstructions section to tell us what to patch. */ 687 struct paravirt_patch_site { 688 u8 *instr; /* original instructions */ 689 u8 instrtype; /* type of this instruction */ 690 u8 len; /* length of original instruction */ 691 u16 clobbers; /* what registers you may clobber */ 692 }; 693 694 extern struct paravirt_patch_site __parainstructions[], 695 __parainstructions_end[]; 696 697 #endif /* __ASSEMBLY__ */ 698 699 #endif /* _ASM_X86_PARAVIRT_TYPES_H */ 700
