1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28
29 #include <linux/pci.h>
30 #include <linux/pm_runtime.h>
31
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_device.h>
34 #include <drm/drm_irq.h>
35 #include <drm/drm_probe_helper.h>
36 #include <drm/drm_vblank.h>
37 #include <drm/radeon_drm.h>
38
39 #include "atom.h"
40 #include "radeon.h"
41 #include "radeon_reg.h"
42
43
44 #define RADEON_WAIT_IDLE_TIMEOUT 200
45
46 /**
47 * radeon_driver_irq_handler_kms - irq handler for KMS
48 *
49 * @int irq, void *arg: args
50 *
51 * This is the irq handler for the radeon KMS driver (all asics).
52 * radeon_irq_process is a macro that points to the per-asic
53 * irq handler callback.
54 */
radeon_driver_irq_handler_kms(int irq,void * arg)55 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
56 {
57 struct drm_device *dev = (struct drm_device *) arg;
58 struct radeon_device *rdev = dev->dev_private;
59 irqreturn_t ret;
60
61 ret = radeon_irq_process(rdev);
62 if (ret == IRQ_HANDLED)
63 pm_runtime_mark_last_busy(dev->dev);
64 return ret;
65 }
66
67 /*
68 * Handle hotplug events outside the interrupt handler proper.
69 */
70 /**
71 * radeon_hotplug_work_func - display hotplug work handler
72 *
73 * @work: work struct
74 *
75 * This is the hot plug event work handler (all asics).
76 * The work gets scheduled from the irq handler if there
77 * was a hot plug interrupt. It walks the connector table
78 * and calls the hotplug handler for each one, then sends
79 * a drm hotplug event to alert userspace.
80 */
radeon_hotplug_work_func(struct work_struct * work)81 static void radeon_hotplug_work_func(struct work_struct *work)
82 {
83 struct radeon_device *rdev = container_of(work, struct radeon_device,
84 hotplug_work.work);
85 struct drm_device *dev = rdev->ddev;
86 struct drm_mode_config *mode_config = &dev->mode_config;
87 struct drm_connector *connector;
88
89 /* we can race here at startup, some boards seem to trigger
90 * hotplug irqs when they shouldn't. */
91 if (!rdev->mode_info.mode_config_initialized)
92 return;
93
94 mutex_lock(&mode_config->mutex);
95 list_for_each_entry(connector, &mode_config->connector_list, head)
96 radeon_connector_hotplug(connector);
97 mutex_unlock(&mode_config->mutex);
98 /* Just fire off a uevent and let userspace tell us what to do */
99 drm_helper_hpd_irq_event(dev);
100 }
101
radeon_dp_work_func(struct work_struct * work)102 static void radeon_dp_work_func(struct work_struct *work)
103 {
104 struct radeon_device *rdev = container_of(work, struct radeon_device,
105 dp_work);
106 struct drm_device *dev = rdev->ddev;
107 struct drm_mode_config *mode_config = &dev->mode_config;
108 struct drm_connector *connector;
109
110 /* this should take a mutex */
111 list_for_each_entry(connector, &mode_config->connector_list, head)
112 radeon_connector_hotplug(connector);
113 }
114 /**
115 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
116 *
117 * @dev: drm dev pointer
118 *
119 * Gets the hw ready to enable irqs (all asics).
120 * This function disables all interrupt sources on the GPU.
121 */
radeon_driver_irq_preinstall_kms(struct drm_device * dev)122 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
123 {
124 struct radeon_device *rdev = dev->dev_private;
125 unsigned long irqflags;
126 unsigned i;
127
128 spin_lock_irqsave(&rdev->irq.lock, irqflags);
129 /* Disable *all* interrupts */
130 for (i = 0; i < RADEON_NUM_RINGS; i++)
131 atomic_set(&rdev->irq.ring_int[i], 0);
132 rdev->irq.dpm_thermal = false;
133 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
134 rdev->irq.hpd[i] = false;
135 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
136 rdev->irq.crtc_vblank_int[i] = false;
137 atomic_set(&rdev->irq.pflip[i], 0);
138 rdev->irq.afmt[i] = false;
139 }
140 radeon_irq_set(rdev);
141 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
142 /* Clear bits */
143 radeon_irq_process(rdev);
144 }
145
146 /**
147 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
148 *
149 * @dev: drm dev pointer
150 *
151 * Handles stuff to be done after enabling irqs (all asics).
152 * Returns 0 on success.
153 */
radeon_driver_irq_postinstall_kms(struct drm_device * dev)154 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
155 {
156 struct radeon_device *rdev = dev->dev_private;
157
158 if (ASIC_IS_AVIVO(rdev))
159 dev->max_vblank_count = 0x00ffffff;
160 else
161 dev->max_vblank_count = 0x001fffff;
162
163 return 0;
164 }
165
166 /**
167 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
168 *
169 * @dev: drm dev pointer
170 *
171 * This function disables all interrupt sources on the GPU (all asics).
172 */
radeon_driver_irq_uninstall_kms(struct drm_device * dev)173 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
174 {
175 struct radeon_device *rdev = dev->dev_private;
176 unsigned long irqflags;
177 unsigned i;
178
179 if (rdev == NULL) {
180 return;
181 }
182 spin_lock_irqsave(&rdev->irq.lock, irqflags);
183 /* Disable *all* interrupts */
184 for (i = 0; i < RADEON_NUM_RINGS; i++)
185 atomic_set(&rdev->irq.ring_int[i], 0);
186 rdev->irq.dpm_thermal = false;
187 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
188 rdev->irq.hpd[i] = false;
189 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
190 rdev->irq.crtc_vblank_int[i] = false;
191 atomic_set(&rdev->irq.pflip[i], 0);
192 rdev->irq.afmt[i] = false;
193 }
194 radeon_irq_set(rdev);
195 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
196 }
197
198 /**
199 * radeon_msi_ok - asic specific msi checks
200 *
201 * @rdev: radeon device pointer
202 *
203 * Handles asic specific MSI checks to determine if
204 * MSIs should be enabled on a particular chip (all asics).
205 * Returns true if MSIs should be enabled, false if MSIs
206 * should not be enabled.
207 */
radeon_msi_ok(struct radeon_device * rdev)208 static bool radeon_msi_ok(struct radeon_device *rdev)
209 {
210 /* RV370/RV380 was first asic with MSI support */
211 if (rdev->family < CHIP_RV380)
212 return false;
213
214 /* MSIs don't work on AGP */
215 if (rdev->flags & RADEON_IS_AGP)
216 return false;
217
218 /*
219 * Older chips have a HW limitation, they can only generate 40 bits
220 * of address for "64-bit" MSIs which breaks on some platforms, notably
221 * IBM POWER servers, so we limit them
222 */
223 if (rdev->family < CHIP_BONAIRE) {
224 dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
225 rdev->pdev->no_64bit_msi = 1;
226 }
227
228 /* force MSI on */
229 if (radeon_msi == 1)
230 return true;
231 else if (radeon_msi == 0)
232 return false;
233
234 /* Quirks */
235 /* HP RS690 only seems to work with MSIs. */
236 if ((rdev->pdev->device == 0x791f) &&
237 (rdev->pdev->subsystem_vendor == 0x103c) &&
238 (rdev->pdev->subsystem_device == 0x30c2))
239 return true;
240
241 /* Dell RS690 only seems to work with MSIs. */
242 if ((rdev->pdev->device == 0x791f) &&
243 (rdev->pdev->subsystem_vendor == 0x1028) &&
244 (rdev->pdev->subsystem_device == 0x01fc))
245 return true;
246
247 /* Dell RS690 only seems to work with MSIs. */
248 if ((rdev->pdev->device == 0x791f) &&
249 (rdev->pdev->subsystem_vendor == 0x1028) &&
250 (rdev->pdev->subsystem_device == 0x01fd))
251 return true;
252
253 /* Gateway RS690 only seems to work with MSIs. */
254 if ((rdev->pdev->device == 0x791f) &&
255 (rdev->pdev->subsystem_vendor == 0x107b) &&
256 (rdev->pdev->subsystem_device == 0x0185))
257 return true;
258
259 /* try and enable MSIs by default on all RS690s */
260 if (rdev->family == CHIP_RS690)
261 return true;
262
263 /* RV515 seems to have MSI issues where it loses
264 * MSI rearms occasionally. This leads to lockups and freezes.
265 * disable it by default.
266 */
267 if (rdev->family == CHIP_RV515)
268 return false;
269 if (rdev->flags & RADEON_IS_IGP) {
270 /* APUs work fine with MSIs */
271 if (rdev->family >= CHIP_PALM)
272 return true;
273 /* lots of IGPs have problems with MSIs */
274 return false;
275 }
276
277 return true;
278 }
279
280 /**
281 * radeon_irq_kms_init - init driver interrupt info
282 *
283 * @rdev: radeon device pointer
284 *
285 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
286 * Returns 0 for success, error for failure.
287 */
radeon_irq_kms_init(struct radeon_device * rdev)288 int radeon_irq_kms_init(struct radeon_device *rdev)
289 {
290 int r = 0;
291
292 spin_lock_init(&rdev->irq.lock);
293
294 /* Disable vblank irqs aggressively for power-saving */
295 rdev->ddev->vblank_disable_immediate = true;
296
297 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
298 if (r) {
299 return r;
300 }
301
302 /* enable msi */
303 rdev->msi_enabled = 0;
304
305 if (radeon_msi_ok(rdev)) {
306 int ret = pci_enable_msi(rdev->pdev);
307 if (!ret) {
308 rdev->msi_enabled = 1;
309 dev_info(rdev->dev, "radeon: using MSI.\n");
310 }
311 }
312
313 INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
314 INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
315 INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
316
317 rdev->irq.installed = true;
318 r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
319 if (r) {
320 rdev->irq.installed = false;
321 flush_delayed_work(&rdev->hotplug_work);
322 return r;
323 }
324
325 DRM_INFO("radeon: irq initialized.\n");
326 return 0;
327 }
328
329 /**
330 * radeon_irq_kms_fini - tear down driver interrupt info
331 *
332 * @rdev: radeon device pointer
333 *
334 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
335 */
radeon_irq_kms_fini(struct radeon_device * rdev)336 void radeon_irq_kms_fini(struct radeon_device *rdev)
337 {
338 if (rdev->irq.installed) {
339 drm_irq_uninstall(rdev->ddev);
340 rdev->irq.installed = false;
341 if (rdev->msi_enabled)
342 pci_disable_msi(rdev->pdev);
343 flush_delayed_work(&rdev->hotplug_work);
344 }
345 }
346
347 /**
348 * radeon_irq_kms_sw_irq_get - enable software interrupt
349 *
350 * @rdev: radeon device pointer
351 * @ring: ring whose interrupt you want to enable
352 *
353 * Enables the software interrupt for a specific ring (all asics).
354 * The software interrupt is generally used to signal a fence on
355 * a particular ring.
356 */
radeon_irq_kms_sw_irq_get(struct radeon_device * rdev,int ring)357 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
358 {
359 unsigned long irqflags;
360
361 if (!rdev->ddev->irq_enabled)
362 return;
363
364 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
365 spin_lock_irqsave(&rdev->irq.lock, irqflags);
366 radeon_irq_set(rdev);
367 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
368 }
369 }
370
371 /**
372 * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
373 *
374 * @rdev: radeon device pointer
375 * @ring: ring whose interrupt you want to enable
376 *
377 * Enables the software interrupt for a specific ring (all asics).
378 * The software interrupt is generally used to signal a fence on
379 * a particular ring.
380 */
radeon_irq_kms_sw_irq_get_delayed(struct radeon_device * rdev,int ring)381 bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
382 {
383 return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
384 }
385
386 /**
387 * radeon_irq_kms_sw_irq_put - disable software interrupt
388 *
389 * @rdev: radeon device pointer
390 * @ring: ring whose interrupt you want to disable
391 *
392 * Disables the software interrupt for a specific ring (all asics).
393 * The software interrupt is generally used to signal a fence on
394 * a particular ring.
395 */
radeon_irq_kms_sw_irq_put(struct radeon_device * rdev,int ring)396 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
397 {
398 unsigned long irqflags;
399
400 if (!rdev->ddev->irq_enabled)
401 return;
402
403 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
404 spin_lock_irqsave(&rdev->irq.lock, irqflags);
405 radeon_irq_set(rdev);
406 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
407 }
408 }
409
410 /**
411 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
412 *
413 * @rdev: radeon device pointer
414 * @crtc: crtc whose interrupt you want to enable
415 *
416 * Enables the pageflip interrupt for a specific crtc (all asics).
417 * For pageflips we use the vblank interrupt source.
418 */
radeon_irq_kms_pflip_irq_get(struct radeon_device * rdev,int crtc)419 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
420 {
421 unsigned long irqflags;
422
423 if (crtc < 0 || crtc >= rdev->num_crtc)
424 return;
425
426 if (!rdev->ddev->irq_enabled)
427 return;
428
429 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
430 spin_lock_irqsave(&rdev->irq.lock, irqflags);
431 radeon_irq_set(rdev);
432 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
433 }
434 }
435
436 /**
437 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
438 *
439 * @rdev: radeon device pointer
440 * @crtc: crtc whose interrupt you want to disable
441 *
442 * Disables the pageflip interrupt for a specific crtc (all asics).
443 * For pageflips we use the vblank interrupt source.
444 */
radeon_irq_kms_pflip_irq_put(struct radeon_device * rdev,int crtc)445 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
446 {
447 unsigned long irqflags;
448
449 if (crtc < 0 || crtc >= rdev->num_crtc)
450 return;
451
452 if (!rdev->ddev->irq_enabled)
453 return;
454
455 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
456 spin_lock_irqsave(&rdev->irq.lock, irqflags);
457 radeon_irq_set(rdev);
458 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
459 }
460 }
461
462 /**
463 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
464 *
465 * @rdev: radeon device pointer
466 * @block: afmt block whose interrupt you want to enable
467 *
468 * Enables the afmt change interrupt for a specific afmt block (all asics).
469 */
radeon_irq_kms_enable_afmt(struct radeon_device * rdev,int block)470 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
471 {
472 unsigned long irqflags;
473
474 if (!rdev->ddev->irq_enabled)
475 return;
476
477 spin_lock_irqsave(&rdev->irq.lock, irqflags);
478 rdev->irq.afmt[block] = true;
479 radeon_irq_set(rdev);
480 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
481
482 }
483
484 /**
485 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
486 *
487 * @rdev: radeon device pointer
488 * @block: afmt block whose interrupt you want to disable
489 *
490 * Disables the afmt change interrupt for a specific afmt block (all asics).
491 */
radeon_irq_kms_disable_afmt(struct radeon_device * rdev,int block)492 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
493 {
494 unsigned long irqflags;
495
496 if (!rdev->ddev->irq_enabled)
497 return;
498
499 spin_lock_irqsave(&rdev->irq.lock, irqflags);
500 rdev->irq.afmt[block] = false;
501 radeon_irq_set(rdev);
502 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
503 }
504
505 /**
506 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
507 *
508 * @rdev: radeon device pointer
509 * @hpd_mask: mask of hpd pins you want to enable.
510 *
511 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
512 */
radeon_irq_kms_enable_hpd(struct radeon_device * rdev,unsigned hpd_mask)513 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
514 {
515 unsigned long irqflags;
516 int i;
517
518 if (!rdev->ddev->irq_enabled)
519 return;
520
521 spin_lock_irqsave(&rdev->irq.lock, irqflags);
522 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
523 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
524 radeon_irq_set(rdev);
525 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
526 }
527
528 /**
529 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
530 *
531 * @rdev: radeon device pointer
532 * @hpd_mask: mask of hpd pins you want to disable.
533 *
534 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
535 */
radeon_irq_kms_disable_hpd(struct radeon_device * rdev,unsigned hpd_mask)536 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
537 {
538 unsigned long irqflags;
539 int i;
540
541 if (!rdev->ddev->irq_enabled)
542 return;
543
544 spin_lock_irqsave(&rdev->irq.lock, irqflags);
545 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
546 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
547 radeon_irq_set(rdev);
548 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
549 }
550
551 /**
552 * radeon_irq_kms_update_int_n - helper for updating interrupt enable registers
553 *
554 * @rdev: radeon device pointer
555 * @reg: the register to write to enable/disable interrupts
556 * @mask: the mask that enables the interrupts
557 * @enable: whether to enable or disable the interrupt register
558 * @name: the name of the interrupt register to print to the kernel log
559 * @num: the number of the interrupt register to print to the kernel log
560 *
561 * Helper for updating the enable state of interrupt registers. Checks whether
562 * or not the interrupt matches the enable state we want. If it doesn't, then
563 * we update it and print a debugging message to the kernel log indicating the
564 * new state of the interrupt register.
565 *
566 * Used for updating sequences of interrupts registers like HPD1, HPD2, etc.
567 */
radeon_irq_kms_set_irq_n_enabled(struct radeon_device * rdev,u32 reg,u32 mask,bool enable,const char * name,unsigned n)568 void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev,
569 u32 reg, u32 mask,
570 bool enable, const char *name, unsigned n)
571 {
572 u32 tmp = RREG32(reg);
573
574 /* Interrupt state didn't change */
575 if (!!(tmp & mask) == enable)
576 return;
577
578 if (enable) {
579 DRM_DEBUG("%s%d interrupts enabled\n", name, n);
580 WREG32(reg, tmp |= mask);
581 } else {
582 DRM_DEBUG("%s%d interrupts disabled\n", name, n);
583 WREG32(reg, tmp & ~mask);
584 }
585 }
586
