1 /*
2  * bpf_jit32.h: BPF JIT compiler for PPC
3  *
4  * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
5  *
6  * Split from bpf_jit.h
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; version 2
11  * of the License.
12  */
13 #ifndef _BPF_JIT32_H
14 #define _BPF_JIT32_H
15 
16 #include <asm/asm-compat.h>
17 #include "bpf_jit.h"
18 
19 #ifdef CONFIG_PPC64
20 #define BPF_PPC_STACK_R3_OFF	48
21 #define BPF_PPC_STACK_LOCALS	32
22 #define BPF_PPC_STACK_BASIC	(48+64)
23 #define BPF_PPC_STACK_SAVE	(18*8)
24 #define BPF_PPC_STACKFRAME	(BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \
25 				 BPF_PPC_STACK_SAVE)
26 #define BPF_PPC_SLOWPATH_FRAME	(48+64)
27 #else
28 #define BPF_PPC_STACK_R3_OFF	24
29 #define BPF_PPC_STACK_LOCALS	16
30 #define BPF_PPC_STACK_BASIC	(24+32)
31 #define BPF_PPC_STACK_SAVE	(18*4)
32 #define BPF_PPC_STACKFRAME	(BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \
33 				 BPF_PPC_STACK_SAVE)
34 #define BPF_PPC_SLOWPATH_FRAME	(24+32)
35 #endif
36 
37 #define REG_SZ         (BITS_PER_LONG/8)
38 
39 /*
40  * Generated code register usage:
41  *
42  * As normal PPC C ABI (e.g. r1=sp, r2=TOC), with:
43  *
44  * skb		r3	(Entry parameter)
45  * A register	r4
46  * X register	r5
47  * addr param	r6
48  * r7-r10	scratch
49  * skb->data	r14
50  * skb headlen	r15	(skb->len - skb->data_len)
51  * m[0]		r16
52  * m[...]	...
53  * m[15]	r31
54  */
55 #define r_skb		3
56 #define r_ret		3
57 #define r_A		4
58 #define r_X		5
59 #define r_addr		6
60 #define r_scratch1	7
61 #define r_scratch2	8
62 #define r_D		14
63 #define r_HL		15
64 #define r_M		16
65 
66 #ifndef __ASSEMBLY__
67 
68 /*
69  * Assembly helpers from arch/powerpc/net/bpf_jit.S:
70  */
71 #define DECLARE_LOAD_FUNC(func)	\
72 	extern u8 func[], func##_negative_offset[], func##_positive_offset[]
73 
74 DECLARE_LOAD_FUNC(sk_load_word);
75 DECLARE_LOAD_FUNC(sk_load_half);
76 DECLARE_LOAD_FUNC(sk_load_byte);
77 DECLARE_LOAD_FUNC(sk_load_byte_msh);
78 
79 #define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i);   \
80 		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
81 			PPC_LBZ(r, r, IMM_L(i)); } } while(0)
82 
83 #define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i);     \
84 		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
85 			PPC_LD(r, r, IMM_L(i)); } } while(0)
86 
87 #define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i);   \
88 		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
89 			PPC_LWZ(r, r, IMM_L(i)); } } while(0)
90 
91 #define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i);   \
92 		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
93 			PPC_LHZ(r, r, IMM_L(i)); } } while(0)
94 
95 #ifdef CONFIG_PPC64
96 #define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0)
97 #else
98 #define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0)
99 #endif
100 
101 #ifdef CONFIG_SMP
102 #ifdef CONFIG_PPC64
103 #define PPC_BPF_LOAD_CPU(r)		\
104 	do { BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct, paca_index) != 2);	\
105 		PPC_LHZ_OFFS(r, 13, offsetof(struct paca_struct, paca_index));	\
106 	} while (0)
107 #else
108 #define PPC_BPF_LOAD_CPU(r)     \
109 	do { BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);		\
110 		PPC_LHZ_OFFS(r, (1 & ~(THREAD_SIZE - 1)),			\
111 				offsetof(struct thread_info, cpu));		\
112 	} while(0)
113 #endif
114 #else
115 #define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0)
116 #endif
117 
118 #define PPC_LHBRX_OFFS(r, base, i) \
119 		do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0)
120 #ifdef __LITTLE_ENDIAN__
121 #define PPC_NTOHS_OFFS(r, base, i)	PPC_LHBRX_OFFS(r, base, i)
122 #else
123 #define PPC_NTOHS_OFFS(r, base, i)	PPC_LHZ_OFFS(r, base, i)
124 #endif
125 
126 #define SEEN_DATAREF 0x10000 /* might call external helpers */
127 #define SEEN_XREG    0x20000 /* X reg is used */
128 #define SEEN_MEM     0x40000 /* SEEN_MEM+(1<<n) = use mem[n] for temporary
129 			      * storage */
130 #define SEEN_MEM_MSK 0x0ffff
131 
132 struct codegen_context {
133 	unsigned int seen;
134 	unsigned int idx;
135 	int pc_ret0; /* bpf index of first RET #0 instruction (if any) */
136 };
137 
138 #endif
139 
140 #endif
141