1 /* QLogic qede NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32 #include <linux/netdevice.h>
33 #include <linux/etherdevice.h>
34 #include <linux/skbuff.h>
35 #include <linux/bpf_trace.h>
36 #include <net/udp_tunnel.h>
37 #include <linux/ip.h>
38 #include <net/ipv6.h>
39 #include <net/tcp.h>
40 #include <linux/if_ether.h>
41 #include <linux/if_vlan.h>
42 #include <net/ip6_checksum.h>
43 #include "qede_ptp.h"
44
45 #include <linux/qed/qed_if.h>
46 #include "qede.h"
47 /*********************************
48 * Content also used by slowpath *
49 *********************************/
50
qede_alloc_rx_buffer(struct qede_rx_queue * rxq,bool allow_lazy)51 int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy)
52 {
53 struct sw_rx_data *sw_rx_data;
54 struct eth_rx_bd *rx_bd;
55 dma_addr_t mapping;
56 struct page *data;
57
58 /* In case lazy-allocation is allowed, postpone allocation until the
59 * end of the NAPI run. We'd still need to make sure the Rx ring has
60 * sufficient buffers to guarantee an additional Rx interrupt.
61 */
62 if (allow_lazy && likely(rxq->filled_buffers > 12)) {
63 rxq->filled_buffers--;
64 return 0;
65 }
66
67 data = alloc_pages(GFP_ATOMIC, 0);
68 if (unlikely(!data))
69 return -ENOMEM;
70
71 /* Map the entire page as it would be used
72 * for multiple RX buffer segment size mapping.
73 */
74 mapping = dma_map_page(rxq->dev, data, 0,
75 PAGE_SIZE, rxq->data_direction);
76 if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
77 __free_page(data);
78 return -ENOMEM;
79 }
80
81 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
82 sw_rx_data->page_offset = 0;
83 sw_rx_data->data = data;
84 sw_rx_data->mapping = mapping;
85
86 /* Advance PROD and get BD pointer */
87 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
88 WARN_ON(!rx_bd);
89 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
90 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping) +
91 rxq->rx_headroom);
92
93 rxq->sw_rx_prod++;
94 rxq->filled_buffers++;
95
96 return 0;
97 }
98
99 /* Unmap the data and free skb */
qede_free_tx_pkt(struct qede_dev * edev,struct qede_tx_queue * txq,int * len)100 int qede_free_tx_pkt(struct qede_dev *edev, struct qede_tx_queue *txq, int *len)
101 {
102 u16 idx = txq->sw_tx_cons;
103 struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
104 struct eth_tx_1st_bd *first_bd;
105 struct eth_tx_bd *tx_data_bd;
106 int bds_consumed = 0;
107 int nbds;
108 bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
109 int i, split_bd_len = 0;
110
111 if (unlikely(!skb)) {
112 DP_ERR(edev,
113 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
114 idx, txq->sw_tx_cons, txq->sw_tx_prod);
115 return -1;
116 }
117
118 *len = skb->len;
119
120 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
121
122 bds_consumed++;
123
124 nbds = first_bd->data.nbds;
125
126 if (data_split) {
127 struct eth_tx_bd *split = (struct eth_tx_bd *)
128 qed_chain_consume(&txq->tx_pbl);
129 split_bd_len = BD_UNMAP_LEN(split);
130 bds_consumed++;
131 }
132 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
133 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
134
135 /* Unmap the data of the skb frags */
136 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
137 tx_data_bd = (struct eth_tx_bd *)
138 qed_chain_consume(&txq->tx_pbl);
139 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
140 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
141 }
142
143 while (bds_consumed++ < nbds)
144 qed_chain_consume(&txq->tx_pbl);
145
146 /* Free skb */
147 dev_kfree_skb_any(skb);
148 txq->sw_tx_ring.skbs[idx].skb = NULL;
149 txq->sw_tx_ring.skbs[idx].flags = 0;
150
151 return 0;
152 }
153
154 /* Unmap the data and free skb when mapping failed during start_xmit */
qede_free_failed_tx_pkt(struct qede_tx_queue * txq,struct eth_tx_1st_bd * first_bd,int nbd,bool data_split)155 static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
156 struct eth_tx_1st_bd *first_bd,
157 int nbd, bool data_split)
158 {
159 u16 idx = txq->sw_tx_prod;
160 struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
161 struct eth_tx_bd *tx_data_bd;
162 int i, split_bd_len = 0;
163
164 /* Return prod to its position before this skb was handled */
165 qed_chain_set_prod(&txq->tx_pbl,
166 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
167
168 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
169
170 if (data_split) {
171 struct eth_tx_bd *split = (struct eth_tx_bd *)
172 qed_chain_produce(&txq->tx_pbl);
173 split_bd_len = BD_UNMAP_LEN(split);
174 nbd--;
175 }
176
177 dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
178 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
179
180 /* Unmap the data of the skb frags */
181 for (i = 0; i < nbd; i++) {
182 tx_data_bd = (struct eth_tx_bd *)
183 qed_chain_produce(&txq->tx_pbl);
184 if (tx_data_bd->nbytes)
185 dma_unmap_page(txq->dev,
186 BD_UNMAP_ADDR(tx_data_bd),
187 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
188 }
189
190 /* Return again prod to its position before this skb was handled */
191 qed_chain_set_prod(&txq->tx_pbl,
192 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
193
194 /* Free skb */
195 dev_kfree_skb_any(skb);
196 txq->sw_tx_ring.skbs[idx].skb = NULL;
197 txq->sw_tx_ring.skbs[idx].flags = 0;
198 }
199
qede_xmit_type(struct sk_buff * skb,int * ipv6_ext)200 static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
201 {
202 u32 rc = XMIT_L4_CSUM;
203 __be16 l3_proto;
204
205 if (skb->ip_summed != CHECKSUM_PARTIAL)
206 return XMIT_PLAIN;
207
208 l3_proto = vlan_get_protocol(skb);
209 if (l3_proto == htons(ETH_P_IPV6) &&
210 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
211 *ipv6_ext = 1;
212
213 if (skb->encapsulation) {
214 rc |= XMIT_ENC;
215 if (skb_is_gso(skb)) {
216 unsigned short gso_type = skb_shinfo(skb)->gso_type;
217
218 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
219 (gso_type & SKB_GSO_GRE_CSUM))
220 rc |= XMIT_ENC_GSO_L4_CSUM;
221
222 rc |= XMIT_LSO;
223 return rc;
224 }
225 }
226
227 if (skb_is_gso(skb))
228 rc |= XMIT_LSO;
229
230 return rc;
231 }
232
qede_set_params_for_ipv6_ext(struct sk_buff * skb,struct eth_tx_2nd_bd * second_bd,struct eth_tx_3rd_bd * third_bd)233 static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
234 struct eth_tx_2nd_bd *second_bd,
235 struct eth_tx_3rd_bd *third_bd)
236 {
237 u8 l4_proto;
238 u16 bd2_bits1 = 0, bd2_bits2 = 0;
239
240 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
241
242 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
243 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
244 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
245
246 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
247 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
248
249 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
250 l4_proto = ipv6_hdr(skb)->nexthdr;
251 else
252 l4_proto = ip_hdr(skb)->protocol;
253
254 if (l4_proto == IPPROTO_UDP)
255 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
256
257 if (third_bd)
258 third_bd->data.bitfields |=
259 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
260 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
261 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
262
263 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
264 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
265 }
266
map_frag_to_bd(struct qede_tx_queue * txq,skb_frag_t * frag,struct eth_tx_bd * bd)267 static int map_frag_to_bd(struct qede_tx_queue *txq,
268 skb_frag_t *frag, struct eth_tx_bd *bd)
269 {
270 dma_addr_t mapping;
271
272 /* Map skb non-linear frag data for DMA */
273 mapping = skb_frag_dma_map(txq->dev, frag, 0,
274 skb_frag_size(frag), DMA_TO_DEVICE);
275 if (unlikely(dma_mapping_error(txq->dev, mapping)))
276 return -ENOMEM;
277
278 /* Setup the data pointer of the frag data */
279 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
280
281 return 0;
282 }
283
qede_get_skb_hlen(struct sk_buff * skb,bool is_encap_pkt)284 static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
285 {
286 if (is_encap_pkt)
287 return (skb_inner_transport_header(skb) +
288 inner_tcp_hdrlen(skb) - skb->data);
289 else
290 return (skb_transport_header(skb) +
291 tcp_hdrlen(skb) - skb->data);
292 }
293
294 /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
295 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
qede_pkt_req_lin(struct sk_buff * skb,u8 xmit_type)296 static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
297 {
298 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
299
300 if (xmit_type & XMIT_LSO) {
301 int hlen;
302
303 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
304
305 /* linear payload would require its own BD */
306 if (skb_headlen(skb) > hlen)
307 allowed_frags--;
308 }
309
310 return (skb_shinfo(skb)->nr_frags > allowed_frags);
311 }
312 #endif
313
qede_update_tx_producer(struct qede_tx_queue * txq)314 static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
315 {
316 /* wmb makes sure that the BDs data is updated before updating the
317 * producer, otherwise FW may read old data from the BDs.
318 */
319 wmb();
320 barrier();
321 writel(txq->tx_db.raw, txq->doorbell_addr);
322
323 /* Fence required to flush the write combined buffer, since another
324 * CPU may write to the same doorbell address and data may be lost
325 * due to relaxed order nature of write combined bar.
326 */
327 wmb();
328 }
329
qede_xdp_xmit(struct qede_dev * edev,struct qede_fastpath * fp,struct sw_rx_data * metadata,u16 padding,u16 length)330 static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
331 struct sw_rx_data *metadata, u16 padding, u16 length)
332 {
333 struct qede_tx_queue *txq = fp->xdp_tx;
334 struct eth_tx_1st_bd *first_bd;
335 u16 idx = txq->sw_tx_prod;
336 u16 val;
337
338 if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
339 txq->stopped_cnt++;
340 return -ENOMEM;
341 }
342
343 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
344
345 memset(first_bd, 0, sizeof(*first_bd));
346 first_bd->data.bd_flags.bitfields =
347 BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
348
349 val = (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
350 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
351
352 first_bd->data.bitfields |= cpu_to_le16(val);
353 first_bd->data.nbds = 1;
354
355 /* We can safely ignore the offset, as it's 0 for XDP */
356 BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
357
358 /* Synchronize the buffer back to device, as program [probably]
359 * has changed it.
360 */
361 dma_sync_single_for_device(&edev->pdev->dev,
362 metadata->mapping + padding,
363 length, PCI_DMA_TODEVICE);
364
365 txq->sw_tx_ring.xdp[idx].page = metadata->data;
366 txq->sw_tx_ring.xdp[idx].mapping = metadata->mapping;
367 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
368
369 /* Mark the fastpath for future XDP doorbell */
370 fp->xdp_xmit = 1;
371
372 return 0;
373 }
374
qede_txq_has_work(struct qede_tx_queue * txq)375 int qede_txq_has_work(struct qede_tx_queue *txq)
376 {
377 u16 hw_bd_cons;
378
379 /* Tell compiler that consumer and producer can change */
380 barrier();
381 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
382 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
383 return 0;
384
385 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
386 }
387
qede_xdp_tx_int(struct qede_dev * edev,struct qede_tx_queue * txq)388 static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
389 {
390 u16 hw_bd_cons, idx;
391
392 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
393 barrier();
394
395 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
396 qed_chain_consume(&txq->tx_pbl);
397 idx = txq->sw_tx_cons;
398
399 dma_unmap_page(&edev->pdev->dev,
400 txq->sw_tx_ring.xdp[idx].mapping,
401 PAGE_SIZE, DMA_BIDIRECTIONAL);
402 __free_page(txq->sw_tx_ring.xdp[idx].page);
403
404 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
405 txq->xmit_pkts++;
406 }
407 }
408
qede_tx_int(struct qede_dev * edev,struct qede_tx_queue * txq)409 static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
410 {
411 unsigned int pkts_compl = 0, bytes_compl = 0;
412 struct netdev_queue *netdev_txq;
413 u16 hw_bd_cons;
414 int rc;
415
416 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
417
418 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
419 barrier();
420
421 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
422 int len = 0;
423
424 rc = qede_free_tx_pkt(edev, txq, &len);
425 if (rc) {
426 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
427 hw_bd_cons,
428 qed_chain_get_cons_idx(&txq->tx_pbl));
429 break;
430 }
431
432 bytes_compl += len;
433 pkts_compl++;
434 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
435 txq->xmit_pkts++;
436 }
437
438 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
439
440 /* Need to make the tx_bd_cons update visible to start_xmit()
441 * before checking for netif_tx_queue_stopped(). Without the
442 * memory barrier, there is a small possibility that
443 * start_xmit() will miss it and cause the queue to be stopped
444 * forever.
445 * On the other hand we need an rmb() here to ensure the proper
446 * ordering of bit testing in the following
447 * netif_tx_queue_stopped(txq) call.
448 */
449 smp_mb();
450
451 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
452 /* Taking tx_lock is needed to prevent reenabling the queue
453 * while it's empty. This could have happen if rx_action() gets
454 * suspended in qede_tx_int() after the condition before
455 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
456 *
457 * stops the queue->sees fresh tx_bd_cons->releases the queue->
458 * sends some packets consuming the whole queue again->
459 * stops the queue
460 */
461
462 __netif_tx_lock(netdev_txq, smp_processor_id());
463
464 if ((netif_tx_queue_stopped(netdev_txq)) &&
465 (edev->state == QEDE_STATE_OPEN) &&
466 (qed_chain_get_elem_left(&txq->tx_pbl)
467 >= (MAX_SKB_FRAGS + 1))) {
468 netif_tx_wake_queue(netdev_txq);
469 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
470 "Wake queue was called\n");
471 }
472
473 __netif_tx_unlock(netdev_txq);
474 }
475
476 return 0;
477 }
478
qede_has_rx_work(struct qede_rx_queue * rxq)479 bool qede_has_rx_work(struct qede_rx_queue *rxq)
480 {
481 u16 hw_comp_cons, sw_comp_cons;
482
483 /* Tell compiler that status block fields can change */
484 barrier();
485
486 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
487 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
488
489 return hw_comp_cons != sw_comp_cons;
490 }
491
qede_rx_bd_ring_consume(struct qede_rx_queue * rxq)492 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
493 {
494 qed_chain_consume(&rxq->rx_bd_ring);
495 rxq->sw_rx_cons++;
496 }
497
498 /* This function reuses the buffer(from an offset) from
499 * consumer index to producer index in the bd ring
500 */
qede_reuse_page(struct qede_rx_queue * rxq,struct sw_rx_data * curr_cons)501 static inline void qede_reuse_page(struct qede_rx_queue *rxq,
502 struct sw_rx_data *curr_cons)
503 {
504 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
505 struct sw_rx_data *curr_prod;
506 dma_addr_t new_mapping;
507
508 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
509 *curr_prod = *curr_cons;
510
511 new_mapping = curr_prod->mapping + curr_prod->page_offset;
512
513 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
514 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping) +
515 rxq->rx_headroom);
516
517 rxq->sw_rx_prod++;
518 curr_cons->data = NULL;
519 }
520
521 /* In case of allocation failures reuse buffers
522 * from consumer index to produce buffers for firmware
523 */
qede_recycle_rx_bd_ring(struct qede_rx_queue * rxq,u8 count)524 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
525 {
526 struct sw_rx_data *curr_cons;
527
528 for (; count > 0; count--) {
529 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
530 qede_reuse_page(rxq, curr_cons);
531 qede_rx_bd_ring_consume(rxq);
532 }
533 }
534
qede_realloc_rx_buffer(struct qede_rx_queue * rxq,struct sw_rx_data * curr_cons)535 static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
536 struct sw_rx_data *curr_cons)
537 {
538 /* Move to the next segment in the page */
539 curr_cons->page_offset += rxq->rx_buf_seg_size;
540
541 if (curr_cons->page_offset == PAGE_SIZE) {
542 if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
543 /* Since we failed to allocate new buffer
544 * current buffer can be used again.
545 */
546 curr_cons->page_offset -= rxq->rx_buf_seg_size;
547
548 return -ENOMEM;
549 }
550
551 dma_unmap_page(rxq->dev, curr_cons->mapping,
552 PAGE_SIZE, rxq->data_direction);
553 } else {
554 /* Increment refcount of the page as we don't want
555 * network stack to take the ownership of the page
556 * which can be recycled multiple times by the driver.
557 */
558 page_ref_inc(curr_cons->data);
559 qede_reuse_page(rxq, curr_cons);
560 }
561
562 return 0;
563 }
564
qede_update_rx_prod(struct qede_dev * edev,struct qede_rx_queue * rxq)565 void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
566 {
567 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
568 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
569 struct eth_rx_prod_data rx_prods = {0};
570
571 /* Update producers */
572 rx_prods.bd_prod = cpu_to_le16(bd_prod);
573 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
574
575 /* Make sure that the BD and SGE data is updated before updating the
576 * producers since FW might read the BD/SGE right after the producer
577 * is updated.
578 */
579 wmb();
580
581 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
582 (u32 *)&rx_prods);
583
584 /* mmiowb is needed to synchronize doorbell writes from more than one
585 * processor. It guarantees that the write arrives to the device before
586 * the napi lock is released and another qede_poll is called (possibly
587 * on another CPU). Without this barrier, the next doorbell can bypass
588 * this doorbell. This is applicable to IA64/Altix systems.
589 */
590 mmiowb();
591 }
592
qede_get_rxhash(struct sk_buff * skb,u8 bitfields,__le32 rss_hash)593 static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
594 {
595 enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
596 enum rss_hash_type htype;
597 u32 hash = 0;
598
599 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
600 if (htype) {
601 hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
602 (htype == RSS_HASH_TYPE_IPV6)) ?
603 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
604 hash = le32_to_cpu(rss_hash);
605 }
606 skb_set_hash(skb, hash, hash_type);
607 }
608
qede_set_skb_csum(struct sk_buff * skb,u8 csum_flag)609 static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
610 {
611 skb_checksum_none_assert(skb);
612
613 if (csum_flag & QEDE_CSUM_UNNECESSARY)
614 skb->ip_summed = CHECKSUM_UNNECESSARY;
615
616 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) {
617 skb->csum_level = 1;
618 skb->encapsulation = 1;
619 }
620 }
621
qede_skb_receive(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_rx_queue * rxq,struct sk_buff * skb,u16 vlan_tag)622 static inline void qede_skb_receive(struct qede_dev *edev,
623 struct qede_fastpath *fp,
624 struct qede_rx_queue *rxq,
625 struct sk_buff *skb, u16 vlan_tag)
626 {
627 if (vlan_tag)
628 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
629
630 napi_gro_receive(&fp->napi, skb);
631 }
632
qede_set_gro_params(struct qede_dev * edev,struct sk_buff * skb,struct eth_fast_path_rx_tpa_start_cqe * cqe)633 static void qede_set_gro_params(struct qede_dev *edev,
634 struct sk_buff *skb,
635 struct eth_fast_path_rx_tpa_start_cqe *cqe)
636 {
637 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
638
639 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
640 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
641 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
642 else
643 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
644
645 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
646 cqe->header_len;
647 }
648
qede_fill_frag_skb(struct qede_dev * edev,struct qede_rx_queue * rxq,u8 tpa_agg_index,u16 len_on_bd)649 static int qede_fill_frag_skb(struct qede_dev *edev,
650 struct qede_rx_queue *rxq,
651 u8 tpa_agg_index, u16 len_on_bd)
652 {
653 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
654 NUM_RX_BDS_MAX];
655 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
656 struct sk_buff *skb = tpa_info->skb;
657
658 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
659 goto out;
660
661 /* Add one frag and update the appropriate fields in the skb */
662 skb_fill_page_desc(skb, tpa_info->frag_id++,
663 current_bd->data,
664 current_bd->page_offset + rxq->rx_headroom,
665 len_on_bd);
666
667 if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
668 /* Incr page ref count to reuse on allocation failure
669 * so that it doesn't get freed while freeing SKB.
670 */
671 page_ref_inc(current_bd->data);
672 goto out;
673 }
674
675 qede_rx_bd_ring_consume(rxq);
676
677 skb->data_len += len_on_bd;
678 skb->truesize += rxq->rx_buf_seg_size;
679 skb->len += len_on_bd;
680
681 return 0;
682
683 out:
684 tpa_info->state = QEDE_AGG_STATE_ERROR;
685 qede_recycle_rx_bd_ring(rxq, 1);
686
687 return -ENOMEM;
688 }
689
qede_tunn_exist(u16 flag)690 static bool qede_tunn_exist(u16 flag)
691 {
692 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
693 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
694 }
695
qede_check_tunn_csum(u16 flag)696 static u8 qede_check_tunn_csum(u16 flag)
697 {
698 u16 csum_flag = 0;
699 u8 tcsum = 0;
700
701 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
702 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
703 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
704 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
705
706 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
707 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
708 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
709 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
710 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
711 }
712
713 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
714 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
715 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
716 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
717
718 if (csum_flag & flag)
719 return QEDE_CSUM_ERROR;
720
721 return QEDE_CSUM_UNNECESSARY | tcsum;
722 }
723
724 static inline struct sk_buff *
qede_build_skb(struct qede_rx_queue * rxq,struct sw_rx_data * bd,u16 len,u16 pad)725 qede_build_skb(struct qede_rx_queue *rxq,
726 struct sw_rx_data *bd, u16 len, u16 pad)
727 {
728 struct sk_buff *skb;
729 void *buf;
730
731 buf = page_address(bd->data) + bd->page_offset;
732 skb = build_skb(buf, rxq->rx_buf_seg_size);
733
734 skb_reserve(skb, pad);
735 skb_put(skb, len);
736
737 return skb;
738 }
739
740 static struct sk_buff *
qede_tpa_rx_build_skb(struct qede_dev * edev,struct qede_rx_queue * rxq,struct sw_rx_data * bd,u16 len,u16 pad,bool alloc_skb)741 qede_tpa_rx_build_skb(struct qede_dev *edev,
742 struct qede_rx_queue *rxq,
743 struct sw_rx_data *bd, u16 len, u16 pad,
744 bool alloc_skb)
745 {
746 struct sk_buff *skb;
747
748 skb = qede_build_skb(rxq, bd, len, pad);
749 bd->page_offset += rxq->rx_buf_seg_size;
750
751 if (bd->page_offset == PAGE_SIZE) {
752 if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
753 DP_NOTICE(edev,
754 "Failed to allocate RX buffer for tpa start\n");
755 bd->page_offset -= rxq->rx_buf_seg_size;
756 page_ref_inc(bd->data);
757 dev_kfree_skb_any(skb);
758 return NULL;
759 }
760 } else {
761 page_ref_inc(bd->data);
762 qede_reuse_page(rxq, bd);
763 }
764
765 /* We've consumed the first BD and prepared an SKB */
766 qede_rx_bd_ring_consume(rxq);
767
768 return skb;
769 }
770
771 static struct sk_buff *
qede_rx_build_skb(struct qede_dev * edev,struct qede_rx_queue * rxq,struct sw_rx_data * bd,u16 len,u16 pad)772 qede_rx_build_skb(struct qede_dev *edev,
773 struct qede_rx_queue *rxq,
774 struct sw_rx_data *bd, u16 len, u16 pad)
775 {
776 struct sk_buff *skb = NULL;
777
778 /* For smaller frames still need to allocate skb, memcpy
779 * data and benefit in reusing the page segment instead of
780 * un-mapping it.
781 */
782 if ((len + pad <= edev->rx_copybreak)) {
783 unsigned int offset = bd->page_offset + pad;
784
785 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
786 if (unlikely(!skb))
787 return NULL;
788
789 skb_reserve(skb, pad);
790 memcpy(skb_put(skb, len),
791 page_address(bd->data) + offset, len);
792 qede_reuse_page(rxq, bd);
793 goto out;
794 }
795
796 skb = qede_build_skb(rxq, bd, len, pad);
797
798 if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
799 /* Incr page ref count to reuse on allocation failure so
800 * that it doesn't get freed while freeing SKB [as its
801 * already mapped there].
802 */
803 page_ref_inc(bd->data);
804 dev_kfree_skb_any(skb);
805 return NULL;
806 }
807 out:
808 /* We've consumed the first BD and prepared an SKB */
809 qede_rx_bd_ring_consume(rxq);
810
811 return skb;
812 }
813
qede_tpa_start(struct qede_dev * edev,struct qede_rx_queue * rxq,struct eth_fast_path_rx_tpa_start_cqe * cqe)814 static void qede_tpa_start(struct qede_dev *edev,
815 struct qede_rx_queue *rxq,
816 struct eth_fast_path_rx_tpa_start_cqe *cqe)
817 {
818 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
819 struct sw_rx_data *sw_rx_data_cons;
820 u16 pad;
821
822 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
823 pad = cqe->placement_offset + rxq->rx_headroom;
824
825 tpa_info->skb = qede_tpa_rx_build_skb(edev, rxq, sw_rx_data_cons,
826 le16_to_cpu(cqe->len_on_first_bd),
827 pad, false);
828 tpa_info->buffer.page_offset = sw_rx_data_cons->page_offset;
829 tpa_info->buffer.mapping = sw_rx_data_cons->mapping;
830
831 if (unlikely(!tpa_info->skb)) {
832 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
833
834 /* Consume from ring but do not produce since
835 * this might be used by FW still, it will be re-used
836 * at TPA end.
837 */
838 tpa_info->tpa_start_fail = true;
839 qede_rx_bd_ring_consume(rxq);
840 tpa_info->state = QEDE_AGG_STATE_ERROR;
841 goto cons_buf;
842 }
843
844 tpa_info->frag_id = 0;
845 tpa_info->state = QEDE_AGG_STATE_START;
846
847 if ((le16_to_cpu(cqe->pars_flags.flags) >>
848 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
849 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
850 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
851 else
852 tpa_info->vlan_tag = 0;
853
854 qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
855
856 /* This is needed in order to enable forwarding support */
857 qede_set_gro_params(edev, tpa_info->skb, cqe);
858
859 cons_buf: /* We still need to handle bd_len_list to consume buffers */
860 if (likely(cqe->ext_bd_len_list[0]))
861 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
862 le16_to_cpu(cqe->ext_bd_len_list[0]));
863
864 if (unlikely(cqe->ext_bd_len_list[1])) {
865 DP_ERR(edev,
866 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
867 tpa_info->state = QEDE_AGG_STATE_ERROR;
868 }
869 }
870
871 #ifdef CONFIG_INET
qede_gro_ip_csum(struct sk_buff * skb)872 static void qede_gro_ip_csum(struct sk_buff *skb)
873 {
874 const struct iphdr *iph = ip_hdr(skb);
875 struct tcphdr *th;
876
877 skb_set_transport_header(skb, sizeof(struct iphdr));
878 th = tcp_hdr(skb);
879
880 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
881 iph->saddr, iph->daddr, 0);
882
883 tcp_gro_complete(skb);
884 }
885
qede_gro_ipv6_csum(struct sk_buff * skb)886 static void qede_gro_ipv6_csum(struct sk_buff *skb)
887 {
888 struct ipv6hdr *iph = ipv6_hdr(skb);
889 struct tcphdr *th;
890
891 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
892 th = tcp_hdr(skb);
893
894 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
895 &iph->saddr, &iph->daddr, 0);
896 tcp_gro_complete(skb);
897 }
898 #endif
899
qede_gro_receive(struct qede_dev * edev,struct qede_fastpath * fp,struct sk_buff * skb,u16 vlan_tag)900 static void qede_gro_receive(struct qede_dev *edev,
901 struct qede_fastpath *fp,
902 struct sk_buff *skb,
903 u16 vlan_tag)
904 {
905 /* FW can send a single MTU sized packet from gro flow
906 * due to aggregation timeout/last segment etc. which
907 * is not expected to be a gro packet. If a skb has zero
908 * frags then simply push it in the stack as non gso skb.
909 */
910 if (unlikely(!skb->data_len)) {
911 skb_shinfo(skb)->gso_type = 0;
912 skb_shinfo(skb)->gso_size = 0;
913 goto send_skb;
914 }
915
916 #ifdef CONFIG_INET
917 if (skb_shinfo(skb)->gso_size) {
918 skb_reset_network_header(skb);
919
920 switch (skb->protocol) {
921 case htons(ETH_P_IP):
922 qede_gro_ip_csum(skb);
923 break;
924 case htons(ETH_P_IPV6):
925 qede_gro_ipv6_csum(skb);
926 break;
927 default:
928 DP_ERR(edev,
929 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
930 ntohs(skb->protocol));
931 }
932 }
933 #endif
934
935 send_skb:
936 skb_record_rx_queue(skb, fp->rxq->rxq_id);
937 qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
938 }
939
qede_tpa_cont(struct qede_dev * edev,struct qede_rx_queue * rxq,struct eth_fast_path_rx_tpa_cont_cqe * cqe)940 static inline void qede_tpa_cont(struct qede_dev *edev,
941 struct qede_rx_queue *rxq,
942 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
943 {
944 int i;
945
946 for (i = 0; cqe->len_list[i]; i++)
947 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
948 le16_to_cpu(cqe->len_list[i]));
949
950 if (unlikely(i > 1))
951 DP_ERR(edev,
952 "Strange - TPA cont with more than a single len_list entry\n");
953 }
954
qede_tpa_end(struct qede_dev * edev,struct qede_fastpath * fp,struct eth_fast_path_rx_tpa_end_cqe * cqe)955 static int qede_tpa_end(struct qede_dev *edev,
956 struct qede_fastpath *fp,
957 struct eth_fast_path_rx_tpa_end_cqe *cqe)
958 {
959 struct qede_rx_queue *rxq = fp->rxq;
960 struct qede_agg_info *tpa_info;
961 struct sk_buff *skb;
962 int i;
963
964 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
965 skb = tpa_info->skb;
966
967 if (tpa_info->buffer.page_offset == PAGE_SIZE)
968 dma_unmap_page(rxq->dev, tpa_info->buffer.mapping,
969 PAGE_SIZE, rxq->data_direction);
970
971 for (i = 0; cqe->len_list[i]; i++)
972 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
973 le16_to_cpu(cqe->len_list[i]));
974 if (unlikely(i > 1))
975 DP_ERR(edev,
976 "Strange - TPA emd with more than a single len_list entry\n");
977
978 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
979 goto err;
980
981 /* Sanity */
982 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
983 DP_ERR(edev,
984 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
985 cqe->num_of_bds, tpa_info->frag_id);
986 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
987 DP_ERR(edev,
988 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
989 le16_to_cpu(cqe->total_packet_len), skb->len);
990
991 /* Finalize the SKB */
992 skb->protocol = eth_type_trans(skb, edev->ndev);
993 skb->ip_summed = CHECKSUM_UNNECESSARY;
994
995 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
996 * to skb_shinfo(skb)->gso_segs
997 */
998 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
999
1000 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1001
1002 tpa_info->state = QEDE_AGG_STATE_NONE;
1003
1004 return 1;
1005 err:
1006 tpa_info->state = QEDE_AGG_STATE_NONE;
1007
1008 if (tpa_info->tpa_start_fail) {
1009 qede_reuse_page(rxq, &tpa_info->buffer);
1010 tpa_info->tpa_start_fail = false;
1011 }
1012
1013 dev_kfree_skb_any(tpa_info->skb);
1014 tpa_info->skb = NULL;
1015 return 0;
1016 }
1017
qede_check_notunn_csum(u16 flag)1018 static u8 qede_check_notunn_csum(u16 flag)
1019 {
1020 u16 csum_flag = 0;
1021 u8 csum = 0;
1022
1023 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1024 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1025 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1026 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1027 csum = QEDE_CSUM_UNNECESSARY;
1028 }
1029
1030 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1031 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1032
1033 if (csum_flag & flag)
1034 return QEDE_CSUM_ERROR;
1035
1036 return csum;
1037 }
1038
qede_check_csum(u16 flag)1039 static u8 qede_check_csum(u16 flag)
1040 {
1041 if (!qede_tunn_exist(flag))
1042 return qede_check_notunn_csum(flag);
1043 else
1044 return qede_check_tunn_csum(flag);
1045 }
1046
qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe * cqe,u16 flag)1047 static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1048 u16 flag)
1049 {
1050 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1051
1052 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1053 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1054 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1055 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1056 return true;
1057
1058 return false;
1059 }
1060
1061 /* Return true iff packet is to be passed to stack */
qede_rx_xdp(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_rx_queue * rxq,struct bpf_prog * prog,struct sw_rx_data * bd,struct eth_fast_path_rx_reg_cqe * cqe,u16 * data_offset,u16 * len)1062 static bool qede_rx_xdp(struct qede_dev *edev,
1063 struct qede_fastpath *fp,
1064 struct qede_rx_queue *rxq,
1065 struct bpf_prog *prog,
1066 struct sw_rx_data *bd,
1067 struct eth_fast_path_rx_reg_cqe *cqe,
1068 u16 *data_offset, u16 *len)
1069 {
1070 struct xdp_buff xdp;
1071 enum xdp_action act;
1072
1073 xdp.data_hard_start = page_address(bd->data);
1074 xdp.data = xdp.data_hard_start + *data_offset;
1075 xdp_set_data_meta_invalid(&xdp);
1076 xdp.data_end = xdp.data + *len;
1077 xdp.rxq = &rxq->xdp_rxq;
1078
1079 /* Queues always have a full reset currently, so for the time
1080 * being until there's atomic program replace just mark read
1081 * side for map helpers.
1082 */
1083 rcu_read_lock();
1084 act = bpf_prog_run_xdp(prog, &xdp);
1085 rcu_read_unlock();
1086
1087 /* Recalculate, as XDP might have changed the headers */
1088 *data_offset = xdp.data - xdp.data_hard_start;
1089 *len = xdp.data_end - xdp.data;
1090
1091 if (act == XDP_PASS)
1092 return true;
1093
1094 /* Count number of packets not to be passed to stack */
1095 rxq->xdp_no_pass++;
1096
1097 switch (act) {
1098 case XDP_TX:
1099 /* We need the replacement buffer before transmit. */
1100 if (qede_alloc_rx_buffer(rxq, true)) {
1101 qede_recycle_rx_bd_ring(rxq, 1);
1102 trace_xdp_exception(edev->ndev, prog, act);
1103 return false;
1104 }
1105
1106 /* Now if there's a transmission problem, we'd still have to
1107 * throw current buffer, as replacement was already allocated.
1108 */
1109 if (qede_xdp_xmit(edev, fp, bd, *data_offset, *len)) {
1110 dma_unmap_page(rxq->dev, bd->mapping,
1111 PAGE_SIZE, DMA_BIDIRECTIONAL);
1112 __free_page(bd->data);
1113 trace_xdp_exception(edev->ndev, prog, act);
1114 }
1115
1116 /* Regardless, we've consumed an Rx BD */
1117 qede_rx_bd_ring_consume(rxq);
1118 return false;
1119
1120 default:
1121 bpf_warn_invalid_xdp_action(act);
1122 /* Fall through */
1123 case XDP_ABORTED:
1124 trace_xdp_exception(edev->ndev, prog, act);
1125 /* Fall through */
1126 case XDP_DROP:
1127 qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
1128 }
1129
1130 return false;
1131 }
1132
qede_rx_build_jumbo(struct qede_dev * edev,struct qede_rx_queue * rxq,struct sk_buff * skb,struct eth_fast_path_rx_reg_cqe * cqe,u16 first_bd_len)1133 static int qede_rx_build_jumbo(struct qede_dev *edev,
1134 struct qede_rx_queue *rxq,
1135 struct sk_buff *skb,
1136 struct eth_fast_path_rx_reg_cqe *cqe,
1137 u16 first_bd_len)
1138 {
1139 u16 pkt_len = le16_to_cpu(cqe->pkt_len);
1140 struct sw_rx_data *bd;
1141 u16 bd_cons_idx;
1142 u8 num_frags;
1143
1144 pkt_len -= first_bd_len;
1145
1146 /* We've already used one BD for the SKB. Now take care of the rest */
1147 for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
1148 u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
1149 pkt_len;
1150
1151 if (unlikely(!cur_size)) {
1152 DP_ERR(edev,
1153 "Still got %d BDs for mapping jumbo, but length became 0\n",
1154 num_frags);
1155 goto out;
1156 }
1157
1158 /* We need a replacement buffer for each BD */
1159 if (unlikely(qede_alloc_rx_buffer(rxq, true)))
1160 goto out;
1161
1162 /* Now that we've allocated the replacement buffer,
1163 * we can safely consume the next BD and map it to the SKB.
1164 */
1165 bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1166 bd = &rxq->sw_rx_ring[bd_cons_idx];
1167 qede_rx_bd_ring_consume(rxq);
1168
1169 dma_unmap_page(rxq->dev, bd->mapping,
1170 PAGE_SIZE, DMA_FROM_DEVICE);
1171
1172 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
1173 bd->data, rxq->rx_headroom, cur_size);
1174
1175 skb->truesize += PAGE_SIZE;
1176 skb->data_len += cur_size;
1177 skb->len += cur_size;
1178 pkt_len -= cur_size;
1179 }
1180
1181 if (unlikely(pkt_len))
1182 DP_ERR(edev,
1183 "Mapped all BDs of jumbo, but still have %d bytes\n",
1184 pkt_len);
1185
1186 out:
1187 return num_frags;
1188 }
1189
qede_rx_process_tpa_cqe(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_rx_queue * rxq,union eth_rx_cqe * cqe,enum eth_rx_cqe_type type)1190 static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
1191 struct qede_fastpath *fp,
1192 struct qede_rx_queue *rxq,
1193 union eth_rx_cqe *cqe,
1194 enum eth_rx_cqe_type type)
1195 {
1196 switch (type) {
1197 case ETH_RX_CQE_TYPE_TPA_START:
1198 qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
1199 return 0;
1200 case ETH_RX_CQE_TYPE_TPA_CONT:
1201 qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
1202 return 0;
1203 case ETH_RX_CQE_TYPE_TPA_END:
1204 return qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
1205 default:
1206 return 0;
1207 }
1208 }
1209
qede_rx_process_cqe(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_rx_queue * rxq)1210 static int qede_rx_process_cqe(struct qede_dev *edev,
1211 struct qede_fastpath *fp,
1212 struct qede_rx_queue *rxq)
1213 {
1214 struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
1215 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1216 u16 len, pad, bd_cons_idx, parse_flag;
1217 enum eth_rx_cqe_type cqe_type;
1218 union eth_rx_cqe *cqe;
1219 struct sw_rx_data *bd;
1220 struct sk_buff *skb;
1221 __le16 flags;
1222 u8 csum_flag;
1223
1224 /* Get the CQE from the completion ring */
1225 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1226 cqe_type = cqe->fast_path_regular.type;
1227
1228 /* Process an unlikely slowpath event */
1229 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1230 struct eth_slow_path_rx_cqe *sp_cqe;
1231
1232 sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
1233 edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
1234 return 0;
1235 }
1236
1237 /* Handle TPA cqes */
1238 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
1239 return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
1240
1241 /* Get the data from the SW ring; Consume it only after it's evident
1242 * we wouldn't recycle it.
1243 */
1244 bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1245 bd = &rxq->sw_rx_ring[bd_cons_idx];
1246
1247 fp_cqe = &cqe->fast_path_regular;
1248 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1249 pad = fp_cqe->placement_offset + rxq->rx_headroom;
1250
1251 /* Run eBPF program if one is attached */
1252 if (xdp_prog)
1253 if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe,
1254 &pad, &len))
1255 return 0;
1256
1257 /* If this is an error packet then drop it */
1258 flags = cqe->fast_path_regular.pars_flags.flags;
1259 parse_flag = le16_to_cpu(flags);
1260
1261 csum_flag = qede_check_csum(parse_flag);
1262 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1263 if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag))
1264 rxq->rx_ip_frags++;
1265 else
1266 rxq->rx_hw_errors++;
1267 }
1268
1269 /* Basic validation passed; Need to prepare an SKB. This would also
1270 * guarantee to finally consume the first BD upon success.
1271 */
1272 skb = qede_rx_build_skb(edev, rxq, bd, len, pad);
1273 if (!skb) {
1274 rxq->rx_alloc_errors++;
1275 qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
1276 return 0;
1277 }
1278
1279 /* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
1280 * by a single cqe.
1281 */
1282 if (fp_cqe->bd_num > 1) {
1283 u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
1284 fp_cqe, len);
1285
1286 if (unlikely(unmapped_frags > 0)) {
1287 qede_recycle_rx_bd_ring(rxq, unmapped_frags);
1288 dev_kfree_skb_any(skb);
1289 return 0;
1290 }
1291 }
1292
1293 /* The SKB contains all the data. Now prepare meta-magic */
1294 skb->protocol = eth_type_trans(skb, edev->ndev);
1295 qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
1296 qede_set_skb_csum(skb, csum_flag);
1297 skb_record_rx_queue(skb, rxq->rxq_id);
1298 qede_ptp_record_rx_ts(edev, cqe, skb);
1299
1300 /* SKB is prepared - pass it to stack */
1301 qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
1302
1303 return 1;
1304 }
1305
qede_rx_int(struct qede_fastpath * fp,int budget)1306 static int qede_rx_int(struct qede_fastpath *fp, int budget)
1307 {
1308 struct qede_rx_queue *rxq = fp->rxq;
1309 struct qede_dev *edev = fp->edev;
1310 int work_done = 0, rcv_pkts = 0;
1311 u16 hw_comp_cons, sw_comp_cons;
1312
1313 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1314 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1315
1316 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1317 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1318 * read before it is written by FW, then FW writes CQE and SB, and then
1319 * the CPU reads the hw_comp_cons, it will use an old CQE.
1320 */
1321 rmb();
1322
1323 /* Loop to complete all indicated BDs */
1324 while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
1325 rcv_pkts += qede_rx_process_cqe(edev, fp, rxq);
1326 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1327 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1328 work_done++;
1329 }
1330
1331 rxq->rcv_pkts += rcv_pkts;
1332
1333 /* Allocate replacement buffers */
1334 while (rxq->num_rx_buffers - rxq->filled_buffers)
1335 if (qede_alloc_rx_buffer(rxq, false))
1336 break;
1337
1338 /* Update producers */
1339 qede_update_rx_prod(edev, rxq);
1340
1341 return work_done;
1342 }
1343
qede_poll_is_more_work(struct qede_fastpath * fp)1344 static bool qede_poll_is_more_work(struct qede_fastpath *fp)
1345 {
1346 qed_sb_update_sb_idx(fp->sb_info);
1347
1348 /* *_has_*_work() reads the status block, thus we need to ensure that
1349 * status block indices have been actually read (qed_sb_update_sb_idx)
1350 * prior to this check (*_has_*_work) so that we won't write the
1351 * "newer" value of the status block to HW (if there was a DMA right
1352 * after qede_has_rx_work and if there is no rmb, the memory reading
1353 * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
1354 * In this case there will never be another interrupt until there is
1355 * another update of the status block, while there is still unhandled
1356 * work.
1357 */
1358 rmb();
1359
1360 if (likely(fp->type & QEDE_FASTPATH_RX))
1361 if (qede_has_rx_work(fp->rxq))
1362 return true;
1363
1364 if (fp->type & QEDE_FASTPATH_XDP)
1365 if (qede_txq_has_work(fp->xdp_tx))
1366 return true;
1367
1368 if (likely(fp->type & QEDE_FASTPATH_TX)) {
1369 int cos;
1370
1371 for_each_cos_in_txq(fp->edev, cos) {
1372 if (qede_txq_has_work(&fp->txq[cos]))
1373 return true;
1374 }
1375 }
1376
1377 return false;
1378 }
1379
1380 /*********************
1381 * NDO & API related *
1382 *********************/
qede_poll(struct napi_struct * napi,int budget)1383 int qede_poll(struct napi_struct *napi, int budget)
1384 {
1385 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1386 napi);
1387 struct qede_dev *edev = fp->edev;
1388 int rx_work_done = 0;
1389
1390 if (likely(fp->type & QEDE_FASTPATH_TX)) {
1391 int cos;
1392
1393 for_each_cos_in_txq(fp->edev, cos) {
1394 if (qede_txq_has_work(&fp->txq[cos]))
1395 qede_tx_int(edev, &fp->txq[cos]);
1396 }
1397 }
1398
1399 if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
1400 qede_xdp_tx_int(edev, fp->xdp_tx);
1401
1402 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1403 qede_has_rx_work(fp->rxq)) ?
1404 qede_rx_int(fp, budget) : 0;
1405 if (rx_work_done < budget) {
1406 if (!qede_poll_is_more_work(fp)) {
1407 napi_complete_done(napi, rx_work_done);
1408
1409 /* Update and reenable interrupts */
1410 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
1411 } else {
1412 rx_work_done = budget;
1413 }
1414 }
1415
1416 if (fp->xdp_xmit) {
1417 u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
1418
1419 fp->xdp_xmit = 0;
1420 fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
1421 qede_update_tx_producer(fp->xdp_tx);
1422 }
1423
1424 return rx_work_done;
1425 }
1426
qede_msix_fp_int(int irq,void * fp_cookie)1427 irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1428 {
1429 struct qede_fastpath *fp = fp_cookie;
1430
1431 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1432
1433 napi_schedule_irqoff(&fp->napi);
1434 return IRQ_HANDLED;
1435 }
1436
1437 /* Main transmit function */
qede_start_xmit(struct sk_buff * skb,struct net_device * ndev)1438 netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1439 {
1440 struct qede_dev *edev = netdev_priv(ndev);
1441 struct netdev_queue *netdev_txq;
1442 struct qede_tx_queue *txq;
1443 struct eth_tx_1st_bd *first_bd;
1444 struct eth_tx_2nd_bd *second_bd = NULL;
1445 struct eth_tx_3rd_bd *third_bd = NULL;
1446 struct eth_tx_bd *tx_data_bd = NULL;
1447 u16 txq_index, val = 0;
1448 u8 nbd = 0;
1449 dma_addr_t mapping;
1450 int rc, frag_idx = 0, ipv6_ext = 0;
1451 u8 xmit_type;
1452 u16 idx;
1453 u16 hlen;
1454 bool data_split = false;
1455
1456 /* Get tx-queue context and netdev index */
1457 txq_index = skb_get_queue_mapping(skb);
1458 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev) * edev->dev_info.num_tc);
1459 txq = QEDE_NDEV_TXQ_ID_TO_TXQ(edev, txq_index);
1460 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
1461
1462 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
1463
1464 xmit_type = qede_xmit_type(skb, &ipv6_ext);
1465
1466 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
1467 if (qede_pkt_req_lin(skb, xmit_type)) {
1468 if (skb_linearize(skb)) {
1469 DP_NOTICE(edev,
1470 "SKB linearization failed - silently dropping this SKB\n");
1471 dev_kfree_skb_any(skb);
1472 return NETDEV_TX_OK;
1473 }
1474 }
1475 #endif
1476
1477 /* Fill the entry in the SW ring and the BDs in the FW ring */
1478 idx = txq->sw_tx_prod;
1479 txq->sw_tx_ring.skbs[idx].skb = skb;
1480 first_bd = (struct eth_tx_1st_bd *)
1481 qed_chain_produce(&txq->tx_pbl);
1482 memset(first_bd, 0, sizeof(*first_bd));
1483 first_bd->data.bd_flags.bitfields =
1484 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1485
1486 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
1487 qede_ptp_tx_ts(edev, skb);
1488
1489 /* Map skb linear data for DMA and set in the first BD */
1490 mapping = dma_map_single(txq->dev, skb->data,
1491 skb_headlen(skb), DMA_TO_DEVICE);
1492 if (unlikely(dma_mapping_error(txq->dev, mapping))) {
1493 DP_NOTICE(edev, "SKB mapping failed\n");
1494 qede_free_failed_tx_pkt(txq, first_bd, 0, false);
1495 qede_update_tx_producer(txq);
1496 return NETDEV_TX_OK;
1497 }
1498 nbd++;
1499 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1500
1501 /* In case there is IPv6 with extension headers or LSO we need 2nd and
1502 * 3rd BDs.
1503 */
1504 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
1505 second_bd = (struct eth_tx_2nd_bd *)
1506 qed_chain_produce(&txq->tx_pbl);
1507 memset(second_bd, 0, sizeof(*second_bd));
1508
1509 nbd++;
1510 third_bd = (struct eth_tx_3rd_bd *)
1511 qed_chain_produce(&txq->tx_pbl);
1512 memset(third_bd, 0, sizeof(*third_bd));
1513
1514 nbd++;
1515 /* We need to fill in additional data in second_bd... */
1516 tx_data_bd = (struct eth_tx_bd *)second_bd;
1517 }
1518
1519 if (skb_vlan_tag_present(skb)) {
1520 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
1521 first_bd->data.bd_flags.bitfields |=
1522 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
1523 }
1524
1525 /* Fill the parsing flags & params according to the requested offload */
1526 if (xmit_type & XMIT_L4_CSUM) {
1527 /* We don't re-calculate IP checksum as it is already done by
1528 * the upper stack
1529 */
1530 first_bd->data.bd_flags.bitfields |=
1531 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
1532
1533 if (xmit_type & XMIT_ENC) {
1534 first_bd->data.bd_flags.bitfields |=
1535 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1536
1537 val |= (1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT);
1538 }
1539
1540 /* Legacy FW had flipped behavior in regard to this bit -
1541 * I.e., needed to set to prevent FW from touching encapsulated
1542 * packets when it didn't need to.
1543 */
1544 if (unlikely(txq->is_legacy))
1545 val ^= (1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT);
1546
1547 /* If the packet is IPv6 with extension header, indicate that
1548 * to FW and pass few params, since the device cracker doesn't
1549 * support parsing IPv6 with extension header/s.
1550 */
1551 if (unlikely(ipv6_ext))
1552 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
1553 }
1554
1555 if (xmit_type & XMIT_LSO) {
1556 first_bd->data.bd_flags.bitfields |=
1557 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
1558 third_bd->data.lso_mss =
1559 cpu_to_le16(skb_shinfo(skb)->gso_size);
1560
1561 if (unlikely(xmit_type & XMIT_ENC)) {
1562 first_bd->data.bd_flags.bitfields |=
1563 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
1564
1565 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
1566 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
1567
1568 first_bd->data.bd_flags.bitfields |= 1 << tmp;
1569 }
1570 hlen = qede_get_skb_hlen(skb, true);
1571 } else {
1572 first_bd->data.bd_flags.bitfields |=
1573 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1574 hlen = qede_get_skb_hlen(skb, false);
1575 }
1576
1577 /* @@@TBD - if will not be removed need to check */
1578 third_bd->data.bitfields |=
1579 cpu_to_le16(1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
1580
1581 /* Make life easier for FW guys who can't deal with header and
1582 * data on same BD. If we need to split, use the second bd...
1583 */
1584 if (unlikely(skb_headlen(skb) > hlen)) {
1585 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1586 "TSO split header size is %d (%x:%x)\n",
1587 first_bd->nbytes, first_bd->addr.hi,
1588 first_bd->addr.lo);
1589
1590 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
1591 le32_to_cpu(first_bd->addr.lo)) +
1592 hlen;
1593
1594 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
1595 le16_to_cpu(first_bd->nbytes) -
1596 hlen);
1597
1598 /* this marks the BD as one that has no
1599 * individual mapping
1600 */
1601 txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
1602
1603 first_bd->nbytes = cpu_to_le16(hlen);
1604
1605 tx_data_bd = (struct eth_tx_bd *)third_bd;
1606 data_split = true;
1607 }
1608 } else {
1609 val |= ((skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
1610 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT);
1611 }
1612
1613 first_bd->data.bitfields = cpu_to_le16(val);
1614
1615 /* Handle fragmented skb */
1616 /* special handle for frags inside 2nd and 3rd bds.. */
1617 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
1618 rc = map_frag_to_bd(txq,
1619 &skb_shinfo(skb)->frags[frag_idx],
1620 tx_data_bd);
1621 if (rc) {
1622 qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
1623 qede_update_tx_producer(txq);
1624 return NETDEV_TX_OK;
1625 }
1626
1627 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
1628 tx_data_bd = (struct eth_tx_bd *)third_bd;
1629 else
1630 tx_data_bd = NULL;
1631
1632 frag_idx++;
1633 }
1634
1635 /* map last frags into 4th, 5th .... */
1636 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
1637 tx_data_bd = (struct eth_tx_bd *)
1638 qed_chain_produce(&txq->tx_pbl);
1639
1640 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
1641
1642 rc = map_frag_to_bd(txq,
1643 &skb_shinfo(skb)->frags[frag_idx],
1644 tx_data_bd);
1645 if (rc) {
1646 qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
1647 qede_update_tx_producer(txq);
1648 return NETDEV_TX_OK;
1649 }
1650 }
1651
1652 /* update the first BD with the actual num BDs */
1653 first_bd->data.nbds = nbd;
1654
1655 netdev_tx_sent_queue(netdev_txq, skb->len);
1656
1657 skb_tx_timestamp(skb);
1658
1659 /* Advance packet producer only before sending the packet since mapping
1660 * of pages may fail.
1661 */
1662 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1663
1664 /* 'next page' entries are counted in the producer value */
1665 txq->tx_db.data.bd_prod =
1666 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
1667
1668 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
1669 qede_update_tx_producer(txq);
1670
1671 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
1672 < (MAX_SKB_FRAGS + 1))) {
1673 if (skb->xmit_more)
1674 qede_update_tx_producer(txq);
1675
1676 netif_tx_stop_queue(netdev_txq);
1677 txq->stopped_cnt++;
1678 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1679 "Stop queue was called\n");
1680 /* paired memory barrier is in qede_tx_int(), we have to keep
1681 * ordering of set_bit() in netif_tx_stop_queue() and read of
1682 * fp->bd_tx_cons
1683 */
1684 smp_mb();
1685
1686 if ((qed_chain_get_elem_left(&txq->tx_pbl) >=
1687 (MAX_SKB_FRAGS + 1)) &&
1688 (edev->state == QEDE_STATE_OPEN)) {
1689 netif_tx_wake_queue(netdev_txq);
1690 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1691 "Wake queue was called\n");
1692 }
1693 }
1694
1695 return NETDEV_TX_OK;
1696 }
1697
1698 /* 8B udp header + 8B base tunnel header + 32B option length */
1699 #define QEDE_MAX_TUN_HDR_LEN 48
1700
qede_features_check(struct sk_buff * skb,struct net_device * dev,netdev_features_t features)1701 netdev_features_t qede_features_check(struct sk_buff *skb,
1702 struct net_device *dev,
1703 netdev_features_t features)
1704 {
1705 if (skb->encapsulation) {
1706 u8 l4_proto = 0;
1707
1708 switch (vlan_get_protocol(skb)) {
1709 case htons(ETH_P_IP):
1710 l4_proto = ip_hdr(skb)->protocol;
1711 break;
1712 case htons(ETH_P_IPV6):
1713 l4_proto = ipv6_hdr(skb)->nexthdr;
1714 break;
1715 default:
1716 return features;
1717 }
1718
1719 /* Disable offloads for geneve tunnels, as HW can't parse
1720 * the geneve header which has option length greater than 32b
1721 * and disable offloads for the ports which are not offloaded.
1722 */
1723 if (l4_proto == IPPROTO_UDP) {
1724 struct qede_dev *edev = netdev_priv(dev);
1725 u16 hdrlen, vxln_port, gnv_port;
1726
1727 hdrlen = QEDE_MAX_TUN_HDR_LEN;
1728 vxln_port = edev->vxlan_dst_port;
1729 gnv_port = edev->geneve_dst_port;
1730
1731 if ((skb_inner_mac_header(skb) -
1732 skb_transport_header(skb)) > hdrlen ||
1733 (ntohs(udp_hdr(skb)->dest) != vxln_port &&
1734 ntohs(udp_hdr(skb)->dest) != gnv_port))
1735 return features & ~(NETIF_F_CSUM_MASK |
1736 NETIF_F_GSO_MASK);
1737 }
1738 }
1739
1740 return features;
1741 }
1742