1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * CPU-measurement facilities
4 *
5 * Copyright IBM Corp. 2012, 2018
6 * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
7 * Jan Glauber <jang@linux.vnet.ibm.com>
8 */
9 #ifndef _ASM_S390_CPU_MF_H
10 #define _ASM_S390_CPU_MF_H
11
12 #include <linux/errno.h>
13 #include <asm/facility.h>
14
15 #define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */
16 #define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */
17 #define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
18 #define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
19 #define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
20 #define CPU_MF_INT_CF_MTDA (1 << 15) /* loss of MT ctr. data alert */
21 #define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
22 #define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
23 #define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \
24 CPU_MF_INT_CF_LCDA)
25 #define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \
26 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \
27 CPU_MF_INT_SF_LSDA)
28
29 /* CPU measurement facility support */
cpum_cf_avail(void)30 static inline int cpum_cf_avail(void)
31 {
32 return test_facility(40) && test_facility(67);
33 }
34
cpum_sf_avail(void)35 static inline int cpum_sf_avail(void)
36 {
37 return test_facility(40) && test_facility(68);
38 }
39
40
41 struct cpumf_ctr_info {
42 u16 cfvn;
43 u16 auth_ctl;
44 u16 enable_ctl;
45 u16 act_ctl;
46 u16 max_cpu;
47 u16 csvn;
48 u16 max_cg;
49 u16 reserved1;
50 u32 reserved2[12];
51 } __packed;
52
53 /* QUERY SAMPLING INFORMATION block */
54 struct hws_qsi_info_block { /* Bit(s) */
55 unsigned int b0_13:14; /* 0-13: zeros */
56 unsigned int as:1; /* 14: basic-sampling authorization */
57 unsigned int ad:1; /* 15: diag-sampling authorization */
58 unsigned int b16_21:6; /* 16-21: zeros */
59 unsigned int es:1; /* 22: basic-sampling enable control */
60 unsigned int ed:1; /* 23: diag-sampling enable control */
61 unsigned int b24_29:6; /* 24-29: zeros */
62 unsigned int cs:1; /* 30: basic-sampling activation control */
63 unsigned int cd:1; /* 31: diag-sampling activation control */
64 unsigned int bsdes:16; /* 4-5: size of basic sampling entry */
65 unsigned int dsdes:16; /* 6-7: size of diagnostic sampling entry */
66 unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
67 unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
68 unsigned long tear; /* 24-31: TEAR contents */
69 unsigned long dear; /* 32-39: DEAR contents */
70 unsigned int rsvrd0; /* 40-43: reserved */
71 unsigned int cpu_speed; /* 44-47: CPU speed */
72 unsigned long long rsvrd1; /* 48-55: reserved */
73 unsigned long long rsvrd2; /* 56-63: reserved */
74 } __packed;
75
76 /* SET SAMPLING CONTROLS request block */
77 struct hws_lsctl_request_block {
78 unsigned int s:1; /* 0: maximum buffer indicator */
79 unsigned int h:1; /* 1: part. level reserved for VM use*/
80 unsigned long long b2_53:52;/* 2-53: zeros */
81 unsigned int es:1; /* 54: basic-sampling enable control */
82 unsigned int ed:1; /* 55: diag-sampling enable control */
83 unsigned int b56_61:6; /* 56-61: - zeros */
84 unsigned int cs:1; /* 62: basic-sampling activation control */
85 unsigned int cd:1; /* 63: diag-sampling activation control */
86 unsigned long interval; /* 8-15: sampling interval */
87 unsigned long tear; /* 16-23: TEAR contents */
88 unsigned long dear; /* 24-31: DEAR contents */
89 /* 32-63: */
90 unsigned long rsvrd1; /* reserved */
91 unsigned long rsvrd2; /* reserved */
92 unsigned long rsvrd3; /* reserved */
93 unsigned long rsvrd4; /* reserved */
94 } __packed;
95
96 struct hws_basic_entry {
97 unsigned int def:16; /* 0-15 Data Entry Format */
98 unsigned int R:4; /* 16-19 reserved */
99 unsigned int U:4; /* 20-23 Number of unique instruct. */
100 unsigned int z:2; /* zeros */
101 unsigned int T:1; /* 26 PSW DAT mode */
102 unsigned int W:1; /* 27 PSW wait state */
103 unsigned int P:1; /* 28 PSW Problem state */
104 unsigned int AS:2; /* 29-30 PSW address-space control */
105 unsigned int I:1; /* 31 entry valid or invalid */
106 unsigned int CL:2; /* 32-33 Configuration Level */
107 unsigned int:14;
108 unsigned int prim_asn:16; /* primary ASN */
109 unsigned long long ia; /* Instruction Address */
110 unsigned long long gpp; /* Guest Program Parameter */
111 unsigned long long hpp; /* Host Program Parameter */
112 } __packed;
113
114 struct hws_diag_entry {
115 unsigned int def:16; /* 0-15 Data Entry Format */
116 unsigned int R:15; /* 16-19 and 20-30 reserved */
117 unsigned int I:1; /* 31 entry valid or invalid */
118 u8 data[]; /* Machine-dependent sample data */
119 } __packed;
120
121 struct hws_combined_entry {
122 struct hws_basic_entry basic; /* Basic-sampling data entry */
123 struct hws_diag_entry diag; /* Diagnostic-sampling data entry */
124 } __packed;
125
126 struct hws_trailer_entry {
127 union {
128 struct {
129 unsigned int f:1; /* 0 - Block Full Indicator */
130 unsigned int a:1; /* 1 - Alert request control */
131 unsigned int t:1; /* 2 - Timestamp format */
132 unsigned int :29; /* 3 - 31: Reserved */
133 unsigned int bsdes:16; /* 32-47: size of basic SDE */
134 unsigned int dsdes:16; /* 48-63: size of diagnostic SDE */
135 };
136 unsigned long long flags; /* 0 - 63: All indicators */
137 };
138 unsigned long long overflow; /* 64 - sample Overflow count */
139 unsigned char timestamp[16]; /* 16 - 31 timestamp */
140 unsigned long long reserved1; /* 32 -Reserved */
141 unsigned long long reserved2; /* */
142 union { /* 48 - reserved for programming use */
143 struct {
144 unsigned int clock_base:1; /* in progusage2 */
145 unsigned long long progusage1:63;
146 unsigned long long progusage2;
147 };
148 unsigned long long progusage[2];
149 };
150 } __packed;
151
152 /* Load program parameter */
lpp(void * pp)153 static inline void lpp(void *pp)
154 {
155 asm volatile(".insn s,0xb2800000,0(%0)\n":: "a" (pp) : "memory");
156 }
157
158 /* Query counter information */
qctri(struct cpumf_ctr_info * info)159 static inline int qctri(struct cpumf_ctr_info *info)
160 {
161 int rc = -EINVAL;
162
163 asm volatile (
164 "0: .insn s,0xb28e0000,%1\n"
165 "1: lhi %0,0\n"
166 "2:\n"
167 EX_TABLE(1b, 2b)
168 : "+d" (rc), "=Q" (*info));
169 return rc;
170 }
171
172 /* Load CPU-counter-set controls */
lcctl(u64 ctl)173 static inline int lcctl(u64 ctl)
174 {
175 int cc;
176
177 asm volatile (
178 " .insn s,0xb2840000,%1\n"
179 " ipm %0\n"
180 " srl %0,28\n"
181 : "=d" (cc) : "Q" (ctl) : "cc");
182 return cc;
183 }
184
185 /* Extract CPU counter */
__ecctr(u64 ctr,u64 * content)186 static inline int __ecctr(u64 ctr, u64 *content)
187 {
188 u64 _content;
189 int cc;
190
191 asm volatile (
192 " .insn rre,0xb2e40000,%0,%2\n"
193 " ipm %1\n"
194 " srl %1,28\n"
195 : "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
196 *content = _content;
197 return cc;
198 }
199
200 /* Extract CPU counter */
ecctr(u64 ctr,u64 * val)201 static inline int ecctr(u64 ctr, u64 *val)
202 {
203 u64 content;
204 int cc;
205
206 cc = __ecctr(ctr, &content);
207 if (!cc)
208 *val = content;
209 return cc;
210 }
211
212 /* Store CPU counter multiple for the MT utilization counter set */
stcctm5(u64 num,u64 * val)213 static inline int stcctm5(u64 num, u64 *val)
214 {
215 int cc;
216
217 asm volatile (
218 " .insn rsy,0xeb0000000017,%2,5,%1\n"
219 " ipm %0\n"
220 " srl %0,28\n"
221 : "=d" (cc)
222 : "Q" (*val), "d" (num)
223 : "cc", "memory");
224 return cc;
225 }
226
227 /* Query sampling information */
qsi(struct hws_qsi_info_block * info)228 static inline int qsi(struct hws_qsi_info_block *info)
229 {
230 int cc = 1;
231
232 asm volatile(
233 "0: .insn s,0xb2860000,%1\n"
234 "1: lhi %0,0\n"
235 "2:\n"
236 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
237 : "+d" (cc), "+Q" (*info));
238 return cc ? -EINVAL : 0;
239 }
240
241 /* Load sampling controls */
lsctl(struct hws_lsctl_request_block * req)242 static inline int lsctl(struct hws_lsctl_request_block *req)
243 {
244 int cc;
245
246 cc = 1;
247 asm volatile(
248 "0: .insn s,0xb2870000,0(%1)\n"
249 "1: ipm %0\n"
250 " srl %0,28\n"
251 "2:\n"
252 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
253 : "+d" (cc), "+a" (req)
254 : "m" (*req)
255 : "cc", "memory");
256
257 return cc ? -EINVAL : 0;
258 }
259
260 /* Sampling control helper functions */
261
262 #include <linux/time.h>
263
freq_to_sample_rate(struct hws_qsi_info_block * qsi,unsigned long freq)264 static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi,
265 unsigned long freq)
266 {
267 return (USEC_PER_SEC / freq) * qsi->cpu_speed;
268 }
269
sample_rate_to_freq(struct hws_qsi_info_block * qsi,unsigned long rate)270 static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi,
271 unsigned long rate)
272 {
273 return USEC_PER_SEC * qsi->cpu_speed / rate;
274 }
275
276 #define SDB_TE_ALERT_REQ_MASK 0x4000000000000000UL
277 #define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL
278
279 /* Return TOD timestamp contained in an trailer entry */
trailer_timestamp(struct hws_trailer_entry * te)280 static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te)
281 {
282 /* TOD in STCKE format */
283 if (te->t)
284 return *((unsigned long long *) &te->timestamp[1]);
285
286 /* TOD in STCK format */
287 return *((unsigned long long *) &te->timestamp[0]);
288 }
289
290 /* Return pointer to trailer entry of an sample data block */
trailer_entry_ptr(unsigned long v)291 static inline unsigned long *trailer_entry_ptr(unsigned long v)
292 {
293 void *ret;
294
295 ret = (void *) v;
296 ret += PAGE_SIZE;
297 ret -= sizeof(struct hws_trailer_entry);
298
299 return (unsigned long *) ret;
300 }
301
302 /* Return if the entry in the sample data block table (sdbt)
303 * is a link to the next sdbt */
is_link_entry(unsigned long * s)304 static inline int is_link_entry(unsigned long *s)
305 {
306 return *s & 0x1ul ? 1 : 0;
307 }
308
309 /* Return pointer to the linked sdbt */
get_next_sdbt(unsigned long * s)310 static inline unsigned long *get_next_sdbt(unsigned long *s)
311 {
312 return (unsigned long *) (*s & ~0x1ul);
313 }
314 #endif /* _ASM_S390_CPU_MF_H */
315
