1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * PTP 1588 clock for Freescale QorIQ 1588 timer
4 *
5 * Copyright (C) 2010 OMICRON electronics GmbH
6 */
7
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10 #include <linux/device.h>
11 #include <linux/hrtimer.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/of.h>
15 #include <linux/of_platform.h>
16 #include <linux/timex.h>
17 #include <linux/slab.h>
18 #include <linux/clk.h>
19
20 #include <linux/fsl/ptp_qoriq.h>
21
22 /*
23 * Register access functions
24 */
25
26 /* Caller must hold ptp_qoriq->lock. */
tmr_cnt_read(struct ptp_qoriq * ptp_qoriq)27 static u64 tmr_cnt_read(struct ptp_qoriq *ptp_qoriq)
28 {
29 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
30 u64 ns;
31 u32 lo, hi;
32
33 lo = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_l);
34 hi = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_h);
35 ns = ((u64) hi) << 32;
36 ns |= lo;
37 return ns;
38 }
39
40 /* Caller must hold ptp_qoriq->lock. */
tmr_cnt_write(struct ptp_qoriq * ptp_qoriq,u64 ns)41 static void tmr_cnt_write(struct ptp_qoriq *ptp_qoriq, u64 ns)
42 {
43 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
44 u32 hi = ns >> 32;
45 u32 lo = ns & 0xffffffff;
46
47 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_l, lo);
48 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_h, hi);
49 }
50
51 /* Caller must hold ptp_qoriq->lock. */
set_alarm(struct ptp_qoriq * ptp_qoriq)52 static void set_alarm(struct ptp_qoriq *ptp_qoriq)
53 {
54 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
55 u64 ns;
56 u32 lo, hi;
57
58 ns = tmr_cnt_read(ptp_qoriq) + 1500000000ULL;
59 ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
60 ns -= ptp_qoriq->tclk_period;
61 hi = ns >> 32;
62 lo = ns & 0xffffffff;
63 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_l, lo);
64 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_h, hi);
65 }
66
67 /* Caller must hold ptp_qoriq->lock. */
set_fipers(struct ptp_qoriq * ptp_qoriq)68 static void set_fipers(struct ptp_qoriq *ptp_qoriq)
69 {
70 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
71
72 set_alarm(ptp_qoriq);
73 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
74 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
75
76 if (ptp_qoriq->fiper3_support)
77 ptp_qoriq->write(®s->fiper_regs->tmr_fiper3,
78 ptp_qoriq->tmr_fiper3);
79 }
80
extts_clean_up(struct ptp_qoriq * ptp_qoriq,int index,bool update_event)81 int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index, bool update_event)
82 {
83 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
84 struct ptp_clock_event event;
85 void __iomem *reg_etts_l;
86 void __iomem *reg_etts_h;
87 u32 valid, lo, hi;
88
89 switch (index) {
90 case 0:
91 valid = ETS1_VLD;
92 reg_etts_l = ®s->etts_regs->tmr_etts1_l;
93 reg_etts_h = ®s->etts_regs->tmr_etts1_h;
94 break;
95 case 1:
96 valid = ETS2_VLD;
97 reg_etts_l = ®s->etts_regs->tmr_etts2_l;
98 reg_etts_h = ®s->etts_regs->tmr_etts2_h;
99 break;
100 default:
101 return -EINVAL;
102 }
103
104 event.type = PTP_CLOCK_EXTTS;
105 event.index = index;
106
107 if (ptp_qoriq->extts_fifo_support)
108 if (!(ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid))
109 return 0;
110
111 do {
112 lo = ptp_qoriq->read(reg_etts_l);
113 hi = ptp_qoriq->read(reg_etts_h);
114
115 if (update_event) {
116 event.timestamp = ((u64) hi) << 32;
117 event.timestamp |= lo;
118 ptp_clock_event(ptp_qoriq->clock, &event);
119 }
120
121 if (!ptp_qoriq->extts_fifo_support)
122 break;
123 } while (ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid);
124
125 return 0;
126 }
127 EXPORT_SYMBOL_GPL(extts_clean_up);
128
129 /*
130 * Interrupt service routine
131 */
132
ptp_qoriq_isr(int irq,void * priv)133 irqreturn_t ptp_qoriq_isr(int irq, void *priv)
134 {
135 struct ptp_qoriq *ptp_qoriq = priv;
136 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
137 struct ptp_clock_event event;
138 u32 ack = 0, mask, val, irqs;
139
140 spin_lock(&ptp_qoriq->lock);
141
142 val = ptp_qoriq->read(®s->ctrl_regs->tmr_tevent);
143 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
144
145 spin_unlock(&ptp_qoriq->lock);
146
147 irqs = val & mask;
148
149 if (irqs & ETS1) {
150 ack |= ETS1;
151 extts_clean_up(ptp_qoriq, 0, true);
152 }
153
154 if (irqs & ETS2) {
155 ack |= ETS2;
156 extts_clean_up(ptp_qoriq, 1, true);
157 }
158
159 if (irqs & PP1) {
160 ack |= PP1;
161 event.type = PTP_CLOCK_PPS;
162 ptp_clock_event(ptp_qoriq->clock, &event);
163 }
164
165 if (ack) {
166 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, ack);
167 return IRQ_HANDLED;
168 } else
169 return IRQ_NONE;
170 }
171 EXPORT_SYMBOL_GPL(ptp_qoriq_isr);
172
173 /*
174 * PTP clock operations
175 */
176
ptp_qoriq_adjfine(struct ptp_clock_info * ptp,long scaled_ppm)177 int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
178 {
179 u64 adj, diff;
180 u32 tmr_add;
181 int neg_adj = 0;
182 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
183 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
184
185 if (scaled_ppm < 0) {
186 neg_adj = 1;
187 scaled_ppm = -scaled_ppm;
188 }
189 tmr_add = ptp_qoriq->tmr_add;
190 adj = tmr_add;
191
192 /* calculate diff as adj*(scaled_ppm/65536)/1000000
193 * and round() to the nearest integer
194 */
195 adj *= scaled_ppm;
196 diff = div_u64(adj, 8000000);
197 diff = (diff >> 13) + ((diff >> 12) & 1);
198
199 tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
200
201 ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add);
202
203 return 0;
204 }
205 EXPORT_SYMBOL_GPL(ptp_qoriq_adjfine);
206
ptp_qoriq_adjtime(struct ptp_clock_info * ptp,s64 delta)207 int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta)
208 {
209 s64 now;
210 unsigned long flags;
211 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
212
213 spin_lock_irqsave(&ptp_qoriq->lock, flags);
214
215 now = tmr_cnt_read(ptp_qoriq);
216 now += delta;
217 tmr_cnt_write(ptp_qoriq, now);
218 set_fipers(ptp_qoriq);
219
220 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
221
222 return 0;
223 }
224 EXPORT_SYMBOL_GPL(ptp_qoriq_adjtime);
225
ptp_qoriq_gettime(struct ptp_clock_info * ptp,struct timespec64 * ts)226 int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
227 {
228 u64 ns;
229 unsigned long flags;
230 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
231
232 spin_lock_irqsave(&ptp_qoriq->lock, flags);
233
234 ns = tmr_cnt_read(ptp_qoriq);
235
236 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
237
238 *ts = ns_to_timespec64(ns);
239
240 return 0;
241 }
242 EXPORT_SYMBOL_GPL(ptp_qoriq_gettime);
243
ptp_qoriq_settime(struct ptp_clock_info * ptp,const struct timespec64 * ts)244 int ptp_qoriq_settime(struct ptp_clock_info *ptp,
245 const struct timespec64 *ts)
246 {
247 u64 ns;
248 unsigned long flags;
249 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
250
251 ns = timespec64_to_ns(ts);
252
253 spin_lock_irqsave(&ptp_qoriq->lock, flags);
254
255 tmr_cnt_write(ptp_qoriq, ns);
256 set_fipers(ptp_qoriq);
257
258 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
259
260 return 0;
261 }
262 EXPORT_SYMBOL_GPL(ptp_qoriq_settime);
263
ptp_qoriq_enable(struct ptp_clock_info * ptp,struct ptp_clock_request * rq,int on)264 int ptp_qoriq_enable(struct ptp_clock_info *ptp,
265 struct ptp_clock_request *rq, int on)
266 {
267 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
268 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
269 unsigned long flags;
270 u32 bit, mask = 0;
271
272 switch (rq->type) {
273 case PTP_CLK_REQ_EXTTS:
274 switch (rq->extts.index) {
275 case 0:
276 bit = ETS1EN;
277 break;
278 case 1:
279 bit = ETS2EN;
280 break;
281 default:
282 return -EINVAL;
283 }
284
285 if (on)
286 extts_clean_up(ptp_qoriq, rq->extts.index, false);
287
288 break;
289 case PTP_CLK_REQ_PPS:
290 bit = PP1EN;
291 break;
292 default:
293 return -EOPNOTSUPP;
294 }
295
296 spin_lock_irqsave(&ptp_qoriq->lock, flags);
297
298 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
299 if (on) {
300 mask |= bit;
301 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, bit);
302 } else {
303 mask &= ~bit;
304 }
305
306 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
307
308 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
309 return 0;
310 }
311 EXPORT_SYMBOL_GPL(ptp_qoriq_enable);
312
313 static const struct ptp_clock_info ptp_qoriq_caps = {
314 .owner = THIS_MODULE,
315 .name = "qoriq ptp clock",
316 .max_adj = 512000,
317 .n_alarm = 0,
318 .n_ext_ts = N_EXT_TS,
319 .n_per_out = 0,
320 .n_pins = 0,
321 .pps = 1,
322 .adjfine = ptp_qoriq_adjfine,
323 .adjtime = ptp_qoriq_adjtime,
324 .gettime64 = ptp_qoriq_gettime,
325 .settime64 = ptp_qoriq_settime,
326 .enable = ptp_qoriq_enable,
327 };
328
329 /**
330 * ptp_qoriq_nominal_freq - calculate nominal frequency according to
331 * reference clock frequency
332 *
333 * @clk_src: reference clock frequency
334 *
335 * The nominal frequency is the desired clock frequency.
336 * It should be less than the reference clock frequency.
337 * It should be a factor of 1000MHz.
338 *
339 * Return the nominal frequency
340 */
ptp_qoriq_nominal_freq(u32 clk_src)341 static u32 ptp_qoriq_nominal_freq(u32 clk_src)
342 {
343 u32 remainder = 0;
344
345 clk_src /= 1000000;
346 remainder = clk_src % 100;
347 if (remainder) {
348 clk_src -= remainder;
349 clk_src += 100;
350 }
351
352 do {
353 clk_src -= 100;
354
355 } while (1000 % clk_src);
356
357 return clk_src * 1000000;
358 }
359
360 /**
361 * ptp_qoriq_auto_config - calculate a set of default configurations
362 *
363 * @ptp_qoriq: pointer to ptp_qoriq
364 * @node: pointer to device_node
365 *
366 * If below dts properties are not provided, this function will be
367 * called to calculate a set of default configurations for them.
368 * "fsl,tclk-period"
369 * "fsl,tmr-prsc"
370 * "fsl,tmr-add"
371 * "fsl,tmr-fiper1"
372 * "fsl,tmr-fiper2"
373 * "fsl,tmr-fiper3" (required only for DPAA2 and ENETC hardware)
374 * "fsl,max-adj"
375 *
376 * Return 0 if success
377 */
ptp_qoriq_auto_config(struct ptp_qoriq * ptp_qoriq,struct device_node * node)378 static int ptp_qoriq_auto_config(struct ptp_qoriq *ptp_qoriq,
379 struct device_node *node)
380 {
381 struct clk *clk;
382 u64 freq_comp;
383 u64 max_adj;
384 u32 nominal_freq;
385 u32 remainder = 0;
386 u32 clk_src = 0;
387
388 ptp_qoriq->cksel = DEFAULT_CKSEL;
389
390 clk = of_clk_get(node, 0);
391 if (!IS_ERR(clk)) {
392 clk_src = clk_get_rate(clk);
393 clk_put(clk);
394 }
395
396 if (clk_src <= 100000000UL) {
397 pr_err("error reference clock value, or lower than 100MHz\n");
398 return -EINVAL;
399 }
400
401 nominal_freq = ptp_qoriq_nominal_freq(clk_src);
402 if (!nominal_freq)
403 return -EINVAL;
404
405 ptp_qoriq->tclk_period = 1000000000UL / nominal_freq;
406 ptp_qoriq->tmr_prsc = DEFAULT_TMR_PRSC;
407
408 /* Calculate initial frequency compensation value for TMR_ADD register.
409 * freq_comp = ceil(2^32 / freq_ratio)
410 * freq_ratio = reference_clock_freq / nominal_freq
411 */
412 freq_comp = ((u64)1 << 32) * nominal_freq;
413 freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
414 if (remainder)
415 freq_comp++;
416
417 ptp_qoriq->tmr_add = freq_comp;
418 ptp_qoriq->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - ptp_qoriq->tclk_period;
419 ptp_qoriq->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - ptp_qoriq->tclk_period;
420 ptp_qoriq->tmr_fiper3 = DEFAULT_FIPER3_PERIOD - ptp_qoriq->tclk_period;
421
422 /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1
423 * freq_ratio = reference_clock_freq / nominal_freq
424 */
425 max_adj = 1000000000ULL * (clk_src - nominal_freq);
426 max_adj = div_u64(max_adj, nominal_freq) - 1;
427 ptp_qoriq->caps.max_adj = max_adj;
428
429 return 0;
430 }
431
ptp_qoriq_init(struct ptp_qoriq * ptp_qoriq,void __iomem * base,const struct ptp_clock_info * caps)432 int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base,
433 const struct ptp_clock_info *caps)
434 {
435 struct device_node *node = ptp_qoriq->dev->of_node;
436 struct ptp_qoriq_registers *regs;
437 struct timespec64 now;
438 unsigned long flags;
439 u32 tmr_ctrl;
440
441 if (!node)
442 return -ENODEV;
443
444 ptp_qoriq->base = base;
445 ptp_qoriq->caps = *caps;
446
447 if (of_property_read_u32(node, "fsl,cksel", &ptp_qoriq->cksel))
448 ptp_qoriq->cksel = DEFAULT_CKSEL;
449
450 if (of_property_read_bool(node, "fsl,extts-fifo"))
451 ptp_qoriq->extts_fifo_support = true;
452 else
453 ptp_qoriq->extts_fifo_support = false;
454
455 if (of_device_is_compatible(node, "fsl,dpaa2-ptp") ||
456 of_device_is_compatible(node, "fsl,enetc-ptp"))
457 ptp_qoriq->fiper3_support = true;
458
459 if (of_property_read_u32(node,
460 "fsl,tclk-period", &ptp_qoriq->tclk_period) ||
461 of_property_read_u32(node,
462 "fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) ||
463 of_property_read_u32(node,
464 "fsl,tmr-add", &ptp_qoriq->tmr_add) ||
465 of_property_read_u32(node,
466 "fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) ||
467 of_property_read_u32(node,
468 "fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) ||
469 of_property_read_u32(node,
470 "fsl,max-adj", &ptp_qoriq->caps.max_adj) ||
471 (ptp_qoriq->fiper3_support &&
472 of_property_read_u32(node, "fsl,tmr-fiper3",
473 &ptp_qoriq->tmr_fiper3))) {
474 pr_warn("device tree node missing required elements, try automatic configuration\n");
475
476 if (ptp_qoriq_auto_config(ptp_qoriq, node))
477 return -ENODEV;
478 }
479
480 if (of_property_read_bool(node, "little-endian")) {
481 ptp_qoriq->read = qoriq_read_le;
482 ptp_qoriq->write = qoriq_write_le;
483 } else {
484 ptp_qoriq->read = qoriq_read_be;
485 ptp_qoriq->write = qoriq_write_be;
486 }
487
488 /* The eTSEC uses differnt memory map with DPAA/ENETC */
489 if (of_device_is_compatible(node, "fsl,etsec-ptp")) {
490 ptp_qoriq->regs.ctrl_regs = base + ETSEC_CTRL_REGS_OFFSET;
491 ptp_qoriq->regs.alarm_regs = base + ETSEC_ALARM_REGS_OFFSET;
492 ptp_qoriq->regs.fiper_regs = base + ETSEC_FIPER_REGS_OFFSET;
493 ptp_qoriq->regs.etts_regs = base + ETSEC_ETTS_REGS_OFFSET;
494 } else {
495 ptp_qoriq->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
496 ptp_qoriq->regs.alarm_regs = base + ALARM_REGS_OFFSET;
497 ptp_qoriq->regs.fiper_regs = base + FIPER_REGS_OFFSET;
498 ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET;
499 }
500
501 spin_lock_init(&ptp_qoriq->lock);
502
503 ktime_get_real_ts64(&now);
504 ptp_qoriq_settime(&ptp_qoriq->caps, &now);
505
506 tmr_ctrl =
507 (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
508 (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT;
509
510 spin_lock_irqsave(&ptp_qoriq->lock, flags);
511
512 regs = &ptp_qoriq->regs;
513 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl);
514 ptp_qoriq->write(®s->ctrl_regs->tmr_add, ptp_qoriq->tmr_add);
515 ptp_qoriq->write(®s->ctrl_regs->tmr_prsc, ptp_qoriq->tmr_prsc);
516 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
517 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
518
519 if (ptp_qoriq->fiper3_support)
520 ptp_qoriq->write(®s->fiper_regs->tmr_fiper3,
521 ptp_qoriq->tmr_fiper3);
522
523 set_alarm(ptp_qoriq);
524 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl,
525 tmr_ctrl|FIPERST|RTPE|TE|FRD);
526
527 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
528
529 ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev);
530 if (IS_ERR(ptp_qoriq->clock))
531 return PTR_ERR(ptp_qoriq->clock);
532
533 ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock);
534 ptp_qoriq_create_debugfs(ptp_qoriq);
535 return 0;
536 }
537 EXPORT_SYMBOL_GPL(ptp_qoriq_init);
538
ptp_qoriq_free(struct ptp_qoriq * ptp_qoriq)539 void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq)
540 {
541 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
542
543 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, 0);
544 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, 0);
545
546 ptp_qoriq_remove_debugfs(ptp_qoriq);
547 ptp_clock_unregister(ptp_qoriq->clock);
548 iounmap(ptp_qoriq->base);
549 free_irq(ptp_qoriq->irq, ptp_qoriq);
550 }
551 EXPORT_SYMBOL_GPL(ptp_qoriq_free);
552
ptp_qoriq_probe(struct platform_device * dev)553 static int ptp_qoriq_probe(struct platform_device *dev)
554 {
555 struct ptp_qoriq *ptp_qoriq;
556 int err = -ENOMEM;
557 void __iomem *base;
558
559 ptp_qoriq = kzalloc(sizeof(*ptp_qoriq), GFP_KERNEL);
560 if (!ptp_qoriq)
561 goto no_memory;
562
563 ptp_qoriq->dev = &dev->dev;
564
565 err = -ENODEV;
566
567 ptp_qoriq->irq = platform_get_irq(dev, 0);
568 if (ptp_qoriq->irq < 0) {
569 pr_err("irq not in device tree\n");
570 goto no_node;
571 }
572 if (request_irq(ptp_qoriq->irq, ptp_qoriq_isr, IRQF_SHARED,
573 DRIVER, ptp_qoriq)) {
574 pr_err("request_irq failed\n");
575 goto no_node;
576 }
577
578 ptp_qoriq->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
579 if (!ptp_qoriq->rsrc) {
580 pr_err("no resource\n");
581 goto no_resource;
582 }
583 if (request_resource(&iomem_resource, ptp_qoriq->rsrc)) {
584 pr_err("resource busy\n");
585 goto no_resource;
586 }
587
588 base = ioremap(ptp_qoriq->rsrc->start,
589 resource_size(ptp_qoriq->rsrc));
590 if (!base) {
591 pr_err("ioremap ptp registers failed\n");
592 goto no_ioremap;
593 }
594
595 err = ptp_qoriq_init(ptp_qoriq, base, &ptp_qoriq_caps);
596 if (err)
597 goto no_clock;
598
599 platform_set_drvdata(dev, ptp_qoriq);
600 return 0;
601
602 no_clock:
603 iounmap(ptp_qoriq->base);
604 no_ioremap:
605 release_resource(ptp_qoriq->rsrc);
606 no_resource:
607 free_irq(ptp_qoriq->irq, ptp_qoriq);
608 no_node:
609 kfree(ptp_qoriq);
610 no_memory:
611 return err;
612 }
613
ptp_qoriq_remove(struct platform_device * dev)614 static int ptp_qoriq_remove(struct platform_device *dev)
615 {
616 struct ptp_qoriq *ptp_qoriq = platform_get_drvdata(dev);
617
618 ptp_qoriq_free(ptp_qoriq);
619 release_resource(ptp_qoriq->rsrc);
620 kfree(ptp_qoriq);
621 return 0;
622 }
623
624 static const struct of_device_id match_table[] = {
625 { .compatible = "fsl,etsec-ptp" },
626 { .compatible = "fsl,fman-ptp-timer" },
627 {},
628 };
629 MODULE_DEVICE_TABLE(of, match_table);
630
631 static struct platform_driver ptp_qoriq_driver = {
632 .driver = {
633 .name = "ptp_qoriq",
634 .of_match_table = match_table,
635 },
636 .probe = ptp_qoriq_probe,
637 .remove = ptp_qoriq_remove,
638 };
639
640 module_platform_driver(ptp_qoriq_driver);
641
642 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
643 MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer");
644 MODULE_LICENSE("GPL");
645
