1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Authors:
6 * Eric Anholt <eric@anholt.net>
7 * Dave Airlie <airlied@linux.ie>
8 * Jesse Barnes <jesse.barnes@intel.com>
9 */
10
11 #include <linux/i2c.h>
12 #include <linux/pm_runtime.h>
13
14 #include <drm/drm_simple_kms_helper.h>
15
16 #include "intel_bios.h"
17 #include "power.h"
18 #include "psb_drv.h"
19 #include "psb_intel_drv.h"
20 #include "psb_intel_reg.h"
21
22 /*
23 * LVDS I2C backlight control macros
24 */
25 #define BRIGHTNESS_MAX_LEVEL 100
26 #define BRIGHTNESS_MASK 0xFF
27 #define BLC_I2C_TYPE 0x01
28 #define BLC_PWM_TYPT 0x02
29
30 #define BLC_POLARITY_NORMAL 0
31 #define BLC_POLARITY_INVERSE 1
32
33 #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
34 #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
35 #define PSB_BLC_PWM_PRECISION_FACTOR (10)
36 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
37 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
38
39 struct psb_intel_lvds_priv {
40 /*
41 * Saved LVDO output states
42 */
43 uint32_t savePP_ON;
44 uint32_t savePP_OFF;
45 uint32_t saveLVDS;
46 uint32_t savePP_CONTROL;
47 uint32_t savePP_CYCLE;
48 uint32_t savePFIT_CONTROL;
49 uint32_t savePFIT_PGM_RATIOS;
50 uint32_t saveBLC_PWM_CTL;
51
52 struct psb_intel_i2c_chan *i2c_bus;
53 struct psb_intel_i2c_chan *ddc_bus;
54 };
55
56
57 /*
58 * Returns the maximum level of the backlight duty cycle field.
59 */
psb_intel_lvds_get_max_backlight(struct drm_device * dev)60 static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
61 {
62 struct drm_psb_private *dev_priv = dev->dev_private;
63 u32 ret;
64
65 if (gma_power_begin(dev, false)) {
66 ret = REG_READ(BLC_PWM_CTL);
67 gma_power_end(dev);
68 } else /* Powered off, use the saved value */
69 ret = dev_priv->regs.saveBLC_PWM_CTL;
70
71 /* Top 15bits hold the frequency mask */
72 ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
73 BACKLIGHT_MODULATION_FREQ_SHIFT;
74
75 ret *= 2; /* Return a 16bit range as needed for setting */
76 if (ret == 0)
77 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
78 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
79 return ret;
80 }
81
82 /*
83 * Set LVDS backlight level by I2C command
84 *
85 * FIXME: at some point we need to both track this for PM and also
86 * disable runtime pm on MRST if the brightness is nil (ie blanked)
87 */
psb_lvds_i2c_set_brightness(struct drm_device * dev,unsigned int level)88 static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
89 unsigned int level)
90 {
91 struct drm_psb_private *dev_priv =
92 (struct drm_psb_private *)dev->dev_private;
93
94 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
95 u8 out_buf[2];
96 unsigned int blc_i2c_brightness;
97
98 struct i2c_msg msgs[] = {
99 {
100 .addr = lvds_i2c_bus->slave_addr,
101 .flags = 0,
102 .len = 2,
103 .buf = out_buf,
104 }
105 };
106
107 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
108 BRIGHTNESS_MASK /
109 BRIGHTNESS_MAX_LEVEL);
110
111 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
112 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
113
114 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
115 out_buf[1] = (u8)blc_i2c_brightness;
116
117 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
118 dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
119 dev_priv->lvds_bl->brightnesscmd,
120 blc_i2c_brightness);
121 return 0;
122 }
123
124 dev_err(dev->dev, "I2C transfer error\n");
125 return -1;
126 }
127
128
psb_lvds_pwm_set_brightness(struct drm_device * dev,int level)129 static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
130 {
131 struct drm_psb_private *dev_priv =
132 (struct drm_psb_private *)dev->dev_private;
133
134 u32 max_pwm_blc;
135 u32 blc_pwm_duty_cycle;
136
137 max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
138
139 /*BLC_PWM_CTL Should be initiated while backlight device init*/
140 BUG_ON(max_pwm_blc == 0);
141
142 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
143
144 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
145 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
146
147 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
148 REG_WRITE(BLC_PWM_CTL,
149 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
150 (blc_pwm_duty_cycle));
151
152 dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
153 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
154 (blc_pwm_duty_cycle));
155
156 return 0;
157 }
158
159 /*
160 * Set LVDS backlight level either by I2C or PWM
161 */
psb_intel_lvds_set_brightness(struct drm_device * dev,int level)162 void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
163 {
164 struct drm_psb_private *dev_priv = dev->dev_private;
165
166 dev_dbg(dev->dev, "backlight level is %d\n", level);
167
168 if (!dev_priv->lvds_bl) {
169 dev_err(dev->dev, "NO LVDS backlight info\n");
170 return;
171 }
172
173 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
174 psb_lvds_i2c_set_brightness(dev, level);
175 else
176 psb_lvds_pwm_set_brightness(dev, level);
177 }
178
179 /*
180 * Sets the backlight level.
181 *
182 * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
183 */
psb_intel_lvds_set_backlight(struct drm_device * dev,int level)184 static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
185 {
186 struct drm_psb_private *dev_priv = dev->dev_private;
187 u32 blc_pwm_ctl;
188
189 if (gma_power_begin(dev, false)) {
190 blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
191 blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
192 REG_WRITE(BLC_PWM_CTL,
193 (blc_pwm_ctl |
194 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
195 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
196 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
197 gma_power_end(dev);
198 } else {
199 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
200 ~BACKLIGHT_DUTY_CYCLE_MASK;
201 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
202 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
203 }
204 }
205
206 /*
207 * Sets the power state for the panel.
208 */
psb_intel_lvds_set_power(struct drm_device * dev,bool on)209 static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
210 {
211 struct drm_psb_private *dev_priv = dev->dev_private;
212 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
213 u32 pp_status;
214
215 if (!gma_power_begin(dev, true)) {
216 dev_err(dev->dev, "set power, chip off!\n");
217 return;
218 }
219
220 if (on) {
221 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
222 POWER_TARGET_ON);
223 do {
224 pp_status = REG_READ(PP_STATUS);
225 } while ((pp_status & PP_ON) == 0);
226
227 psb_intel_lvds_set_backlight(dev,
228 mode_dev->backlight_duty_cycle);
229 } else {
230 psb_intel_lvds_set_backlight(dev, 0);
231
232 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
233 ~POWER_TARGET_ON);
234 do {
235 pp_status = REG_READ(PP_STATUS);
236 } while (pp_status & PP_ON);
237 }
238
239 gma_power_end(dev);
240 }
241
psb_intel_lvds_encoder_dpms(struct drm_encoder * encoder,int mode)242 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
243 {
244 struct drm_device *dev = encoder->dev;
245
246 if (mode == DRM_MODE_DPMS_ON)
247 psb_intel_lvds_set_power(dev, true);
248 else
249 psb_intel_lvds_set_power(dev, false);
250
251 /* XXX: We never power down the LVDS pairs. */
252 }
253
psb_intel_lvds_save(struct drm_connector * connector)254 static void psb_intel_lvds_save(struct drm_connector *connector)
255 {
256 struct drm_device *dev = connector->dev;
257 struct drm_psb_private *dev_priv =
258 (struct drm_psb_private *)dev->dev_private;
259 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
260 struct psb_intel_lvds_priv *lvds_priv =
261 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
262
263 lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
264 lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
265 lvds_priv->saveLVDS = REG_READ(LVDS);
266 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
267 lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
268 /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
269 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
270 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
271 lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
272
273 /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
274 dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
275 BACKLIGHT_DUTY_CYCLE_MASK);
276
277 /*
278 * If the light is off at server startup,
279 * just make it full brightness
280 */
281 if (dev_priv->backlight_duty_cycle == 0)
282 dev_priv->backlight_duty_cycle =
283 psb_intel_lvds_get_max_backlight(dev);
284
285 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
286 lvds_priv->savePP_ON,
287 lvds_priv->savePP_OFF,
288 lvds_priv->saveLVDS,
289 lvds_priv->savePP_CONTROL,
290 lvds_priv->savePP_CYCLE,
291 lvds_priv->saveBLC_PWM_CTL);
292 }
293
psb_intel_lvds_restore(struct drm_connector * connector)294 static void psb_intel_lvds_restore(struct drm_connector *connector)
295 {
296 struct drm_device *dev = connector->dev;
297 u32 pp_status;
298 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
299 struct psb_intel_lvds_priv *lvds_priv =
300 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
301
302 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
303 lvds_priv->savePP_ON,
304 lvds_priv->savePP_OFF,
305 lvds_priv->saveLVDS,
306 lvds_priv->savePP_CONTROL,
307 lvds_priv->savePP_CYCLE,
308 lvds_priv->saveBLC_PWM_CTL);
309
310 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
311 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
312 REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
313 REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
314 REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
315 /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
316 REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
317 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
318 REG_WRITE(LVDS, lvds_priv->saveLVDS);
319
320 if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
321 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
322 POWER_TARGET_ON);
323 do {
324 pp_status = REG_READ(PP_STATUS);
325 } while ((pp_status & PP_ON) == 0);
326 } else {
327 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
328 ~POWER_TARGET_ON);
329 do {
330 pp_status = REG_READ(PP_STATUS);
331 } while (pp_status & PP_ON);
332 }
333 }
334
psb_intel_lvds_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)335 enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
336 struct drm_display_mode *mode)
337 {
338 struct drm_psb_private *dev_priv = connector->dev->dev_private;
339 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
340 struct drm_display_mode *fixed_mode =
341 dev_priv->mode_dev.panel_fixed_mode;
342
343 if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
344 fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
345
346 /* just in case */
347 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
348 return MODE_NO_DBLESCAN;
349
350 /* just in case */
351 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
352 return MODE_NO_INTERLACE;
353
354 if (fixed_mode) {
355 if (mode->hdisplay > fixed_mode->hdisplay)
356 return MODE_PANEL;
357 if (mode->vdisplay > fixed_mode->vdisplay)
358 return MODE_PANEL;
359 }
360 return MODE_OK;
361 }
362
psb_intel_lvds_mode_fixup(struct drm_encoder * encoder,const struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)363 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
364 const struct drm_display_mode *mode,
365 struct drm_display_mode *adjusted_mode)
366 {
367 struct drm_device *dev = encoder->dev;
368 struct drm_psb_private *dev_priv = dev->dev_private;
369 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
370 struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
371 struct drm_encoder *tmp_encoder;
372 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
373 struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
374
375 if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
376 panel_fixed_mode = mode_dev->panel_fixed_mode2;
377
378 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
379 if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
380 pr_err("Can't support LVDS on pipe A\n");
381 return false;
382 }
383 if (IS_MRST(dev) && gma_crtc->pipe != 0) {
384 pr_err("Must use PIPE A\n");
385 return false;
386 }
387 /* Should never happen!! */
388 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
389 head) {
390 if (tmp_encoder != encoder
391 && tmp_encoder->crtc == encoder->crtc) {
392 pr_err("Can't enable LVDS and another encoder on the same pipe\n");
393 return false;
394 }
395 }
396
397 /*
398 * If we have timings from the BIOS for the panel, put them in
399 * to the adjusted mode. The CRTC will be set up for this mode,
400 * with the panel scaling set up to source from the H/VDisplay
401 * of the original mode.
402 */
403 if (panel_fixed_mode != NULL) {
404 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
405 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
406 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
407 adjusted_mode->htotal = panel_fixed_mode->htotal;
408 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
409 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
410 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
411 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
412 adjusted_mode->clock = panel_fixed_mode->clock;
413 drm_mode_set_crtcinfo(adjusted_mode,
414 CRTC_INTERLACE_HALVE_V);
415 }
416
417 /*
418 * XXX: It would be nice to support lower refresh rates on the
419 * panels to reduce power consumption, and perhaps match the
420 * user's requested refresh rate.
421 */
422
423 return true;
424 }
425
psb_intel_lvds_prepare(struct drm_encoder * encoder)426 static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
427 {
428 struct drm_device *dev = encoder->dev;
429 struct drm_psb_private *dev_priv = dev->dev_private;
430 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
431
432 if (!gma_power_begin(dev, true))
433 return;
434
435 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
436 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
437 BACKLIGHT_DUTY_CYCLE_MASK);
438
439 psb_intel_lvds_set_power(dev, false);
440
441 gma_power_end(dev);
442 }
443
psb_intel_lvds_commit(struct drm_encoder * encoder)444 static void psb_intel_lvds_commit(struct drm_encoder *encoder)
445 {
446 struct drm_device *dev = encoder->dev;
447 struct drm_psb_private *dev_priv = dev->dev_private;
448 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
449
450 if (mode_dev->backlight_duty_cycle == 0)
451 mode_dev->backlight_duty_cycle =
452 psb_intel_lvds_get_max_backlight(dev);
453
454 psb_intel_lvds_set_power(dev, true);
455 }
456
psb_intel_lvds_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)457 static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
458 struct drm_display_mode *mode,
459 struct drm_display_mode *adjusted_mode)
460 {
461 struct drm_device *dev = encoder->dev;
462 struct drm_psb_private *dev_priv = dev->dev_private;
463 u32 pfit_control;
464
465 /*
466 * The LVDS pin pair will already have been turned on in the
467 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
468 * settings.
469 */
470
471 /*
472 * Enable automatic panel scaling so that non-native modes fill the
473 * screen. Should be enabled before the pipe is enabled, according to
474 * register description and PRM.
475 */
476 if (mode->hdisplay != adjusted_mode->hdisplay ||
477 mode->vdisplay != adjusted_mode->vdisplay)
478 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
479 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
480 HORIZ_INTERP_BILINEAR);
481 else
482 pfit_control = 0;
483
484 if (dev_priv->lvds_dither)
485 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
486
487 REG_WRITE(PFIT_CONTROL, pfit_control);
488 }
489
490 /*
491 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
492 */
psb_intel_lvds_get_modes(struct drm_connector * connector)493 static int psb_intel_lvds_get_modes(struct drm_connector *connector)
494 {
495 struct drm_device *dev = connector->dev;
496 struct drm_psb_private *dev_priv = dev->dev_private;
497 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
498 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
499 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
500 int ret = 0;
501
502 if (!IS_MRST(dev))
503 ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
504
505 if (ret)
506 return ret;
507
508 if (mode_dev->panel_fixed_mode != NULL) {
509 struct drm_display_mode *mode =
510 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
511 drm_mode_probed_add(connector, mode);
512 return 1;
513 }
514
515 return 0;
516 }
517
518 /**
519 * psb_intel_lvds_destroy - unregister and free LVDS structures
520 * @connector: connector to free
521 *
522 * Unregister the DDC bus for this connector then free the driver private
523 * structure.
524 */
psb_intel_lvds_destroy(struct drm_connector * connector)525 void psb_intel_lvds_destroy(struct drm_connector *connector)
526 {
527 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
528 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
529
530 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
531 drm_connector_unregister(connector);
532 drm_connector_cleanup(connector);
533 kfree(connector);
534 }
535
psb_intel_lvds_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t value)536 int psb_intel_lvds_set_property(struct drm_connector *connector,
537 struct drm_property *property,
538 uint64_t value)
539 {
540 struct drm_encoder *encoder = connector->encoder;
541
542 if (!encoder)
543 return -1;
544
545 if (!strcmp(property->name, "scaling mode")) {
546 struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
547 uint64_t curval;
548
549 if (!crtc)
550 goto set_prop_error;
551
552 switch (value) {
553 case DRM_MODE_SCALE_FULLSCREEN:
554 break;
555 case DRM_MODE_SCALE_NO_SCALE:
556 break;
557 case DRM_MODE_SCALE_ASPECT:
558 break;
559 default:
560 goto set_prop_error;
561 }
562
563 if (drm_object_property_get_value(&connector->base,
564 property,
565 &curval))
566 goto set_prop_error;
567
568 if (curval == value)
569 goto set_prop_done;
570
571 if (drm_object_property_set_value(&connector->base,
572 property,
573 value))
574 goto set_prop_error;
575
576 if (crtc->saved_mode.hdisplay != 0 &&
577 crtc->saved_mode.vdisplay != 0) {
578 if (!drm_crtc_helper_set_mode(encoder->crtc,
579 &crtc->saved_mode,
580 encoder->crtc->x,
581 encoder->crtc->y,
582 encoder->crtc->primary->fb))
583 goto set_prop_error;
584 }
585 } else if (!strcmp(property->name, "backlight")) {
586 if (drm_object_property_set_value(&connector->base,
587 property,
588 value))
589 goto set_prop_error;
590 else
591 gma_backlight_set(encoder->dev, value);
592 } else if (!strcmp(property->name, "DPMS")) {
593 const struct drm_encoder_helper_funcs *hfuncs
594 = encoder->helper_private;
595 hfuncs->dpms(encoder, value);
596 }
597
598 set_prop_done:
599 return 0;
600 set_prop_error:
601 return -1;
602 }
603
604 static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
605 .dpms = psb_intel_lvds_encoder_dpms,
606 .mode_fixup = psb_intel_lvds_mode_fixup,
607 .prepare = psb_intel_lvds_prepare,
608 .mode_set = psb_intel_lvds_mode_set,
609 .commit = psb_intel_lvds_commit,
610 };
611
612 const struct drm_connector_helper_funcs
613 psb_intel_lvds_connector_helper_funcs = {
614 .get_modes = psb_intel_lvds_get_modes,
615 .mode_valid = psb_intel_lvds_mode_valid,
616 .best_encoder = gma_best_encoder,
617 };
618
619 const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
620 .dpms = drm_helper_connector_dpms,
621 .fill_modes = drm_helper_probe_single_connector_modes,
622 .set_property = psb_intel_lvds_set_property,
623 .destroy = psb_intel_lvds_destroy,
624 };
625
626 /**
627 * psb_intel_lvds_init - setup LVDS connectors on this device
628 * @dev: drm device
629 *
630 * Create the connector, register the LVDS DDC bus, and try to figure out what
631 * modes we can display on the LVDS panel (if present).
632 */
psb_intel_lvds_init(struct drm_device * dev,struct psb_intel_mode_device * mode_dev)633 void psb_intel_lvds_init(struct drm_device *dev,
634 struct psb_intel_mode_device *mode_dev)
635 {
636 struct gma_encoder *gma_encoder;
637 struct gma_connector *gma_connector;
638 struct psb_intel_lvds_priv *lvds_priv;
639 struct drm_connector *connector;
640 struct drm_encoder *encoder;
641 struct drm_display_mode *scan; /* *modes, *bios_mode; */
642 struct drm_crtc *crtc;
643 struct drm_psb_private *dev_priv = dev->dev_private;
644 u32 lvds;
645 int pipe;
646
647 gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
648 if (!gma_encoder) {
649 dev_err(dev->dev, "gma_encoder allocation error\n");
650 return;
651 }
652
653 gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
654 if (!gma_connector) {
655 dev_err(dev->dev, "gma_connector allocation error\n");
656 goto failed_encoder;
657 }
658
659 lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
660 if (!lvds_priv) {
661 dev_err(dev->dev, "LVDS private allocation error\n");
662 goto failed_connector;
663 }
664
665 gma_encoder->dev_priv = lvds_priv;
666
667 connector = &gma_connector->base;
668 gma_connector->save = psb_intel_lvds_save;
669 gma_connector->restore = psb_intel_lvds_restore;
670
671 encoder = &gma_encoder->base;
672 drm_connector_init(dev, connector,
673 &psb_intel_lvds_connector_funcs,
674 DRM_MODE_CONNECTOR_LVDS);
675
676 drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
677
678 gma_connector_attach_encoder(gma_connector, gma_encoder);
679 gma_encoder->type = INTEL_OUTPUT_LVDS;
680
681 drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
682 drm_connector_helper_add(connector,
683 &psb_intel_lvds_connector_helper_funcs);
684 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
685 connector->interlace_allowed = false;
686 connector->doublescan_allowed = false;
687
688 /*Attach connector properties*/
689 drm_object_attach_property(&connector->base,
690 dev->mode_config.scaling_mode_property,
691 DRM_MODE_SCALE_FULLSCREEN);
692 drm_object_attach_property(&connector->base,
693 dev_priv->backlight_property,
694 BRIGHTNESS_MAX_LEVEL);
695
696 /*
697 * Set up I2C bus
698 * FIXME: distroy i2c_bus when exit
699 */
700 lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
701 if (!lvds_priv->i2c_bus) {
702 dev_printk(KERN_ERR,
703 &dev->pdev->dev, "I2C bus registration failed.\n");
704 goto failed_blc_i2c;
705 }
706 lvds_priv->i2c_bus->slave_addr = 0x2C;
707 dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
708
709 /*
710 * LVDS discovery:
711 * 1) check for EDID on DDC
712 * 2) check for VBT data
713 * 3) check to see if LVDS is already on
714 * if none of the above, no panel
715 * 4) make sure lid is open
716 * if closed, act like it's not there for now
717 */
718
719 /* Set up the DDC bus. */
720 lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
721 if (!lvds_priv->ddc_bus) {
722 dev_printk(KERN_ERR, &dev->pdev->dev,
723 "DDC bus registration " "failed.\n");
724 goto failed_ddc;
725 }
726
727 /*
728 * Attempt to get the fixed panel mode from DDC. Assume that the
729 * preferred mode is the right one.
730 */
731 mutex_lock(&dev->mode_config.mutex);
732 psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
733 list_for_each_entry(scan, &connector->probed_modes, head) {
734 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
735 mode_dev->panel_fixed_mode =
736 drm_mode_duplicate(dev, scan);
737 DRM_DEBUG_KMS("Using mode from DDC\n");
738 goto out; /* FIXME: check for quirks */
739 }
740 }
741
742 /* Failed to get EDID, what about VBT? do we need this? */
743 if (dev_priv->lfp_lvds_vbt_mode) {
744 mode_dev->panel_fixed_mode =
745 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
746
747 if (mode_dev->panel_fixed_mode) {
748 mode_dev->panel_fixed_mode->type |=
749 DRM_MODE_TYPE_PREFERRED;
750 DRM_DEBUG_KMS("Using mode from VBT\n");
751 goto out;
752 }
753 }
754
755 /*
756 * If we didn't get EDID, try checking if the panel is already turned
757 * on. If so, assume that whatever is currently programmed is the
758 * correct mode.
759 */
760 lvds = REG_READ(LVDS);
761 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
762 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
763
764 if (crtc && (lvds & LVDS_PORT_EN)) {
765 mode_dev->panel_fixed_mode =
766 psb_intel_crtc_mode_get(dev, crtc);
767 if (mode_dev->panel_fixed_mode) {
768 mode_dev->panel_fixed_mode->type |=
769 DRM_MODE_TYPE_PREFERRED;
770 DRM_DEBUG_KMS("Using pre-programmed mode\n");
771 goto out; /* FIXME: check for quirks */
772 }
773 }
774
775 /* If we still don't have a mode after all that, give up. */
776 if (!mode_dev->panel_fixed_mode) {
777 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
778 goto failed_find;
779 }
780
781 /*
782 * Blacklist machines with BIOSes that list an LVDS panel without
783 * actually having one.
784 */
785 out:
786 mutex_unlock(&dev->mode_config.mutex);
787 drm_connector_register(connector);
788 return;
789
790 failed_find:
791 mutex_unlock(&dev->mode_config.mutex);
792 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
793 failed_ddc:
794 psb_intel_i2c_destroy(lvds_priv->i2c_bus);
795 failed_blc_i2c:
796 drm_encoder_cleanup(encoder);
797 drm_connector_cleanup(connector);
798 failed_connector:
799 kfree(gma_connector);
800 failed_encoder:
801 kfree(gma_encoder);
802 }
803
804
