1 /*
2 * Based on Ocelot Linux port, which is
3 * Copyright 2001 MontaVista Software Inc.
4 * Author: jsun@mvista.com or jsun@junsun.net
5 *
6 * Copyright 2003 ICT CAS
7 * Author: Michael Guo <guoyi@ict.ac.cn>
8 *
9 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
10 * Author: Fuxin Zhang, zhangfx@lemote.com
11 *
12 * Copyright (C) 2009 Lemote Inc.
13 * Author: Wu Zhangjin, wuzhangjin@gmail.com
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20 #include <linux/export.h>
21 #include <asm/bootinfo.h>
22 #include <loongson.h>
23 #include <boot_param.h>
24 #include <workarounds.h>
25
26 u32 cpu_clock_freq;
27 EXPORT_SYMBOL(cpu_clock_freq);
28 struct efi_memory_map_loongson *loongson_memmap;
29 struct loongson_system_configuration loongson_sysconf;
30
31 u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
32 u64 loongson_chiptemp[MAX_PACKAGES];
33 u64 loongson_freqctrl[MAX_PACKAGES];
34
35 unsigned long long smp_group[4];
36
37 #define parse_even_earlier(res, option, p) \
38 do { \
39 unsigned int tmp __maybe_unused; \
40 \
41 if (strncmp(option, (char *)p, strlen(option)) == 0) \
42 tmp = kstrtou32((char *)p + strlen(option"="), 10, &res); \
43 } while (0)
44
prom_init_env(void)45 void __init prom_init_env(void)
46 {
47 /* pmon passes arguments in 32bit pointers */
48 unsigned int processor_id;
49
50 #ifndef CONFIG_LEFI_FIRMWARE_INTERFACE
51 int *_prom_envp;
52 long l;
53
54 /* firmware arguments are initialized in head.S */
55 _prom_envp = (int *)fw_arg2;
56
57 l = (long)*_prom_envp;
58 while (l != 0) {
59 parse_even_earlier(cpu_clock_freq, "cpuclock", l);
60 parse_even_earlier(memsize, "memsize", l);
61 parse_even_earlier(highmemsize, "highmemsize", l);
62 _prom_envp++;
63 l = (long)*_prom_envp;
64 }
65 if (memsize == 0)
66 memsize = 256;
67
68 loongson_sysconf.nr_uarts = 1;
69
70 pr_info("memsize=%u, highmemsize=%u\n", memsize, highmemsize);
71 #else
72 struct boot_params *boot_p;
73 struct loongson_params *loongson_p;
74 struct system_loongson *esys;
75 struct efi_cpuinfo_loongson *ecpu;
76 struct irq_source_routing_table *eirq_source;
77
78 /* firmware arguments are initialized in head.S */
79 boot_p = (struct boot_params *)fw_arg2;
80 loongson_p = &(boot_p->efi.smbios.lp);
81
82 esys = (struct system_loongson *)
83 ((u64)loongson_p + loongson_p->system_offset);
84 ecpu = (struct efi_cpuinfo_loongson *)
85 ((u64)loongson_p + loongson_p->cpu_offset);
86 eirq_source = (struct irq_source_routing_table *)
87 ((u64)loongson_p + loongson_p->irq_offset);
88 loongson_memmap = (struct efi_memory_map_loongson *)
89 ((u64)loongson_p + loongson_p->memory_offset);
90
91 cpu_clock_freq = ecpu->cpu_clock_freq;
92 loongson_sysconf.cputype = ecpu->cputype;
93 switch (ecpu->cputype) {
94 case Legacy_3A:
95 case Loongson_3A:
96 loongson_sysconf.cores_per_node = 4;
97 loongson_sysconf.cores_per_package = 4;
98 smp_group[0] = 0x900000003ff01000;
99 smp_group[1] = 0x900010003ff01000;
100 smp_group[2] = 0x900020003ff01000;
101 smp_group[3] = 0x900030003ff01000;
102 loongson_chipcfg[0] = 0x900000001fe00180;
103 loongson_chipcfg[1] = 0x900010001fe00180;
104 loongson_chipcfg[2] = 0x900020001fe00180;
105 loongson_chipcfg[3] = 0x900030001fe00180;
106 loongson_chiptemp[0] = 0x900000001fe0019c;
107 loongson_chiptemp[1] = 0x900010001fe0019c;
108 loongson_chiptemp[2] = 0x900020001fe0019c;
109 loongson_chiptemp[3] = 0x900030001fe0019c;
110 loongson_freqctrl[0] = 0x900000001fe001d0;
111 loongson_freqctrl[1] = 0x900010001fe001d0;
112 loongson_freqctrl[2] = 0x900020001fe001d0;
113 loongson_freqctrl[3] = 0x900030001fe001d0;
114 loongson_sysconf.ht_control_base = 0x90000EFDFB000000;
115 loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
116 break;
117 case Legacy_3B:
118 case Loongson_3B:
119 loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
120 loongson_sysconf.cores_per_package = 8;
121 smp_group[0] = 0x900000003ff01000;
122 smp_group[1] = 0x900010003ff05000;
123 smp_group[2] = 0x900020003ff09000;
124 smp_group[3] = 0x900030003ff0d000;
125 loongson_chipcfg[0] = 0x900000001fe00180;
126 loongson_chipcfg[1] = 0x900020001fe00180;
127 loongson_chipcfg[2] = 0x900040001fe00180;
128 loongson_chipcfg[3] = 0x900060001fe00180;
129 loongson_chiptemp[0] = 0x900000001fe0019c;
130 loongson_chiptemp[1] = 0x900020001fe0019c;
131 loongson_chiptemp[2] = 0x900040001fe0019c;
132 loongson_chiptemp[3] = 0x900060001fe0019c;
133 loongson_freqctrl[0] = 0x900000001fe001d0;
134 loongson_freqctrl[1] = 0x900020001fe001d0;
135 loongson_freqctrl[2] = 0x900040001fe001d0;
136 loongson_freqctrl[3] = 0x900060001fe001d0;
137 loongson_sysconf.ht_control_base = 0x90001EFDFB000000;
138 loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
139 break;
140 default:
141 loongson_sysconf.cores_per_node = 1;
142 loongson_sysconf.cores_per_package = 1;
143 loongson_chipcfg[0] = 0x900000001fe00180;
144 }
145
146 loongson_sysconf.nr_cpus = ecpu->nr_cpus;
147 loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
148 loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
149 if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
150 loongson_sysconf.nr_cpus = NR_CPUS;
151 loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
152 loongson_sysconf.cores_per_node - 1) /
153 loongson_sysconf.cores_per_node;
154
155 loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
156 loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
157 loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;
158 loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
159 if (loongson_sysconf.dma_mask_bits < 32 ||
160 loongson_sysconf.dma_mask_bits > 64)
161 loongson_sysconf.dma_mask_bits = 32;
162
163 loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
164 loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
165 loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;
166
167 loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
168 pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
169 loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
170 loongson_sysconf.vgabios_addr);
171
172 memset(loongson_sysconf.ecname, 0, 32);
173 if (esys->has_ec)
174 memcpy(loongson_sysconf.ecname, esys->ec_name, 32);
175 loongson_sysconf.workarounds |= esys->workarounds;
176
177 loongson_sysconf.nr_uarts = esys->nr_uarts;
178 if (esys->nr_uarts < 1 || esys->nr_uarts > MAX_UARTS)
179 loongson_sysconf.nr_uarts = 1;
180 memcpy(loongson_sysconf.uarts, esys->uarts,
181 sizeof(struct uart_device) * loongson_sysconf.nr_uarts);
182
183 loongson_sysconf.nr_sensors = esys->nr_sensors;
184 if (loongson_sysconf.nr_sensors > MAX_SENSORS)
185 loongson_sysconf.nr_sensors = 0;
186 if (loongson_sysconf.nr_sensors)
187 memcpy(loongson_sysconf.sensors, esys->sensors,
188 sizeof(struct sensor_device) * loongson_sysconf.nr_sensors);
189 #endif
190 if (cpu_clock_freq == 0) {
191 processor_id = (¤t_cpu_data)->processor_id;
192 switch (processor_id & PRID_REV_MASK) {
193 case PRID_REV_LOONGSON2E:
194 cpu_clock_freq = 533080000;
195 break;
196 case PRID_REV_LOONGSON2F:
197 cpu_clock_freq = 797000000;
198 break;
199 case PRID_REV_LOONGSON3A_R1:
200 case PRID_REV_LOONGSON3A_R2:
201 case PRID_REV_LOONGSON3A_R3_0:
202 case PRID_REV_LOONGSON3A_R3_1:
203 cpu_clock_freq = 900000000;
204 break;
205 case PRID_REV_LOONGSON3B_R1:
206 case PRID_REV_LOONGSON3B_R2:
207 cpu_clock_freq = 1000000000;
208 break;
209 default:
210 cpu_clock_freq = 100000000;
211 break;
212 }
213 }
214 pr_info("CpuClock = %u\n", cpu_clock_freq);
215 }
216
