1 /*
2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #undef DEBUG
14
15 #include <linux/export.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/platform_device.h>
24 #include <linux/seq_file.h>
25 #include <linux/ioport.h>
26 #include <linux/console.h>
27 #include <linux/screen_info.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/percpu.h>
35 #include <linux/memblock.h>
36 #include <linux/of_platform.h>
37 #include <linux/hugetlb.h>
38 #include <asm/debugfs.h>
39 #include <asm/io.h>
40 #include <asm/paca.h>
41 #include <asm/prom.h>
42 #include <asm/processor.h>
43 #include <asm/vdso_datapage.h>
44 #include <asm/pgtable.h>
45 #include <asm/smp.h>
46 #include <asm/elf.h>
47 #include <asm/machdep.h>
48 #include <asm/time.h>
49 #include <asm/cputable.h>
50 #include <asm/sections.h>
51 #include <asm/firmware.h>
52 #include <asm/btext.h>
53 #include <asm/nvram.h>
54 #include <asm/setup.h>
55 #include <asm/rtas.h>
56 #include <asm/iommu.h>
57 #include <asm/serial.h>
58 #include <asm/cache.h>
59 #include <asm/page.h>
60 #include <asm/mmu.h>
61 #include <asm/xmon.h>
62 #include <asm/cputhreads.h>
63 #include <mm/mmu_decl.h>
64 #include <asm/fadump.h>
65 #include <asm/udbg.h>
66 #include <asm/hugetlb.h>
67 #include <asm/livepatch.h>
68 #include <asm/mmu_context.h>
69 #include <asm/cpu_has_feature.h>
70
71 #include "setup.h"
72
73 #ifdef DEBUG
74 #include <asm/udbg.h>
75 #define DBG(fmt...) udbg_printf(fmt)
76 #else
77 #define DBG(fmt...)
78 #endif
79
80 /* The main machine-dep calls structure
81 */
82 struct machdep_calls ppc_md;
83 EXPORT_SYMBOL(ppc_md);
84 struct machdep_calls *machine_id;
85 EXPORT_SYMBOL(machine_id);
86
87 int boot_cpuid = -1;
88 EXPORT_SYMBOL_GPL(boot_cpuid);
89
90 /*
91 * These are used in binfmt_elf.c to put aux entries on the stack
92 * for each elf executable being started.
93 */
94 int dcache_bsize;
95 int icache_bsize;
96 int ucache_bsize;
97
98
99 unsigned long klimit = (unsigned long) _end;
100
101 /*
102 * This still seems to be needed... -- paulus
103 */
104 struct screen_info screen_info = {
105 .orig_x = 0,
106 .orig_y = 25,
107 .orig_video_cols = 80,
108 .orig_video_lines = 25,
109 .orig_video_isVGA = 1,
110 .orig_video_points = 16
111 };
112 #if defined(CONFIG_FB_VGA16_MODULE)
113 EXPORT_SYMBOL(screen_info);
114 #endif
115
116 /* Variables required to store legacy IO irq routing */
117 int of_i8042_kbd_irq;
118 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
119 int of_i8042_aux_irq;
120 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
121
122 #ifdef __DO_IRQ_CANON
123 /* XXX should go elsewhere eventually */
124 int ppc_do_canonicalize_irqs;
125 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
126 #endif
127
128 #ifdef CONFIG_CRASH_CORE
129 /* This keeps a track of which one is the crashing cpu. */
130 int crashing_cpu = -1;
131 #endif
132
133 /* also used by kexec */
machine_shutdown(void)134 void machine_shutdown(void)
135 {
136 #ifdef CONFIG_FA_DUMP
137 /*
138 * if fadump is active, cleanup the fadump registration before we
139 * shutdown.
140 */
141 fadump_cleanup();
142 #endif
143
144 if (ppc_md.machine_shutdown)
145 ppc_md.machine_shutdown();
146 }
147
machine_hang(void)148 static void machine_hang(void)
149 {
150 pr_emerg("System Halted, OK to turn off power\n");
151 local_irq_disable();
152 while (1)
153 ;
154 }
155
machine_restart(char * cmd)156 void machine_restart(char *cmd)
157 {
158 machine_shutdown();
159 if (ppc_md.restart)
160 ppc_md.restart(cmd);
161
162 smp_send_stop();
163
164 do_kernel_restart(cmd);
165 mdelay(1000);
166
167 machine_hang();
168 }
169
machine_power_off(void)170 void machine_power_off(void)
171 {
172 machine_shutdown();
173 if (pm_power_off)
174 pm_power_off();
175
176 smp_send_stop();
177 machine_hang();
178 }
179 /* Used by the G5 thermal driver */
180 EXPORT_SYMBOL_GPL(machine_power_off);
181
182 void (*pm_power_off)(void);
183 EXPORT_SYMBOL_GPL(pm_power_off);
184
machine_halt(void)185 void machine_halt(void)
186 {
187 machine_shutdown();
188 if (ppc_md.halt)
189 ppc_md.halt();
190
191 smp_send_stop();
192 machine_hang();
193 }
194
195 #ifdef CONFIG_SMP
196 DEFINE_PER_CPU(unsigned int, cpu_pvr);
197 #endif
198
show_cpuinfo_summary(struct seq_file * m)199 static void show_cpuinfo_summary(struct seq_file *m)
200 {
201 struct device_node *root;
202 const char *model = NULL;
203 #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
204 unsigned long bogosum = 0;
205 int i;
206 for_each_online_cpu(i)
207 bogosum += loops_per_jiffy;
208 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
209 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
210 #endif /* CONFIG_SMP && CONFIG_PPC32 */
211 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
212 if (ppc_md.name)
213 seq_printf(m, "platform\t: %s\n", ppc_md.name);
214 root = of_find_node_by_path("/");
215 if (root)
216 model = of_get_property(root, "model", NULL);
217 if (model)
218 seq_printf(m, "model\t\t: %s\n", model);
219 of_node_put(root);
220
221 if (ppc_md.show_cpuinfo != NULL)
222 ppc_md.show_cpuinfo(m);
223
224 #ifdef CONFIG_PPC32
225 /* Display the amount of memory */
226 seq_printf(m, "Memory\t\t: %d MB\n",
227 (unsigned int)(total_memory / (1024 * 1024)));
228 #endif
229 }
230
show_cpuinfo(struct seq_file * m,void * v)231 static int show_cpuinfo(struct seq_file *m, void *v)
232 {
233 unsigned long cpu_id = (unsigned long)v - 1;
234 unsigned int pvr;
235 unsigned long proc_freq;
236 unsigned short maj;
237 unsigned short min;
238
239 #ifdef CONFIG_SMP
240 pvr = per_cpu(cpu_pvr, cpu_id);
241 #else
242 pvr = mfspr(SPRN_PVR);
243 #endif
244 maj = (pvr >> 8) & 0xFF;
245 min = pvr & 0xFF;
246
247 seq_printf(m, "processor\t: %lu\n", cpu_id);
248 seq_printf(m, "cpu\t\t: ");
249
250 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
251 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
252 else
253 seq_printf(m, "unknown (%08x)", pvr);
254
255 #ifdef CONFIG_ALTIVEC
256 if (cpu_has_feature(CPU_FTR_ALTIVEC))
257 seq_printf(m, ", altivec supported");
258 #endif /* CONFIG_ALTIVEC */
259
260 seq_printf(m, "\n");
261
262 #ifdef CONFIG_TAU
263 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
264 #ifdef CONFIG_TAU_AVERAGE
265 /* more straightforward, but potentially misleading */
266 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
267 cpu_temp(cpu_id));
268 #else
269 /* show the actual temp sensor range */
270 u32 temp;
271 temp = cpu_temp_both(cpu_id);
272 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
273 temp & 0xff, temp >> 16);
274 #endif
275 }
276 #endif /* CONFIG_TAU */
277
278 /*
279 * Platforms that have variable clock rates, should implement
280 * the method ppc_md.get_proc_freq() that reports the clock
281 * rate of a given cpu. The rest can use ppc_proc_freq to
282 * report the clock rate that is same across all cpus.
283 */
284 if (ppc_md.get_proc_freq)
285 proc_freq = ppc_md.get_proc_freq(cpu_id);
286 else
287 proc_freq = ppc_proc_freq;
288
289 if (proc_freq)
290 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
291 proc_freq / 1000000, proc_freq % 1000000);
292
293 if (ppc_md.show_percpuinfo != NULL)
294 ppc_md.show_percpuinfo(m, cpu_id);
295
296 /* If we are a Freescale core do a simple check so
297 * we dont have to keep adding cases in the future */
298 if (PVR_VER(pvr) & 0x8000) {
299 switch (PVR_VER(pvr)) {
300 case 0x8000: /* 7441/7450/7451, Voyager */
301 case 0x8001: /* 7445/7455, Apollo 6 */
302 case 0x8002: /* 7447/7457, Apollo 7 */
303 case 0x8003: /* 7447A, Apollo 7 PM */
304 case 0x8004: /* 7448, Apollo 8 */
305 case 0x800c: /* 7410, Nitro */
306 maj = ((pvr >> 8) & 0xF);
307 min = PVR_MIN(pvr);
308 break;
309 default: /* e500/book-e */
310 maj = PVR_MAJ(pvr);
311 min = PVR_MIN(pvr);
312 break;
313 }
314 } else {
315 switch (PVR_VER(pvr)) {
316 case 0x0020: /* 403 family */
317 maj = PVR_MAJ(pvr) + 1;
318 min = PVR_MIN(pvr);
319 break;
320 case 0x1008: /* 740P/750P ?? */
321 maj = ((pvr >> 8) & 0xFF) - 1;
322 min = pvr & 0xFF;
323 break;
324 case 0x004e: /* POWER9 bits 12-15 give chip type */
325 maj = (pvr >> 8) & 0x0F;
326 min = pvr & 0xFF;
327 break;
328 default:
329 maj = (pvr >> 8) & 0xFF;
330 min = pvr & 0xFF;
331 break;
332 }
333 }
334
335 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
336 maj, min, PVR_VER(pvr), PVR_REV(pvr));
337
338 #ifdef CONFIG_PPC32
339 seq_printf(m, "bogomips\t: %lu.%02lu\n",
340 loops_per_jiffy / (500000/HZ),
341 (loops_per_jiffy / (5000/HZ)) % 100);
342 #endif
343 seq_printf(m, "\n");
344
345 /* If this is the last cpu, print the summary */
346 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
347 show_cpuinfo_summary(m);
348
349 return 0;
350 }
351
c_start(struct seq_file * m,loff_t * pos)352 static void *c_start(struct seq_file *m, loff_t *pos)
353 {
354 if (*pos == 0) /* just in case, cpu 0 is not the first */
355 *pos = cpumask_first(cpu_online_mask);
356 else
357 *pos = cpumask_next(*pos - 1, cpu_online_mask);
358 if ((*pos) < nr_cpu_ids)
359 return (void *)(unsigned long)(*pos + 1);
360 return NULL;
361 }
362
c_next(struct seq_file * m,void * v,loff_t * pos)363 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
364 {
365 (*pos)++;
366 return c_start(m, pos);
367 }
368
c_stop(struct seq_file * m,void * v)369 static void c_stop(struct seq_file *m, void *v)
370 {
371 }
372
373 const struct seq_operations cpuinfo_op = {
374 .start = c_start,
375 .next = c_next,
376 .stop = c_stop,
377 .show = show_cpuinfo,
378 };
379
check_for_initrd(void)380 void __init check_for_initrd(void)
381 {
382 #ifdef CONFIG_BLK_DEV_INITRD
383 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
384 initrd_start, initrd_end);
385
386 /* If we were passed an initrd, set the ROOT_DEV properly if the values
387 * look sensible. If not, clear initrd reference.
388 */
389 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
390 initrd_end > initrd_start)
391 ROOT_DEV = Root_RAM0;
392 else
393 initrd_start = initrd_end = 0;
394
395 if (initrd_start)
396 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
397
398 DBG(" <- check_for_initrd()\n");
399 #endif /* CONFIG_BLK_DEV_INITRD */
400 }
401
402 #ifdef CONFIG_SMP
403
404 int threads_per_core, threads_per_subcore, threads_shift;
405 cpumask_t threads_core_mask;
406 EXPORT_SYMBOL_GPL(threads_per_core);
407 EXPORT_SYMBOL_GPL(threads_per_subcore);
408 EXPORT_SYMBOL_GPL(threads_shift);
409 EXPORT_SYMBOL_GPL(threads_core_mask);
410
cpu_init_thread_core_maps(int tpc)411 static void __init cpu_init_thread_core_maps(int tpc)
412 {
413 int i;
414
415 threads_per_core = tpc;
416 threads_per_subcore = tpc;
417 cpumask_clear(&threads_core_mask);
418
419 /* This implementation only supports power of 2 number of threads
420 * for simplicity and performance
421 */
422 threads_shift = ilog2(tpc);
423 BUG_ON(tpc != (1 << threads_shift));
424
425 for (i = 0; i < tpc; i++)
426 cpumask_set_cpu(i, &threads_core_mask);
427
428 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
429 tpc, tpc > 1 ? "s" : "");
430 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
431 }
432
433
434 u32 *cpu_to_phys_id = NULL;
435
436 /**
437 * setup_cpu_maps - initialize the following cpu maps:
438 * cpu_possible_mask
439 * cpu_present_mask
440 *
441 * Having the possible map set up early allows us to restrict allocations
442 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
443 *
444 * We do not initialize the online map here; cpus set their own bits in
445 * cpu_online_mask as they come up.
446 *
447 * This function is valid only for Open Firmware systems. finish_device_tree
448 * must be called before using this.
449 *
450 * While we're here, we may as well set the "physical" cpu ids in the paca.
451 *
452 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
453 */
smp_setup_cpu_maps(void)454 void __init smp_setup_cpu_maps(void)
455 {
456 struct device_node *dn;
457 int cpu = 0;
458 int nthreads = 1;
459
460 DBG("smp_setup_cpu_maps()\n");
461
462 cpu_to_phys_id = __va(memblock_alloc(nr_cpu_ids * sizeof(u32),
463 __alignof__(u32)));
464 memset(cpu_to_phys_id, 0, nr_cpu_ids * sizeof(u32));
465
466 for_each_node_by_type(dn, "cpu") {
467 const __be32 *intserv;
468 __be32 cpu_be;
469 int j, len;
470
471 DBG(" * %pOF...\n", dn);
472
473 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
474 &len);
475 if (intserv) {
476 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
477 nthreads);
478 } else {
479 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
480 intserv = of_get_property(dn, "reg", &len);
481 if (!intserv) {
482 cpu_be = cpu_to_be32(cpu);
483 /* XXX: what is this? uninitialized?? */
484 intserv = &cpu_be; /* assume logical == phys */
485 len = 4;
486 }
487 }
488
489 nthreads = len / sizeof(int);
490
491 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
492 bool avail;
493
494 DBG(" thread %d -> cpu %d (hard id %d)\n",
495 j, cpu, be32_to_cpu(intserv[j]));
496
497 avail = of_device_is_available(dn);
498 if (!avail)
499 avail = !of_property_match_string(dn,
500 "enable-method", "spin-table");
501
502 set_cpu_present(cpu, avail);
503 set_cpu_possible(cpu, true);
504 cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
505 cpu++;
506 }
507
508 if (cpu >= nr_cpu_ids) {
509 of_node_put(dn);
510 break;
511 }
512 }
513
514 /* If no SMT supported, nthreads is forced to 1 */
515 if (!cpu_has_feature(CPU_FTR_SMT)) {
516 DBG(" SMT disabled ! nthreads forced to 1\n");
517 nthreads = 1;
518 }
519
520 #ifdef CONFIG_PPC64
521 /*
522 * On pSeries LPAR, we need to know how many cpus
523 * could possibly be added to this partition.
524 */
525 if (firmware_has_feature(FW_FEATURE_LPAR) &&
526 (dn = of_find_node_by_path("/rtas"))) {
527 int num_addr_cell, num_size_cell, maxcpus;
528 const __be32 *ireg;
529
530 num_addr_cell = of_n_addr_cells(dn);
531 num_size_cell = of_n_size_cells(dn);
532
533 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
534
535 if (!ireg)
536 goto out;
537
538 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
539
540 /* Double maxcpus for processors which have SMT capability */
541 if (cpu_has_feature(CPU_FTR_SMT))
542 maxcpus *= nthreads;
543
544 if (maxcpus > nr_cpu_ids) {
545 printk(KERN_WARNING
546 "Partition configured for %d cpus, "
547 "operating system maximum is %u.\n",
548 maxcpus, nr_cpu_ids);
549 maxcpus = nr_cpu_ids;
550 } else
551 printk(KERN_INFO "Partition configured for %d cpus.\n",
552 maxcpus);
553
554 for (cpu = 0; cpu < maxcpus; cpu++)
555 set_cpu_possible(cpu, true);
556 out:
557 of_node_put(dn);
558 }
559 vdso_data->processorCount = num_present_cpus();
560 #endif /* CONFIG_PPC64 */
561
562 /* Initialize CPU <=> thread mapping/
563 *
564 * WARNING: We assume that the number of threads is the same for
565 * every CPU in the system. If that is not the case, then some code
566 * here will have to be reworked
567 */
568 cpu_init_thread_core_maps(nthreads);
569
570 /* Now that possible cpus are set, set nr_cpu_ids for later use */
571 setup_nr_cpu_ids();
572
573 free_unused_pacas();
574 }
575 #endif /* CONFIG_SMP */
576
577 #ifdef CONFIG_PCSPKR_PLATFORM
add_pcspkr(void)578 static __init int add_pcspkr(void)
579 {
580 struct device_node *np;
581 struct platform_device *pd;
582 int ret;
583
584 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
585 of_node_put(np);
586 if (!np)
587 return -ENODEV;
588
589 pd = platform_device_alloc("pcspkr", -1);
590 if (!pd)
591 return -ENOMEM;
592
593 ret = platform_device_add(pd);
594 if (ret)
595 platform_device_put(pd);
596
597 return ret;
598 }
599 device_initcall(add_pcspkr);
600 #endif /* CONFIG_PCSPKR_PLATFORM */
601
probe_machine(void)602 void probe_machine(void)
603 {
604 extern struct machdep_calls __machine_desc_start;
605 extern struct machdep_calls __machine_desc_end;
606 unsigned int i;
607
608 /*
609 * Iterate all ppc_md structures until we find the proper
610 * one for the current machine type
611 */
612 DBG("Probing machine type ...\n");
613
614 /*
615 * Check ppc_md is empty, if not we have a bug, ie, we setup an
616 * entry before probe_machine() which will be overwritten
617 */
618 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
619 if (((void **)&ppc_md)[i]) {
620 printk(KERN_ERR "Entry %d in ppc_md non empty before"
621 " machine probe !\n", i);
622 }
623 }
624
625 for (machine_id = &__machine_desc_start;
626 machine_id < &__machine_desc_end;
627 machine_id++) {
628 DBG(" %s ...", machine_id->name);
629 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
630 if (ppc_md.probe()) {
631 DBG(" match !\n");
632 break;
633 }
634 DBG("\n");
635 }
636 /* What can we do if we didn't find ? */
637 if (machine_id >= &__machine_desc_end) {
638 DBG("No suitable machine found !\n");
639 for (;;);
640 }
641
642 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
643 }
644
645 /* Match a class of boards, not a specific device configuration. */
check_legacy_ioport(unsigned long base_port)646 int check_legacy_ioport(unsigned long base_port)
647 {
648 struct device_node *parent, *np = NULL;
649 int ret = -ENODEV;
650
651 switch(base_port) {
652 case I8042_DATA_REG:
653 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
654 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
655 if (np) {
656 parent = of_get_parent(np);
657
658 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
659 if (!of_i8042_kbd_irq)
660 of_i8042_kbd_irq = 1;
661
662 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
663 if (!of_i8042_aux_irq)
664 of_i8042_aux_irq = 12;
665
666 of_node_put(np);
667 np = parent;
668 break;
669 }
670 np = of_find_node_by_type(NULL, "8042");
671 /* Pegasos has no device_type on its 8042 node, look for the
672 * name instead */
673 if (!np)
674 np = of_find_node_by_name(NULL, "8042");
675 if (np) {
676 of_i8042_kbd_irq = 1;
677 of_i8042_aux_irq = 12;
678 }
679 break;
680 case FDC_BASE: /* FDC1 */
681 np = of_find_node_by_type(NULL, "fdc");
682 break;
683 default:
684 /* ipmi is supposed to fail here */
685 break;
686 }
687 if (!np)
688 return ret;
689 parent = of_get_parent(np);
690 if (parent) {
691 if (strcmp(parent->type, "isa") == 0)
692 ret = 0;
693 of_node_put(parent);
694 }
695 of_node_put(np);
696 return ret;
697 }
698 EXPORT_SYMBOL(check_legacy_ioport);
699
ppc_panic_event(struct notifier_block * this,unsigned long event,void * ptr)700 static int ppc_panic_event(struct notifier_block *this,
701 unsigned long event, void *ptr)
702 {
703 /*
704 * panic does a local_irq_disable, but we really
705 * want interrupts to be hard disabled.
706 */
707 hard_irq_disable();
708
709 /*
710 * If firmware-assisted dump has been registered then trigger
711 * firmware-assisted dump and let firmware handle everything else.
712 */
713 crash_fadump(NULL, ptr);
714 if (ppc_md.panic)
715 ppc_md.panic(ptr); /* May not return */
716 return NOTIFY_DONE;
717 }
718
719 static struct notifier_block ppc_panic_block = {
720 .notifier_call = ppc_panic_event,
721 .priority = INT_MIN /* may not return; must be done last */
722 };
723
setup_panic(void)724 void __init setup_panic(void)
725 {
726 /* PPC64 always does a hard irq disable in its panic handler */
727 if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
728 return;
729 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
730 }
731
732 #ifdef CONFIG_CHECK_CACHE_COHERENCY
733 /*
734 * For platforms that have configurable cache-coherency. This function
735 * checks that the cache coherency setting of the kernel matches the setting
736 * left by the firmware, as indicated in the device tree. Since a mismatch
737 * will eventually result in DMA failures, we print * and error and call
738 * BUG() in that case.
739 */
740
741 #ifdef CONFIG_NOT_COHERENT_CACHE
742 #define KERNEL_COHERENCY 0
743 #else
744 #define KERNEL_COHERENCY 1
745 #endif
746
check_cache_coherency(void)747 static int __init check_cache_coherency(void)
748 {
749 struct device_node *np;
750 const void *prop;
751 int devtree_coherency;
752
753 np = of_find_node_by_path("/");
754 prop = of_get_property(np, "coherency-off", NULL);
755 of_node_put(np);
756
757 devtree_coherency = prop ? 0 : 1;
758
759 if (devtree_coherency != KERNEL_COHERENCY) {
760 printk(KERN_ERR
761 "kernel coherency:%s != device tree_coherency:%s\n",
762 KERNEL_COHERENCY ? "on" : "off",
763 devtree_coherency ? "on" : "off");
764 BUG();
765 }
766
767 return 0;
768 }
769
770 late_initcall(check_cache_coherency);
771 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
772
773 #ifdef CONFIG_DEBUG_FS
774 struct dentry *powerpc_debugfs_root;
775 EXPORT_SYMBOL(powerpc_debugfs_root);
776
powerpc_debugfs_init(void)777 static int powerpc_debugfs_init(void)
778 {
779 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
780
781 return powerpc_debugfs_root == NULL;
782 }
783 arch_initcall(powerpc_debugfs_init);
784 #endif
785
ppc_printk_progress(char * s,unsigned short hex)786 void ppc_printk_progress(char *s, unsigned short hex)
787 {
788 pr_info("%s\n", s);
789 }
790
arch_setup_pdev_archdata(struct platform_device * pdev)791 void arch_setup_pdev_archdata(struct platform_device *pdev)
792 {
793 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
794 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
795 set_dma_ops(&pdev->dev, &dma_nommu_ops);
796 }
797
print_system_info(void)798 static __init void print_system_info(void)
799 {
800 pr_info("-----------------------------------------------------\n");
801 #ifdef CONFIG_PPC_BOOK3S_64
802 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
803 #endif
804 #ifdef CONFIG_PPC_STD_MMU_32
805 pr_info("Hash_size = 0x%lx\n", Hash_size);
806 #endif
807 pr_info("phys_mem_size = 0x%llx\n",
808 (unsigned long long)memblock_phys_mem_size());
809
810 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
811 pr_info("icache_bsize = 0x%x\n", icache_bsize);
812 if (ucache_bsize != 0)
813 pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
814
815 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
816 pr_info(" possible = 0x%016lx\n",
817 (unsigned long)CPU_FTRS_POSSIBLE);
818 pr_info(" always = 0x%016lx\n",
819 (unsigned long)CPU_FTRS_ALWAYS);
820 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
821 cur_cpu_spec->cpu_user_features,
822 cur_cpu_spec->cpu_user_features2);
823 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
824 #ifdef CONFIG_PPC64
825 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
826 #endif
827
828 #ifdef CONFIG_PPC_BOOK3S_64
829 if (htab_address)
830 pr_info("htab_address = 0x%p\n", htab_address);
831 if (htab_hash_mask)
832 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
833 #endif
834 #ifdef CONFIG_PPC_STD_MMU_32
835 if (Hash)
836 pr_info("Hash = 0x%p\n", Hash);
837 if (Hash_mask)
838 pr_info("Hash_mask = 0x%lx\n", Hash_mask);
839 #endif
840
841 if (PHYSICAL_START > 0)
842 pr_info("physical_start = 0x%llx\n",
843 (unsigned long long)PHYSICAL_START);
844 pr_info("-----------------------------------------------------\n");
845 }
846
847 #ifdef CONFIG_SMP
smp_setup_pacas(void)848 static void smp_setup_pacas(void)
849 {
850 int cpu;
851
852 for_each_possible_cpu(cpu) {
853 if (cpu == smp_processor_id())
854 continue;
855 allocate_paca(cpu);
856 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
857 }
858
859 memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
860 cpu_to_phys_id = NULL;
861 }
862 #endif
863
864 /*
865 * Called into from start_kernel this initializes memblock, which is used
866 * to manage page allocation until mem_init is called.
867 */
setup_arch(char ** cmdline_p)868 void __init setup_arch(char **cmdline_p)
869 {
870 *cmdline_p = boot_command_line;
871
872 /* Set a half-reasonable default so udelay does something sensible */
873 loops_per_jiffy = 500000000 / HZ;
874
875 /* Unflatten the device-tree passed by prom_init or kexec */
876 unflatten_device_tree();
877
878 /*
879 * Initialize cache line/block info from device-tree (on ppc64) or
880 * just cputable (on ppc32).
881 */
882 initialize_cache_info();
883
884 /* Initialize RTAS if available. */
885 rtas_initialize();
886
887 /* Check if we have an initrd provided via the device-tree. */
888 check_for_initrd();
889
890 /* Probe the machine type, establish ppc_md. */
891 probe_machine();
892
893 /* Setup panic notifier if requested by the platform. */
894 setup_panic();
895
896 /*
897 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
898 * it from their respective probe() function.
899 */
900 setup_power_save();
901
902 /* Discover standard serial ports. */
903 find_legacy_serial_ports();
904
905 /* Register early console with the printk subsystem. */
906 register_early_udbg_console();
907
908 /* Setup the various CPU maps based on the device-tree. */
909 smp_setup_cpu_maps();
910
911 /* Initialize xmon. */
912 xmon_setup();
913
914 /* Check the SMT related command line arguments (ppc64). */
915 check_smt_enabled();
916
917 /* Parse memory topology */
918 mem_topology_setup();
919
920 /*
921 * Release secondary cpus out of their spinloops at 0x60 now that
922 * we can map physical -> logical CPU ids.
923 *
924 * Freescale Book3e parts spin in a loop provided by firmware,
925 * so smp_release_cpus() does nothing for them.
926 */
927 #ifdef CONFIG_SMP
928 smp_setup_pacas();
929
930 /* On BookE, setup per-core TLB data structures. */
931 setup_tlb_core_data();
932
933 smp_release_cpus();
934 #endif
935
936 /* Print various info about the machine that has been gathered so far. */
937 print_system_info();
938
939 /* Reserve large chunks of memory for use by CMA for KVM. */
940 kvm_cma_reserve();
941
942 klp_init_thread_info(&init_thread_info);
943
944 init_mm.start_code = (unsigned long)_stext;
945 init_mm.end_code = (unsigned long) _etext;
946 init_mm.end_data = (unsigned long) _edata;
947 init_mm.brk = klimit;
948
949 #ifdef CONFIG_PPC_MM_SLICES
950 #ifdef CONFIG_PPC64
951 if (!radix_enabled())
952 init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64;
953 #elif defined(CONFIG_PPC_8xx)
954 init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW;
955 #else
956 #error "context.addr_limit not initialized."
957 #endif
958 #endif
959
960 #ifdef CONFIG_SPAPR_TCE_IOMMU
961 mm_iommu_init(&init_mm);
962 #endif
963 irqstack_early_init();
964 exc_lvl_early_init();
965 emergency_stack_init();
966
967 initmem_init();
968
969 #ifdef CONFIG_DUMMY_CONSOLE
970 conswitchp = &dummy_con;
971 #endif
972 if (ppc_md.setup_arch)
973 ppc_md.setup_arch();
974
975 setup_barrier_nospec();
976
977 paging_init();
978
979 /* Initialize the MMU context management stuff. */
980 mmu_context_init();
981
982 #ifdef CONFIG_PPC64
983 /* Interrupt code needs to be 64K-aligned. */
984 if ((unsigned long)_stext & 0xffff)
985 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
986 (unsigned long)_stext);
987 #endif
988 }
989
