1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * phylink models the MAC to optional PHY connection, supporting
4  * technologies such as SFP cages where the PHY is hot-pluggable.
5  *
6  * Copyright (C) 2015 Russell King
7  */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22 
23 #include "sfp.h"
24 #include "swphy.h"
25 
26 #define SUPPORTED_INTERFACES \
27 	(SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 	 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 	(ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 	 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32 
33 enum {
34 	PHYLINK_DISABLE_STOPPED,
35 	PHYLINK_DISABLE_LINK,
36 	PHYLINK_DISABLE_MAC_WOL,
37 
38 	PCS_STATE_DOWN = 0,
39 	PCS_STATE_STARTING,
40 	PCS_STATE_STARTED,
41 };
42 
43 /**
44  * struct phylink - internal data type for phylink
45  */
46 struct phylink {
47 	/* private: */
48 	struct net_device *netdev;
49 	const struct phylink_mac_ops *mac_ops;
50 	struct phylink_config *config;
51 	struct phylink_pcs *pcs;
52 	struct device *dev;
53 	unsigned int old_link_state:1;
54 
55 	unsigned long phylink_disable_state; /* bitmask of disables */
56 	struct phy_device *phydev;
57 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
58 	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
59 	u8 cur_link_an_mode;
60 	u8 link_port;			/* The current non-phy ethtool port */
61 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
62 
63 	/* The link configuration settings */
64 	struct phylink_link_state link_config;
65 
66 	/* The current settings */
67 	phy_interface_t cur_interface;
68 
69 	struct gpio_desc *link_gpio;
70 	unsigned int link_irq;
71 	struct timer_list link_poll;
72 	void (*get_fixed_state)(struct net_device *dev,
73 				struct phylink_link_state *s);
74 
75 	struct mutex state_mutex;
76 	struct phylink_link_state phy_state;
77 	struct work_struct resolve;
78 	unsigned int pcs_neg_mode;
79 	unsigned int pcs_state;
80 
81 	bool mac_link_dropped;
82 	bool using_mac_select_pcs;
83 
84 	struct sfp_bus *sfp_bus;
85 	bool sfp_may_have_phy;
86 	DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
87 	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
88 	u8 sfp_port;
89 };
90 
91 #define phylink_printk(level, pl, fmt, ...) \
92 	do { \
93 		if ((pl)->config->type == PHYLINK_NETDEV) \
94 			netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
95 		else if ((pl)->config->type == PHYLINK_DEV) \
96 			dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
97 	} while (0)
98 
99 #define phylink_err(pl, fmt, ...) \
100 	phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
101 #define phylink_warn(pl, fmt, ...) \
102 	phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
103 #define phylink_info(pl, fmt, ...) \
104 	phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
105 #if defined(CONFIG_DYNAMIC_DEBUG)
106 #define phylink_dbg(pl, fmt, ...) \
107 do {									\
108 	if ((pl)->config->type == PHYLINK_NETDEV)			\
109 		netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);		\
110 	else if ((pl)->config->type == PHYLINK_DEV)			\
111 		dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);			\
112 } while (0)
113 #elif defined(DEBUG)
114 #define phylink_dbg(pl, fmt, ...)					\
115 	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
116 #else
117 #define phylink_dbg(pl, fmt, ...)					\
118 ({									\
119 	if (0)								\
120 		phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);	\
121 })
122 #endif
123 
124 /**
125  * phylink_set_port_modes() - set the port type modes in the ethtool mask
126  * @mask: ethtool link mode mask
127  *
128  * Sets all the port type modes in the ethtool mask.  MAC drivers should
129  * use this in their 'validate' callback.
130  */
phylink_set_port_modes(unsigned long * mask)131 void phylink_set_port_modes(unsigned long *mask)
132 {
133 	phylink_set(mask, TP);
134 	phylink_set(mask, AUI);
135 	phylink_set(mask, MII);
136 	phylink_set(mask, FIBRE);
137 	phylink_set(mask, BNC);
138 	phylink_set(mask, Backplane);
139 }
140 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
141 
phylink_is_empty_linkmode(const unsigned long * linkmode)142 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
143 {
144 	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
145 
146 	phylink_set_port_modes(tmp);
147 	phylink_set(tmp, Autoneg);
148 	phylink_set(tmp, Pause);
149 	phylink_set(tmp, Asym_Pause);
150 
151 	return linkmode_subset(linkmode, tmp);
152 }
153 
phylink_an_mode_str(unsigned int mode)154 static const char *phylink_an_mode_str(unsigned int mode)
155 {
156 	static const char *modestr[] = {
157 		[MLO_AN_PHY] = "phy",
158 		[MLO_AN_FIXED] = "fixed",
159 		[MLO_AN_INBAND] = "inband",
160 	};
161 
162 	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
163 }
164 
phylink_interface_signal_rate(phy_interface_t interface)165 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
166 {
167 	switch (interface) {
168 	case PHY_INTERFACE_MODE_SGMII:
169 	case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
170 		return 1250;
171 	case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
172 		return 3125;
173 	case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
174 		return 5156;
175 	case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
176 		return 10313;
177 	default:
178 		return 0;
179 	}
180 }
181 
182 /**
183  * phylink_interface_max_speed() - get the maximum speed of a phy interface
184  * @interface: phy interface mode defined by &typedef phy_interface_t
185  *
186  * Determine the maximum speed of a phy interface. This is intended to help
187  * determine the correct speed to pass to the MAC when the phy is performing
188  * rate matching.
189  *
190  * Return: The maximum speed of @interface
191  */
phylink_interface_max_speed(phy_interface_t interface)192 static int phylink_interface_max_speed(phy_interface_t interface)
193 {
194 	switch (interface) {
195 	case PHY_INTERFACE_MODE_100BASEX:
196 	case PHY_INTERFACE_MODE_REVRMII:
197 	case PHY_INTERFACE_MODE_RMII:
198 	case PHY_INTERFACE_MODE_SMII:
199 	case PHY_INTERFACE_MODE_REVMII:
200 	case PHY_INTERFACE_MODE_MII:
201 		return SPEED_100;
202 
203 	case PHY_INTERFACE_MODE_TBI:
204 	case PHY_INTERFACE_MODE_MOCA:
205 	case PHY_INTERFACE_MODE_RTBI:
206 	case PHY_INTERFACE_MODE_1000BASEX:
207 	case PHY_INTERFACE_MODE_1000BASEKX:
208 	case PHY_INTERFACE_MODE_TRGMII:
209 	case PHY_INTERFACE_MODE_RGMII_TXID:
210 	case PHY_INTERFACE_MODE_RGMII_RXID:
211 	case PHY_INTERFACE_MODE_RGMII_ID:
212 	case PHY_INTERFACE_MODE_RGMII:
213 	case PHY_INTERFACE_MODE_PSGMII:
214 	case PHY_INTERFACE_MODE_QSGMII:
215 	case PHY_INTERFACE_MODE_QUSGMII:
216 	case PHY_INTERFACE_MODE_SGMII:
217 	case PHY_INTERFACE_MODE_GMII:
218 		return SPEED_1000;
219 
220 	case PHY_INTERFACE_MODE_2500BASEX:
221 		return SPEED_2500;
222 
223 	case PHY_INTERFACE_MODE_5GBASER:
224 		return SPEED_5000;
225 
226 	case PHY_INTERFACE_MODE_XGMII:
227 	case PHY_INTERFACE_MODE_RXAUI:
228 	case PHY_INTERFACE_MODE_XAUI:
229 	case PHY_INTERFACE_MODE_10GBASER:
230 	case PHY_INTERFACE_MODE_10GKR:
231 	case PHY_INTERFACE_MODE_USXGMII:
232 		return SPEED_10000;
233 
234 	case PHY_INTERFACE_MODE_25GBASER:
235 		return SPEED_25000;
236 
237 	case PHY_INTERFACE_MODE_XLGMII:
238 		return SPEED_40000;
239 
240 	case PHY_INTERFACE_MODE_INTERNAL:
241 	case PHY_INTERFACE_MODE_NA:
242 	case PHY_INTERFACE_MODE_MAX:
243 		/* No idea! Garbage in, unknown out */
244 		return SPEED_UNKNOWN;
245 	}
246 
247 	/* If we get here, someone forgot to add an interface mode above */
248 	WARN_ON_ONCE(1);
249 	return SPEED_UNKNOWN;
250 }
251 
252 /**
253  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
254  * @linkmodes: ethtool linkmode mask (must be already initialised)
255  * @caps: bitmask of MAC capabilities
256  *
257  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
258  * supported by the @caps. @linkmodes must have been initialised previously.
259  */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)260 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
261 {
262 	if (caps & MAC_SYM_PAUSE)
263 		__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
264 
265 	if (caps & MAC_ASYM_PAUSE)
266 		__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
267 
268 	if (caps & MAC_10HD) {
269 		__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
270 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
271 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
272 	}
273 
274 	if (caps & MAC_10FD) {
275 		__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
276 		__set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
277 		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
278 	}
279 
280 	if (caps & MAC_100HD) {
281 		__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
282 		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
283 	}
284 
285 	if (caps & MAC_100FD) {
286 		__set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
287 		__set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
288 		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
289 	}
290 
291 	if (caps & MAC_1000HD)
292 		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
293 
294 	if (caps & MAC_1000FD) {
295 		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
296 		__set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
297 		__set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
298 		__set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
299 	}
300 
301 	if (caps & MAC_2500FD) {
302 		__set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
303 		__set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
304 	}
305 
306 	if (caps & MAC_5000FD)
307 		__set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
308 
309 	if (caps & MAC_10000FD) {
310 		__set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
311 		__set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
312 		__set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
313 		__set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
314 		__set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
315 		__set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
316 		__set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
317 		__set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
318 		__set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
319 	}
320 
321 	if (caps & MAC_25000FD) {
322 		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
323 		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
324 		__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
325 	}
326 
327 	if (caps & MAC_40000FD) {
328 		__set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
329 		__set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
330 		__set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
331 		__set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
332 	}
333 
334 	if (caps & MAC_50000FD) {
335 		__set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
336 		__set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
337 		__set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
338 		__set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
339 		__set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
340 		__set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
341 		__set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
342 			  linkmodes);
343 		__set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
344 	}
345 
346 	if (caps & MAC_56000FD) {
347 		__set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
348 		__set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
349 		__set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
350 		__set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
351 	}
352 
353 	if (caps & MAC_100000FD) {
354 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
355 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
356 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
357 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
358 			  linkmodes);
359 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
360 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
361 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
362 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
363 			  linkmodes);
364 		__set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
365 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
366 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
367 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
368 			  linkmodes);
369 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
370 		__set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
371 	}
372 
373 	if (caps & MAC_200000FD) {
374 		__set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
375 		__set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
376 		__set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
377 			  linkmodes);
378 		__set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
379 		__set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
380 		__set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
381 		__set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
382 		__set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
383 			  linkmodes);
384 		__set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
385 		__set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
386 	}
387 
388 	if (caps & MAC_400000FD) {
389 		__set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
390 		__set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
391 		__set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
392 			  linkmodes);
393 		__set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
394 		__set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
395 		__set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
396 		__set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
397 		__set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
398 			  linkmodes);
399 		__set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
400 		__set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
401 	}
402 }
403 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
404 
405 static struct {
406 	unsigned long mask;
407 	int speed;
408 	unsigned int duplex;
409 } phylink_caps_params[] = {
410 	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL },
411 	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL },
412 	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL },
413 	{ MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
414 	{ MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
415 	{ MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
416 	{ MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
417 	{ MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
418 	{ MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
419 	{ MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
420 	{ MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
421 	{ MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
422 	{ MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
423 	{ MAC_100FD,    SPEED_100,    DUPLEX_FULL },
424 	{ MAC_100HD,    SPEED_100,    DUPLEX_HALF },
425 	{ MAC_10FD,     SPEED_10,     DUPLEX_FULL },
426 	{ MAC_10HD,     SPEED_10,     DUPLEX_HALF },
427 };
428 
429 /**
430  * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
431  * @config: pointer to a &struct phylink_config
432  * @max_speed: maximum speed
433  *
434  * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
435  * Any further motifications of config.mac_capabilities will override this.
436  */
phylink_limit_mac_speed(struct phylink_config * config,u32 max_speed)437 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
438 {
439 	int i;
440 
441 	for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
442 		    phylink_caps_params[i].speed > max_speed; i++)
443 		config->mac_capabilities &= ~phylink_caps_params[i].mask;
444 }
445 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
446 
447 /**
448  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
449  * @speed: the speed to search for
450  * @duplex: the duplex to search for
451  *
452  * Find the mac capability for a given speed and duplex.
453  *
454  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
455  *         there were no matches.
456  */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)457 static unsigned long phylink_cap_from_speed_duplex(int speed,
458 						   unsigned int duplex)
459 {
460 	int i;
461 
462 	for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
463 		if (speed == phylink_caps_params[i].speed &&
464 		    duplex == phylink_caps_params[i].duplex)
465 			return phylink_caps_params[i].mask;
466 	}
467 
468 	return 0;
469 }
470 
471 /**
472  * phylink_get_capabilities() - get capabilities for a given MAC
473  * @interface: phy interface mode defined by &typedef phy_interface_t
474  * @mac_capabilities: bitmask of MAC capabilities
475  * @rate_matching: type of rate matching being performed
476  *
477  * Get the MAC capabilities that are supported by the @interface mode and
478  * @mac_capabilities.
479  */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)480 unsigned long phylink_get_capabilities(phy_interface_t interface,
481 				       unsigned long mac_capabilities,
482 				       int rate_matching)
483 {
484 	int max_speed = phylink_interface_max_speed(interface);
485 	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
486 	unsigned long matched_caps = 0;
487 
488 	switch (interface) {
489 	case PHY_INTERFACE_MODE_USXGMII:
490 		caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
491 		fallthrough;
492 
493 	case PHY_INTERFACE_MODE_RGMII_TXID:
494 	case PHY_INTERFACE_MODE_RGMII_RXID:
495 	case PHY_INTERFACE_MODE_RGMII_ID:
496 	case PHY_INTERFACE_MODE_RGMII:
497 	case PHY_INTERFACE_MODE_PSGMII:
498 	case PHY_INTERFACE_MODE_QSGMII:
499 	case PHY_INTERFACE_MODE_QUSGMII:
500 	case PHY_INTERFACE_MODE_SGMII:
501 	case PHY_INTERFACE_MODE_GMII:
502 		caps |= MAC_1000HD | MAC_1000FD;
503 		fallthrough;
504 
505 	case PHY_INTERFACE_MODE_REVRMII:
506 	case PHY_INTERFACE_MODE_RMII:
507 	case PHY_INTERFACE_MODE_SMII:
508 	case PHY_INTERFACE_MODE_REVMII:
509 	case PHY_INTERFACE_MODE_MII:
510 		caps |= MAC_10HD | MAC_10FD;
511 		fallthrough;
512 
513 	case PHY_INTERFACE_MODE_100BASEX:
514 		caps |= MAC_100HD | MAC_100FD;
515 		break;
516 
517 	case PHY_INTERFACE_MODE_TBI:
518 	case PHY_INTERFACE_MODE_MOCA:
519 	case PHY_INTERFACE_MODE_RTBI:
520 	case PHY_INTERFACE_MODE_1000BASEX:
521 		caps |= MAC_1000HD;
522 		fallthrough;
523 	case PHY_INTERFACE_MODE_1000BASEKX:
524 	case PHY_INTERFACE_MODE_TRGMII:
525 		caps |= MAC_1000FD;
526 		break;
527 
528 	case PHY_INTERFACE_MODE_2500BASEX:
529 		caps |= MAC_2500FD;
530 		break;
531 
532 	case PHY_INTERFACE_MODE_5GBASER:
533 		caps |= MAC_5000FD;
534 		break;
535 
536 	case PHY_INTERFACE_MODE_XGMII:
537 	case PHY_INTERFACE_MODE_RXAUI:
538 	case PHY_INTERFACE_MODE_XAUI:
539 	case PHY_INTERFACE_MODE_10GBASER:
540 	case PHY_INTERFACE_MODE_10GKR:
541 		caps |= MAC_10000FD;
542 		break;
543 
544 	case PHY_INTERFACE_MODE_25GBASER:
545 		caps |= MAC_25000FD;
546 		break;
547 
548 	case PHY_INTERFACE_MODE_XLGMII:
549 		caps |= MAC_40000FD;
550 		break;
551 
552 	case PHY_INTERFACE_MODE_INTERNAL:
553 		caps |= ~0;
554 		break;
555 
556 	case PHY_INTERFACE_MODE_NA:
557 	case PHY_INTERFACE_MODE_MAX:
558 		break;
559 	}
560 
561 	switch (rate_matching) {
562 	case RATE_MATCH_OPEN_LOOP:
563 		/* TODO */
564 		fallthrough;
565 	case RATE_MATCH_NONE:
566 		matched_caps = 0;
567 		break;
568 	case RATE_MATCH_PAUSE: {
569 		/* The MAC must support asymmetric pause towards the local
570 		 * device for this. We could allow just symmetric pause, but
571 		 * then we might have to renegotiate if the link partner
572 		 * doesn't support pause. This is because there's no way to
573 		 * accept pause frames without transmitting them if we only
574 		 * support symmetric pause.
575 		 */
576 		if (!(mac_capabilities & MAC_SYM_PAUSE) ||
577 		    !(mac_capabilities & MAC_ASYM_PAUSE))
578 			break;
579 
580 		/* We can't adapt if the MAC doesn't support the interface's
581 		 * max speed at full duplex.
582 		 */
583 		if (mac_capabilities &
584 		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
585 			/* Although a duplex-matching phy might exist, we
586 			 * conservatively remove these modes because the MAC
587 			 * will not be aware of the half-duplex nature of the
588 			 * link.
589 			 */
590 			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
591 			matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
592 		}
593 		break;
594 	}
595 	case RATE_MATCH_CRS:
596 		/* The MAC must support half duplex at the interface's max
597 		 * speed.
598 		 */
599 		if (mac_capabilities &
600 		    phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
601 			matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
602 			matched_caps &= mac_capabilities;
603 		}
604 		break;
605 	}
606 
607 	return (caps & mac_capabilities) | matched_caps;
608 }
609 EXPORT_SYMBOL_GPL(phylink_get_capabilities);
610 
611 /**
612  * phylink_validate_mask_caps() - Restrict link modes based on caps
613  * @supported: ethtool bitmask for supported link modes.
614  * @state: pointer to a &struct phylink_link_state.
615  * @mac_capabilities: bitmask of MAC capabilities
616  *
617  * Calculate the supported link modes based on @mac_capabilities, and restrict
618  * @supported and @state based on that. Use this function if your capabiliies
619  * aren't constant, such as if they vary depending on the interface.
620  */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)621 void phylink_validate_mask_caps(unsigned long *supported,
622 				struct phylink_link_state *state,
623 				unsigned long mac_capabilities)
624 {
625 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
626 	unsigned long caps;
627 
628 	phylink_set_port_modes(mask);
629 	phylink_set(mask, Autoneg);
630 	caps = phylink_get_capabilities(state->interface, mac_capabilities,
631 					state->rate_matching);
632 	phylink_caps_to_linkmodes(mask, caps);
633 
634 	linkmode_and(supported, supported, mask);
635 	linkmode_and(state->advertising, state->advertising, mask);
636 }
637 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps);
638 
639 /**
640  * phylink_generic_validate() - generic validate() callback implementation
641  * @config: a pointer to a &struct phylink_config.
642  * @supported: ethtool bitmask for supported link modes.
643  * @state: a pointer to a &struct phylink_link_state.
644  *
645  * Generic implementation of the validate() callback that MAC drivers can
646  * use when they pass the range of supported interfaces and MAC capabilities.
647  */
phylink_generic_validate(struct phylink_config * config,unsigned long * supported,struct phylink_link_state * state)648 void phylink_generic_validate(struct phylink_config *config,
649 			      unsigned long *supported,
650 			      struct phylink_link_state *state)
651 {
652 	phylink_validate_mask_caps(supported, state, config->mac_capabilities);
653 }
654 EXPORT_SYMBOL_GPL(phylink_generic_validate);
655 
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)656 static int phylink_validate_mac_and_pcs(struct phylink *pl,
657 					unsigned long *supported,
658 					struct phylink_link_state *state)
659 {
660 	struct phylink_pcs *pcs;
661 	int ret;
662 
663 	/* Get the PCS for this interface mode */
664 	if (pl->using_mac_select_pcs) {
665 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
666 		if (IS_ERR(pcs))
667 			return PTR_ERR(pcs);
668 	} else {
669 		pcs = pl->pcs;
670 	}
671 
672 	if (pcs) {
673 		/* The PCS, if present, must be setup before phylink_create()
674 		 * has been called. If the ops is not initialised, print an
675 		 * error and backtrace rather than oopsing the kernel.
676 		 */
677 		if (!pcs->ops) {
678 			phylink_err(pl, "interface %s: uninitialised PCS\n",
679 				    phy_modes(state->interface));
680 			dump_stack();
681 			return -EINVAL;
682 		}
683 
684 		/* Validate the link parameters with the PCS */
685 		if (pcs->ops->pcs_validate) {
686 			ret = pcs->ops->pcs_validate(pcs, supported, state);
687 			if (ret < 0 || phylink_is_empty_linkmode(supported))
688 				return -EINVAL;
689 
690 			/* Ensure the advertising mask is a subset of the
691 			 * supported mask.
692 			 */
693 			linkmode_and(state->advertising, state->advertising,
694 				     supported);
695 		}
696 	}
697 
698 	/* Then validate the link parameters with the MAC */
699 	if (pl->mac_ops->validate)
700 		pl->mac_ops->validate(pl->config, supported, state);
701 	else
702 		phylink_generic_validate(pl->config, supported, state);
703 
704 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
705 }
706 
phylink_validate_mask(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)707 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
708 				 struct phylink_link_state *state,
709 				 const unsigned long *interfaces)
710 {
711 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
712 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
713 	__ETHTOOL_DECLARE_LINK_MODE_MASK(s);
714 	struct phylink_link_state t;
715 	int intf;
716 
717 	for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
718 		if (test_bit(intf, interfaces)) {
719 			linkmode_copy(s, supported);
720 
721 			t = *state;
722 			t.interface = intf;
723 			if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
724 				linkmode_or(all_s, all_s, s);
725 				linkmode_or(all_adv, all_adv, t.advertising);
726 			}
727 		}
728 	}
729 
730 	linkmode_copy(supported, all_s);
731 	linkmode_copy(state->advertising, all_adv);
732 
733 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
734 }
735 
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)736 static int phylink_validate(struct phylink *pl, unsigned long *supported,
737 			    struct phylink_link_state *state)
738 {
739 	const unsigned long *interfaces = pl->config->supported_interfaces;
740 
741 	if (state->interface == PHY_INTERFACE_MODE_NA)
742 		return phylink_validate_mask(pl, supported, state, interfaces);
743 
744 	if (!test_bit(state->interface, interfaces))
745 		return -EINVAL;
746 
747 	return phylink_validate_mac_and_pcs(pl, supported, state);
748 }
749 
phylink_parse_fixedlink(struct phylink * pl,const struct fwnode_handle * fwnode)750 static int phylink_parse_fixedlink(struct phylink *pl,
751 				   const struct fwnode_handle *fwnode)
752 {
753 	struct fwnode_handle *fixed_node;
754 	bool pause, asym_pause, autoneg;
755 	const struct phy_setting *s;
756 	struct gpio_desc *desc;
757 	u32 speed;
758 	int ret;
759 
760 	fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
761 	if (fixed_node) {
762 		ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
763 
764 		pl->link_config.speed = speed;
765 		pl->link_config.duplex = DUPLEX_HALF;
766 
767 		if (fwnode_property_read_bool(fixed_node, "full-duplex"))
768 			pl->link_config.duplex = DUPLEX_FULL;
769 
770 		/* We treat the "pause" and "asym-pause" terminology as
771 		 * defining the link partner's ability.
772 		 */
773 		if (fwnode_property_read_bool(fixed_node, "pause"))
774 			__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
775 				  pl->link_config.lp_advertising);
776 		if (fwnode_property_read_bool(fixed_node, "asym-pause"))
777 			__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
778 				  pl->link_config.lp_advertising);
779 
780 		if (ret == 0) {
781 			desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
782 						      GPIOD_IN, "?");
783 
784 			if (!IS_ERR(desc))
785 				pl->link_gpio = desc;
786 			else if (desc == ERR_PTR(-EPROBE_DEFER))
787 				ret = -EPROBE_DEFER;
788 		}
789 		fwnode_handle_put(fixed_node);
790 
791 		if (ret)
792 			return ret;
793 	} else {
794 		u32 prop[5];
795 
796 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
797 						     NULL, 0);
798 		if (ret != ARRAY_SIZE(prop)) {
799 			phylink_err(pl, "broken fixed-link?\n");
800 			return -EINVAL;
801 		}
802 
803 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
804 						     prop, ARRAY_SIZE(prop));
805 		if (!ret) {
806 			pl->link_config.duplex = prop[1] ?
807 						DUPLEX_FULL : DUPLEX_HALF;
808 			pl->link_config.speed = prop[2];
809 			if (prop[3])
810 				__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
811 					  pl->link_config.lp_advertising);
812 			if (prop[4])
813 				__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
814 					  pl->link_config.lp_advertising);
815 		}
816 	}
817 
818 	if (pl->link_config.speed > SPEED_1000 &&
819 	    pl->link_config.duplex != DUPLEX_FULL)
820 		phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
821 			     pl->link_config.speed);
822 
823 	bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
824 	linkmode_copy(pl->link_config.advertising, pl->supported);
825 	phylink_validate(pl, pl->supported, &pl->link_config);
826 
827 	pause = phylink_test(pl->supported, Pause);
828 	asym_pause = phylink_test(pl->supported, Asym_Pause);
829 	autoneg = phylink_test(pl->supported, Autoneg);
830 	s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
831 			       pl->supported, true);
832 	linkmode_zero(pl->supported);
833 	phylink_set(pl->supported, MII);
834 
835 	if (pause)
836 		phylink_set(pl->supported, Pause);
837 
838 	if (asym_pause)
839 		phylink_set(pl->supported, Asym_Pause);
840 
841 	if (autoneg)
842 		phylink_set(pl->supported, Autoneg);
843 
844 	if (s) {
845 		__set_bit(s->bit, pl->supported);
846 		__set_bit(s->bit, pl->link_config.lp_advertising);
847 	} else {
848 		phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
849 			     pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
850 			     pl->link_config.speed);
851 	}
852 
853 	linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
854 		     pl->supported);
855 
856 	pl->link_config.link = 1;
857 	pl->link_config.an_complete = 1;
858 
859 	return 0;
860 }
861 
phylink_parse_mode(struct phylink * pl,const struct fwnode_handle * fwnode)862 static int phylink_parse_mode(struct phylink *pl,
863 			      const struct fwnode_handle *fwnode)
864 {
865 	struct fwnode_handle *dn;
866 	const char *managed;
867 
868 	dn = fwnode_get_named_child_node(fwnode, "fixed-link");
869 	if (dn || fwnode_property_present(fwnode, "fixed-link"))
870 		pl->cfg_link_an_mode = MLO_AN_FIXED;
871 	fwnode_handle_put(dn);
872 
873 	if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
874 	     strcmp(managed, "in-band-status") == 0) ||
875 	    pl->config->ovr_an_inband) {
876 		if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
877 			phylink_err(pl,
878 				    "can't use both fixed-link and in-band-status\n");
879 			return -EINVAL;
880 		}
881 
882 		linkmode_zero(pl->supported);
883 		phylink_set(pl->supported, MII);
884 		phylink_set(pl->supported, Autoneg);
885 		phylink_set(pl->supported, Asym_Pause);
886 		phylink_set(pl->supported, Pause);
887 		pl->cfg_link_an_mode = MLO_AN_INBAND;
888 
889 		switch (pl->link_config.interface) {
890 		case PHY_INTERFACE_MODE_SGMII:
891 		case PHY_INTERFACE_MODE_PSGMII:
892 		case PHY_INTERFACE_MODE_QSGMII:
893 		case PHY_INTERFACE_MODE_QUSGMII:
894 		case PHY_INTERFACE_MODE_RGMII:
895 		case PHY_INTERFACE_MODE_RGMII_ID:
896 		case PHY_INTERFACE_MODE_RGMII_RXID:
897 		case PHY_INTERFACE_MODE_RGMII_TXID:
898 		case PHY_INTERFACE_MODE_RTBI:
899 			phylink_set(pl->supported, 10baseT_Half);
900 			phylink_set(pl->supported, 10baseT_Full);
901 			phylink_set(pl->supported, 100baseT_Half);
902 			phylink_set(pl->supported, 100baseT_Full);
903 			phylink_set(pl->supported, 1000baseT_Half);
904 			phylink_set(pl->supported, 1000baseT_Full);
905 			break;
906 
907 		case PHY_INTERFACE_MODE_1000BASEX:
908 			phylink_set(pl->supported, 1000baseX_Full);
909 			break;
910 
911 		case PHY_INTERFACE_MODE_2500BASEX:
912 			phylink_set(pl->supported, 2500baseX_Full);
913 			break;
914 
915 		case PHY_INTERFACE_MODE_5GBASER:
916 			phylink_set(pl->supported, 5000baseT_Full);
917 			break;
918 
919 		case PHY_INTERFACE_MODE_25GBASER:
920 			phylink_set(pl->supported, 25000baseCR_Full);
921 			phylink_set(pl->supported, 25000baseKR_Full);
922 			phylink_set(pl->supported, 25000baseSR_Full);
923 			fallthrough;
924 		case PHY_INTERFACE_MODE_USXGMII:
925 		case PHY_INTERFACE_MODE_10GKR:
926 		case PHY_INTERFACE_MODE_10GBASER:
927 			phylink_set(pl->supported, 10baseT_Half);
928 			phylink_set(pl->supported, 10baseT_Full);
929 			phylink_set(pl->supported, 100baseT_Half);
930 			phylink_set(pl->supported, 100baseT_Full);
931 			phylink_set(pl->supported, 1000baseT_Half);
932 			phylink_set(pl->supported, 1000baseT_Full);
933 			phylink_set(pl->supported, 1000baseX_Full);
934 			phylink_set(pl->supported, 1000baseKX_Full);
935 			phylink_set(pl->supported, 2500baseT_Full);
936 			phylink_set(pl->supported, 2500baseX_Full);
937 			phylink_set(pl->supported, 5000baseT_Full);
938 			phylink_set(pl->supported, 10000baseT_Full);
939 			phylink_set(pl->supported, 10000baseKR_Full);
940 			phylink_set(pl->supported, 10000baseKX4_Full);
941 			phylink_set(pl->supported, 10000baseCR_Full);
942 			phylink_set(pl->supported, 10000baseSR_Full);
943 			phylink_set(pl->supported, 10000baseLR_Full);
944 			phylink_set(pl->supported, 10000baseLRM_Full);
945 			phylink_set(pl->supported, 10000baseER_Full);
946 			break;
947 
948 		case PHY_INTERFACE_MODE_XLGMII:
949 			phylink_set(pl->supported, 25000baseCR_Full);
950 			phylink_set(pl->supported, 25000baseKR_Full);
951 			phylink_set(pl->supported, 25000baseSR_Full);
952 			phylink_set(pl->supported, 40000baseKR4_Full);
953 			phylink_set(pl->supported, 40000baseCR4_Full);
954 			phylink_set(pl->supported, 40000baseSR4_Full);
955 			phylink_set(pl->supported, 40000baseLR4_Full);
956 			phylink_set(pl->supported, 50000baseCR2_Full);
957 			phylink_set(pl->supported, 50000baseKR2_Full);
958 			phylink_set(pl->supported, 50000baseSR2_Full);
959 			phylink_set(pl->supported, 50000baseKR_Full);
960 			phylink_set(pl->supported, 50000baseSR_Full);
961 			phylink_set(pl->supported, 50000baseCR_Full);
962 			phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
963 			phylink_set(pl->supported, 50000baseDR_Full);
964 			phylink_set(pl->supported, 100000baseKR4_Full);
965 			phylink_set(pl->supported, 100000baseSR4_Full);
966 			phylink_set(pl->supported, 100000baseCR4_Full);
967 			phylink_set(pl->supported, 100000baseLR4_ER4_Full);
968 			phylink_set(pl->supported, 100000baseKR2_Full);
969 			phylink_set(pl->supported, 100000baseSR2_Full);
970 			phylink_set(pl->supported, 100000baseCR2_Full);
971 			phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
972 			phylink_set(pl->supported, 100000baseDR2_Full);
973 			break;
974 
975 		default:
976 			phylink_err(pl,
977 				    "incorrect link mode %s for in-band status\n",
978 				    phy_modes(pl->link_config.interface));
979 			return -EINVAL;
980 		}
981 
982 		linkmode_copy(pl->link_config.advertising, pl->supported);
983 
984 		if (phylink_validate(pl, pl->supported, &pl->link_config)) {
985 			phylink_err(pl,
986 				    "failed to validate link configuration for in-band status\n");
987 			return -EINVAL;
988 		}
989 	}
990 
991 	return 0;
992 }
993 
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)994 static void phylink_apply_manual_flow(struct phylink *pl,
995 				      struct phylink_link_state *state)
996 {
997 	/* If autoneg is disabled, pause AN is also disabled */
998 	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
999 			       state->advertising))
1000 		state->pause &= ~MLO_PAUSE_AN;
1001 
1002 	/* Manual configuration of pause modes */
1003 	if (!(pl->link_config.pause & MLO_PAUSE_AN))
1004 		state->pause = pl->link_config.pause;
1005 }
1006 
phylink_resolve_an_pause(struct phylink_link_state * state)1007 static void phylink_resolve_an_pause(struct phylink_link_state *state)
1008 {
1009 	bool tx_pause, rx_pause;
1010 
1011 	if (state->duplex == DUPLEX_FULL) {
1012 		linkmode_resolve_pause(state->advertising,
1013 				       state->lp_advertising,
1014 				       &tx_pause, &rx_pause);
1015 		if (tx_pause)
1016 			state->pause |= MLO_PAUSE_TX;
1017 		if (rx_pause)
1018 			state->pause |= MLO_PAUSE_RX;
1019 	}
1020 }
1021 
phylink_pcs_pre_config(struct phylink_pcs * pcs,phy_interface_t interface)1022 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
1023 				   phy_interface_t interface)
1024 {
1025 	if (pcs && pcs->ops->pcs_pre_config)
1026 		pcs->ops->pcs_pre_config(pcs, interface);
1027 }
1028 
phylink_pcs_post_config(struct phylink_pcs * pcs,phy_interface_t interface)1029 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
1030 				   phy_interface_t interface)
1031 {
1032 	int err = 0;
1033 
1034 	if (pcs && pcs->ops->pcs_post_config)
1035 		err = pcs->ops->pcs_post_config(pcs, interface);
1036 
1037 	return err;
1038 }
1039 
phylink_pcs_disable(struct phylink_pcs * pcs)1040 static void phylink_pcs_disable(struct phylink_pcs *pcs)
1041 {
1042 	if (pcs && pcs->ops->pcs_disable)
1043 		pcs->ops->pcs_disable(pcs);
1044 }
1045 
phylink_pcs_enable(struct phylink_pcs * pcs)1046 static int phylink_pcs_enable(struct phylink_pcs *pcs)
1047 {
1048 	int err = 0;
1049 
1050 	if (pcs && pcs->ops->pcs_enable)
1051 		err = pcs->ops->pcs_enable(pcs);
1052 
1053 	return err;
1054 }
1055 
phylink_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,const struct phylink_link_state * state,bool permit_pause_to_mac)1056 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1057 			      const struct phylink_link_state *state,
1058 			      bool permit_pause_to_mac)
1059 {
1060 	if (!pcs)
1061 		return 0;
1062 
1063 	return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1064 				    state->advertising, permit_pause_to_mac);
1065 }
1066 
phylink_pcs_link_up(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,int speed,int duplex)1067 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1068 				phy_interface_t interface, int speed,
1069 				int duplex)
1070 {
1071 	if (pcs && pcs->ops->pcs_link_up)
1072 		pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1073 }
1074 
phylink_pcs_poll_stop(struct phylink * pl)1075 static void phylink_pcs_poll_stop(struct phylink *pl)
1076 {
1077 	if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1078 		del_timer(&pl->link_poll);
1079 }
1080 
phylink_pcs_poll_start(struct phylink * pl)1081 static void phylink_pcs_poll_start(struct phylink *pl)
1082 {
1083 	if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1084 		mod_timer(&pl->link_poll, jiffies + HZ);
1085 }
1086 
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)1087 static void phylink_mac_config(struct phylink *pl,
1088 			       const struct phylink_link_state *state)
1089 {
1090 	struct phylink_link_state st = *state;
1091 
1092 	/* Stop drivers incorrectly using these */
1093 	linkmode_zero(st.lp_advertising);
1094 	st.speed = SPEED_UNKNOWN;
1095 	st.duplex = DUPLEX_UNKNOWN;
1096 	st.an_complete = false;
1097 	st.link = false;
1098 
1099 	phylink_dbg(pl,
1100 		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1101 		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1102 		    phy_modes(st.interface),
1103 		    phy_rate_matching_to_str(st.rate_matching),
1104 		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1105 		    st.pause);
1106 
1107 	pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
1108 }
1109 
phylink_pcs_an_restart(struct phylink * pl)1110 static void phylink_pcs_an_restart(struct phylink *pl)
1111 {
1112 	if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1113 					 pl->link_config.advertising) &&
1114 	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
1115 	    phylink_autoneg_inband(pl->cur_link_an_mode))
1116 		pl->pcs->ops->pcs_an_restart(pl->pcs);
1117 }
1118 
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1119 static void phylink_major_config(struct phylink *pl, bool restart,
1120 				  const struct phylink_link_state *state)
1121 {
1122 	struct phylink_pcs *pcs = NULL;
1123 	bool pcs_changed = false;
1124 	unsigned int rate_kbd;
1125 	unsigned int neg_mode;
1126 	int err;
1127 
1128 	phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1129 
1130 	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1131 						state->interface,
1132 						state->advertising);
1133 
1134 	if (pl->using_mac_select_pcs) {
1135 		pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1136 		if (IS_ERR(pcs)) {
1137 			phylink_err(pl,
1138 				    "mac_select_pcs unexpectedly failed: %pe\n",
1139 				    pcs);
1140 			return;
1141 		}
1142 
1143 		pcs_changed = pcs && pl->pcs != pcs;
1144 	}
1145 
1146 	phylink_pcs_poll_stop(pl);
1147 
1148 	if (pl->mac_ops->mac_prepare) {
1149 		err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1150 					       state->interface);
1151 		if (err < 0) {
1152 			phylink_err(pl, "mac_prepare failed: %pe\n",
1153 				    ERR_PTR(err));
1154 			return;
1155 		}
1156 	}
1157 
1158 	/* If we have a new PCS, switch to the new PCS after preparing the MAC
1159 	 * for the change.
1160 	 */
1161 	if (pcs_changed) {
1162 		phylink_pcs_disable(pl->pcs);
1163 
1164 		if (pl->pcs)
1165 			pl->pcs->phylink = NULL;
1166 
1167 		pcs->phylink = pl;
1168 
1169 		pl->pcs = pcs;
1170 	}
1171 
1172 	if (pl->pcs)
1173 		phylink_pcs_pre_config(pl->pcs, state->interface);
1174 
1175 	phylink_mac_config(pl, state);
1176 
1177 	if (pl->pcs)
1178 		phylink_pcs_post_config(pl->pcs, state->interface);
1179 
1180 	if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1181 		phylink_pcs_enable(pl->pcs);
1182 
1183 	neg_mode = pl->cur_link_an_mode;
1184 	if (pl->pcs && pl->pcs->neg_mode)
1185 		neg_mode = pl->pcs_neg_mode;
1186 
1187 	err = phylink_pcs_config(pl->pcs, neg_mode, state,
1188 				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1189 	if (err < 0)
1190 		phylink_err(pl, "pcs_config failed: %pe\n",
1191 			    ERR_PTR(err));
1192 	else if (err > 0)
1193 		restart = true;
1194 
1195 	if (restart)
1196 		phylink_pcs_an_restart(pl);
1197 
1198 	if (pl->mac_ops->mac_finish) {
1199 		err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1200 					      state->interface);
1201 		if (err < 0)
1202 			phylink_err(pl, "mac_finish failed: %pe\n",
1203 				    ERR_PTR(err));
1204 	}
1205 
1206 	if (pl->sfp_bus) {
1207 		rate_kbd = phylink_interface_signal_rate(state->interface);
1208 		if (rate_kbd)
1209 			sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1210 	}
1211 
1212 	phylink_pcs_poll_start(pl);
1213 }
1214 
1215 /*
1216  * Reconfigure for a change of inband advertisement.
1217  * If we have a separate PCS, we only need to call its pcs_config() method,
1218  * and then restart AN if it indicates something changed. Otherwise, we do
1219  * the full MAC reconfiguration.
1220  */
phylink_change_inband_advert(struct phylink * pl)1221 static int phylink_change_inband_advert(struct phylink *pl)
1222 {
1223 	unsigned int neg_mode;
1224 	int ret;
1225 
1226 	if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1227 		return 0;
1228 
1229 	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1230 		    phylink_an_mode_str(pl->cur_link_an_mode),
1231 		    phy_modes(pl->link_config.interface),
1232 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1233 		    pl->link_config.pause);
1234 
1235 	/* Recompute the PCS neg mode */
1236 	pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1237 					pl->link_config.interface,
1238 					pl->link_config.advertising);
1239 
1240 	neg_mode = pl->cur_link_an_mode;
1241 	if (pl->pcs->neg_mode)
1242 		neg_mode = pl->pcs_neg_mode;
1243 
1244 	/* Modern PCS-based method; update the advert at the PCS, and
1245 	 * restart negotiation if the pcs_config() helper indicates that
1246 	 * the programmed advertisement has changed.
1247 	 */
1248 	ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1249 				 !!(pl->link_config.pause & MLO_PAUSE_AN));
1250 	if (ret < 0)
1251 		return ret;
1252 
1253 	if (ret > 0)
1254 		phylink_pcs_an_restart(pl);
1255 
1256 	return 0;
1257 }
1258 
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1259 static void phylink_mac_pcs_get_state(struct phylink *pl,
1260 				      struct phylink_link_state *state)
1261 {
1262 	linkmode_copy(state->advertising, pl->link_config.advertising);
1263 	linkmode_zero(state->lp_advertising);
1264 	state->interface = pl->link_config.interface;
1265 	state->rate_matching = pl->link_config.rate_matching;
1266 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1267 			      state->advertising)) {
1268 		state->speed = SPEED_UNKNOWN;
1269 		state->duplex = DUPLEX_UNKNOWN;
1270 		state->pause = MLO_PAUSE_NONE;
1271 	} else {
1272 		state->speed =  pl->link_config.speed;
1273 		state->duplex = pl->link_config.duplex;
1274 		state->pause = pl->link_config.pause;
1275 	}
1276 	state->an_complete = 0;
1277 	state->link = 1;
1278 
1279 	if (pl->pcs)
1280 		pl->pcs->ops->pcs_get_state(pl->pcs, state);
1281 	else
1282 		state->link = 0;
1283 }
1284 
1285 /* The fixed state is... fixed except for the link state,
1286  * which may be determined by a GPIO or a callback.
1287  */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1288 static void phylink_get_fixed_state(struct phylink *pl,
1289 				    struct phylink_link_state *state)
1290 {
1291 	*state = pl->link_config;
1292 	if (pl->config->get_fixed_state)
1293 		pl->config->get_fixed_state(pl->config, state);
1294 	else if (pl->link_gpio)
1295 		state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1296 
1297 	state->pause = MLO_PAUSE_NONE;
1298 	phylink_resolve_an_pause(state);
1299 }
1300 
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1301 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1302 {
1303 	struct phylink_link_state link_state;
1304 
1305 	switch (pl->cur_link_an_mode) {
1306 	case MLO_AN_PHY:
1307 		link_state = pl->phy_state;
1308 		break;
1309 
1310 	case MLO_AN_FIXED:
1311 		phylink_get_fixed_state(pl, &link_state);
1312 		break;
1313 
1314 	case MLO_AN_INBAND:
1315 		link_state = pl->link_config;
1316 		if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1317 			link_state.pause = MLO_PAUSE_NONE;
1318 		break;
1319 
1320 	default: /* can't happen */
1321 		return;
1322 	}
1323 
1324 	link_state.link = false;
1325 
1326 	phylink_apply_manual_flow(pl, &link_state);
1327 	phylink_major_config(pl, force_restart, &link_state);
1328 }
1329 
phylink_pause_to_str(int pause)1330 static const char *phylink_pause_to_str(int pause)
1331 {
1332 	switch (pause & MLO_PAUSE_TXRX_MASK) {
1333 	case MLO_PAUSE_TX | MLO_PAUSE_RX:
1334 		return "rx/tx";
1335 	case MLO_PAUSE_TX:
1336 		return "tx";
1337 	case MLO_PAUSE_RX:
1338 		return "rx";
1339 	default:
1340 		return "off";
1341 	}
1342 }
1343 
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1344 static void phylink_link_up(struct phylink *pl,
1345 			    struct phylink_link_state link_state)
1346 {
1347 	struct net_device *ndev = pl->netdev;
1348 	unsigned int neg_mode;
1349 	int speed, duplex;
1350 	bool rx_pause;
1351 
1352 	speed = link_state.speed;
1353 	duplex = link_state.duplex;
1354 	rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1355 
1356 	switch (link_state.rate_matching) {
1357 	case RATE_MATCH_PAUSE:
1358 		/* The PHY is doing rate matchion from the media rate (in
1359 		 * the link_state) to the interface speed, and will send
1360 		 * pause frames to the MAC to limit its transmission speed.
1361 		 */
1362 		speed = phylink_interface_max_speed(link_state.interface);
1363 		duplex = DUPLEX_FULL;
1364 		rx_pause = true;
1365 		break;
1366 
1367 	case RATE_MATCH_CRS:
1368 		/* The PHY is doing rate matchion from the media rate (in
1369 		 * the link_state) to the interface speed, and will cause
1370 		 * collisions to the MAC to limit its transmission speed.
1371 		 */
1372 		speed = phylink_interface_max_speed(link_state.interface);
1373 		duplex = DUPLEX_HALF;
1374 		break;
1375 	}
1376 
1377 	pl->cur_interface = link_state.interface;
1378 
1379 	neg_mode = pl->cur_link_an_mode;
1380 	if (pl->pcs && pl->pcs->neg_mode)
1381 		neg_mode = pl->pcs_neg_mode;
1382 
1383 	phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1384 			    duplex);
1385 
1386 	pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1387 				 pl->cur_interface, speed, duplex,
1388 				 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1389 
1390 	if (ndev)
1391 		netif_carrier_on(ndev);
1392 
1393 	phylink_info(pl,
1394 		     "Link is Up - %s/%s - flow control %s\n",
1395 		     phy_speed_to_str(link_state.speed),
1396 		     phy_duplex_to_str(link_state.duplex),
1397 		     phylink_pause_to_str(link_state.pause));
1398 }
1399 
phylink_link_down(struct phylink * pl)1400 static void phylink_link_down(struct phylink *pl)
1401 {
1402 	struct net_device *ndev = pl->netdev;
1403 
1404 	if (ndev)
1405 		netif_carrier_off(ndev);
1406 	pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1407 				   pl->cur_interface);
1408 	phylink_info(pl, "Link is Down\n");
1409 }
1410 
phylink_resolve(struct work_struct * w)1411 static void phylink_resolve(struct work_struct *w)
1412 {
1413 	struct phylink *pl = container_of(w, struct phylink, resolve);
1414 	struct phylink_link_state link_state;
1415 	struct net_device *ndev = pl->netdev;
1416 	bool mac_config = false;
1417 	bool retrigger = false;
1418 	bool cur_link_state;
1419 
1420 	mutex_lock(&pl->state_mutex);
1421 	if (pl->netdev)
1422 		cur_link_state = netif_carrier_ok(ndev);
1423 	else
1424 		cur_link_state = pl->old_link_state;
1425 
1426 	if (pl->phylink_disable_state) {
1427 		pl->mac_link_dropped = false;
1428 		link_state.link = false;
1429 	} else if (pl->mac_link_dropped) {
1430 		link_state.link = false;
1431 		retrigger = true;
1432 	} else {
1433 		switch (pl->cur_link_an_mode) {
1434 		case MLO_AN_PHY:
1435 			link_state = pl->phy_state;
1436 			phylink_apply_manual_flow(pl, &link_state);
1437 			mac_config = link_state.link;
1438 			break;
1439 
1440 		case MLO_AN_FIXED:
1441 			phylink_get_fixed_state(pl, &link_state);
1442 			mac_config = link_state.link;
1443 			break;
1444 
1445 		case MLO_AN_INBAND:
1446 			phylink_mac_pcs_get_state(pl, &link_state);
1447 
1448 			/* The PCS may have a latching link-fail indicator.
1449 			 * If the link was up, bring the link down and
1450 			 * re-trigger the resolve. Otherwise, re-read the
1451 			 * PCS state to get the current status of the link.
1452 			 */
1453 			if (!link_state.link) {
1454 				if (cur_link_state)
1455 					retrigger = true;
1456 				else
1457 					phylink_mac_pcs_get_state(pl,
1458 								  &link_state);
1459 			}
1460 
1461 			/* If we have a phy, the "up" state is the union of
1462 			 * both the PHY and the MAC
1463 			 */
1464 			if (pl->phydev)
1465 				link_state.link &= pl->phy_state.link;
1466 
1467 			/* Only update if the PHY link is up */
1468 			if (pl->phydev && pl->phy_state.link) {
1469 				/* If the interface has changed, force a
1470 				 * link down event if the link isn't already
1471 				 * down, and re-resolve.
1472 				 */
1473 				if (link_state.interface !=
1474 				    pl->phy_state.interface) {
1475 					retrigger = true;
1476 					link_state.link = false;
1477 				}
1478 				link_state.interface = pl->phy_state.interface;
1479 
1480 				/* If we are doing rate matching, then the
1481 				 * link speed/duplex comes from the PHY
1482 				 */
1483 				if (pl->phy_state.rate_matching) {
1484 					link_state.rate_matching =
1485 						pl->phy_state.rate_matching;
1486 					link_state.speed = pl->phy_state.speed;
1487 					link_state.duplex =
1488 						pl->phy_state.duplex;
1489 				}
1490 
1491 				/* If we have a PHY, we need to update with
1492 				 * the PHY flow control bits.
1493 				 */
1494 				link_state.pause = pl->phy_state.pause;
1495 				mac_config = true;
1496 			}
1497 			phylink_apply_manual_flow(pl, &link_state);
1498 			break;
1499 		}
1500 	}
1501 
1502 	if (mac_config) {
1503 		if (link_state.interface != pl->link_config.interface) {
1504 			/* The interface has changed, force the link down and
1505 			 * then reconfigure.
1506 			 */
1507 			if (cur_link_state) {
1508 				phylink_link_down(pl);
1509 				cur_link_state = false;
1510 			}
1511 			phylink_major_config(pl, false, &link_state);
1512 			pl->link_config.interface = link_state.interface;
1513 		}
1514 	}
1515 
1516 	if (link_state.link != cur_link_state) {
1517 		pl->old_link_state = link_state.link;
1518 		if (!link_state.link)
1519 			phylink_link_down(pl);
1520 		else
1521 			phylink_link_up(pl, link_state);
1522 	}
1523 	if (!link_state.link && retrigger) {
1524 		pl->mac_link_dropped = false;
1525 		queue_work(system_power_efficient_wq, &pl->resolve);
1526 	}
1527 	mutex_unlock(&pl->state_mutex);
1528 }
1529 
phylink_run_resolve(struct phylink * pl)1530 static void phylink_run_resolve(struct phylink *pl)
1531 {
1532 	if (!pl->phylink_disable_state)
1533 		queue_work(system_power_efficient_wq, &pl->resolve);
1534 }
1535 
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1536 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1537 {
1538 	unsigned long state = pl->phylink_disable_state;
1539 
1540 	set_bit(bit, &pl->phylink_disable_state);
1541 	if (state == 0) {
1542 		queue_work(system_power_efficient_wq, &pl->resolve);
1543 		flush_work(&pl->resolve);
1544 	}
1545 }
1546 
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1547 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1548 {
1549 	clear_bit(bit, &pl->phylink_disable_state);
1550 	phylink_run_resolve(pl);
1551 }
1552 
phylink_fixed_poll(struct timer_list * t)1553 static void phylink_fixed_poll(struct timer_list *t)
1554 {
1555 	struct phylink *pl = container_of(t, struct phylink, link_poll);
1556 
1557 	mod_timer(t, jiffies + HZ);
1558 
1559 	phylink_run_resolve(pl);
1560 }
1561 
1562 static const struct sfp_upstream_ops sfp_phylink_ops;
1563 
phylink_register_sfp(struct phylink * pl,const struct fwnode_handle * fwnode)1564 static int phylink_register_sfp(struct phylink *pl,
1565 				const struct fwnode_handle *fwnode)
1566 {
1567 	struct sfp_bus *bus;
1568 	int ret;
1569 
1570 	if (!fwnode)
1571 		return 0;
1572 
1573 	bus = sfp_bus_find_fwnode(fwnode);
1574 	if (IS_ERR(bus)) {
1575 		phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1576 		return PTR_ERR(bus);
1577 	}
1578 
1579 	pl->sfp_bus = bus;
1580 
1581 	ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1582 	sfp_bus_put(bus);
1583 
1584 	return ret;
1585 }
1586 
1587 /**
1588  * phylink_create() - create a phylink instance
1589  * @config: a pointer to the target &struct phylink_config
1590  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1591  *	interface
1592  * @iface: the desired link mode defined by &typedef phy_interface_t
1593  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1594  *
1595  * Create a new phylink instance, and parse the link parameters found in @np.
1596  * This will parse in-band modes, fixed-link or SFP configuration.
1597  *
1598  * Note: the rtnl lock must not be held when calling this function.
1599  *
1600  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1601  * must use IS_ERR() to check for errors from this function.
1602  */
phylink_create(struct phylink_config * config,const struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1603 struct phylink *phylink_create(struct phylink_config *config,
1604 			       const struct fwnode_handle *fwnode,
1605 			       phy_interface_t iface,
1606 			       const struct phylink_mac_ops *mac_ops)
1607 {
1608 	bool using_mac_select_pcs = false;
1609 	struct phylink *pl;
1610 	int ret;
1611 
1612 	/* Validate the supplied configuration */
1613 	if (phy_interface_empty(config->supported_interfaces)) {
1614 		dev_err(config->dev,
1615 			"phylink: error: empty supported_interfaces\n");
1616 		return ERR_PTR(-EINVAL);
1617 	}
1618 
1619 	if (mac_ops->mac_select_pcs &&
1620 	    mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1621 	      ERR_PTR(-EOPNOTSUPP))
1622 		using_mac_select_pcs = true;
1623 
1624 	pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1625 	if (!pl)
1626 		return ERR_PTR(-ENOMEM);
1627 
1628 	mutex_init(&pl->state_mutex);
1629 	INIT_WORK(&pl->resolve, phylink_resolve);
1630 
1631 	pl->config = config;
1632 	if (config->type == PHYLINK_NETDEV) {
1633 		pl->netdev = to_net_dev(config->dev);
1634 	} else if (config->type == PHYLINK_DEV) {
1635 		pl->dev = config->dev;
1636 	} else {
1637 		kfree(pl);
1638 		return ERR_PTR(-EINVAL);
1639 	}
1640 
1641 	pl->using_mac_select_pcs = using_mac_select_pcs;
1642 	pl->phy_state.interface = iface;
1643 	pl->link_interface = iface;
1644 	if (iface == PHY_INTERFACE_MODE_MOCA)
1645 		pl->link_port = PORT_BNC;
1646 	else
1647 		pl->link_port = PORT_MII;
1648 	pl->link_config.interface = iface;
1649 	pl->link_config.pause = MLO_PAUSE_AN;
1650 	pl->link_config.speed = SPEED_UNKNOWN;
1651 	pl->link_config.duplex = DUPLEX_UNKNOWN;
1652 	pl->pcs_state = PCS_STATE_DOWN;
1653 	pl->mac_ops = mac_ops;
1654 	__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1655 	timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1656 
1657 	bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1658 	linkmode_copy(pl->link_config.advertising, pl->supported);
1659 	phylink_validate(pl, pl->supported, &pl->link_config);
1660 
1661 	ret = phylink_parse_mode(pl, fwnode);
1662 	if (ret < 0) {
1663 		kfree(pl);
1664 		return ERR_PTR(ret);
1665 	}
1666 
1667 	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1668 		ret = phylink_parse_fixedlink(pl, fwnode);
1669 		if (ret < 0) {
1670 			kfree(pl);
1671 			return ERR_PTR(ret);
1672 		}
1673 	}
1674 
1675 	pl->cur_link_an_mode = pl->cfg_link_an_mode;
1676 
1677 	ret = phylink_register_sfp(pl, fwnode);
1678 	if (ret < 0) {
1679 		kfree(pl);
1680 		return ERR_PTR(ret);
1681 	}
1682 
1683 	return pl;
1684 }
1685 EXPORT_SYMBOL_GPL(phylink_create);
1686 
1687 /**
1688  * phylink_destroy() - cleanup and destroy the phylink instance
1689  * @pl: a pointer to a &struct phylink returned from phylink_create()
1690  *
1691  * Destroy a phylink instance. Any PHY that has been attached must have been
1692  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1693  *
1694  * Note: the rtnl lock must not be held when calling this function.
1695  */
phylink_destroy(struct phylink * pl)1696 void phylink_destroy(struct phylink *pl)
1697 {
1698 	sfp_bus_del_upstream(pl->sfp_bus);
1699 	if (pl->link_gpio)
1700 		gpiod_put(pl->link_gpio);
1701 
1702 	cancel_work_sync(&pl->resolve);
1703 	kfree(pl);
1704 }
1705 EXPORT_SYMBOL_GPL(phylink_destroy);
1706 
1707 /**
1708  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1709  * @pl: a pointer to a &struct phylink returned from phylink_create()
1710  *
1711  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1712  * no PHY is needed.
1713  *
1714  * Returns true if phylink will be expecting a PHY.
1715  */
phylink_expects_phy(struct phylink * pl)1716 bool phylink_expects_phy(struct phylink *pl)
1717 {
1718 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1719 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1720 	     phy_interface_mode_is_8023z(pl->link_config.interface)))
1721 		return false;
1722 	return true;
1723 }
1724 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1725 
phylink_phy_change(struct phy_device * phydev,bool up)1726 static void phylink_phy_change(struct phy_device *phydev, bool up)
1727 {
1728 	struct phylink *pl = phydev->phylink;
1729 	bool tx_pause, rx_pause;
1730 
1731 	phy_get_pause(phydev, &tx_pause, &rx_pause);
1732 
1733 	mutex_lock(&pl->state_mutex);
1734 	pl->phy_state.speed = phydev->speed;
1735 	pl->phy_state.duplex = phydev->duplex;
1736 	pl->phy_state.rate_matching = phydev->rate_matching;
1737 	pl->phy_state.pause = MLO_PAUSE_NONE;
1738 	if (tx_pause)
1739 		pl->phy_state.pause |= MLO_PAUSE_TX;
1740 	if (rx_pause)
1741 		pl->phy_state.pause |= MLO_PAUSE_RX;
1742 	pl->phy_state.interface = phydev->interface;
1743 	pl->phy_state.link = up;
1744 	mutex_unlock(&pl->state_mutex);
1745 
1746 	phylink_run_resolve(pl);
1747 
1748 	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1749 		    phy_modes(phydev->interface),
1750 		    phy_speed_to_str(phydev->speed),
1751 		    phy_duplex_to_str(phydev->duplex),
1752 		    phy_rate_matching_to_str(phydev->rate_matching),
1753 		    phylink_pause_to_str(pl->phy_state.pause));
1754 }
1755 
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1756 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1757 			       phy_interface_t interface)
1758 {
1759 	struct phylink_link_state config;
1760 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1761 	char *irq_str;
1762 	int ret;
1763 
1764 	/*
1765 	 * This is the new way of dealing with flow control for PHYs,
1766 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1767 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1768 	 * using our validate call to the MAC, we rely upon the MAC
1769 	 * clearing the bits from both supported and advertising fields.
1770 	 */
1771 	phy_support_asym_pause(phy);
1772 
1773 	memset(&config, 0, sizeof(config));
1774 	linkmode_copy(supported, phy->supported);
1775 	linkmode_copy(config.advertising, phy->advertising);
1776 
1777 	/* Check whether we would use rate matching for the proposed interface
1778 	 * mode.
1779 	 */
1780 	config.rate_matching = phy_get_rate_matching(phy, interface);
1781 
1782 	/* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1783 	 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1784 	 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1785 	 * their Serdes is either unnecessary or not reasonable.
1786 	 *
1787 	 * For these which switch interface modes, we really need to know which
1788 	 * interface modes the PHY supports to properly work out which ethtool
1789 	 * linkmodes can be supported. For now, as a work-around, we validate
1790 	 * against all interface modes, which may lead to more ethtool link
1791 	 * modes being advertised than are actually supported.
1792 	 */
1793 	if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1794 	    interface != PHY_INTERFACE_MODE_RXAUI &&
1795 	    interface != PHY_INTERFACE_MODE_XAUI &&
1796 	    interface != PHY_INTERFACE_MODE_USXGMII)
1797 		config.interface = PHY_INTERFACE_MODE_NA;
1798 	else
1799 		config.interface = interface;
1800 
1801 	ret = phylink_validate(pl, supported, &config);
1802 	if (ret) {
1803 		phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1804 			     phy_modes(config.interface),
1805 			     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1806 			     __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1807 			     ERR_PTR(ret));
1808 		return ret;
1809 	}
1810 
1811 	phy->phylink = pl;
1812 	phy->phy_link_change = phylink_phy_change;
1813 
1814 	irq_str = phy_attached_info_irq(phy);
1815 	phylink_info(pl,
1816 		     "PHY [%s] driver [%s] (irq=%s)\n",
1817 		     dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1818 	kfree(irq_str);
1819 
1820 	mutex_lock(&phy->lock);
1821 	mutex_lock(&pl->state_mutex);
1822 	pl->phydev = phy;
1823 	pl->phy_state.interface = interface;
1824 	pl->phy_state.pause = MLO_PAUSE_NONE;
1825 	pl->phy_state.speed = SPEED_UNKNOWN;
1826 	pl->phy_state.duplex = DUPLEX_UNKNOWN;
1827 	pl->phy_state.rate_matching = RATE_MATCH_NONE;
1828 	linkmode_copy(pl->supported, supported);
1829 	linkmode_copy(pl->link_config.advertising, config.advertising);
1830 
1831 	/* Restrict the phy advertisement according to the MAC support. */
1832 	linkmode_copy(phy->advertising, config.advertising);
1833 	mutex_unlock(&pl->state_mutex);
1834 	mutex_unlock(&phy->lock);
1835 
1836 	phylink_dbg(pl,
1837 		    "phy: %s setting supported %*pb advertising %*pb\n",
1838 		    phy_modes(interface),
1839 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1840 		    __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1841 
1842 	if (phy_interrupt_is_valid(phy))
1843 		phy_request_interrupt(phy);
1844 
1845 	if (pl->config->mac_managed_pm)
1846 		phy->mac_managed_pm = true;
1847 
1848 	return 0;
1849 }
1850 
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1851 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1852 			      phy_interface_t interface)
1853 {
1854 	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1855 		    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1856 		     phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1857 		return -EINVAL;
1858 
1859 	if (pl->phydev)
1860 		return -EBUSY;
1861 
1862 	return phy_attach_direct(pl->netdev, phy, 0, interface);
1863 }
1864 
1865 /**
1866  * phylink_connect_phy() - connect a PHY to the phylink instance
1867  * @pl: a pointer to a &struct phylink returned from phylink_create()
1868  * @phy: a pointer to a &struct phy_device.
1869  *
1870  * Connect @phy to the phylink instance specified by @pl by calling
1871  * phy_attach_direct(). Configure the @phy according to the MAC driver's
1872  * capabilities, start the PHYLIB state machine and enable any interrupts
1873  * that the PHY supports.
1874  *
1875  * This updates the phylink's ethtool supported and advertising link mode
1876  * masks.
1877  *
1878  * Returns 0 on success or a negative errno.
1879  */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)1880 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1881 {
1882 	int ret;
1883 
1884 	/* Use PHY device/driver interface */
1885 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1886 		pl->link_interface = phy->interface;
1887 		pl->link_config.interface = pl->link_interface;
1888 	}
1889 
1890 	ret = phylink_attach_phy(pl, phy, pl->link_interface);
1891 	if (ret < 0)
1892 		return ret;
1893 
1894 	ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1895 	if (ret)
1896 		phy_detach(phy);
1897 
1898 	return ret;
1899 }
1900 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1901 
1902 /**
1903  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1904  * @pl: a pointer to a &struct phylink returned from phylink_create()
1905  * @dn: a pointer to a &struct device_node.
1906  * @flags: PHY-specific flags to communicate to the PHY device driver
1907  *
1908  * Connect the phy specified in the device node @dn to the phylink instance
1909  * specified by @pl. Actions specified in phylink_connect_phy() will be
1910  * performed.
1911  *
1912  * Returns 0 on success or a negative errno.
1913  */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)1914 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1915 			   u32 flags)
1916 {
1917 	return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1918 }
1919 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1920 
1921 /**
1922  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1923  * @pl: a pointer to a &struct phylink returned from phylink_create()
1924  * @fwnode: a pointer to a &struct fwnode_handle.
1925  * @flags: PHY-specific flags to communicate to the PHY device driver
1926  *
1927  * Connect the phy specified @fwnode to the phylink instance specified
1928  * by @pl.
1929  *
1930  * Returns 0 on success or a negative errno.
1931  */
phylink_fwnode_phy_connect(struct phylink * pl,const struct fwnode_handle * fwnode,u32 flags)1932 int phylink_fwnode_phy_connect(struct phylink *pl,
1933 			       const struct fwnode_handle *fwnode,
1934 			       u32 flags)
1935 {
1936 	struct fwnode_handle *phy_fwnode;
1937 	struct phy_device *phy_dev;
1938 	int ret;
1939 
1940 	/* Fixed links and 802.3z are handled without needing a PHY */
1941 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1942 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1943 	     phy_interface_mode_is_8023z(pl->link_interface)))
1944 		return 0;
1945 
1946 	phy_fwnode = fwnode_get_phy_node(fwnode);
1947 	if (IS_ERR(phy_fwnode)) {
1948 		if (pl->cfg_link_an_mode == MLO_AN_PHY)
1949 			return -ENODEV;
1950 		return 0;
1951 	}
1952 
1953 	phy_dev = fwnode_phy_find_device(phy_fwnode);
1954 	/* We're done with the phy_node handle */
1955 	fwnode_handle_put(phy_fwnode);
1956 	if (!phy_dev)
1957 		return -ENODEV;
1958 
1959 	/* Use PHY device/driver interface */
1960 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1961 		pl->link_interface = phy_dev->interface;
1962 		pl->link_config.interface = pl->link_interface;
1963 	}
1964 
1965 	ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1966 				pl->link_interface);
1967 	phy_device_free(phy_dev);
1968 	if (ret)
1969 		return ret;
1970 
1971 	ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1972 	if (ret)
1973 		phy_detach(phy_dev);
1974 
1975 	return ret;
1976 }
1977 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1978 
1979 /**
1980  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1981  *   instance.
1982  * @pl: a pointer to a &struct phylink returned from phylink_create()
1983  *
1984  * Disconnect any current PHY from the phylink instance described by @pl.
1985  */
phylink_disconnect_phy(struct phylink * pl)1986 void phylink_disconnect_phy(struct phylink *pl)
1987 {
1988 	struct phy_device *phy;
1989 
1990 	ASSERT_RTNL();
1991 
1992 	phy = pl->phydev;
1993 	if (phy) {
1994 		mutex_lock(&phy->lock);
1995 		mutex_lock(&pl->state_mutex);
1996 		pl->phydev = NULL;
1997 		mutex_unlock(&pl->state_mutex);
1998 		mutex_unlock(&phy->lock);
1999 		flush_work(&pl->resolve);
2000 
2001 		phy_disconnect(phy);
2002 	}
2003 }
2004 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2005 
phylink_link_changed(struct phylink * pl,bool up,const char * what)2006 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2007 {
2008 	if (!up)
2009 		pl->mac_link_dropped = true;
2010 	phylink_run_resolve(pl);
2011 	phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2012 }
2013 
2014 /**
2015  * phylink_mac_change() - notify phylink of a change in MAC state
2016  * @pl: a pointer to a &struct phylink returned from phylink_create()
2017  * @up: indicates whether the link is currently up.
2018  *
2019  * The MAC driver should call this driver when the state of its link
2020  * changes (eg, link failure, new negotiation results, etc.)
2021  */
phylink_mac_change(struct phylink * pl,bool up)2022 void phylink_mac_change(struct phylink *pl, bool up)
2023 {
2024 	phylink_link_changed(pl, up, "mac");
2025 }
2026 EXPORT_SYMBOL_GPL(phylink_mac_change);
2027 
2028 /**
2029  * phylink_pcs_change() - notify phylink of a change to PCS link state
2030  * @pcs: pointer to &struct phylink_pcs
2031  * @up: indicates whether the link is currently up.
2032  *
2033  * The PCS driver should call this when the state of its link changes
2034  * (e.g. link failure, new negotiation results, etc.) Note: it should
2035  * not determine "up" by reading the BMSR. If in doubt about the link
2036  * state at interrupt time, then pass true if pcs_get_state() returns
2037  * the latched link-down state, otherwise pass false.
2038  */
phylink_pcs_change(struct phylink_pcs * pcs,bool up)2039 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2040 {
2041 	struct phylink *pl = pcs->phylink;
2042 
2043 	if (pl)
2044 		phylink_link_changed(pl, up, "pcs");
2045 }
2046 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2047 
phylink_link_handler(int irq,void * data)2048 static irqreturn_t phylink_link_handler(int irq, void *data)
2049 {
2050 	struct phylink *pl = data;
2051 
2052 	phylink_run_resolve(pl);
2053 
2054 	return IRQ_HANDLED;
2055 }
2056 
2057 /**
2058  * phylink_start() - start a phylink instance
2059  * @pl: a pointer to a &struct phylink returned from phylink_create()
2060  *
2061  * Start the phylink instance specified by @pl, configuring the MAC for the
2062  * desired link mode(s) and negotiation style. This should be called from the
2063  * network device driver's &struct net_device_ops ndo_open() method.
2064  */
phylink_start(struct phylink * pl)2065 void phylink_start(struct phylink *pl)
2066 {
2067 	bool poll = false;
2068 
2069 	ASSERT_RTNL();
2070 
2071 	phylink_info(pl, "configuring for %s/%s link mode\n",
2072 		     phylink_an_mode_str(pl->cur_link_an_mode),
2073 		     phy_modes(pl->link_config.interface));
2074 
2075 	/* Always set the carrier off */
2076 	if (pl->netdev)
2077 		netif_carrier_off(pl->netdev);
2078 
2079 	pl->pcs_state = PCS_STATE_STARTING;
2080 
2081 	/* Apply the link configuration to the MAC when starting. This allows
2082 	 * a fixed-link to start with the correct parameters, and also
2083 	 * ensures that we set the appropriate advertisement for Serdes links.
2084 	 *
2085 	 * Restart autonegotiation if using 802.3z to ensure that the link
2086 	 * parameters are properly negotiated.  This is necessary for DSA
2087 	 * switches using 802.3z negotiation to ensure they see our modes.
2088 	 */
2089 	phylink_mac_initial_config(pl, true);
2090 
2091 	pl->pcs_state = PCS_STATE_STARTED;
2092 
2093 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2094 
2095 	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2096 		int irq = gpiod_to_irq(pl->link_gpio);
2097 
2098 		if (irq > 0) {
2099 			if (!request_irq(irq, phylink_link_handler,
2100 					 IRQF_TRIGGER_RISING |
2101 					 IRQF_TRIGGER_FALLING,
2102 					 "netdev link", pl))
2103 				pl->link_irq = irq;
2104 			else
2105 				irq = 0;
2106 		}
2107 		if (irq <= 0)
2108 			poll = true;
2109 	}
2110 
2111 	if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2112 		poll |= pl->config->poll_fixed_state;
2113 
2114 	if (poll)
2115 		mod_timer(&pl->link_poll, jiffies + HZ);
2116 	if (pl->phydev)
2117 		phy_start(pl->phydev);
2118 	if (pl->sfp_bus)
2119 		sfp_upstream_start(pl->sfp_bus);
2120 }
2121 EXPORT_SYMBOL_GPL(phylink_start);
2122 
2123 /**
2124  * phylink_stop() - stop a phylink instance
2125  * @pl: a pointer to a &struct phylink returned from phylink_create()
2126  *
2127  * Stop the phylink instance specified by @pl. This should be called from the
2128  * network device driver's &struct net_device_ops ndo_stop() method.  The
2129  * network device's carrier state should not be changed prior to calling this
2130  * function.
2131  *
2132  * This will synchronously bring down the link if the link is not already
2133  * down (in other words, it will trigger a mac_link_down() method call.)
2134  */
phylink_stop(struct phylink * pl)2135 void phylink_stop(struct phylink *pl)
2136 {
2137 	ASSERT_RTNL();
2138 
2139 	if (pl->sfp_bus)
2140 		sfp_upstream_stop(pl->sfp_bus);
2141 	if (pl->phydev)
2142 		phy_stop(pl->phydev);
2143 	del_timer_sync(&pl->link_poll);
2144 	if (pl->link_irq) {
2145 		free_irq(pl->link_irq, pl);
2146 		pl->link_irq = 0;
2147 	}
2148 
2149 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2150 
2151 	pl->pcs_state = PCS_STATE_DOWN;
2152 
2153 	phylink_pcs_disable(pl->pcs);
2154 }
2155 EXPORT_SYMBOL_GPL(phylink_stop);
2156 
2157 /**
2158  * phylink_suspend() - handle a network device suspend event
2159  * @pl: a pointer to a &struct phylink returned from phylink_create()
2160  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2161  *
2162  * Handle a network device suspend event. There are several cases:
2163  *
2164  * - If Wake-on-Lan is not active, we can bring down the link between
2165  *   the MAC and PHY by calling phylink_stop().
2166  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2167  *   can also bring down the link between the MAC and PHY.
2168  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2169  *   still needs to receive packets, so we can not bring the link down.
2170  */
phylink_suspend(struct phylink * pl,bool mac_wol)2171 void phylink_suspend(struct phylink *pl, bool mac_wol)
2172 {
2173 	ASSERT_RTNL();
2174 
2175 	if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
2176 		/* Wake-on-Lan enabled, MAC handling */
2177 		mutex_lock(&pl->state_mutex);
2178 
2179 		/* Stop the resolver bringing the link up */
2180 		__set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2181 
2182 		/* Disable the carrier, to prevent transmit timeouts,
2183 		 * but one would hope all packets have been sent. This
2184 		 * also means phylink_resolve() will do nothing.
2185 		 */
2186 		if (pl->netdev)
2187 			netif_carrier_off(pl->netdev);
2188 		else
2189 			pl->old_link_state = false;
2190 
2191 		/* We do not call mac_link_down() here as we want the
2192 		 * link to remain up to receive the WoL packets.
2193 		 */
2194 		mutex_unlock(&pl->state_mutex);
2195 	} else {
2196 		phylink_stop(pl);
2197 	}
2198 }
2199 EXPORT_SYMBOL_GPL(phylink_suspend);
2200 
2201 /**
2202  * phylink_resume() - handle a network device resume event
2203  * @pl: a pointer to a &struct phylink returned from phylink_create()
2204  *
2205  * Undo the effects of phylink_suspend(), returning the link to an
2206  * operational state.
2207  */
phylink_resume(struct phylink * pl)2208 void phylink_resume(struct phylink *pl)
2209 {
2210 	ASSERT_RTNL();
2211 
2212 	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2213 		/* Wake-on-Lan enabled, MAC handling */
2214 
2215 		/* Call mac_link_down() so we keep the overall state balanced.
2216 		 * Do this under the state_mutex lock for consistency. This
2217 		 * will cause a "Link Down" message to be printed during
2218 		 * resume, which is harmless - the true link state will be
2219 		 * printed when we run a resolve.
2220 		 */
2221 		mutex_lock(&pl->state_mutex);
2222 		phylink_link_down(pl);
2223 		mutex_unlock(&pl->state_mutex);
2224 
2225 		/* Re-apply the link parameters so that all the settings get
2226 		 * restored to the MAC.
2227 		 */
2228 		phylink_mac_initial_config(pl, true);
2229 
2230 		/* Re-enable and re-resolve the link parameters */
2231 		phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2232 	} else {
2233 		phylink_start(pl);
2234 	}
2235 }
2236 EXPORT_SYMBOL_GPL(phylink_resume);
2237 
2238 /**
2239  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2240  * @pl: a pointer to a &struct phylink returned from phylink_create()
2241  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2242  *
2243  * Read the wake on lan parameters from the PHY attached to the phylink
2244  * instance specified by @pl. If no PHY is currently attached, report no
2245  * support for wake on lan.
2246  */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2247 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2248 {
2249 	ASSERT_RTNL();
2250 
2251 	wol->supported = 0;
2252 	wol->wolopts = 0;
2253 
2254 	if (pl->phydev)
2255 		phy_ethtool_get_wol(pl->phydev, wol);
2256 }
2257 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2258 
2259 /**
2260  * phylink_ethtool_set_wol() - set wake on lan parameters
2261  * @pl: a pointer to a &struct phylink returned from phylink_create()
2262  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2263  *
2264  * Set the wake on lan parameters for the PHY attached to the phylink
2265  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2266  * error.
2267  *
2268  * Returns zero on success or negative errno code.
2269  */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2270 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2271 {
2272 	int ret = -EOPNOTSUPP;
2273 
2274 	ASSERT_RTNL();
2275 
2276 	if (pl->phydev)
2277 		ret = phy_ethtool_set_wol(pl->phydev, wol);
2278 
2279 	return ret;
2280 }
2281 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2282 
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2283 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2284 {
2285 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2286 
2287 	linkmode_zero(mask);
2288 	phylink_set_port_modes(mask);
2289 
2290 	linkmode_and(dst, dst, mask);
2291 	linkmode_or(dst, dst, b);
2292 }
2293 
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2294 static void phylink_get_ksettings(const struct phylink_link_state *state,
2295 				  struct ethtool_link_ksettings *kset)
2296 {
2297 	phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2298 	linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2299 	if (kset->base.rate_matching == RATE_MATCH_NONE) {
2300 		kset->base.speed = state->speed;
2301 		kset->base.duplex = state->duplex;
2302 	}
2303 	kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2304 					       state->advertising) ?
2305 				AUTONEG_ENABLE : AUTONEG_DISABLE;
2306 }
2307 
2308 /**
2309  * phylink_ethtool_ksettings_get() - get the current link settings
2310  * @pl: a pointer to a &struct phylink returned from phylink_create()
2311  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2312  *
2313  * Read the current link settings for the phylink instance specified by @pl.
2314  * This will be the link settings read from the MAC, PHY or fixed link
2315  * settings depending on the current negotiation mode.
2316  */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2317 int phylink_ethtool_ksettings_get(struct phylink *pl,
2318 				  struct ethtool_link_ksettings *kset)
2319 {
2320 	struct phylink_link_state link_state;
2321 
2322 	ASSERT_RTNL();
2323 
2324 	if (pl->phydev)
2325 		phy_ethtool_ksettings_get(pl->phydev, kset);
2326 	else
2327 		kset->base.port = pl->link_port;
2328 
2329 	linkmode_copy(kset->link_modes.supported, pl->supported);
2330 
2331 	switch (pl->cur_link_an_mode) {
2332 	case MLO_AN_FIXED:
2333 		/* We are using fixed settings. Report these as the
2334 		 * current link settings - and note that these also
2335 		 * represent the supported speeds/duplex/pause modes.
2336 		 */
2337 		phylink_get_fixed_state(pl, &link_state);
2338 		phylink_get_ksettings(&link_state, kset);
2339 		break;
2340 
2341 	case MLO_AN_INBAND:
2342 		/* If there is a phy attached, then use the reported
2343 		 * settings from the phy with no modification.
2344 		 */
2345 		if (pl->phydev)
2346 			break;
2347 
2348 		phylink_mac_pcs_get_state(pl, &link_state);
2349 
2350 		/* The MAC is reporting the link results from its own PCS
2351 		 * layer via in-band status. Report these as the current
2352 		 * link settings.
2353 		 */
2354 		phylink_get_ksettings(&link_state, kset);
2355 		break;
2356 	}
2357 
2358 	return 0;
2359 }
2360 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2361 
2362 /**
2363  * phylink_ethtool_ksettings_set() - set the link settings
2364  * @pl: a pointer to a &struct phylink returned from phylink_create()
2365  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2366  */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2367 int phylink_ethtool_ksettings_set(struct phylink *pl,
2368 				  const struct ethtool_link_ksettings *kset)
2369 {
2370 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2371 	struct phylink_link_state config;
2372 	const struct phy_setting *s;
2373 
2374 	ASSERT_RTNL();
2375 
2376 	if (pl->phydev) {
2377 		struct ethtool_link_ksettings phy_kset = *kset;
2378 
2379 		linkmode_and(phy_kset.link_modes.advertising,
2380 			     phy_kset.link_modes.advertising,
2381 			     pl->supported);
2382 
2383 		/* We can rely on phylib for this update; we also do not need
2384 		 * to update the pl->link_config settings:
2385 		 * - the configuration returned via ksettings_get() will come
2386 		 *   from phylib whenever a PHY is present.
2387 		 * - link_config.interface will be updated by the PHY calling
2388 		 *   back via phylink_phy_change() and a subsequent resolve.
2389 		 * - initial link configuration for PHY mode comes from the
2390 		 *   last phy state updated via phylink_phy_change().
2391 		 * - other configuration changes (e.g. pause modes) are
2392 		 *   performed directly via phylib.
2393 		 * - if in in-band mode with a PHY, the link configuration
2394 		 *   is passed on the link from the PHY, and all of
2395 		 *   link_config.{speed,duplex,an_enabled,pause} are not used.
2396 		 * - the only possible use would be link_config.advertising
2397 		 *   pause modes when in 1000base-X mode with a PHY, but in
2398 		 *   the presence of a PHY, this should not be changed as that
2399 		 *   should be determined from the media side advertisement.
2400 		 */
2401 		return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2402 	}
2403 
2404 	config = pl->link_config;
2405 	/* Mask out unsupported advertisements */
2406 	linkmode_and(config.advertising, kset->link_modes.advertising,
2407 		     pl->supported);
2408 
2409 	/* FIXME: should we reject autoneg if phy/mac does not support it? */
2410 	switch (kset->base.autoneg) {
2411 	case AUTONEG_DISABLE:
2412 		/* Autonegotiation disabled, select a suitable speed and
2413 		 * duplex.
2414 		 */
2415 		s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2416 				       pl->supported, false);
2417 		if (!s)
2418 			return -EINVAL;
2419 
2420 		/* If we have a fixed link, refuse to change link parameters.
2421 		 * If the link parameters match, accept them but do nothing.
2422 		 */
2423 		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2424 			if (s->speed != pl->link_config.speed ||
2425 			    s->duplex != pl->link_config.duplex)
2426 				return -EINVAL;
2427 			return 0;
2428 		}
2429 
2430 		config.speed = s->speed;
2431 		config.duplex = s->duplex;
2432 		break;
2433 
2434 	case AUTONEG_ENABLE:
2435 		/* If we have a fixed link, allow autonegotiation (since that
2436 		 * is our default case) but do not allow the advertisement to
2437 		 * be changed. If the advertisement matches, simply return.
2438 		 */
2439 		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2440 			if (!linkmode_equal(config.advertising,
2441 					    pl->link_config.advertising))
2442 				return -EINVAL;
2443 			return 0;
2444 		}
2445 
2446 		config.speed = SPEED_UNKNOWN;
2447 		config.duplex = DUPLEX_UNKNOWN;
2448 		break;
2449 
2450 	default:
2451 		return -EINVAL;
2452 	}
2453 
2454 	/* We have ruled out the case with a PHY attached, and the
2455 	 * fixed-link cases.  All that is left are in-band links.
2456 	 */
2457 	linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2458 			 kset->base.autoneg == AUTONEG_ENABLE);
2459 
2460 	/* If this link is with an SFP, ensure that changes to advertised modes
2461 	 * also cause the associated interface to be selected such that the
2462 	 * link can be configured correctly.
2463 	 */
2464 	if (pl->sfp_bus) {
2465 		config.interface = sfp_select_interface(pl->sfp_bus,
2466 							config.advertising);
2467 		if (config.interface == PHY_INTERFACE_MODE_NA) {
2468 			phylink_err(pl,
2469 				    "selection of interface failed, advertisement %*pb\n",
2470 				    __ETHTOOL_LINK_MODE_MASK_NBITS,
2471 				    config.advertising);
2472 			return -EINVAL;
2473 		}
2474 
2475 		/* Revalidate with the selected interface */
2476 		linkmode_copy(support, pl->supported);
2477 		if (phylink_validate(pl, support, &config)) {
2478 			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2479 				    phylink_an_mode_str(pl->cur_link_an_mode),
2480 				    phy_modes(config.interface),
2481 				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2482 			return -EINVAL;
2483 		}
2484 	} else {
2485 		/* Validate without changing the current supported mask. */
2486 		linkmode_copy(support, pl->supported);
2487 		if (phylink_validate(pl, support, &config))
2488 			return -EINVAL;
2489 	}
2490 
2491 	/* If autonegotiation is enabled, we must have an advertisement */
2492 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2493 			      config.advertising) &&
2494 	    phylink_is_empty_linkmode(config.advertising))
2495 		return -EINVAL;
2496 
2497 	mutex_lock(&pl->state_mutex);
2498 	pl->link_config.speed = config.speed;
2499 	pl->link_config.duplex = config.duplex;
2500 
2501 	if (pl->link_config.interface != config.interface) {
2502 		/* The interface changed, e.g. 1000base-X <-> 2500base-X */
2503 		/* We need to force the link down, then change the interface */
2504 		if (pl->old_link_state) {
2505 			phylink_link_down(pl);
2506 			pl->old_link_state = false;
2507 		}
2508 		if (!test_bit(PHYLINK_DISABLE_STOPPED,
2509 			      &pl->phylink_disable_state))
2510 			phylink_major_config(pl, false, &config);
2511 		pl->link_config.interface = config.interface;
2512 		linkmode_copy(pl->link_config.advertising, config.advertising);
2513 	} else if (!linkmode_equal(pl->link_config.advertising,
2514 				   config.advertising)) {
2515 		linkmode_copy(pl->link_config.advertising, config.advertising);
2516 		phylink_change_inband_advert(pl);
2517 	}
2518 	mutex_unlock(&pl->state_mutex);
2519 
2520 	return 0;
2521 }
2522 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2523 
2524 /**
2525  * phylink_ethtool_nway_reset() - restart negotiation
2526  * @pl: a pointer to a &struct phylink returned from phylink_create()
2527  *
2528  * Restart negotiation for the phylink instance specified by @pl. This will
2529  * cause any attached phy to restart negotiation with the link partner, and
2530  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2531  * negotiation.
2532  *
2533  * Returns zero on success, or negative error code.
2534  */
phylink_ethtool_nway_reset(struct phylink * pl)2535 int phylink_ethtool_nway_reset(struct phylink *pl)
2536 {
2537 	int ret = 0;
2538 
2539 	ASSERT_RTNL();
2540 
2541 	if (pl->phydev)
2542 		ret = phy_restart_aneg(pl->phydev);
2543 	phylink_pcs_an_restart(pl);
2544 
2545 	return ret;
2546 }
2547 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2548 
2549 /**
2550  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2551  * @pl: a pointer to a &struct phylink returned from phylink_create()
2552  * @pause: a pointer to a &struct ethtool_pauseparam
2553  */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2554 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2555 				    struct ethtool_pauseparam *pause)
2556 {
2557 	ASSERT_RTNL();
2558 
2559 	pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2560 	pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2561 	pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2562 }
2563 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2564 
2565 /**
2566  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2567  * @pl: a pointer to a &struct phylink returned from phylink_create()
2568  * @pause: a pointer to a &struct ethtool_pauseparam
2569  */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2570 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2571 				   struct ethtool_pauseparam *pause)
2572 {
2573 	struct phylink_link_state *config = &pl->link_config;
2574 	bool manual_changed;
2575 	int pause_state;
2576 
2577 	ASSERT_RTNL();
2578 
2579 	if (pl->cur_link_an_mode == MLO_AN_FIXED)
2580 		return -EOPNOTSUPP;
2581 
2582 	if (!phylink_test(pl->supported, Pause) &&
2583 	    !phylink_test(pl->supported, Asym_Pause))
2584 		return -EOPNOTSUPP;
2585 
2586 	if (!phylink_test(pl->supported, Asym_Pause) &&
2587 	    pause->rx_pause != pause->tx_pause)
2588 		return -EINVAL;
2589 
2590 	pause_state = 0;
2591 	if (pause->autoneg)
2592 		pause_state |= MLO_PAUSE_AN;
2593 	if (pause->rx_pause)
2594 		pause_state |= MLO_PAUSE_RX;
2595 	if (pause->tx_pause)
2596 		pause_state |= MLO_PAUSE_TX;
2597 
2598 	mutex_lock(&pl->state_mutex);
2599 	/*
2600 	 * See the comments for linkmode_set_pause(), wrt the deficiencies
2601 	 * with the current implementation.  A solution to this issue would
2602 	 * be:
2603 	 * ethtool  Local device
2604 	 *  rx  tx  Pause AsymDir
2605 	 *  0   0   0     0
2606 	 *  1   0   1     1
2607 	 *  0   1   0     1
2608 	 *  1   1   1     1
2609 	 * and then use the ethtool rx/tx enablement status to mask the
2610 	 * rx/tx pause resolution.
2611 	 */
2612 	linkmode_set_pause(config->advertising, pause->tx_pause,
2613 			   pause->rx_pause);
2614 
2615 	manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2616 			 (!(pause_state & MLO_PAUSE_AN) &&
2617 			   (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2618 
2619 	config->pause = pause_state;
2620 
2621 	/* Update our in-band advertisement, triggering a renegotiation if
2622 	 * the advertisement changed.
2623 	 */
2624 	if (!pl->phydev)
2625 		phylink_change_inband_advert(pl);
2626 
2627 	mutex_unlock(&pl->state_mutex);
2628 
2629 	/* If we have a PHY, a change of the pause frame advertisement will
2630 	 * cause phylib to renegotiate (if AN is enabled) which will in turn
2631 	 * call our phylink_phy_change() and trigger a resolve.  Note that
2632 	 * we can't hold our state mutex while calling phy_set_asym_pause().
2633 	 */
2634 	if (pl->phydev)
2635 		phy_set_asym_pause(pl->phydev, pause->rx_pause,
2636 				   pause->tx_pause);
2637 
2638 	/* If the manual pause settings changed, make sure we trigger a
2639 	 * resolve to update their state; we can not guarantee that the
2640 	 * link will cycle.
2641 	 */
2642 	if (manual_changed) {
2643 		pl->mac_link_dropped = true;
2644 		phylink_run_resolve(pl);
2645 	}
2646 
2647 	return 0;
2648 }
2649 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2650 
2651 /**
2652  * phylink_get_eee_err() - read the energy efficient ethernet error
2653  *   counter
2654  * @pl: a pointer to a &struct phylink returned from phylink_create().
2655  *
2656  * Read the Energy Efficient Ethernet error counter from the PHY associated
2657  * with the phylink instance specified by @pl.
2658  *
2659  * Returns positive error counter value, or negative error code.
2660  */
phylink_get_eee_err(struct phylink * pl)2661 int phylink_get_eee_err(struct phylink *pl)
2662 {
2663 	int ret = 0;
2664 
2665 	ASSERT_RTNL();
2666 
2667 	if (pl->phydev)
2668 		ret = phy_get_eee_err(pl->phydev);
2669 
2670 	return ret;
2671 }
2672 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2673 
2674 /**
2675  * phylink_init_eee() - init and check the EEE features
2676  * @pl: a pointer to a &struct phylink returned from phylink_create()
2677  * @clk_stop_enable: allow PHY to stop receive clock
2678  *
2679  * Must be called either with RTNL held or within mac_link_up()
2680  */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)2681 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2682 {
2683 	int ret = -EOPNOTSUPP;
2684 
2685 	if (pl->phydev)
2686 		ret = phy_init_eee(pl->phydev, clk_stop_enable);
2687 
2688 	return ret;
2689 }
2690 EXPORT_SYMBOL_GPL(phylink_init_eee);
2691 
2692 /**
2693  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2694  * @pl: a pointer to a &struct phylink returned from phylink_create()
2695  * @eee: a pointer to a &struct ethtool_eee for the read parameters
2696  */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_eee * eee)2697 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2698 {
2699 	int ret = -EOPNOTSUPP;
2700 
2701 	ASSERT_RTNL();
2702 
2703 	if (pl->phydev)
2704 		ret = phy_ethtool_get_eee(pl->phydev, eee);
2705 
2706 	return ret;
2707 }
2708 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2709 
2710 /**
2711  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2712  * @pl: a pointer to a &struct phylink returned from phylink_create()
2713  * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2714  */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_eee * eee)2715 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2716 {
2717 	int ret = -EOPNOTSUPP;
2718 
2719 	ASSERT_RTNL();
2720 
2721 	if (pl->phydev)
2722 		ret = phy_ethtool_set_eee(pl->phydev, eee);
2723 
2724 	return ret;
2725 }
2726 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2727 
2728 /* This emulates MII registers for a fixed-mode phy operating as per the
2729  * passed in state. "aneg" defines if we report negotiation is possible.
2730  *
2731  * FIXME: should deal with negotiation state too.
2732  */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)2733 static int phylink_mii_emul_read(unsigned int reg,
2734 				 struct phylink_link_state *state)
2735 {
2736 	struct fixed_phy_status fs;
2737 	unsigned long *lpa = state->lp_advertising;
2738 	int val;
2739 
2740 	fs.link = state->link;
2741 	fs.speed = state->speed;
2742 	fs.duplex = state->duplex;
2743 	fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2744 	fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2745 
2746 	val = swphy_read_reg(reg, &fs);
2747 	if (reg == MII_BMSR) {
2748 		if (!state->an_complete)
2749 			val &= ~BMSR_ANEGCOMPLETE;
2750 	}
2751 	return val;
2752 }
2753 
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2754 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2755 			    unsigned int reg)
2756 {
2757 	struct phy_device *phydev = pl->phydev;
2758 	int prtad, devad;
2759 
2760 	if (mdio_phy_id_is_c45(phy_id)) {
2761 		prtad = mdio_phy_id_prtad(phy_id);
2762 		devad = mdio_phy_id_devad(phy_id);
2763 		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2764 					reg);
2765 	}
2766 
2767 	if (phydev->is_c45) {
2768 		switch (reg) {
2769 		case MII_BMCR:
2770 		case MII_BMSR:
2771 		case MII_PHYSID1:
2772 		case MII_PHYSID2:
2773 			devad = __ffs(phydev->c45_ids.mmds_present);
2774 			break;
2775 		case MII_ADVERTISE:
2776 		case MII_LPA:
2777 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2778 				return -EINVAL;
2779 			devad = MDIO_MMD_AN;
2780 			if (reg == MII_ADVERTISE)
2781 				reg = MDIO_AN_ADVERTISE;
2782 			else
2783 				reg = MDIO_AN_LPA;
2784 			break;
2785 		default:
2786 			return -EINVAL;
2787 		}
2788 		prtad = phy_id;
2789 		return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2790 					reg);
2791 	}
2792 
2793 	return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2794 }
2795 
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2796 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2797 			     unsigned int reg, unsigned int val)
2798 {
2799 	struct phy_device *phydev = pl->phydev;
2800 	int prtad, devad;
2801 
2802 	if (mdio_phy_id_is_c45(phy_id)) {
2803 		prtad = mdio_phy_id_prtad(phy_id);
2804 		devad = mdio_phy_id_devad(phy_id);
2805 		return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2806 					 reg, val);
2807 	}
2808 
2809 	if (phydev->is_c45) {
2810 		switch (reg) {
2811 		case MII_BMCR:
2812 		case MII_BMSR:
2813 		case MII_PHYSID1:
2814 		case MII_PHYSID2:
2815 			devad = __ffs(phydev->c45_ids.mmds_present);
2816 			break;
2817 		case MII_ADVERTISE:
2818 		case MII_LPA:
2819 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2820 				return -EINVAL;
2821 			devad = MDIO_MMD_AN;
2822 			if (reg == MII_ADVERTISE)
2823 				reg = MDIO_AN_ADVERTISE;
2824 			else
2825 				reg = MDIO_AN_LPA;
2826 			break;
2827 		default:
2828 			return -EINVAL;
2829 		}
2830 		return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2831 					 reg, val);
2832 	}
2833 
2834 	return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2835 }
2836 
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)2837 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2838 			    unsigned int reg)
2839 {
2840 	struct phylink_link_state state;
2841 	int val = 0xffff;
2842 
2843 	switch (pl->cur_link_an_mode) {
2844 	case MLO_AN_FIXED:
2845 		if (phy_id == 0) {
2846 			phylink_get_fixed_state(pl, &state);
2847 			val = phylink_mii_emul_read(reg, &state);
2848 		}
2849 		break;
2850 
2851 	case MLO_AN_PHY:
2852 		return -EOPNOTSUPP;
2853 
2854 	case MLO_AN_INBAND:
2855 		if (phy_id == 0) {
2856 			phylink_mac_pcs_get_state(pl, &state);
2857 			val = phylink_mii_emul_read(reg, &state);
2858 		}
2859 		break;
2860 	}
2861 
2862 	return val & 0xffff;
2863 }
2864 
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)2865 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2866 			     unsigned int reg, unsigned int val)
2867 {
2868 	switch (pl->cur_link_an_mode) {
2869 	case MLO_AN_FIXED:
2870 		break;
2871 
2872 	case MLO_AN_PHY:
2873 		return -EOPNOTSUPP;
2874 
2875 	case MLO_AN_INBAND:
2876 		break;
2877 	}
2878 
2879 	return 0;
2880 }
2881 
2882 /**
2883  * phylink_mii_ioctl() - generic mii ioctl interface
2884  * @pl: a pointer to a &struct phylink returned from phylink_create()
2885  * @ifr: a pointer to a &struct ifreq for socket ioctls
2886  * @cmd: ioctl cmd to execute
2887  *
2888  * Perform the specified MII ioctl on the PHY attached to the phylink instance
2889  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2890  *
2891  * Returns: zero on success or negative error code.
2892  *
2893  * %SIOCGMIIPHY:
2894  *  read register from the current PHY.
2895  * %SIOCGMIIREG:
2896  *  read register from the specified PHY.
2897  * %SIOCSMIIREG:
2898  *  set a register on the specified PHY.
2899  */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)2900 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2901 {
2902 	struct mii_ioctl_data *mii = if_mii(ifr);
2903 	int  ret;
2904 
2905 	ASSERT_RTNL();
2906 
2907 	if (pl->phydev) {
2908 		/* PHYs only exist for MLO_AN_PHY and SGMII */
2909 		switch (cmd) {
2910 		case SIOCGMIIPHY:
2911 			mii->phy_id = pl->phydev->mdio.addr;
2912 			fallthrough;
2913 
2914 		case SIOCGMIIREG:
2915 			ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2916 			if (ret >= 0) {
2917 				mii->val_out = ret;
2918 				ret = 0;
2919 			}
2920 			break;
2921 
2922 		case SIOCSMIIREG:
2923 			ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2924 						mii->val_in);
2925 			break;
2926 
2927 		default:
2928 			ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2929 			break;
2930 		}
2931 	} else {
2932 		switch (cmd) {
2933 		case SIOCGMIIPHY:
2934 			mii->phy_id = 0;
2935 			fallthrough;
2936 
2937 		case SIOCGMIIREG:
2938 			ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2939 			if (ret >= 0) {
2940 				mii->val_out = ret;
2941 				ret = 0;
2942 			}
2943 			break;
2944 
2945 		case SIOCSMIIREG:
2946 			ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2947 						mii->val_in);
2948 			break;
2949 
2950 		default:
2951 			ret = -EOPNOTSUPP;
2952 			break;
2953 		}
2954 	}
2955 
2956 	return ret;
2957 }
2958 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2959 
2960 /**
2961  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2962  *   link partners
2963  * @pl: a pointer to a &struct phylink returned from phylink_create()
2964  * @sync: perform action synchronously
2965  *
2966  * If we have a PHY that is not part of a SFP module, then set the speed
2967  * as described in the phy_speed_down() function. Please see this function
2968  * for a description of the @sync parameter.
2969  *
2970  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2971  */
phylink_speed_down(struct phylink * pl,bool sync)2972 int phylink_speed_down(struct phylink *pl, bool sync)
2973 {
2974 	int ret = 0;
2975 
2976 	ASSERT_RTNL();
2977 
2978 	if (!pl->sfp_bus && pl->phydev)
2979 		ret = phy_speed_down(pl->phydev, sync);
2980 
2981 	return ret;
2982 }
2983 EXPORT_SYMBOL_GPL(phylink_speed_down);
2984 
2985 /**
2986  * phylink_speed_up() - restore the advertised speeds prior to the call to
2987  *   phylink_speed_down()
2988  * @pl: a pointer to a &struct phylink returned from phylink_create()
2989  *
2990  * If we have a PHY that is not part of a SFP module, then restore the
2991  * PHY speeds as per phy_speed_up().
2992  *
2993  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2994  */
phylink_speed_up(struct phylink * pl)2995 int phylink_speed_up(struct phylink *pl)
2996 {
2997 	int ret = 0;
2998 
2999 	ASSERT_RTNL();
3000 
3001 	if (!pl->sfp_bus && pl->phydev)
3002 		ret = phy_speed_up(pl->phydev);
3003 
3004 	return ret;
3005 }
3006 EXPORT_SYMBOL_GPL(phylink_speed_up);
3007 
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)3008 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3009 {
3010 	struct phylink *pl = upstream;
3011 
3012 	pl->netdev->sfp_bus = bus;
3013 }
3014 
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)3015 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3016 {
3017 	struct phylink *pl = upstream;
3018 
3019 	pl->netdev->sfp_bus = NULL;
3020 }
3021 
3022 static const phy_interface_t phylink_sfp_interface_preference[] = {
3023 	PHY_INTERFACE_MODE_25GBASER,
3024 	PHY_INTERFACE_MODE_USXGMII,
3025 	PHY_INTERFACE_MODE_10GBASER,
3026 	PHY_INTERFACE_MODE_5GBASER,
3027 	PHY_INTERFACE_MODE_2500BASEX,
3028 	PHY_INTERFACE_MODE_SGMII,
3029 	PHY_INTERFACE_MODE_1000BASEX,
3030 	PHY_INTERFACE_MODE_100BASEX,
3031 };
3032 
3033 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
3034 
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)3035 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3036 						    const unsigned long *intf)
3037 {
3038 	phy_interface_t interface;
3039 	size_t i;
3040 
3041 	interface = PHY_INTERFACE_MODE_NA;
3042 	for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3043 		if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3044 			interface = phylink_sfp_interface_preference[i];
3045 			break;
3046 		}
3047 
3048 	return interface;
3049 }
3050 
phylink_sfp_set_config(struct phylink * pl,u8 mode,unsigned long * supported,struct phylink_link_state * state)3051 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
3052 				   unsigned long *supported,
3053 				   struct phylink_link_state *state)
3054 {
3055 	bool changed = false;
3056 
3057 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3058 		    phylink_an_mode_str(mode), phy_modes(state->interface),
3059 		    __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3060 
3061 	if (!linkmode_equal(pl->supported, supported)) {
3062 		linkmode_copy(pl->supported, supported);
3063 		changed = true;
3064 	}
3065 
3066 	if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3067 		linkmode_copy(pl->link_config.advertising, state->advertising);
3068 		changed = true;
3069 	}
3070 
3071 	if (pl->cur_link_an_mode != mode ||
3072 	    pl->link_config.interface != state->interface) {
3073 		pl->cur_link_an_mode = mode;
3074 		pl->link_config.interface = state->interface;
3075 
3076 		changed = true;
3077 
3078 		phylink_info(pl, "switched to %s/%s link mode\n",
3079 			     phylink_an_mode_str(mode),
3080 			     phy_modes(state->interface));
3081 	}
3082 
3083 	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3084 				 &pl->phylink_disable_state))
3085 		phylink_mac_initial_config(pl, false);
3086 }
3087 
phylink_sfp_config_phy(struct phylink * pl,u8 mode,struct phy_device * phy)3088 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3089 				  struct phy_device *phy)
3090 {
3091 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
3092 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3093 	struct phylink_link_state config;
3094 	phy_interface_t iface;
3095 	int ret;
3096 
3097 	linkmode_copy(support, phy->supported);
3098 
3099 	memset(&config, 0, sizeof(config));
3100 	linkmode_copy(config.advertising, phy->advertising);
3101 	config.interface = PHY_INTERFACE_MODE_NA;
3102 	config.speed = SPEED_UNKNOWN;
3103 	config.duplex = DUPLEX_UNKNOWN;
3104 	config.pause = MLO_PAUSE_AN;
3105 
3106 	/* Ignore errors if we're expecting a PHY to attach later */
3107 	ret = phylink_validate(pl, support, &config);
3108 	if (ret) {
3109 		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3110 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3111 			    ERR_PTR(ret));
3112 		return ret;
3113 	}
3114 
3115 	iface = sfp_select_interface(pl->sfp_bus, config.advertising);
3116 	if (iface == PHY_INTERFACE_MODE_NA) {
3117 		phylink_err(pl,
3118 			    "selection of interface failed, advertisement %*pb\n",
3119 			    __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
3120 		return -EINVAL;
3121 	}
3122 
3123 	config.interface = iface;
3124 	linkmode_copy(support1, support);
3125 	ret = phylink_validate(pl, support1, &config);
3126 	if (ret) {
3127 		phylink_err(pl,
3128 			    "validation of %s/%s with support %*pb failed: %pe\n",
3129 			    phylink_an_mode_str(mode),
3130 			    phy_modes(config.interface),
3131 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3132 			    ERR_PTR(ret));
3133 		return ret;
3134 	}
3135 
3136 	pl->link_port = pl->sfp_port;
3137 
3138 	phylink_sfp_set_config(pl, mode, support, &config);
3139 
3140 	return 0;
3141 }
3142 
phylink_sfp_config_optical(struct phylink * pl)3143 static int phylink_sfp_config_optical(struct phylink *pl)
3144 {
3145 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3146 	DECLARE_PHY_INTERFACE_MASK(interfaces);
3147 	struct phylink_link_state config;
3148 	phy_interface_t interface;
3149 	int ret;
3150 
3151 	phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3152 		    (int)PHY_INTERFACE_MODE_MAX,
3153 		    pl->config->supported_interfaces,
3154 		    (int)PHY_INTERFACE_MODE_MAX,
3155 		    pl->sfp_interfaces);
3156 
3157 	/* Find the union of the supported interfaces by the PCS/MAC and
3158 	 * the SFP module.
3159 	 */
3160 	phy_interface_and(interfaces, pl->config->supported_interfaces,
3161 			  pl->sfp_interfaces);
3162 	if (phy_interface_empty(interfaces)) {
3163 		phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3164 		return -EINVAL;
3165 	}
3166 
3167 	memset(&config, 0, sizeof(config));
3168 	linkmode_copy(support, pl->sfp_support);
3169 	linkmode_copy(config.advertising, pl->sfp_support);
3170 	config.speed = SPEED_UNKNOWN;
3171 	config.duplex = DUPLEX_UNKNOWN;
3172 	config.pause = MLO_PAUSE_AN;
3173 
3174 	/* For all the interfaces that are supported, reduce the sfp_support
3175 	 * mask to only those link modes that can be supported.
3176 	 */
3177 	ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
3178 	if (ret) {
3179 		phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3180 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3181 		return ret;
3182 	}
3183 
3184 	interface = phylink_choose_sfp_interface(pl, interfaces);
3185 	if (interface == PHY_INTERFACE_MODE_NA) {
3186 		phylink_err(pl, "failed to select SFP interface\n");
3187 		return -EINVAL;
3188 	}
3189 
3190 	phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3191 		    phy_modes(interface));
3192 
3193 	config.interface = interface;
3194 
3195 	/* Ignore errors if we're expecting a PHY to attach later */
3196 	ret = phylink_validate(pl, support, &config);
3197 	if (ret) {
3198 		phylink_err(pl, "validation with support %*pb failed: %pe\n",
3199 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3200 			    ERR_PTR(ret));
3201 		return ret;
3202 	}
3203 
3204 	pl->link_port = pl->sfp_port;
3205 
3206 	phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3207 
3208 	return 0;
3209 }
3210 
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3211 static int phylink_sfp_module_insert(void *upstream,
3212 				     const struct sfp_eeprom_id *id)
3213 {
3214 	struct phylink *pl = upstream;
3215 
3216 	ASSERT_RTNL();
3217 
3218 	linkmode_zero(pl->sfp_support);
3219 	phy_interface_zero(pl->sfp_interfaces);
3220 	sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3221 	pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3222 
3223 	/* If this module may have a PHY connecting later, defer until later */
3224 	pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3225 	if (pl->sfp_may_have_phy)
3226 		return 0;
3227 
3228 	return phylink_sfp_config_optical(pl);
3229 }
3230 
phylink_sfp_module_start(void * upstream)3231 static int phylink_sfp_module_start(void *upstream)
3232 {
3233 	struct phylink *pl = upstream;
3234 
3235 	/* If this SFP module has a PHY, start the PHY now. */
3236 	if (pl->phydev) {
3237 		phy_start(pl->phydev);
3238 		return 0;
3239 	}
3240 
3241 	/* If the module may have a PHY but we didn't detect one we
3242 	 * need to configure the MAC here.
3243 	 */
3244 	if (!pl->sfp_may_have_phy)
3245 		return 0;
3246 
3247 	return phylink_sfp_config_optical(pl);
3248 }
3249 
phylink_sfp_module_stop(void * upstream)3250 static void phylink_sfp_module_stop(void *upstream)
3251 {
3252 	struct phylink *pl = upstream;
3253 
3254 	/* If this SFP module has a PHY, stop it. */
3255 	if (pl->phydev)
3256 		phy_stop(pl->phydev);
3257 }
3258 
phylink_sfp_link_down(void * upstream)3259 static void phylink_sfp_link_down(void *upstream)
3260 {
3261 	struct phylink *pl = upstream;
3262 
3263 	ASSERT_RTNL();
3264 
3265 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3266 }
3267 
phylink_sfp_link_up(void * upstream)3268 static void phylink_sfp_link_up(void *upstream)
3269 {
3270 	struct phylink *pl = upstream;
3271 
3272 	ASSERT_RTNL();
3273 
3274 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3275 }
3276 
3277 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3278  * or 802.3z control word, so inband will not work.
3279  */
phylink_phy_no_inband(struct phy_device * phy)3280 static bool phylink_phy_no_inband(struct phy_device *phy)
3281 {
3282 	return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3283 					     0xae025150, 0xfffffff0);
3284 }
3285 
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3286 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3287 {
3288 	struct phylink *pl = upstream;
3289 	phy_interface_t interface;
3290 	u8 mode;
3291 	int ret;
3292 
3293 	/*
3294 	 * This is the new way of dealing with flow control for PHYs,
3295 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3296 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3297 	 * using our validate call to the MAC, we rely upon the MAC
3298 	 * clearing the bits from both supported and advertising fields.
3299 	 */
3300 	phy_support_asym_pause(phy);
3301 
3302 	if (phylink_phy_no_inband(phy))
3303 		mode = MLO_AN_PHY;
3304 	else
3305 		mode = MLO_AN_INBAND;
3306 
3307 	/* Set the PHY's host supported interfaces */
3308 	phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3309 			  pl->config->supported_interfaces);
3310 
3311 	/* Do the initial configuration */
3312 	ret = phylink_sfp_config_phy(pl, mode, phy);
3313 	if (ret < 0)
3314 		return ret;
3315 
3316 	interface = pl->link_config.interface;
3317 	ret = phylink_attach_phy(pl, phy, interface);
3318 	if (ret < 0)
3319 		return ret;
3320 
3321 	ret = phylink_bringup_phy(pl, phy, interface);
3322 	if (ret)
3323 		phy_detach(phy);
3324 
3325 	return ret;
3326 }
3327 
phylink_sfp_disconnect_phy(void * upstream)3328 static void phylink_sfp_disconnect_phy(void *upstream)
3329 {
3330 	phylink_disconnect_phy(upstream);
3331 }
3332 
3333 static const struct sfp_upstream_ops sfp_phylink_ops = {
3334 	.attach = phylink_sfp_attach,
3335 	.detach = phylink_sfp_detach,
3336 	.module_insert = phylink_sfp_module_insert,
3337 	.module_start = phylink_sfp_module_start,
3338 	.module_stop = phylink_sfp_module_stop,
3339 	.link_up = phylink_sfp_link_up,
3340 	.link_down = phylink_sfp_link_down,
3341 	.connect_phy = phylink_sfp_connect_phy,
3342 	.disconnect_phy = phylink_sfp_disconnect_phy,
3343 };
3344 
3345 /* Helpers for MAC drivers */
3346 
3347 static struct {
3348 	int bit;
3349 	int speed;
3350 } phylink_c73_priority_resolution[] = {
3351 	{ ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3352 	{ ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3353 	/* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3354 	{ ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3355 	{ ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3356 	{ ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3357 	{ ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3358 	/* 5GBASE-KR not supported */
3359 	{ ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3360 	{ ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3361 };
3362 
phylink_resolve_c73(struct phylink_link_state * state)3363 void phylink_resolve_c73(struct phylink_link_state *state)
3364 {
3365 	int i;
3366 
3367 	for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3368 		int bit = phylink_c73_priority_resolution[i].bit;
3369 		if (linkmode_test_bit(bit, state->advertising) &&
3370 		    linkmode_test_bit(bit, state->lp_advertising))
3371 			break;
3372 	}
3373 
3374 	if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3375 		state->speed = phylink_c73_priority_resolution[i].speed;
3376 		state->duplex = DUPLEX_FULL;
3377 	} else {
3378 		/* negotiation failure */
3379 		state->link = false;
3380 	}
3381 
3382 	phylink_resolve_an_pause(state);
3383 }
3384 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3385 
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3386 static void phylink_decode_c37_word(struct phylink_link_state *state,
3387 				    uint16_t config_reg, int speed)
3388 {
3389 	int fd_bit;
3390 
3391 	if (speed == SPEED_2500)
3392 		fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3393 	else
3394 		fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3395 
3396 	mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3397 
3398 	if (linkmode_test_bit(fd_bit, state->advertising) &&
3399 	    linkmode_test_bit(fd_bit, state->lp_advertising)) {
3400 		state->speed = speed;
3401 		state->duplex = DUPLEX_FULL;
3402 	} else {
3403 		/* negotiation failure */
3404 		state->link = false;
3405 	}
3406 
3407 	phylink_resolve_an_pause(state);
3408 }
3409 
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3410 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3411 				      uint16_t config_reg)
3412 {
3413 	if (!(config_reg & LPA_SGMII_LINK)) {
3414 		state->link = false;
3415 		return;
3416 	}
3417 
3418 	switch (config_reg & LPA_SGMII_SPD_MASK) {
3419 	case LPA_SGMII_10:
3420 		state->speed = SPEED_10;
3421 		break;
3422 	case LPA_SGMII_100:
3423 		state->speed = SPEED_100;
3424 		break;
3425 	case LPA_SGMII_1000:
3426 		state->speed = SPEED_1000;
3427 		break;
3428 	default:
3429 		state->link = false;
3430 		return;
3431 	}
3432 	if (config_reg & LPA_SGMII_FULL_DUPLEX)
3433 		state->duplex = DUPLEX_FULL;
3434 	else
3435 		state->duplex = DUPLEX_HALF;
3436 }
3437 
3438 /**
3439  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3440  * @state: a pointer to a struct phylink_link_state.
3441  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3442  *
3443  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3444  * code word.  Decode the USXGMII code word and populate the corresponding fields
3445  * (speed, duplex) into the phylink_link_state structure.
3446  */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3447 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3448 				 uint16_t lpa)
3449 {
3450 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3451 	case MDIO_USXGMII_10:
3452 		state->speed = SPEED_10;
3453 		break;
3454 	case MDIO_USXGMII_100:
3455 		state->speed = SPEED_100;
3456 		break;
3457 	case MDIO_USXGMII_1000:
3458 		state->speed = SPEED_1000;
3459 		break;
3460 	case MDIO_USXGMII_2500:
3461 		state->speed = SPEED_2500;
3462 		break;
3463 	case MDIO_USXGMII_5000:
3464 		state->speed = SPEED_5000;
3465 		break;
3466 	case MDIO_USXGMII_10G:
3467 		state->speed = SPEED_10000;
3468 		break;
3469 	default:
3470 		state->link = false;
3471 		return;
3472 	}
3473 
3474 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3475 		state->duplex = DUPLEX_FULL;
3476 	else
3477 		state->duplex = DUPLEX_HALF;
3478 }
3479 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3480 
3481 /**
3482  * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3483  * @state: a pointer to a struct phylink_link_state.
3484  * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3485  *
3486  * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3487  * code word.  Decode the USGMII code word and populate the corresponding fields
3488  * (speed, duplex) into the phylink_link_state structure. The structure for this
3489  * word is the same as the USXGMII word, except it only supports speeds up to
3490  * 1Gbps.
3491  */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)3492 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3493 				       uint16_t lpa)
3494 {
3495 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
3496 	case MDIO_USXGMII_10:
3497 		state->speed = SPEED_10;
3498 		break;
3499 	case MDIO_USXGMII_100:
3500 		state->speed = SPEED_100;
3501 		break;
3502 	case MDIO_USXGMII_1000:
3503 		state->speed = SPEED_1000;
3504 		break;
3505 	default:
3506 		state->link = false;
3507 		return;
3508 	}
3509 
3510 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3511 		state->duplex = DUPLEX_FULL;
3512 	else
3513 		state->duplex = DUPLEX_HALF;
3514 }
3515 
3516 /**
3517  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3518  * @state: a pointer to a &struct phylink_link_state.
3519  * @bmsr: The value of the %MII_BMSR register
3520  * @lpa: The value of the %MII_LPA register
3521  *
3522  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3523  * clause 37 negotiation and/or SGMII control.
3524  *
3525  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3526  * the phylink @state structure. This is suitable to be used for implementing
3527  * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3528  * accessing @bmsr and @lpa cannot be done with MDIO directly.
3529  */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,u16 bmsr,u16 lpa)3530 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3531 				      u16 bmsr, u16 lpa)
3532 {
3533 	state->link = !!(bmsr & BMSR_LSTATUS);
3534 	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3535 	/* If there is no link or autonegotiation is disabled, the LP advertisement
3536 	 * data is not meaningful, so don't go any further.
3537 	 */
3538 	if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3539 					       state->advertising))
3540 		return;
3541 
3542 	switch (state->interface) {
3543 	case PHY_INTERFACE_MODE_1000BASEX:
3544 		phylink_decode_c37_word(state, lpa, SPEED_1000);
3545 		break;
3546 
3547 	case PHY_INTERFACE_MODE_2500BASEX:
3548 		phylink_decode_c37_word(state, lpa, SPEED_2500);
3549 		break;
3550 
3551 	case PHY_INTERFACE_MODE_SGMII:
3552 	case PHY_INTERFACE_MODE_QSGMII:
3553 		phylink_decode_sgmii_word(state, lpa);
3554 		break;
3555 	case PHY_INTERFACE_MODE_QUSGMII:
3556 		phylink_decode_usgmii_word(state, lpa);
3557 		break;
3558 
3559 	default:
3560 		state->link = false;
3561 		break;
3562 	}
3563 }
3564 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3565 
3566 /**
3567  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3568  * @pcs: a pointer to a &struct mdio_device.
3569  * @state: a pointer to a &struct phylink_link_state.
3570  *
3571  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3572  * clause 37 negotiation and/or SGMII control.
3573  *
3574  * Read the MAC PCS state from the MII device configured in @config and
3575  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3576  * the phylink @state structure. This is suitable to be directly plugged
3577  * into the pcs_get_state() member of the struct phylink_pcs_ops
3578  * structure.
3579  */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3580 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3581 				   struct phylink_link_state *state)
3582 {
3583 	int bmsr, lpa;
3584 
3585 	bmsr = mdiodev_read(pcs, MII_BMSR);
3586 	lpa = mdiodev_read(pcs, MII_LPA);
3587 	if (bmsr < 0 || lpa < 0) {
3588 		state->link = false;
3589 		return;
3590 	}
3591 
3592 	phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3593 }
3594 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3595 
3596 /**
3597  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3598  *	advertisement
3599  * @interface: the PHY interface mode being configured
3600  * @advertising: the ethtool advertisement mask
3601  *
3602  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3603  * clause 37 negotiation and/or SGMII control.
3604  *
3605  * Encode the clause 37 PCS advertisement as specified by @interface and
3606  * @advertising.
3607  *
3608  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3609  */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)3610 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3611 					     const unsigned long *advertising)
3612 {
3613 	u16 adv;
3614 
3615 	switch (interface) {
3616 	case PHY_INTERFACE_MODE_1000BASEX:
3617 	case PHY_INTERFACE_MODE_2500BASEX:
3618 		adv = ADVERTISE_1000XFULL;
3619 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3620 				      advertising))
3621 			adv |= ADVERTISE_1000XPAUSE;
3622 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3623 				      advertising))
3624 			adv |= ADVERTISE_1000XPSE_ASYM;
3625 		return adv;
3626 	case PHY_INTERFACE_MODE_SGMII:
3627 	case PHY_INTERFACE_MODE_QSGMII:
3628 		return 0x0001;
3629 	default:
3630 		/* Nothing to do for other modes */
3631 		return -EINVAL;
3632 	}
3633 }
3634 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3635 
3636 /**
3637  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3638  * @pcs: a pointer to a &struct mdio_device.
3639  * @interface: the PHY interface mode being configured
3640  * @advertising: the ethtool advertisement mask
3641  * @neg_mode: PCS negotiation mode
3642  *
3643  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3644  * parameters for the @mode, @interface and @advertising parameters.
3645  * Returns negative error number on failure, zero if the advertisement
3646  * has not changed, or positive if there is a change.
3647  */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising,unsigned int neg_mode)3648 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3649 			       phy_interface_t interface,
3650 			       const unsigned long *advertising,
3651 			       unsigned int neg_mode)
3652 {
3653 	bool changed = 0;
3654 	u16 bmcr;
3655 	int ret, adv;
3656 
3657 	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3658 	if (adv >= 0) {
3659 		ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3660 					     MII_ADVERTISE, 0xffff, adv);
3661 		if (ret < 0)
3662 			return ret;
3663 		changed = ret;
3664 	}
3665 
3666 	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3667 		bmcr = BMCR_ANENABLE;
3668 	else
3669 		bmcr = 0;
3670 
3671 	/* Configure the inband state. Ensure ISOLATE bit is disabled */
3672 	ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3673 	if (ret < 0)
3674 		return ret;
3675 
3676 	return changed;
3677 }
3678 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3679 
3680 /**
3681  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3682  * @pcs: a pointer to a &struct mdio_device.
3683  *
3684  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3685  * clause 37 negotiation.
3686  *
3687  * Restart the clause 37 negotiation with the link partner. This is
3688  * suitable to be directly plugged into the pcs_get_state() member
3689  * of the struct phylink_pcs_ops structure.
3690  */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)3691 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3692 {
3693 	int val = mdiodev_read(pcs, MII_BMCR);
3694 
3695 	if (val >= 0) {
3696 		val |= BMCR_ANRESTART;
3697 
3698 		mdiodev_write(pcs, MII_BMCR, val);
3699 	}
3700 }
3701 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3702 
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)3703 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3704 				   struct phylink_link_state *state)
3705 {
3706 	struct mii_bus *bus = pcs->bus;
3707 	int addr = pcs->addr;
3708 	int stat;
3709 
3710 	stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3711 	if (stat < 0) {
3712 		state->link = false;
3713 		return;
3714 	}
3715 
3716 	state->link = !!(stat & MDIO_STAT1_LSTATUS);
3717 	if (!state->link)
3718 		return;
3719 
3720 	switch (state->interface) {
3721 	case PHY_INTERFACE_MODE_10GBASER:
3722 		state->speed = SPEED_10000;
3723 		state->duplex = DUPLEX_FULL;
3724 		break;
3725 
3726 	default:
3727 		break;
3728 	}
3729 }
3730 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3731 
phylink_init(void)3732 static int __init phylink_init(void)
3733 {
3734 	for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3735 		__set_bit(phylink_sfp_interface_preference[i],
3736 			  phylink_sfp_interfaces);
3737 
3738 	return 0;
3739 }
3740 
3741 module_init(phylink_init);
3742 
3743 MODULE_LICENSE("GPL v2");
3744