1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Purpose: PCI Express Port Bus Driver
4 * Author: Tom Nguyen <tom.l.nguyen@intel.com>
5 *
6 * Copyright (C) 2004 Intel
7 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
8 */
9
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/pm.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/init.h>
16 #include <linux/aer.h>
17 #include <linux/dmi.h>
18
19 #include "../pci.h"
20 #include "portdrv.h"
21
22 /* If this switch is set, PCIe port native services should not be enabled. */
23 bool pcie_ports_disabled;
24
25 /*
26 * If the user specified "pcie_ports=native", use the PCIe services regardless
27 * of whether the platform has given us permission. On ACPI systems, this
28 * means we ignore _OSC.
29 */
30 bool pcie_ports_native;
31
32 /*
33 * If the user specified "pcie_ports=dpc-native", use the Linux DPC PCIe
34 * service even if the platform hasn't given us permission.
35 */
36 bool pcie_ports_dpc_native;
37
pcie_port_setup(char * str)38 static int __init pcie_port_setup(char *str)
39 {
40 if (!strncmp(str, "compat", 6))
41 pcie_ports_disabled = true;
42 else if (!strncmp(str, "native", 6))
43 pcie_ports_native = true;
44 else if (!strncmp(str, "dpc-native", 10))
45 pcie_ports_dpc_native = true;
46
47 return 1;
48 }
49 __setup("pcie_ports=", pcie_port_setup);
50
51 /* global data */
52
53 #ifdef CONFIG_PM
pcie_port_runtime_suspend(struct device * dev)54 static int pcie_port_runtime_suspend(struct device *dev)
55 {
56 if (!to_pci_dev(dev)->bridge_d3)
57 return -EBUSY;
58
59 return pcie_port_device_runtime_suspend(dev);
60 }
61
pcie_port_runtime_idle(struct device * dev)62 static int pcie_port_runtime_idle(struct device *dev)
63 {
64 /*
65 * Assume the PCI core has set bridge_d3 whenever it thinks the port
66 * should be good to go to D3. Everything else, including moving
67 * the port to D3, is handled by the PCI core.
68 */
69 return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
70 }
71
72 static const struct dev_pm_ops pcie_portdrv_pm_ops = {
73 .suspend = pcie_port_device_suspend,
74 .resume_noirq = pcie_port_device_resume_noirq,
75 .resume = pcie_port_device_resume,
76 .freeze = pcie_port_device_suspend,
77 .thaw = pcie_port_device_resume,
78 .poweroff = pcie_port_device_suspend,
79 .restore_noirq = pcie_port_device_resume_noirq,
80 .restore = pcie_port_device_resume,
81 .runtime_suspend = pcie_port_runtime_suspend,
82 .runtime_resume = pcie_port_device_runtime_resume,
83 .runtime_idle = pcie_port_runtime_idle,
84 };
85
86 #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
87
88 #else /* !PM */
89
90 #define PCIE_PORTDRV_PM_OPS NULL
91 #endif /* !PM */
92
93 /*
94 * pcie_portdrv_probe - Probe PCI-Express port devices
95 * @dev: PCI-Express port device being probed
96 *
97 * If detected invokes the pcie_port_device_register() method for
98 * this port device.
99 *
100 */
pcie_portdrv_probe(struct pci_dev * dev,const struct pci_device_id * id)101 static int pcie_portdrv_probe(struct pci_dev *dev,
102 const struct pci_device_id *id)
103 {
104 int type = pci_pcie_type(dev);
105 int status;
106
107 if (!pci_is_pcie(dev) ||
108 ((type != PCI_EXP_TYPE_ROOT_PORT) &&
109 (type != PCI_EXP_TYPE_UPSTREAM) &&
110 (type != PCI_EXP_TYPE_DOWNSTREAM) &&
111 (type != PCI_EXP_TYPE_RC_EC)))
112 return -ENODEV;
113
114 if (type == PCI_EXP_TYPE_RC_EC)
115 pcie_link_rcec(dev);
116
117 status = pcie_port_device_register(dev);
118 if (status)
119 return status;
120
121 pci_save_state(dev);
122
123 dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE |
124 DPM_FLAG_SMART_SUSPEND);
125
126 if (pci_bridge_d3_possible(dev)) {
127 /*
128 * Keep the port resumed 100ms to make sure things like
129 * config space accesses from userspace (lspci) will not
130 * cause the port to repeatedly suspend and resume.
131 */
132 pm_runtime_set_autosuspend_delay(&dev->dev, 100);
133 pm_runtime_use_autosuspend(&dev->dev);
134 pm_runtime_mark_last_busy(&dev->dev);
135 pm_runtime_put_autosuspend(&dev->dev);
136 pm_runtime_allow(&dev->dev);
137 }
138
139 return 0;
140 }
141
pcie_portdrv_remove(struct pci_dev * dev)142 static void pcie_portdrv_remove(struct pci_dev *dev)
143 {
144 if (pci_bridge_d3_possible(dev)) {
145 pm_runtime_forbid(&dev->dev);
146 pm_runtime_get_noresume(&dev->dev);
147 pm_runtime_dont_use_autosuspend(&dev->dev);
148 }
149
150 pcie_port_device_remove(dev);
151 }
152
pcie_portdrv_error_detected(struct pci_dev * dev,pci_channel_state_t error)153 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
154 pci_channel_state_t error)
155 {
156 if (error == pci_channel_io_frozen)
157 return PCI_ERS_RESULT_NEED_RESET;
158 return PCI_ERS_RESULT_CAN_RECOVER;
159 }
160
pcie_portdrv_slot_reset(struct pci_dev * dev)161 static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
162 {
163 pci_restore_state(dev);
164 pci_save_state(dev);
165 return PCI_ERS_RESULT_RECOVERED;
166 }
167
pcie_portdrv_mmio_enabled(struct pci_dev * dev)168 static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
169 {
170 return PCI_ERS_RESULT_RECOVERED;
171 }
172
resume_iter(struct device * device,void * data)173 static int resume_iter(struct device *device, void *data)
174 {
175 struct pcie_device *pcie_device;
176 struct pcie_port_service_driver *driver;
177
178 if (device->bus == &pcie_port_bus_type && device->driver) {
179 driver = to_service_driver(device->driver);
180 if (driver && driver->error_resume) {
181 pcie_device = to_pcie_device(device);
182
183 /* Forward error message to service drivers */
184 driver->error_resume(pcie_device->port);
185 }
186 }
187
188 return 0;
189 }
190
pcie_portdrv_err_resume(struct pci_dev * dev)191 static void pcie_portdrv_err_resume(struct pci_dev *dev)
192 {
193 device_for_each_child(&dev->dev, NULL, resume_iter);
194 }
195
196 /*
197 * LINUX Device Driver Model
198 */
199 static const struct pci_device_id port_pci_ids[] = {
200 /* handle any PCI-Express port */
201 { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) },
202 /* subtractive decode PCI-to-PCI bridge, class type is 060401h */
203 { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) },
204 /* handle any Root Complex Event Collector */
205 { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) },
206 { },
207 };
208
209 static const struct pci_error_handlers pcie_portdrv_err_handler = {
210 .error_detected = pcie_portdrv_error_detected,
211 .slot_reset = pcie_portdrv_slot_reset,
212 .mmio_enabled = pcie_portdrv_mmio_enabled,
213 .resume = pcie_portdrv_err_resume,
214 };
215
216 static struct pci_driver pcie_portdriver = {
217 .name = "pcieport",
218 .id_table = &port_pci_ids[0],
219
220 .probe = pcie_portdrv_probe,
221 .remove = pcie_portdrv_remove,
222 .shutdown = pcie_portdrv_remove,
223
224 .err_handler = &pcie_portdrv_err_handler,
225
226 .driver.pm = PCIE_PORTDRV_PM_OPS,
227 };
228
dmi_pcie_pme_disable_msi(const struct dmi_system_id * d)229 static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
230 {
231 pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
232 d->ident);
233 pcie_pme_disable_msi();
234 return 0;
235 }
236
237 static const struct dmi_system_id pcie_portdrv_dmi_table[] __initconst = {
238 /*
239 * Boxes that should not use MSI for PCIe PME signaling.
240 */
241 {
242 .callback = dmi_pcie_pme_disable_msi,
243 .ident = "MSI Wind U-100",
244 .matches = {
245 DMI_MATCH(DMI_SYS_VENDOR,
246 "MICRO-STAR INTERNATIONAL CO., LTD"),
247 DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
248 },
249 },
250 {}
251 };
252
pcie_init_services(void)253 static void __init pcie_init_services(void)
254 {
255 pcie_aer_init();
256 pcie_pme_init();
257 pcie_dpc_init();
258 pcie_hp_init();
259 }
260
pcie_portdrv_init(void)261 static int __init pcie_portdrv_init(void)
262 {
263 if (pcie_ports_disabled)
264 return -EACCES;
265
266 pcie_init_services();
267 dmi_check_system(pcie_portdrv_dmi_table);
268
269 return pci_register_driver(&pcie_portdriver);
270 }
271 device_initcall(pcie_portdrv_init);
272
