1 /*
2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author:Mark Yao <mark.yao@rock-chips.com>
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 #ifndef _ROCKCHIP_DRM_VOP_H
16 #define _ROCKCHIP_DRM_VOP_H
17
18 /*
19 * major: IP major version, used for IP structure
20 * minor: big feature change under same structure
21 */
22 #define VOP_VERSION(major, minor) ((major) << 8 | (minor))
23 #define VOP_MAJOR(version) ((version) >> 8)
24 #define VOP_MINOR(version) ((version) & 0xff)
25
26 enum vop_data_format {
27 VOP_FMT_ARGB8888 = 0,
28 VOP_FMT_RGB888,
29 VOP_FMT_RGB565,
30 VOP_FMT_YUV420SP = 4,
31 VOP_FMT_YUV422SP,
32 VOP_FMT_YUV444SP,
33 };
34
35 struct vop_reg {
36 uint32_t mask;
37 uint16_t offset;
38 uint8_t shift;
39 bool write_mask;
40 bool relaxed;
41 };
42
43 struct vop_modeset {
44 struct vop_reg htotal_pw;
45 struct vop_reg hact_st_end;
46 struct vop_reg hpost_st_end;
47 struct vop_reg vtotal_pw;
48 struct vop_reg vact_st_end;
49 struct vop_reg vpost_st_end;
50 };
51
52 struct vop_output {
53 struct vop_reg pin_pol;
54 struct vop_reg dp_pin_pol;
55 struct vop_reg edp_pin_pol;
56 struct vop_reg hdmi_pin_pol;
57 struct vop_reg mipi_pin_pol;
58 struct vop_reg rgb_pin_pol;
59 struct vop_reg dp_en;
60 struct vop_reg edp_en;
61 struct vop_reg hdmi_en;
62 struct vop_reg mipi_en;
63 struct vop_reg rgb_en;
64 };
65
66 struct vop_common {
67 struct vop_reg cfg_done;
68 struct vop_reg dsp_blank;
69 struct vop_reg data_blank;
70 struct vop_reg pre_dither_down;
71 struct vop_reg dither_down;
72 struct vop_reg dither_up;
73 struct vop_reg gate_en;
74 struct vop_reg mmu_en;
75 struct vop_reg out_mode;
76 struct vop_reg standby;
77 };
78
79 struct vop_misc {
80 struct vop_reg global_regdone_en;
81 };
82
83 struct vop_intr {
84 const int *intrs;
85 uint32_t nintrs;
86
87 struct vop_reg line_flag_num[2];
88 struct vop_reg enable;
89 struct vop_reg clear;
90 struct vop_reg status;
91 };
92
93 struct vop_scl_extension {
94 struct vop_reg cbcr_vsd_mode;
95 struct vop_reg cbcr_vsu_mode;
96 struct vop_reg cbcr_hsd_mode;
97 struct vop_reg cbcr_ver_scl_mode;
98 struct vop_reg cbcr_hor_scl_mode;
99 struct vop_reg yrgb_vsd_mode;
100 struct vop_reg yrgb_vsu_mode;
101 struct vop_reg yrgb_hsd_mode;
102 struct vop_reg yrgb_ver_scl_mode;
103 struct vop_reg yrgb_hor_scl_mode;
104 struct vop_reg line_load_mode;
105 struct vop_reg cbcr_axi_gather_num;
106 struct vop_reg yrgb_axi_gather_num;
107 struct vop_reg vsd_cbcr_gt2;
108 struct vop_reg vsd_cbcr_gt4;
109 struct vop_reg vsd_yrgb_gt2;
110 struct vop_reg vsd_yrgb_gt4;
111 struct vop_reg bic_coe_sel;
112 struct vop_reg cbcr_axi_gather_en;
113 struct vop_reg yrgb_axi_gather_en;
114 struct vop_reg lb_mode;
115 };
116
117 struct vop_scl_regs {
118 const struct vop_scl_extension *ext;
119
120 struct vop_reg scale_yrgb_x;
121 struct vop_reg scale_yrgb_y;
122 struct vop_reg scale_cbcr_x;
123 struct vop_reg scale_cbcr_y;
124 };
125
126 struct vop_win_phy {
127 const struct vop_scl_regs *scl;
128 const uint32_t *data_formats;
129 uint32_t nformats;
130
131 struct vop_reg enable;
132 struct vop_reg gate;
133 struct vop_reg format;
134 struct vop_reg rb_swap;
135 struct vop_reg act_info;
136 struct vop_reg dsp_info;
137 struct vop_reg dsp_st;
138 struct vop_reg yrgb_mst;
139 struct vop_reg uv_mst;
140 struct vop_reg yrgb_vir;
141 struct vop_reg uv_vir;
142
143 struct vop_reg dst_alpha_ctl;
144 struct vop_reg src_alpha_ctl;
145 struct vop_reg channel;
146 };
147
148 struct vop_win_data {
149 uint32_t base;
150 const struct vop_win_phy *phy;
151 enum drm_plane_type type;
152 };
153
154 struct vop_data {
155 uint32_t version;
156 const struct vop_intr *intr;
157 const struct vop_common *common;
158 const struct vop_misc *misc;
159 const struct vop_modeset *modeset;
160 const struct vop_output *output;
161 const struct vop_win_data *win;
162 unsigned int win_size;
163
164 #define VOP_FEATURE_OUTPUT_RGB10 BIT(0)
165 u64 feature;
166 };
167
168 /* interrupt define */
169 #define DSP_HOLD_VALID_INTR (1 << 0)
170 #define FS_INTR (1 << 1)
171 #define LINE_FLAG_INTR (1 << 2)
172 #define BUS_ERROR_INTR (1 << 3)
173
174 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
175 LINE_FLAG_INTR | BUS_ERROR_INTR)
176
177 #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4)
178 #define FS_INTR_EN(x) ((x) << 5)
179 #define LINE_FLAG_INTR_EN(x) ((x) << 6)
180 #define BUS_ERROR_INTR_EN(x) ((x) << 7)
181 #define DSP_HOLD_VALID_INTR_MASK (1 << 4)
182 #define FS_INTR_MASK (1 << 5)
183 #define LINE_FLAG_INTR_MASK (1 << 6)
184 #define BUS_ERROR_INTR_MASK (1 << 7)
185
186 #define INTR_CLR_SHIFT 8
187 #define DSP_HOLD_VALID_INTR_CLR (1 << (INTR_CLR_SHIFT + 0))
188 #define FS_INTR_CLR (1 << (INTR_CLR_SHIFT + 1))
189 #define LINE_FLAG_INTR_CLR (1 << (INTR_CLR_SHIFT + 2))
190 #define BUS_ERROR_INTR_CLR (1 << (INTR_CLR_SHIFT + 3))
191
192 #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12)
193 #define DSP_LINE_NUM_MASK (0x1fff << 12)
194
195 /* src alpha ctrl define */
196 #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24)
197 #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16)
198 #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6)
199 #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5)
200 #define SRC_BLEND_M0(x) (((x) & 0x3) << 3)
201 #define SRC_ALPHA_M0(x) (((x) & 0x1) << 2)
202 #define SRC_COLOR_M0(x) (((x) & 0x1) << 1)
203 #define SRC_ALPHA_EN(x) (((x) & 0x1) << 0)
204 /* dst alpha ctrl define */
205 #define DST_FACTOR_M0(x) (((x) & 0x7) << 6)
206
207 /*
208 * display output interface supported by rockchip lcdc
209 */
210 #define ROCKCHIP_OUT_MODE_P888 0
211 #define ROCKCHIP_OUT_MODE_P666 1
212 #define ROCKCHIP_OUT_MODE_P565 2
213 /* for use special outface */
214 #define ROCKCHIP_OUT_MODE_AAAA 15
215
216 enum alpha_mode {
217 ALPHA_STRAIGHT,
218 ALPHA_INVERSE,
219 };
220
221 enum global_blend_mode {
222 ALPHA_GLOBAL,
223 ALPHA_PER_PIX,
224 ALPHA_PER_PIX_GLOBAL,
225 };
226
227 enum alpha_cal_mode {
228 ALPHA_SATURATION,
229 ALPHA_NO_SATURATION,
230 };
231
232 enum color_mode {
233 ALPHA_SRC_PRE_MUL,
234 ALPHA_SRC_NO_PRE_MUL,
235 };
236
237 enum factor_mode {
238 ALPHA_ZERO,
239 ALPHA_ONE,
240 ALPHA_SRC,
241 ALPHA_SRC_INVERSE,
242 ALPHA_SRC_GLOBAL,
243 };
244
245 enum scale_mode {
246 SCALE_NONE = 0x0,
247 SCALE_UP = 0x1,
248 SCALE_DOWN = 0x2
249 };
250
251 enum lb_mode {
252 LB_YUV_3840X5 = 0x0,
253 LB_YUV_2560X8 = 0x1,
254 LB_RGB_3840X2 = 0x2,
255 LB_RGB_2560X4 = 0x3,
256 LB_RGB_1920X5 = 0x4,
257 LB_RGB_1280X8 = 0x5
258 };
259
260 enum sacle_up_mode {
261 SCALE_UP_BIL = 0x0,
262 SCALE_UP_BIC = 0x1
263 };
264
265 enum scale_down_mode {
266 SCALE_DOWN_BIL = 0x0,
267 SCALE_DOWN_AVG = 0x1
268 };
269
270 enum vop_pol {
271 HSYNC_POSITIVE = 0,
272 VSYNC_POSITIVE = 1,
273 DEN_NEGATIVE = 2,
274 DCLK_INVERT = 3
275 };
276
277 #define FRAC_16_16(mult, div) (((mult) << 16) / (div))
278 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12
279 #define SCL_MAX_VSKIPLINES 4
280 #define MIN_SCL_FT_AFTER_VSKIP 1
281
scl_cal_scale(int src,int dst,int shift)282 static inline uint16_t scl_cal_scale(int src, int dst, int shift)
283 {
284 return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
285 }
286
scl_cal_scale2(int src,int dst)287 static inline uint16_t scl_cal_scale2(int src, int dst)
288 {
289 return ((src - 1) << 12) / (dst - 1);
290 }
291
292 #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12)
293 #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16)
294 #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16)
295
scl_get_bili_dn_vskip(int src_h,int dst_h,int vskiplines)296 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
297 int vskiplines)
298 {
299 int act_height;
300
301 act_height = (src_h + vskiplines - 1) / vskiplines;
302
303 if (act_height == dst_h)
304 return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines;
305
306 return GET_SCL_FT_BILI_DN(act_height, dst_h);
307 }
308
scl_get_scl_mode(int src,int dst)309 static inline enum scale_mode scl_get_scl_mode(int src, int dst)
310 {
311 if (src < dst)
312 return SCALE_UP;
313 else if (src > dst)
314 return SCALE_DOWN;
315
316 return SCALE_NONE;
317 }
318
scl_get_vskiplines(uint32_t srch,uint32_t dsth)319 static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
320 {
321 uint32_t vskiplines;
322
323 for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
324 if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
325 break;
326
327 return vskiplines;
328 }
329
scl_vop_cal_lb_mode(int width,bool is_yuv)330 static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
331 {
332 int lb_mode;
333
334 if (is_yuv) {
335 if (width > 1280)
336 lb_mode = LB_YUV_3840X5;
337 else
338 lb_mode = LB_YUV_2560X8;
339 } else {
340 if (width > 2560)
341 lb_mode = LB_RGB_3840X2;
342 else if (width > 1920)
343 lb_mode = LB_RGB_2560X4;
344 else
345 lb_mode = LB_RGB_1920X5;
346 }
347
348 return lb_mode;
349 }
350
351 extern const struct component_ops vop_component_ops;
352 #endif /* _ROCKCHIP_DRM_VOP_H */
353
