1 /*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "nv40.h"
25
26 const struct nvkm_specsrc
27 nv50_zcull_sources[] = {
28 { 0x402ca4, (const struct nvkm_specmux[]) {
29 { 0x7fff, 0, "unk0" },
30 {}
31 }, "pgraph_zcull_pm_unka4" },
32 {}
33 };
34
35 const struct nvkm_specsrc
36 nv50_zrop_sources[] = {
37 { 0x40708c, (const struct nvkm_specmux[]) {
38 { 0xf, 0, "sel0", true },
39 { 0xf, 16, "sel1", true },
40 {}
41 }, "pgraph_rop0_zrop_pm_mux" },
42 {}
43 };
44
45 static const struct nvkm_specsrc
46 nv50_prop_sources[] = {
47 { 0x40be50, (const struct nvkm_specmux[]) {
48 { 0x1f, 0, "sel", true },
49 {}
50 }, "pgraph_tpc3_prop_pm_mux" },
51 {}
52 };
53
54 static const struct nvkm_specsrc
55 nv50_crop_sources[] = {
56 { 0x407008, (const struct nvkm_specmux[]) {
57 { 0x7, 0, "sel0", true },
58 { 0x7, 16, "sel1", true },
59 {}
60 }, "pgraph_rop0_crop_pm_mux" },
61 {}
62 };
63
64 static const struct nvkm_specsrc
65 nv50_tex_sources[] = {
66 { 0x40b808, (const struct nvkm_specmux[]) {
67 { 0x3fff, 0, "unk0" },
68 {}
69 }, "pgraph_tpc3_tex_unk08" },
70 {}
71 };
72
73 static const struct nvkm_specsrc
74 nv50_vfetch_sources[] = {
75 { 0x400c0c, (const struct nvkm_specmux[]) {
76 { 0x1, 0, "unk0" },
77 {}
78 }, "pgraph_vfetch_unk0c" },
79 {}
80 };
81
82 static const struct nvkm_specdom
83 nv50_pm[] = {
84 { 0x20, (const struct nvkm_specsig[]) {
85 {}
86 }, &nv40_perfctr_func },
87 { 0xf0, (const struct nvkm_specsig[]) {
88 { 0xc8, "pc01_gr_idle" },
89 { 0x7f, "pc01_strmout_00" },
90 { 0x80, "pc01_strmout_01" },
91 { 0xdc, "pc01_trast_00" },
92 { 0xdd, "pc01_trast_01" },
93 { 0xde, "pc01_trast_02" },
94 { 0xdf, "pc01_trast_03" },
95 { 0xe2, "pc01_trast_04" },
96 { 0xe3, "pc01_trast_05" },
97 { 0x7c, "pc01_vattr_00" },
98 { 0x7d, "pc01_vattr_01" },
99 { 0x26, "pc01_vfetch_00", nv50_vfetch_sources },
100 { 0x27, "pc01_vfetch_01", nv50_vfetch_sources },
101 { 0x28, "pc01_vfetch_02", nv50_vfetch_sources },
102 { 0x29, "pc01_vfetch_03", nv50_vfetch_sources },
103 { 0x2a, "pc01_vfetch_04", nv50_vfetch_sources },
104 { 0x2b, "pc01_vfetch_05", nv50_vfetch_sources },
105 { 0x2c, "pc01_vfetch_06", nv50_vfetch_sources },
106 { 0x2d, "pc01_vfetch_07", nv50_vfetch_sources },
107 { 0x2e, "pc01_vfetch_08", nv50_vfetch_sources },
108 { 0x2f, "pc01_vfetch_09", nv50_vfetch_sources },
109 { 0x30, "pc01_vfetch_0a", nv50_vfetch_sources },
110 { 0x31, "pc01_vfetch_0b", nv50_vfetch_sources },
111 { 0x32, "pc01_vfetch_0c", nv50_vfetch_sources },
112 { 0x33, "pc01_vfetch_0d", nv50_vfetch_sources },
113 { 0x34, "pc01_vfetch_0e", nv50_vfetch_sources },
114 { 0x35, "pc01_vfetch_0f", nv50_vfetch_sources },
115 { 0x36, "pc01_vfetch_10", nv50_vfetch_sources },
116 { 0x37, "pc01_vfetch_11", nv50_vfetch_sources },
117 { 0x38, "pc01_vfetch_12", nv50_vfetch_sources },
118 { 0x39, "pc01_vfetch_13", nv50_vfetch_sources },
119 { 0x3a, "pc01_vfetch_14", nv50_vfetch_sources },
120 { 0x3b, "pc01_vfetch_15", nv50_vfetch_sources },
121 { 0x3c, "pc01_vfetch_16", nv50_vfetch_sources },
122 { 0x3d, "pc01_vfetch_17", nv50_vfetch_sources },
123 { 0x3e, "pc01_vfetch_18", nv50_vfetch_sources },
124 { 0x3f, "pc01_vfetch_19", nv50_vfetch_sources },
125 { 0x20, "pc01_zcull_00", nv50_zcull_sources },
126 { 0x21, "pc01_zcull_01", nv50_zcull_sources },
127 { 0x22, "pc01_zcull_02", nv50_zcull_sources },
128 { 0x23, "pc01_zcull_03", nv50_zcull_sources },
129 { 0x24, "pc01_zcull_04", nv50_zcull_sources },
130 { 0x25, "pc01_zcull_05", nv50_zcull_sources },
131 { 0xae, "pc01_unk00" },
132 { 0xee, "pc01_trailer" },
133 {}
134 }, &nv40_perfctr_func },
135 { 0xf0, (const struct nvkm_specsig[]) {
136 { 0x52, "pc02_crop_00", nv50_crop_sources },
137 { 0x53, "pc02_crop_01", nv50_crop_sources },
138 { 0x54, "pc02_crop_02", nv50_crop_sources },
139 { 0x55, "pc02_crop_03", nv50_crop_sources },
140 { 0x00, "pc02_prop_00", nv50_prop_sources },
141 { 0x01, "pc02_prop_01", nv50_prop_sources },
142 { 0x02, "pc02_prop_02", nv50_prop_sources },
143 { 0x03, "pc02_prop_03", nv50_prop_sources },
144 { 0x04, "pc02_prop_04", nv50_prop_sources },
145 { 0x05, "pc02_prop_05", nv50_prop_sources },
146 { 0x06, "pc02_prop_06", nv50_prop_sources },
147 { 0x07, "pc02_prop_07", nv50_prop_sources },
148 { 0x70, "pc02_tex_00", nv50_tex_sources },
149 { 0x71, "pc02_tex_01", nv50_tex_sources },
150 { 0x72, "pc02_tex_02", nv50_tex_sources },
151 { 0x73, "pc02_tex_03", nv50_tex_sources },
152 { 0x40, "pc02_tex_04", nv50_tex_sources },
153 { 0x41, "pc02_tex_05", nv50_tex_sources },
154 { 0x42, "pc02_tex_06", nv50_tex_sources },
155 { 0x6c, "pc02_zrop_00", nv50_zrop_sources },
156 { 0x6d, "pc02_zrop_01", nv50_zrop_sources },
157 { 0x6e, "pc02_zrop_02", nv50_zrop_sources },
158 { 0x6f, "pc02_zrop_03", nv50_zrop_sources },
159 { 0xee, "pc02_trailer" },
160 {}
161 }, &nv40_perfctr_func },
162 { 0x20, (const struct nvkm_specsig[]) {
163 {}
164 }, &nv40_perfctr_func },
165 { 0x20, (const struct nvkm_specsig[]) {
166 {}
167 }, &nv40_perfctr_func },
168 {}
169 };
170
171 int
nv50_pm_new(struct nvkm_device * device,int index,struct nvkm_pm ** ppm)172 nv50_pm_new(struct nvkm_device *device, int index, struct nvkm_pm **ppm)
173 {
174 return nv40_pm_new_(nv50_pm, device, index, ppm);
175 }
176
