1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * NetChip 2280 high/full speed USB device controller.
4 * Unlike many such controllers, this one talks PCI.
5 */
6
7 /*
8 * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
9 * Copyright (C) 2003 David Brownell
10 * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
11 */
12
13 #include <linux/usb/net2280.h>
14 #include <linux/usb/usb338x.h>
15
16 /*-------------------------------------------------------------------------*/
17
18 #ifdef __KERNEL__
19
20 /* indexed registers [11.10] are accessed indirectly
21 * caller must own the device lock.
22 */
23
get_idx_reg(struct net2280_regs __iomem * regs,u32 index)24 static inline u32 get_idx_reg(struct net2280_regs __iomem *regs, u32 index)
25 {
26 writel(index, ®s->idxaddr);
27 /* NOTE: synchs device/cpu memory views */
28 return readl(®s->idxdata);
29 }
30
31 static inline void
set_idx_reg(struct net2280_regs __iomem * regs,u32 index,u32 value)32 set_idx_reg(struct net2280_regs __iomem *regs, u32 index, u32 value)
33 {
34 writel(index, ®s->idxaddr);
35 writel(value, ®s->idxdata);
36 /* posted, may not be visible yet */
37 }
38
39 #endif /* __KERNEL__ */
40
41 #define PCI_VENDOR_ID_PLX_LEGACY 0x17cc
42
43 #define PLX_LEGACY BIT(0)
44 #define PLX_2280 BIT(1)
45 #define PLX_SUPERSPEED BIT(2)
46 #define PLX_PCIE BIT(3)
47
48 #define REG_DIAG 0x0
49 #define RETRY_COUNTER 16
50 #define FORCE_PCI_SERR 11
51 #define FORCE_PCI_INTERRUPT 10
52 #define FORCE_USB_INTERRUPT 9
53 #define FORCE_CPU_INTERRUPT 8
54 #define ILLEGAL_BYTE_ENABLES 5
55 #define FAST_TIMES 4
56 #define FORCE_RECEIVE_ERROR 2
57 #define FORCE_TRANSMIT_CRC_ERROR 0
58 #define REG_FRAME 0x02 /* from last sof */
59 #define REG_CHIPREV 0x03 /* in bcd */
60 #define REG_HS_NAK_RATE 0x0a /* NAK per N uframes */
61
62 #define CHIPREV_1 0x0100
63 #define CHIPREV_1A 0x0110
64
65 /* DEFECT 7374 */
66 #define DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS 200
67 #define DEFECT_7374_PROCESSOR_WAIT_TIME 10
68
69 /* ep0 max packet size */
70 #define EP0_SS_MAX_PACKET_SIZE 0x200
71 #define EP0_HS_MAX_PACKET_SIZE 0x40
72 #ifdef __KERNEL__
73
74 /*-------------------------------------------------------------------------*/
75
76 /* [8.3] for scatter/gather i/o
77 * use struct net2280_dma_regs bitfields
78 */
79 struct net2280_dma {
80 __le32 dmacount;
81 __le32 dmaaddr; /* the buffer */
82 __le32 dmadesc; /* next dma descriptor */
83 __le32 _reserved;
84 } __aligned(16);
85
86 /*-------------------------------------------------------------------------*/
87
88 /* DRIVER DATA STRUCTURES and UTILITIES */
89
90 struct net2280_ep {
91 struct usb_ep ep;
92 struct net2280_ep_regs __iomem *cfg;
93 struct net2280_ep_regs __iomem *regs;
94 struct net2280_dma_regs __iomem *dma;
95 struct net2280_dma *dummy;
96 dma_addr_t td_dma; /* of dummy */
97 struct net2280 *dev;
98 unsigned long irqs;
99
100 /* analogous to a host-side qh */
101 struct list_head queue;
102 const struct usb_endpoint_descriptor *desc;
103 unsigned num : 8,
104 fifo_size : 12,
105 in_fifo_validate : 1,
106 out_overflow : 1,
107 stopped : 1,
108 wedged : 1,
109 is_in : 1,
110 is_iso : 1,
111 responded : 1;
112 };
113
allow_status(struct net2280_ep * ep)114 static inline void allow_status(struct net2280_ep *ep)
115 {
116 /* ep0 only */
117 writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
118 BIT(CLEAR_NAK_OUT_PACKETS) |
119 BIT(CLEAR_NAK_OUT_PACKETS_MODE),
120 &ep->regs->ep_rsp);
121 ep->stopped = 1;
122 }
123
allow_status_338x(struct net2280_ep * ep)124 static inline void allow_status_338x(struct net2280_ep *ep)
125 {
126 /*
127 * Control Status Phase Handshake was set by the chip when the setup
128 * packet arrived. While set, the chip automatically NAKs the host's
129 * Status Phase tokens.
130 */
131 writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), &ep->regs->ep_rsp);
132
133 ep->stopped = 1;
134
135 /* TD 9.9 Halt Endpoint test. TD 9.22 set feature test. */
136 ep->responded = 0;
137 }
138
139 struct net2280_request {
140 struct usb_request req;
141 struct net2280_dma *td;
142 dma_addr_t td_dma;
143 struct list_head queue;
144 unsigned mapped : 1,
145 valid : 1;
146 };
147
148 struct net2280 {
149 /* each pci device provides one gadget, several endpoints */
150 struct usb_gadget gadget;
151 spinlock_t lock;
152 struct net2280_ep ep[9];
153 struct usb_gadget_driver *driver;
154 unsigned enabled : 1,
155 protocol_stall : 1,
156 softconnect : 1,
157 got_irq : 1,
158 region:1,
159 u1_enable:1,
160 u2_enable:1,
161 ltm_enable:1,
162 wakeup_enable:1,
163 addressed_state:1,
164 bug7734_patched:1;
165 u16 chiprev;
166 int enhanced_mode;
167 int n_ep;
168 kernel_ulong_t quirks;
169
170
171 /* pci state used to access those endpoints */
172 struct pci_dev *pdev;
173 struct net2280_regs __iomem *regs;
174 struct net2280_usb_regs __iomem *usb;
175 struct usb338x_usb_ext_regs __iomem *usb_ext;
176 struct net2280_pci_regs __iomem *pci;
177 struct net2280_dma_regs __iomem *dma;
178 struct net2280_dep_regs __iomem *dep;
179 struct net2280_ep_regs __iomem *epregs;
180 struct usb338x_ll_regs __iomem *llregs;
181 struct usb338x_pl_regs __iomem *plregs;
182
183 struct dma_pool *requests;
184 /* statistics...*/
185 };
186
set_halt(struct net2280_ep * ep)187 static inline void set_halt(struct net2280_ep *ep)
188 {
189 /* ep0 and bulk/intr endpoints */
190 writel(BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE) |
191 /* set NAK_OUT for erratum 0114 */
192 ((ep->dev->chiprev == CHIPREV_1) << SET_NAK_OUT_PACKETS) |
193 BIT(SET_ENDPOINT_HALT),
194 &ep->regs->ep_rsp);
195 }
196
clear_halt(struct net2280_ep * ep)197 static inline void clear_halt(struct net2280_ep *ep)
198 {
199 /* ep0 and bulk/intr endpoints */
200 writel(BIT(CLEAR_ENDPOINT_HALT) |
201 BIT(CLEAR_ENDPOINT_TOGGLE) |
202 /*
203 * unless the gadget driver left a short packet in the
204 * fifo, this reverses the erratum 0114 workaround.
205 */
206 ((ep->dev->chiprev == CHIPREV_1) << CLEAR_NAK_OUT_PACKETS),
207 &ep->regs->ep_rsp);
208 }
209
210 /*
211 * FSM value for Defect 7374 (U1U2 Test) is managed in
212 * chip's SCRATCH register:
213 */
214 #define DEFECT7374_FSM_FIELD 28
215
216 /* Waiting for Control Read:
217 * - A transition to this state indicates a fresh USB connection,
218 * before the first Setup Packet. The connection speed is not
219 * known. Firmware is waiting for the first Control Read.
220 * - Starting state: This state can be thought of as the FSM's typical
221 * starting state.
222 * - Tip: Upon the first SS Control Read the FSM never
223 * returns to this state.
224 */
225 #define DEFECT7374_FSM_WAITING_FOR_CONTROL_READ BIT(DEFECT7374_FSM_FIELD)
226
227 /* Non-SS Control Read:
228 * - A transition to this state indicates detection of the first HS
229 * or FS Control Read.
230 * - Tip: Upon the first SS Control Read the FSM never
231 * returns to this state.
232 */
233 #define DEFECT7374_FSM_NON_SS_CONTROL_READ (2 << DEFECT7374_FSM_FIELD)
234
235 /* SS Control Read:
236 * - A transition to this state indicates detection of the
237 * first SS Control Read.
238 * - This state indicates workaround completion. Workarounds no longer
239 * need to be applied (as long as the chip remains powered up).
240 * - Tip: Once in this state the FSM state does not change (until
241 * the chip's power is lost and restored).
242 * - This can be thought of as the final state of the FSM;
243 * the FSM 'locks-up' in this state until the chip loses power.
244 */
245 #define DEFECT7374_FSM_SS_CONTROL_READ (3 << DEFECT7374_FSM_FIELD)
246
247 #ifdef USE_RDK_LEDS
248
net2280_led_init(struct net2280 * dev)249 static inline void net2280_led_init(struct net2280 *dev)
250 {
251 /* LED3 (green) is on during USB activity. note erratum 0113. */
252 writel(BIT(GPIO3_LED_SELECT) |
253 BIT(GPIO3_OUTPUT_ENABLE) |
254 BIT(GPIO2_OUTPUT_ENABLE) |
255 BIT(GPIO1_OUTPUT_ENABLE) |
256 BIT(GPIO0_OUTPUT_ENABLE),
257 &dev->regs->gpioctl);
258 }
259
260 /* indicate speed with bi-color LED 0/1 */
261 static inline
net2280_led_speed(struct net2280 * dev,enum usb_device_speed speed)262 void net2280_led_speed(struct net2280 *dev, enum usb_device_speed speed)
263 {
264 u32 val = readl(&dev->regs->gpioctl);
265 switch (speed) {
266 case USB_SPEED_SUPER: /* green + red */
267 val |= BIT(GPIO0_DATA) | BIT(GPIO1_DATA);
268 break;
269 case USB_SPEED_HIGH: /* green */
270 val &= ~BIT(GPIO0_DATA);
271 val |= BIT(GPIO1_DATA);
272 break;
273 case USB_SPEED_FULL: /* red */
274 val &= ~BIT(GPIO1_DATA);
275 val |= BIT(GPIO0_DATA);
276 break;
277 default: /* (off/black) */
278 val &= ~(BIT(GPIO1_DATA) | BIT(GPIO0_DATA));
279 break;
280 }
281 writel(val, &dev->regs->gpioctl);
282 }
283
284 /* indicate power with LED 2 */
net2280_led_active(struct net2280 * dev,int is_active)285 static inline void net2280_led_active(struct net2280 *dev, int is_active)
286 {
287 u32 val = readl(&dev->regs->gpioctl);
288
289 /* FIXME this LED never seems to turn on.*/
290 if (is_active)
291 val |= GPIO2_DATA;
292 else
293 val &= ~GPIO2_DATA;
294 writel(val, &dev->regs->gpioctl);
295 }
296
net2280_led_shutdown(struct net2280 * dev)297 static inline void net2280_led_shutdown(struct net2280 *dev)
298 {
299 /* turn off all four GPIO*_DATA bits */
300 writel(readl(&dev->regs->gpioctl) & ~0x0f,
301 &dev->regs->gpioctl);
302 }
303
304 #else
305
306 #define net2280_led_init(dev) do { } while (0)
307 #define net2280_led_speed(dev, speed) do { } while (0)
308 #define net2280_led_shutdown(dev) do { } while (0)
309
310 #endif
311
312 /*-------------------------------------------------------------------------*/
313
314 #define ep_dbg(ndev, fmt, args...) \
315 dev_dbg((&((ndev)->pdev->dev)), fmt, ##args)
316
317 #define ep_vdbg(ndev, fmt, args...) \
318 dev_vdbg((&((ndev)->pdev->dev)), fmt, ##args)
319
320 #define ep_info(ndev, fmt, args...) \
321 dev_info((&((ndev)->pdev->dev)), fmt, ##args)
322
323 #define ep_warn(ndev, fmt, args...) \
324 dev_warn((&((ndev)->pdev->dev)), fmt, ##args)
325
326 #define ep_err(ndev, fmt, args...) \
327 dev_err((&((ndev)->pdev->dev)), fmt, ##args)
328
329 /*-------------------------------------------------------------------------*/
330
set_fifo_bytecount(struct net2280_ep * ep,unsigned count)331 static inline void set_fifo_bytecount(struct net2280_ep *ep, unsigned count)
332 {
333 if (ep->dev->pdev->vendor == 0x17cc)
334 writeb(count, 2 + (u8 __iomem *) &ep->regs->ep_cfg);
335 else{
336 u32 tmp = readl(&ep->cfg->ep_cfg) &
337 (~(0x07 << EP_FIFO_BYTE_COUNT));
338 writel(tmp | (count << EP_FIFO_BYTE_COUNT), &ep->cfg->ep_cfg);
339 }
340 }
341
start_out_naking(struct net2280_ep * ep)342 static inline void start_out_naking(struct net2280_ep *ep)
343 {
344 /* NOTE: hardware races lurk here, and PING protocol issues */
345 writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
346 /* synch with device */
347 readl(&ep->regs->ep_rsp);
348 }
349
stop_out_naking(struct net2280_ep * ep)350 static inline void stop_out_naking(struct net2280_ep *ep)
351 {
352 u32 tmp;
353
354 tmp = readl(&ep->regs->ep_stat);
355 if ((tmp & BIT(NAK_OUT_PACKETS)) != 0)
356 writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
357 }
358
359
set_max_speed(struct net2280_ep * ep,u32 max)360 static inline void set_max_speed(struct net2280_ep *ep, u32 max)
361 {
362 u32 reg;
363 static const u32 ep_enhanced[9] = { 0x10, 0x60, 0x30, 0x80,
364 0x50, 0x20, 0x70, 0x40, 0x90 };
365
366 if (ep->dev->enhanced_mode) {
367 reg = ep_enhanced[ep->num];
368 switch (ep->dev->gadget.speed) {
369 case USB_SPEED_SUPER:
370 reg += 2;
371 break;
372 case USB_SPEED_FULL:
373 reg += 1;
374 break;
375 case USB_SPEED_HIGH:
376 default:
377 break;
378 }
379 } else {
380 reg = (ep->num + 1) * 0x10;
381 if (ep->dev->gadget.speed != USB_SPEED_HIGH)
382 reg += 1;
383 }
384
385 set_idx_reg(ep->dev->regs, reg, max);
386 }
387
388 #endif /* __KERNEL__ */
389
