1 /*
2 * arch/m68k/mvme16x/config.c
3 *
4 * Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk]
5 *
6 * Based on:
7 *
8 * linux/amiga/config.c
9 *
10 * Copyright (C) 1993 Hamish Macdonald
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file README.legal in the main directory of this archive
14 * for more details.
15 */
16
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/seq_file.h>
21 #include <linux/tty.h>
22 #include <linux/console.h>
23 #include <linux/linkage.h>
24 #include <linux/init.h>
25 #include <linux/major.h>
26 #include <linux/genhd.h>
27 #include <linux/rtc.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30
31 #include <asm/bootinfo.h>
32 #include <asm/bootinfo-vme.h>
33 #include <asm/byteorder.h>
34 #include <asm/pgtable.h>
35 #include <asm/setup.h>
36 #include <asm/irq.h>
37 #include <asm/traps.h>
38 #include <asm/machdep.h>
39 #include <asm/mvme16xhw.h>
40
41 extern t_bdid mvme_bdid;
42
43 static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
44
45 static void mvme16x_get_model(char *model);
46 extern void mvme16x_sched_init(irq_handler_t handler);
47 extern u32 mvme16x_gettimeoffset(void);
48 extern int mvme16x_hwclk (int, struct rtc_time *);
49 extern void mvme16x_reset (void);
50
51 int bcd2int (unsigned char b);
52
53 /* Save tick handler routine pointer, will point to xtime_update() in
54 * kernel/time/timekeeping.c, called via mvme16x_process_int() */
55
56 static irq_handler_t tick_handler;
57
58
59 unsigned short mvme16x_config;
60 EXPORT_SYMBOL(mvme16x_config);
61
62
mvme16x_parse_bootinfo(const struct bi_record * bi)63 int __init mvme16x_parse_bootinfo(const struct bi_record *bi)
64 {
65 uint16_t tag = be16_to_cpu(bi->tag);
66 if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
67 return 0;
68 else
69 return 1;
70 }
71
mvme16x_reset(void)72 void mvme16x_reset(void)
73 {
74 pr_info("\r\n\nCalled mvme16x_reset\r\n"
75 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
76 /* The string of returns is to delay the reset until the whole
77 * message is output. Assert reset bit in GCSR */
78 *(volatile char *)0xfff40107 = 0x80;
79 }
80
mvme16x_get_model(char * model)81 static void mvme16x_get_model(char *model)
82 {
83 p_bdid p = &mvme_bdid;
84 char suf[4];
85
86 suf[1] = p->brdsuffix[0];
87 suf[2] = p->brdsuffix[1];
88 suf[3] = '\0';
89 suf[0] = suf[1] ? '-' : '\0';
90
91 sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf);
92 }
93
94
mvme16x_get_hardware_list(struct seq_file * m)95 static void mvme16x_get_hardware_list(struct seq_file *m)
96 {
97 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
98
99 if (brdno == 0x0162 || brdno == 0x0172)
100 {
101 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
102
103 seq_printf (m, "VMEchip2 %spresent\n",
104 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
105 seq_printf (m, "SCSI interface %spresent\n",
106 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
107 seq_printf (m, "Ethernet i/f %spresent\n",
108 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
109 }
110 }
111
112 /*
113 * This function is called during kernel startup to initialize
114 * the mvme16x IRQ handling routines. Should probably ensure
115 * that the base vectors for the VMEChip2 and PCCChip2 are valid.
116 */
117
mvme16x_init_IRQ(void)118 static void __init mvme16x_init_IRQ (void)
119 {
120 m68k_setup_user_interrupt(VEC_USER, 192);
121 }
122
123 #define pcc2chip ((volatile u_char *)0xfff42000)
124 #define PccSCCMICR 0x1d
125 #define PccSCCTICR 0x1e
126 #define PccSCCRICR 0x1f
127 #define PccTPIACKR 0x25
128
129 #ifdef CONFIG_EARLY_PRINTK
130
131 /**** cd2401 registers ****/
132 #define CD2401_ADDR (0xfff45000)
133
134 #define CyGFRCR (0x81)
135 #define CyCCR (0x13)
136 #define CyCLR_CHAN (0x40)
137 #define CyINIT_CHAN (0x20)
138 #define CyCHIP_RESET (0x10)
139 #define CyENB_XMTR (0x08)
140 #define CyDIS_XMTR (0x04)
141 #define CyENB_RCVR (0x02)
142 #define CyDIS_RCVR (0x01)
143 #define CyCAR (0xee)
144 #define CyIER (0x11)
145 #define CyMdmCh (0x80)
146 #define CyRxExc (0x20)
147 #define CyRxData (0x08)
148 #define CyTxMpty (0x02)
149 #define CyTxRdy (0x01)
150 #define CyLICR (0x26)
151 #define CyRISR (0x89)
152 #define CyTIMEOUT (0x80)
153 #define CySPECHAR (0x70)
154 #define CyOVERRUN (0x08)
155 #define CyPARITY (0x04)
156 #define CyFRAME (0x02)
157 #define CyBREAK (0x01)
158 #define CyREOIR (0x84)
159 #define CyTEOIR (0x85)
160 #define CyMEOIR (0x86)
161 #define CyNOTRANS (0x08)
162 #define CyRFOC (0x30)
163 #define CyRDR (0xf8)
164 #define CyTDR (0xf8)
165 #define CyMISR (0x8b)
166 #define CyRISR (0x89)
167 #define CyTISR (0x8a)
168 #define CyMSVR1 (0xde)
169 #define CyMSVR2 (0xdf)
170 #define CyDSR (0x80)
171 #define CyDCD (0x40)
172 #define CyCTS (0x20)
173 #define CyDTR (0x02)
174 #define CyRTS (0x01)
175 #define CyRTPRL (0x25)
176 #define CyRTPRH (0x24)
177 #define CyCOR1 (0x10)
178 #define CyPARITY_NONE (0x00)
179 #define CyPARITY_E (0x40)
180 #define CyPARITY_O (0xC0)
181 #define Cy_5_BITS (0x04)
182 #define Cy_6_BITS (0x05)
183 #define Cy_7_BITS (0x06)
184 #define Cy_8_BITS (0x07)
185 #define CyCOR2 (0x17)
186 #define CyETC (0x20)
187 #define CyCtsAE (0x02)
188 #define CyCOR3 (0x16)
189 #define Cy_1_STOP (0x02)
190 #define Cy_2_STOP (0x04)
191 #define CyCOR4 (0x15)
192 #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
193 #define CyCOR5 (0x14)
194 #define CyCOR6 (0x18)
195 #define CyCOR7 (0x07)
196 #define CyRBPR (0xcb)
197 #define CyRCOR (0xc8)
198 #define CyTBPR (0xc3)
199 #define CyTCOR (0xc0)
200 #define CySCHR1 (0x1f)
201 #define CySCHR2 (0x1e)
202 #define CyTPR (0xda)
203 #define CyPILR1 (0xe3)
204 #define CyPILR2 (0xe0)
205 #define CyPILR3 (0xe1)
206 #define CyCMR (0x1b)
207 #define CyASYNC (0x02)
208 #define CyLICR (0x26)
209 #define CyLIVR (0x09)
210 #define CySCRL (0x23)
211 #define CySCRH (0x22)
212 #define CyTFTC (0x80)
213
mvme16x_cons_write(struct console * co,const char * str,unsigned count)214 void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
215 {
216 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
217 volatile u_char sink;
218 u_char ier;
219 int port;
220 u_char do_lf = 0;
221 int i = 0;
222
223 /* Ensure transmitter is enabled! */
224
225 port = 0;
226 base_addr[CyCAR] = (u_char)port;
227 while (base_addr[CyCCR])
228 ;
229 base_addr[CyCCR] = CyENB_XMTR;
230
231 ier = base_addr[CyIER];
232 base_addr[CyIER] = CyTxMpty;
233
234 while (1) {
235 if (pcc2chip[PccSCCTICR] & 0x20)
236 {
237 /* We have a Tx int. Acknowledge it */
238 sink = pcc2chip[PccTPIACKR];
239 if ((base_addr[CyLICR] >> 2) == port) {
240 if (i == count) {
241 /* Last char of string is now output */
242 base_addr[CyTEOIR] = CyNOTRANS;
243 break;
244 }
245 if (do_lf) {
246 base_addr[CyTDR] = '\n';
247 str++;
248 i++;
249 do_lf = 0;
250 }
251 else if (*str == '\n') {
252 base_addr[CyTDR] = '\r';
253 do_lf = 1;
254 }
255 else {
256 base_addr[CyTDR] = *str++;
257 i++;
258 }
259 base_addr[CyTEOIR] = 0;
260 }
261 else
262 base_addr[CyTEOIR] = CyNOTRANS;
263 }
264 }
265
266 base_addr[CyIER] = ier;
267 }
268
269 #endif
270
config_mvme16x(void)271 void __init config_mvme16x(void)
272 {
273 p_bdid p = &mvme_bdid;
274 char id[40];
275 uint16_t brdno = be16_to_cpu(p->brdno);
276
277 mach_max_dma_address = 0xffffffff;
278 mach_sched_init = mvme16x_sched_init;
279 mach_init_IRQ = mvme16x_init_IRQ;
280 arch_gettimeoffset = mvme16x_gettimeoffset;
281 mach_hwclk = mvme16x_hwclk;
282 mach_reset = mvme16x_reset;
283 mach_get_model = mvme16x_get_model;
284 mach_get_hardware_list = mvme16x_get_hardware_list;
285
286 /* Report board revision */
287
288 if (strncmp("BDID", p->bdid, 4))
289 {
290 pr_crit("Bug call .BRD_ID returned garbage - giving up\n");
291 while (1)
292 ;
293 }
294 /* Board type is only set by newer versions of vmelilo/tftplilo */
295 if (vme_brdtype == 0)
296 vme_brdtype = brdno;
297
298 mvme16x_get_model(id);
299 pr_info("BRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev >> 4,
300 p->rev & 0xf, p->yr, p->mth, p->day);
301 if (brdno == 0x0162 || brdno == 0x172)
302 {
303 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
304
305 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
306
307 pr_info("MVME%x Hardware status:\n", brdno);
308 pr_info(" CPU Type 68%s040\n",
309 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
310 pr_info(" CPU clock %dMHz\n",
311 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
312 pr_info(" VMEchip2 %spresent\n",
313 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
314 pr_info(" SCSI interface %spresent\n",
315 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
316 pr_info(" Ethernet interface %spresent\n",
317 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
318 }
319 else
320 {
321 mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
322 }
323 }
324
mvme16x_abort_int(int irq,void * dev_id)325 static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
326 {
327 unsigned long *new = (unsigned long *)vectors;
328 unsigned long *old = (unsigned long *)0xffe00000;
329 volatile unsigned char uc, *ucp;
330 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
331
332 if (brdno == 0x0162 || brdno == 0x172)
333 {
334 ucp = (volatile unsigned char *)0xfff42043;
335 uc = *ucp | 8;
336 *ucp = uc;
337 }
338 else
339 {
340 *(volatile unsigned long *)0xfff40074 = 0x40000000;
341 }
342 *(new+4) = *(old+4); /* Illegal instruction */
343 *(new+9) = *(old+9); /* Trace */
344 *(new+47) = *(old+47); /* Trap #15 */
345
346 if (brdno == 0x0162 || brdno == 0x172)
347 *(new+0x5e) = *(old+0x5e); /* ABORT switch */
348 else
349 *(new+0x6e) = *(old+0x6e); /* ABORT switch */
350 return IRQ_HANDLED;
351 }
352
mvme16x_timer_int(int irq,void * dev_id)353 static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
354 {
355 *(volatile unsigned char *)0xfff4201b |= 8;
356 return tick_handler(irq, dev_id);
357 }
358
mvme16x_sched_init(irq_handler_t timer_routine)359 void mvme16x_sched_init (irq_handler_t timer_routine)
360 {
361 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
362 int irq;
363
364 tick_handler = timer_routine;
365 /* Using PCCchip2 or MC2 chip tick timer 1 */
366 *(volatile unsigned long *)0xfff42008 = 0;
367 *(volatile unsigned long *)0xfff42004 = 10000; /* 10ms */
368 *(volatile unsigned char *)0xfff42017 |= 3;
369 *(volatile unsigned char *)0xfff4201b = 0x16;
370 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0,
371 "timer", mvme16x_timer_int))
372 panic ("Couldn't register timer int");
373
374 if (brdno == 0x0162 || brdno == 0x172)
375 irq = MVME162_IRQ_ABORT;
376 else
377 irq = MVME167_IRQ_ABORT;
378 if (request_irq(irq, mvme16x_abort_int, 0,
379 "abort", mvme16x_abort_int))
380 panic ("Couldn't register abort int");
381 }
382
383
384 /* This is always executed with interrupts disabled. */
mvme16x_gettimeoffset(void)385 u32 mvme16x_gettimeoffset(void)
386 {
387 return (*(volatile u32 *)0xfff42008) * 1000;
388 }
389
bcd2int(unsigned char b)390 int bcd2int (unsigned char b)
391 {
392 return ((b>>4)*10 + (b&15));
393 }
394
mvme16x_hwclk(int op,struct rtc_time * t)395 int mvme16x_hwclk(int op, struct rtc_time *t)
396 {
397 #warning check me!
398 if (!op) {
399 rtc->ctrl = RTC_READ;
400 t->tm_year = bcd2int (rtc->bcd_year);
401 t->tm_mon = bcd2int(rtc->bcd_mth) - 1;
402 t->tm_mday = bcd2int (rtc->bcd_dom);
403 t->tm_hour = bcd2int (rtc->bcd_hr);
404 t->tm_min = bcd2int (rtc->bcd_min);
405 t->tm_sec = bcd2int (rtc->bcd_sec);
406 rtc->ctrl = 0;
407 if (t->tm_year < 70)
408 t->tm_year += 100;
409 }
410 return 0;
411 }
412
