1 /*
2 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
3 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15 #include "mt76x0.h"
16 #include "trace.h"
17
18 /* Take mac80211 Q id from the skb and translate it to hardware Q id */
skb2q(struct sk_buff * skb)19 static u8 skb2q(struct sk_buff *skb)
20 {
21 int qid = skb_get_queue_mapping(skb);
22
23 if (WARN_ON(qid >= MT_TXQ_PSD)) {
24 qid = MT_TXQ_BE;
25 skb_set_queue_mapping(skb, qid);
26 }
27
28 return q2hwq(qid);
29 }
30
mt76x0_tx_skb_remove_dma_overhead(struct sk_buff * skb,struct ieee80211_tx_info * info)31 static void mt76x0_tx_skb_remove_dma_overhead(struct sk_buff *skb,
32 struct ieee80211_tx_info *info)
33 {
34 int pkt_len = (unsigned long)info->status.status_driver_data[0];
35
36 skb_pull(skb, sizeof(struct mt76_txwi) + 4);
37 if (ieee80211_get_hdrlen_from_skb(skb) % 4)
38 mt76x0_remove_hdr_pad(skb);
39
40 skb_trim(skb, pkt_len);
41 }
42
mt76x0_tx_status(struct mt76x0_dev * dev,struct sk_buff * skb)43 void mt76x0_tx_status(struct mt76x0_dev *dev, struct sk_buff *skb)
44 {
45 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
46
47 mt76x0_tx_skb_remove_dma_overhead(skb, info);
48
49 ieee80211_tx_info_clear_status(info);
50 info->status.rates[0].idx = -1;
51 info->flags |= IEEE80211_TX_STAT_ACK;
52
53 spin_lock(&dev->mac_lock);
54 ieee80211_tx_status(dev->mt76.hw, skb);
55 spin_unlock(&dev->mac_lock);
56 }
57
mt76x0_skb_rooms(struct mt76x0_dev * dev,struct sk_buff * skb)58 static int mt76x0_skb_rooms(struct mt76x0_dev *dev, struct sk_buff *skb)
59 {
60 int hdr_len = ieee80211_get_hdrlen_from_skb(skb);
61 u32 need_head;
62
63 need_head = sizeof(struct mt76_txwi) + 4;
64 if (hdr_len % 4)
65 need_head += 2;
66
67 return skb_cow(skb, need_head);
68 }
69
70 static struct mt76_txwi *
mt76x0_push_txwi(struct mt76x0_dev * dev,struct sk_buff * skb,struct ieee80211_sta * sta,struct mt76_wcid * wcid,int pkt_len)71 mt76x0_push_txwi(struct mt76x0_dev *dev, struct sk_buff *skb,
72 struct ieee80211_sta *sta, struct mt76_wcid *wcid,
73 int pkt_len)
74 {
75 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
76 struct ieee80211_tx_rate *rate = &info->control.rates[0];
77 struct mt76_txwi *txwi;
78 unsigned long flags;
79 u16 txwi_flags = 0;
80 u32 pkt_id;
81 u16 rate_ctl;
82 u8 nss;
83
84 txwi = (struct mt76_txwi *)skb_push(skb, sizeof(struct mt76_txwi));
85 memset(txwi, 0, sizeof(*txwi));
86
87 if (!wcid->tx_rate_set)
88 ieee80211_get_tx_rates(info->control.vif, sta, skb,
89 info->control.rates, 1);
90
91 spin_lock_irqsave(&dev->mt76.lock, flags);
92 if (rate->idx < 0 || !rate->count) {
93 rate_ctl = wcid->tx_rate;
94 nss = wcid->tx_rate_nss;
95 } else {
96 rate_ctl = mt76x0_mac_tx_rate_val(dev, rate, &nss);
97 }
98 spin_unlock_irqrestore(&dev->mt76.lock, flags);
99
100 txwi->rate_ctl = cpu_to_le16(rate_ctl);
101
102 if (info->flags & IEEE80211_TX_CTL_LDPC)
103 txwi->rate_ctl |= cpu_to_le16(MT_RXWI_RATE_LDPC);
104 if ((info->flags & IEEE80211_TX_CTL_STBC) && nss == 1)
105 txwi->rate_ctl |= cpu_to_le16(MT_RXWI_RATE_STBC);
106 if (nss > 1 && sta && sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
107 txwi_flags |= MT_TXWI_FLAGS_MMPS;
108
109 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
110 txwi->ack_ctl |= MT_TXWI_ACK_CTL_REQ;
111 pkt_id = 1;
112 } else {
113 pkt_id = 0;
114 }
115
116 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
117 pkt_id |= MT_TXWI_PKTID_PROBE;
118
119 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
120 txwi->ack_ctl |= MT_TXWI_ACK_CTL_NSEQ;
121
122 if ((info->flags & IEEE80211_TX_CTL_AMPDU) && sta) {
123 u8 ba_size = IEEE80211_MIN_AMPDU_BUF;
124
125 ba_size <<= sta->ht_cap.ampdu_factor;
126 ba_size = min_t(int, 7, ba_size - 1);
127 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) {
128 ba_size = 0;
129 } else {
130 txwi_flags |= MT_TXWI_FLAGS_AMPDU;
131 txwi_flags |= FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY,
132 sta->ht_cap.ampdu_density);
133 }
134 txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size);
135 }
136
137 txwi->wcid = wcid->idx;
138 txwi->flags |= cpu_to_le16(txwi_flags);
139 txwi->len_ctl = cpu_to_le16(pkt_len);
140 txwi->pktid = pkt_id;
141
142 return txwi;
143 }
144
mt76x0_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)145 void mt76x0_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
146 struct sk_buff *skb)
147 {
148 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
149 struct mt76x0_dev *dev = hw->priv;
150 struct ieee80211_vif *vif = info->control.vif;
151 struct ieee80211_sta *sta = control->sta;
152 struct mt76_sta *msta = NULL;
153 struct mt76_wcid *wcid = dev->mon_wcid;
154 struct mt76_txwi *txwi;
155 int pkt_len = skb->len;
156 int hw_q = skb2q(skb);
157
158 BUILD_BUG_ON(ARRAY_SIZE(info->status.status_driver_data) < 1);
159 info->status.status_driver_data[0] = (void *)(unsigned long)pkt_len;
160
161 if (mt76x0_skb_rooms(dev, skb) || mt76x0_insert_hdr_pad(skb)) {
162 ieee80211_free_txskb(dev->mt76.hw, skb);
163 return;
164 }
165
166 if (sta) {
167 msta = (struct mt76_sta *) sta->drv_priv;
168 wcid = &msta->wcid;
169 } else if (vif && (!info->control.hw_key && wcid->hw_key_idx != -1)) {
170 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
171
172 wcid = &mvif->group_wcid;
173 }
174
175 txwi = mt76x0_push_txwi(dev, skb, sta, wcid, pkt_len);
176
177 if (mt76x0_dma_enqueue_tx(dev, skb, wcid, hw_q))
178 return;
179
180 trace_mt76x0_tx(&dev->mt76, skb, msta, txwi);
181 }
182
mt76x0_tx_stat(struct work_struct * work)183 void mt76x0_tx_stat(struct work_struct *work)
184 {
185 struct mt76x0_dev *dev = container_of(work, struct mt76x0_dev,
186 stat_work.work);
187 struct mt76_tx_status stat;
188 unsigned long flags;
189 int cleaned = 0;
190 u8 update = 1;
191
192 while (!test_bit(MT76_REMOVED, &dev->mt76.state)) {
193 stat = mt76x0_mac_fetch_tx_status(dev);
194 if (!stat.valid)
195 break;
196
197 mt76x0_send_tx_status(dev, &stat, &update);
198
199 cleaned++;
200 }
201 trace_mt76x0_tx_status_cleaned(&dev->mt76, cleaned);
202
203 spin_lock_irqsave(&dev->tx_lock, flags);
204 if (cleaned)
205 queue_delayed_work(dev->stat_wq, &dev->stat_work,
206 msecs_to_jiffies(10));
207 else if (test_and_clear_bit(MT76_MORE_STATS, &dev->mt76.state))
208 queue_delayed_work(dev->stat_wq, &dev->stat_work,
209 msecs_to_jiffies(20));
210 else
211 clear_bit(MT76_READING_STATS, &dev->mt76.state);
212 spin_unlock_irqrestore(&dev->tx_lock, flags);
213 }
214
mt76x0_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 queue,const struct ieee80211_tx_queue_params * params)215 int mt76x0_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
216 u16 queue, const struct ieee80211_tx_queue_params *params)
217 {
218 struct mt76x0_dev *dev = hw->priv;
219 u8 cw_min = 5, cw_max = 10, hw_q = q2hwq(queue);
220 u32 val;
221
222 /* TODO: should we do funny things with the parameters?
223 * See what mt76x0_set_default_edca() used to do in init.c.
224 */
225
226 if (params->cw_min)
227 cw_min = fls(params->cw_min);
228 if (params->cw_max)
229 cw_max = fls(params->cw_max);
230
231 WARN_ON(params->txop > 0xff);
232 WARN_ON(params->aifs > 0xf);
233 WARN_ON(cw_min > 0xf);
234 WARN_ON(cw_max > 0xf);
235
236 val = FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |
237 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |
238 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);
239 /* TODO: based on user-controlled EnableTxBurst var vendor drv sets
240 * a really long txop on AC0 (see connect.c:2009) but only on
241 * connect? When not connected should be 0.
242 */
243 if (!hw_q)
244 val |= 0x60;
245 else
246 val |= FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop);
247 mt76_wr(dev, MT_EDCA_CFG_AC(hw_q), val);
248
249 val = mt76_rr(dev, MT_WMM_TXOP(hw_q));
250 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(hw_q));
251 val |= params->txop << MT_WMM_TXOP_SHIFT(hw_q);
252 mt76_wr(dev, MT_WMM_TXOP(hw_q), val);
253
254 val = mt76_rr(dev, MT_WMM_AIFSN);
255 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(hw_q));
256 val |= params->aifs << MT_WMM_AIFSN_SHIFT(hw_q);
257 mt76_wr(dev, MT_WMM_AIFSN, val);
258
259 val = mt76_rr(dev, MT_WMM_CWMIN);
260 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(hw_q));
261 val |= cw_min << MT_WMM_CWMIN_SHIFT(hw_q);
262 mt76_wr(dev, MT_WMM_CWMIN, val);
263
264 val = mt76_rr(dev, MT_WMM_CWMAX);
265 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(hw_q));
266 val |= cw_max << MT_WMM_CWMAX_SHIFT(hw_q);
267 mt76_wr(dev, MT_WMM_CWMAX, val);
268
269 return 0;
270 }
271
