1 /*
2  * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
3  * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
4  * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2
8  * as published by the Free Software Foundation
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #include "mt76x0.h"
17 #include "trace.h"
18 #include <linux/etherdevice.h>
19 
20 static void
mt76_mac_process_tx_rate(struct ieee80211_tx_rate * txrate,u16 rate,enum nl80211_band band)21 mt76_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate,
22 			 enum nl80211_band band)
23 {
24 	u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
25 
26 	txrate->idx = 0;
27 	txrate->flags = 0;
28 	txrate->count = 1;
29 
30 	switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
31 	case MT_PHY_TYPE_OFDM:
32 		if (band == NL80211_BAND_2GHZ)
33 			idx += 4;
34 
35 		txrate->idx = idx;
36 		return;
37 	case MT_PHY_TYPE_CCK:
38 		if (idx >= 8)
39 			idx -= 8;
40 
41 		txrate->idx = idx;
42 		return;
43 	case MT_PHY_TYPE_HT_GF:
44 		txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD;
45 		/* fall through */
46 	case MT_PHY_TYPE_HT:
47 		txrate->flags |= IEEE80211_TX_RC_MCS;
48 		txrate->idx = idx;
49 		break;
50 	case MT_PHY_TYPE_VHT:
51 		txrate->flags |= IEEE80211_TX_RC_VHT_MCS;
52 		txrate->idx = idx;
53 		break;
54 	default:
55 		WARN_ON(1);
56 		return;
57 	}
58 
59 	switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
60 	case MT_PHY_BW_20:
61 		break;
62 	case MT_PHY_BW_40:
63 		txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
64 		break;
65 	case MT_PHY_BW_80:
66 		txrate->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH;
67 		break;
68 	default:
69 		WARN_ON(1);
70 		return;
71 	}
72 
73 	if (rate & MT_RXWI_RATE_SGI)
74 		txrate->flags |= IEEE80211_TX_RC_SHORT_GI;
75 }
76 
77 static void
mt76_mac_fill_tx_status(struct mt76x0_dev * dev,struct ieee80211_tx_info * info,struct mt76_tx_status * st,int n_frames)78 mt76_mac_fill_tx_status(struct mt76x0_dev *dev, struct ieee80211_tx_info *info,
79 			struct mt76_tx_status *st, int n_frames)
80 {
81 	struct ieee80211_tx_rate *rate = info->status.rates;
82 	int cur_idx, last_rate;
83 	int i;
84 
85 	if (!n_frames)
86 		return;
87 
88 	last_rate = min_t(int, st->retry, IEEE80211_TX_MAX_RATES - 1);
89 	mt76_mac_process_tx_rate(&rate[last_rate], st->rate,
90 				 dev->mt76.chandef.chan->band);
91 	if (last_rate < IEEE80211_TX_MAX_RATES - 1)
92 		rate[last_rate + 1].idx = -1;
93 
94 	cur_idx = rate[last_rate].idx + last_rate;
95 	for (i = 0; i <= last_rate; i++) {
96 		rate[i].flags = rate[last_rate].flags;
97 		rate[i].idx = max_t(int, 0, cur_idx - i);
98 		rate[i].count = 1;
99 	}
100 
101 	rate[last_rate - 1].count = st->retry + 1 - last_rate;
102 
103 	info->status.ampdu_len = n_frames;
104 	info->status.ampdu_ack_len = st->success ? n_frames : 0;
105 
106 	if (st->pktid & MT_TXWI_PKTID_PROBE)
107 		info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
108 
109 	if (st->aggr)
110 		info->flags |= IEEE80211_TX_CTL_AMPDU |
111 			       IEEE80211_TX_STAT_AMPDU;
112 
113 	if (!st->ack_req)
114 		info->flags |= IEEE80211_TX_CTL_NO_ACK;
115 	else if (st->success)
116 		info->flags |= IEEE80211_TX_STAT_ACK;
117 }
118 
mt76x0_mac_tx_rate_val(struct mt76x0_dev * dev,const struct ieee80211_tx_rate * rate,u8 * nss_val)119 u16 mt76x0_mac_tx_rate_val(struct mt76x0_dev *dev,
120 			 const struct ieee80211_tx_rate *rate, u8 *nss_val)
121 {
122 	u16 rateval;
123 	u8 phy, rate_idx;
124 	u8 nss = 1;
125 	u8 bw = 0;
126 
127 	if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
128 		rate_idx = rate->idx;
129 		nss = 1 + (rate->idx >> 4);
130 		phy = MT_PHY_TYPE_VHT;
131 		if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
132 			bw = 2;
133 		else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
134 			bw = 1;
135 	} else if (rate->flags & IEEE80211_TX_RC_MCS) {
136 		rate_idx = rate->idx;
137 		nss = 1 + (rate->idx >> 3);
138 		phy = MT_PHY_TYPE_HT;
139 		if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
140 			phy = MT_PHY_TYPE_HT_GF;
141 		if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
142 			bw = 1;
143 	} else {
144 		const struct ieee80211_rate *r;
145 		int band = dev->mt76.chandef.chan->band;
146 		u16 val;
147 
148 		r = &dev->mt76.hw->wiphy->bands[band]->bitrates[rate->idx];
149 		if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
150 			val = r->hw_value_short;
151 		else
152 			val = r->hw_value;
153 
154 		phy = val >> 8;
155 		rate_idx = val & 0xff;
156 		bw = 0;
157 	}
158 
159 	rateval = FIELD_PREP(MT_RXWI_RATE_INDEX, rate_idx);
160 	rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy);
161 	rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw);
162 	if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
163 		rateval |= MT_RXWI_RATE_SGI;
164 
165 	*nss_val = nss;
166 	return cpu_to_le16(rateval);
167 }
168 
mt76x0_mac_wcid_set_rate(struct mt76x0_dev * dev,struct mt76_wcid * wcid,const struct ieee80211_tx_rate * rate)169 void mt76x0_mac_wcid_set_rate(struct mt76x0_dev *dev, struct mt76_wcid *wcid,
170 			    const struct ieee80211_tx_rate *rate)
171 {
172 	unsigned long flags;
173 
174 	spin_lock_irqsave(&dev->mt76.lock, flags);
175 	wcid->tx_rate = mt76x0_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);
176 	wcid->tx_rate_set = true;
177 	spin_unlock_irqrestore(&dev->mt76.lock, flags);
178 }
179 
mt76x0_mac_fetch_tx_status(struct mt76x0_dev * dev)180 struct mt76_tx_status mt76x0_mac_fetch_tx_status(struct mt76x0_dev *dev)
181 {
182 	struct mt76_tx_status stat = {};
183 	u32 stat2, stat1;
184 
185 	stat2 = mt76_rr(dev, MT_TX_STAT_FIFO_EXT);
186 	stat1 = mt76_rr(dev, MT_TX_STAT_FIFO);
187 
188 	stat.valid = !!(stat1 & MT_TX_STAT_FIFO_VALID);
189 	stat.success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS);
190 	stat.aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR);
191 	stat.ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ);
192 	stat.wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1);
193 	stat.rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1);
194 
195 	stat.retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2);
196 	stat.pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2);
197 
198 	return stat;
199 }
200 
mt76x0_send_tx_status(struct mt76x0_dev * dev,struct mt76_tx_status * stat,u8 * update)201 void mt76x0_send_tx_status(struct mt76x0_dev *dev, struct mt76_tx_status *stat, u8 *update)
202 {
203 	struct ieee80211_tx_info info = {};
204 	struct ieee80211_sta *sta = NULL;
205 	struct mt76_wcid *wcid = NULL;
206 	struct mt76_sta *msta = NULL;
207 
208 	rcu_read_lock();
209 	if (stat->wcid < ARRAY_SIZE(dev->wcid))
210 		wcid = rcu_dereference(dev->wcid[stat->wcid]);
211 
212 	if (wcid) {
213 		void *priv;
214 		priv = msta = container_of(wcid, struct mt76_sta, wcid);
215 		sta = container_of(priv, struct ieee80211_sta, drv_priv);
216 	}
217 
218 	if (msta && stat->aggr) {
219 		u32 stat_val, stat_cache;
220 
221 		stat_val = stat->rate;
222 		stat_val |= ((u32) stat->retry) << 16;
223 		stat_cache = msta->status.rate;
224 		stat_cache |= ((u32) msta->status.retry) << 16;
225 
226 		if (*update == 0 && stat_val == stat_cache &&
227 		    stat->wcid == msta->status.wcid && msta->n_frames < 32) {
228 			msta->n_frames++;
229 			goto out;
230 		}
231 
232 		mt76_mac_fill_tx_status(dev, &info, &msta->status,
233 					msta->n_frames);
234 		msta->status = *stat;
235 		msta->n_frames = 1;
236 		*update = 0;
237 	} else {
238 		mt76_mac_fill_tx_status(dev, &info, stat, 1);
239 		*update = 1;
240 	}
241 
242 	spin_lock_bh(&dev->mac_lock);
243 	ieee80211_tx_status_noskb(dev->mt76.hw, sta, &info);
244 	spin_unlock_bh(&dev->mac_lock);
245 out:
246 	rcu_read_unlock();
247 }
248 
mt76x0_mac_set_protection(struct mt76x0_dev * dev,bool legacy_prot,int ht_mode)249 void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
250 				int ht_mode)
251 {
252 	int mode = ht_mode & IEEE80211_HT_OP_MODE_PROTECTION;
253 	bool non_gf = !!(ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
254 	u32 prot[6];
255 	bool ht_rts[4] = {};
256 	int i;
257 
258 	prot[0] = MT_PROT_NAV_SHORT |
259 		  MT_PROT_TXOP_ALLOW_ALL |
260 		  MT_PROT_RTS_THR_EN;
261 	prot[1] = prot[0];
262 	if (legacy_prot)
263 		prot[1] |= MT_PROT_CTRL_CTS2SELF;
264 
265 	prot[2] = prot[4] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_BW20;
266 	prot[3] = prot[5] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_ALL;
267 
268 	if (legacy_prot) {
269 		prot[2] |= MT_PROT_RATE_CCK_11;
270 		prot[3] |= MT_PROT_RATE_CCK_11;
271 		prot[4] |= MT_PROT_RATE_CCK_11;
272 		prot[5] |= MT_PROT_RATE_CCK_11;
273 	} else {
274 		prot[2] |= MT_PROT_RATE_OFDM_24;
275 		prot[3] |= MT_PROT_RATE_DUP_OFDM_24;
276 		prot[4] |= MT_PROT_RATE_OFDM_24;
277 		prot[5] |= MT_PROT_RATE_DUP_OFDM_24;
278 	}
279 
280 	switch (mode) {
281 	case IEEE80211_HT_OP_MODE_PROTECTION_NONE:
282 		break;
283 
284 	case IEEE80211_HT_OP_MODE_PROTECTION_NONMEMBER:
285 		ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true;
286 		break;
287 
288 	case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
289 		ht_rts[1] = ht_rts[3] = true;
290 		break;
291 
292 	case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
293 		ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true;
294 		break;
295 	}
296 
297 	if (non_gf)
298 		ht_rts[2] = ht_rts[3] = true;
299 
300 	for (i = 0; i < 4; i++)
301 		if (ht_rts[i])
302 			prot[i + 2] |= MT_PROT_CTRL_RTS_CTS;
303 
304 	for (i = 0; i < 6; i++)
305 		mt76_wr(dev, MT_CCK_PROT_CFG + i * 4, prot[i]);
306 }
307 
mt76x0_mac_set_short_preamble(struct mt76x0_dev * dev,bool short_preamb)308 void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb)
309 {
310 	if (short_preamb)
311 		mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
312 	else
313 		mt76_clear(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
314 }
315 
mt76x0_mac_config_tsf(struct mt76x0_dev * dev,bool enable,int interval)316 void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval)
317 {
318 	u32 val = mt76_rr(dev, MT_BEACON_TIME_CFG);
319 
320 	val &= ~(MT_BEACON_TIME_CFG_TIMER_EN |
321 		 MT_BEACON_TIME_CFG_SYNC_MODE |
322 		 MT_BEACON_TIME_CFG_TBTT_EN);
323 
324 	if (!enable) {
325 		mt76_wr(dev, MT_BEACON_TIME_CFG, val);
326 		return;
327 	}
328 
329 	val &= ~MT_BEACON_TIME_CFG_INTVAL;
330 	val |= FIELD_PREP(MT_BEACON_TIME_CFG_INTVAL, interval << 4) |
331 		MT_BEACON_TIME_CFG_TIMER_EN |
332 		MT_BEACON_TIME_CFG_SYNC_MODE |
333 		MT_BEACON_TIME_CFG_TBTT_EN;
334 }
335 
mt76x0_check_mac_err(struct mt76x0_dev * dev)336 static void mt76x0_check_mac_err(struct mt76x0_dev *dev)
337 {
338 	u32 val = mt76_rr(dev, 0x10f4);
339 
340 	if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5))))
341 		return;
342 
343 	dev_err(dev->mt76.dev, "Error: MAC specific condition occurred\n");
344 
345 	mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
346 	udelay(10);
347 	mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
348 }
mt76x0_mac_work(struct work_struct * work)349 void mt76x0_mac_work(struct work_struct *work)
350 {
351 	struct mt76x0_dev *dev = container_of(work, struct mt76x0_dev,
352 					       mac_work.work);
353 	struct {
354 		u32 addr_base;
355 		u32 span;
356 		u64 *stat_base;
357 	} spans[] = {
358 		{ MT_RX_STA_CNT0,	3,	dev->stats.rx_stat },
359 		{ MT_TX_STA_CNT0,	3,	dev->stats.tx_stat },
360 		{ MT_TX_AGG_STAT,	1,	dev->stats.aggr_stat },
361 		{ MT_MPDU_DENSITY_CNT,	1,	dev->stats.zero_len_del },
362 		{ MT_TX_AGG_CNT_BASE0,	8,	&dev->stats.aggr_n[0] },
363 		{ MT_TX_AGG_CNT_BASE1,	8,	&dev->stats.aggr_n[16] },
364 	};
365 	u32 sum, n;
366 	int i, j, k;
367 
368 	/* Note: using MCU_RANDOM_READ is actually slower then reading all the
369 	 *	 registers by hand.  MCU takes ca. 20ms to complete read of 24
370 	 *	 registers while reading them one by one will takes roughly
371 	 *	 24*200us =~ 5ms.
372 	 */
373 
374 	k = 0;
375 	n = 0;
376 	sum = 0;
377 	for (i = 0; i < ARRAY_SIZE(spans); i++)
378 		for (j = 0; j < spans[i].span; j++) {
379 			u32 val = mt76_rr(dev, spans[i].addr_base + j * 4);
380 
381 			spans[i].stat_base[j * 2] += val & 0xffff;
382 			spans[i].stat_base[j * 2 + 1] += val >> 16;
383 
384 			/* Calculate average AMPDU length */
385 			if (spans[i].addr_base != MT_TX_AGG_CNT_BASE0 &&
386 			    spans[i].addr_base != MT_TX_AGG_CNT_BASE1)
387 				continue;
388 
389 			n += (val >> 16) + (val & 0xffff);
390 			sum += (val & 0xffff) * (1 + k * 2) +
391 				(val >> 16) * (2 + k * 2);
392 			k++;
393 		}
394 
395 	atomic_set(&dev->avg_ampdu_len, n ? DIV_ROUND_CLOSEST(sum, n) : 1);
396 
397 	mt76x0_check_mac_err(dev);
398 
399 	ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mac_work, 10 * HZ);
400 }
401 
402 void
mt76x0_mac_wcid_setup(struct mt76x0_dev * dev,u8 idx,u8 vif_idx,u8 * mac)403 mt76x0_mac_wcid_setup(struct mt76x0_dev *dev, u8 idx, u8 vif_idx, u8 *mac)
404 {
405 	u8 zmac[ETH_ALEN] = {};
406 	u32 attr;
407 
408 	attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) |
409 	       FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8));
410 
411 	mt76_wr(dev, MT_WCID_ATTR(idx), attr);
412 
413 	if (mac)
414 		memcpy(zmac, mac, sizeof(zmac));
415 
416 	mt76x0_addr_wr(dev, MT_WCID_ADDR(idx), zmac);
417 }
418 
mt76x0_mac_set_ampdu_factor(struct mt76x0_dev * dev)419 void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev)
420 {
421 	struct ieee80211_sta *sta;
422 	struct mt76_wcid *wcid;
423 	void *msta;
424 	u8 min_factor = 3;
425 	int i;
426 
427 	rcu_read_lock();
428 	for (i = 0; i < ARRAY_SIZE(dev->wcid); i++) {
429 		wcid = rcu_dereference(dev->wcid[i]);
430 		if (!wcid)
431 			continue;
432 
433 		msta = container_of(wcid, struct mt76_sta, wcid);
434 		sta = container_of(msta, struct ieee80211_sta, drv_priv);
435 
436 		min_factor = min(min_factor, sta->ht_cap.ampdu_factor);
437 	}
438 	rcu_read_unlock();
439 
440 	mt76_wr(dev, MT_MAX_LEN_CFG, 0xa0fff |
441 		   FIELD_PREP(MT_MAX_LEN_CFG_AMPDU, min_factor));
442 }
443 
444 static void
mt76_mac_process_rate(struct ieee80211_rx_status * status,u16 rate)445 mt76_mac_process_rate(struct ieee80211_rx_status *status, u16 rate)
446 {
447 	u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
448 
449 	switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
450 	case MT_PHY_TYPE_OFDM:
451 		if (idx >= 8)
452 			idx = 0;
453 
454 		if (status->band == NL80211_BAND_2GHZ)
455 			idx += 4;
456 
457 		status->rate_idx = idx;
458 		return;
459 	case MT_PHY_TYPE_CCK:
460 		if (idx >= 8) {
461 			idx -= 8;
462 			status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
463 		}
464 
465 		if (idx >= 4)
466 			idx = 0;
467 
468 		status->rate_idx = idx;
469 		return;
470 	case MT_PHY_TYPE_HT_GF:
471 		status->enc_flags |= RX_ENC_FLAG_HT_GF;
472 		/* fall through */
473 	case MT_PHY_TYPE_HT:
474 		status->encoding = RX_ENC_HT;
475 		status->rate_idx = idx;
476 		break;
477 	case MT_PHY_TYPE_VHT:
478 		status->encoding = RX_ENC_VHT;
479 		status->rate_idx = FIELD_GET(MT_RATE_INDEX_VHT_IDX, idx);
480 		status->nss = FIELD_GET(MT_RATE_INDEX_VHT_NSS, idx) + 1;
481 		break;
482 	default:
483 		WARN_ON(1);
484 		return;
485 	}
486 
487 	if (rate & MT_RXWI_RATE_LDPC)
488 		status->enc_flags |= RX_ENC_FLAG_LDPC;
489 
490 	if (rate & MT_RXWI_RATE_SGI)
491 		status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
492 
493 	if (rate & MT_RXWI_RATE_STBC)
494 		status->enc_flags |= 1 << RX_ENC_FLAG_STBC_SHIFT;
495 
496 	switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
497 	case MT_PHY_BW_20:
498 		break;
499 	case MT_PHY_BW_40:
500 		status->bw = RATE_INFO_BW_40;
501 		break;
502 	case MT_PHY_BW_80:
503 		status->bw = RATE_INFO_BW_80;
504 		break;
505 	default:
506 		WARN_ON(1);
507 		break;
508 	}
509 }
510 
511 static void
mt76x0_rx_monitor_beacon(struct mt76x0_dev * dev,struct mt76x0_rxwi * rxwi,u16 rate,int rssi)512 mt76x0_rx_monitor_beacon(struct mt76x0_dev *dev, struct mt76x0_rxwi *rxwi,
513 			  u16 rate, int rssi)
514 {
515 	dev->bcn_phy_mode = FIELD_GET(MT_RXWI_RATE_PHY, rate);
516 	dev->avg_rssi = ((dev->avg_rssi * 15) / 16 + (rssi << 8)) / 256;
517 }
518 
519 static int
mt76x0_rx_is_our_beacon(struct mt76x0_dev * dev,u8 * data)520 mt76x0_rx_is_our_beacon(struct mt76x0_dev *dev, u8 *data)
521 {
522 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)data;
523 
524 	return ieee80211_is_beacon(hdr->frame_control) &&
525 		ether_addr_equal(hdr->addr2, dev->ap_bssid);
526 }
527 
mt76x0_mac_process_rx(struct mt76x0_dev * dev,struct sk_buff * skb,u8 * data,void * rxi)528 u32 mt76x0_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,
529 			u8 *data, void *rxi)
530 {
531 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
532 	struct mt76x0_rxwi *rxwi = rxi;
533 	u32 len, ctl = le32_to_cpu(rxwi->ctl);
534 	u16 rate = le16_to_cpu(rxwi->rate);
535 	int rssi;
536 
537 	len = FIELD_GET(MT_RXWI_CTL_MPDU_LEN, ctl);
538 	if (WARN_ON(len < 10))
539 		return 0;
540 
541 	if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_DECRYPT)) {
542 		status->flag |= RX_FLAG_DECRYPTED;
543 		status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
544 	}
545 
546 	status->chains = BIT(0);
547 	rssi = mt76x0_phy_get_rssi(dev, rxwi);
548 	status->chain_signal[0] = status->signal = rssi;
549 	status->freq = dev->mt76.chandef.chan->center_freq;
550 	status->band = dev->mt76.chandef.chan->band;
551 
552 	mt76_mac_process_rate(status, rate);
553 
554 	spin_lock_bh(&dev->con_mon_lock);
555 	if (mt76x0_rx_is_our_beacon(dev, data)) {
556 		mt76x0_rx_monitor_beacon(dev, rxwi, rate, rssi);
557 	} else if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_U2M)) {
558 		if (dev->avg_rssi == 0)
559 			dev->avg_rssi = rssi;
560 		else
561 			dev->avg_rssi = (dev->avg_rssi * 15) / 16 + rssi / 16;
562 
563 	}
564 	spin_unlock_bh(&dev->con_mon_lock);
565 
566 	return len;
567 }
568 
569 static enum mt76_cipher_type
mt76_mac_get_key_info(struct ieee80211_key_conf * key,u8 * key_data)570 mt76_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data)
571 {
572 	memset(key_data, 0, 32);
573 	if (!key)
574 		return MT_CIPHER_NONE;
575 
576 	if (key->keylen > 32)
577 		return MT_CIPHER_NONE;
578 
579 	memcpy(key_data, key->key, key->keylen);
580 
581 	switch (key->cipher) {
582 	case WLAN_CIPHER_SUITE_WEP40:
583 		return MT_CIPHER_WEP40;
584 	case WLAN_CIPHER_SUITE_WEP104:
585 		return MT_CIPHER_WEP104;
586 	case WLAN_CIPHER_SUITE_TKIP:
587 		return MT_CIPHER_TKIP;
588 	case WLAN_CIPHER_SUITE_CCMP:
589 		return MT_CIPHER_AES_CCMP;
590 	default:
591 		return MT_CIPHER_NONE;
592 	}
593 }
594 
mt76x0_mac_wcid_set_key(struct mt76x0_dev * dev,u8 idx,struct ieee80211_key_conf * key)595 int mt76x0_mac_wcid_set_key(struct mt76x0_dev *dev, u8 idx,
596 			  struct ieee80211_key_conf *key)
597 {
598 	enum mt76_cipher_type cipher;
599 	u8 key_data[32];
600 	u8 iv_data[8];
601 	u32 val;
602 
603 	cipher = mt76_mac_get_key_info(key, key_data);
604 	if (cipher == MT_CIPHER_NONE && key)
605 		return -EINVAL;
606 
607 	trace_mt76x0_set_key(&dev->mt76, idx);
608 
609 	mt76_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data));
610 
611 	memset(iv_data, 0, sizeof(iv_data));
612 	if (key) {
613 		iv_data[3] = key->keyidx << 6;
614 		if (cipher >= MT_CIPHER_TKIP) {
615 			/* Note: start with 1 to comply with spec,
616 			 *	 (see comment on common/cmm_wpa.c:4291).
617 			 */
618 			iv_data[0] |= 1;
619 			iv_data[3] |= 0x20;
620 		}
621 	}
622 	mt76_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data));
623 
624 	val = mt76_rr(dev, MT_WCID_ATTR(idx));
625 	val &= ~MT_WCID_ATTR_PKEY_MODE & ~MT_WCID_ATTR_PKEY_MODE_EXT;
626 	val |= FIELD_PREP(MT_WCID_ATTR_PKEY_MODE, cipher & 7) |
627 	       FIELD_PREP(MT_WCID_ATTR_PKEY_MODE_EXT, cipher >> 3);
628 	val &= ~MT_WCID_ATTR_PAIRWISE;
629 	val |= MT_WCID_ATTR_PAIRWISE *
630 		!!(key && key->flags & IEEE80211_KEY_FLAG_PAIRWISE);
631 	mt76_wr(dev, MT_WCID_ATTR(idx), val);
632 
633 	return 0;
634 }
635 
mt76x0_mac_shared_key_setup(struct mt76x0_dev * dev,u8 vif_idx,u8 key_idx,struct ieee80211_key_conf * key)636 int mt76x0_mac_shared_key_setup(struct mt76x0_dev *dev, u8 vif_idx, u8 key_idx,
637 			      struct ieee80211_key_conf *key)
638 {
639 	enum mt76_cipher_type cipher;
640 	u8 key_data[32];
641 	u32 val;
642 
643 	cipher = mt76_mac_get_key_info(key, key_data);
644 	if (cipher == MT_CIPHER_NONE && key)
645 		return -EINVAL;
646 
647 	trace_mt76x0_set_shared_key(&dev->mt76, vif_idx, key_idx);
648 
649 	mt76_wr_copy(dev, MT_SKEY(vif_idx, key_idx),
650 			key_data, sizeof(key_data));
651 
652 	val = mt76_rr(dev, MT_SKEY_MODE(vif_idx));
653 	val &= ~(MT_SKEY_MODE_MASK << MT_SKEY_MODE_SHIFT(vif_idx, key_idx));
654 	val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx);
655 	mt76_wr(dev, MT_SKEY_MODE(vif_idx), val);
656 
657 	return 0;
658 }
659