1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2019 MediaTek Inc.
3 *
4 * Author: Roy Luo <royluo@google.com>
5 * Ryder Lee <ryder.lee@mediatek.com>
6 * Felix Fietkau <nbd@nbd.name>
7 * Lorenzo Bianconi <lorenzo@kernel.org>
8 */
9
10 #include <linux/etherdevice.h>
11 #include <linux/hwmon.h>
12 #include <linux/hwmon-sysfs.h>
13 #include "mt7615.h"
14 #include "mac.h"
15 #include "mcu.h"
16 #include "eeprom.h"
17
mt7615_thermal_show_temp(struct device * dev,struct device_attribute * attr,char * buf)18 static ssize_t mt7615_thermal_show_temp(struct device *dev,
19 struct device_attribute *attr,
20 char *buf)
21 {
22 struct mt7615_dev *mdev = dev_get_drvdata(dev);
23 int temperature;
24
25 if (!mt7615_wait_for_mcu_init(mdev))
26 return 0;
27
28 mt7615_mutex_acquire(mdev);
29 temperature = mt7615_mcu_get_temperature(mdev);
30 mt7615_mutex_release(mdev);
31
32 if (temperature < 0)
33 return temperature;
34
35 /* display in millidegree celcius */
36 return sprintf(buf, "%u\n", temperature * 1000);
37 }
38
39 static SENSOR_DEVICE_ATTR(temp1_input, 0444, mt7615_thermal_show_temp,
40 NULL, 0);
41
42 static struct attribute *mt7615_hwmon_attrs[] = {
43 &sensor_dev_attr_temp1_input.dev_attr.attr,
44 NULL,
45 };
46 ATTRIBUTE_GROUPS(mt7615_hwmon);
47
mt7615_thermal_init(struct mt7615_dev * dev)48 int mt7615_thermal_init(struct mt7615_dev *dev)
49 {
50 struct wiphy *wiphy = mt76_hw(dev)->wiphy;
51 struct device *hwmon;
52 const char *name;
53
54 if (!IS_REACHABLE(CONFIG_HWMON))
55 return 0;
56
57 name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7615_%s",
58 wiphy_name(wiphy));
59 hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, dev,
60 mt7615_hwmon_groups);
61 if (IS_ERR(hwmon))
62 return PTR_ERR(hwmon);
63
64 return 0;
65 }
66 EXPORT_SYMBOL_GPL(mt7615_thermal_init);
67
68 static void
mt7615_phy_init(struct mt7615_dev * dev)69 mt7615_phy_init(struct mt7615_dev *dev)
70 {
71 /* disable rf low power beacon mode */
72 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
73 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
74 }
75
76 static void
mt7615_init_mac_chain(struct mt7615_dev * dev,int chain)77 mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
78 {
79 u32 val;
80
81 if (!chain)
82 val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
83 else
84 val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
85
86 /* enable band 0/1 clk */
87 mt76_set(dev, MT_CFG_CCR, val);
88
89 mt76_rmw(dev, MT_TMAC_TRCR(chain),
90 MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
91 FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
92 FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
93
94 mt76_wr(dev, MT_AGG_ACR(chain),
95 MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
96 FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
97 FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
98
99 mt76_wr(dev, MT_AGG_ARUCR(chain),
100 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
101 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
102 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
103 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
104 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
105 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
106 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
107 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
108
109 mt76_wr(dev, MT_AGG_ARDCR(chain),
110 FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
111 FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
112 FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
113 FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
114 FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
115 FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
116 FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
117 FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
118
119 mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS);
120 if (!mt7615_firmware_offload(dev)) {
121 u32 mask, set;
122
123 mask = MT_DMA_RCFR0_MCU_RX_MGMT |
124 MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
125 MT_DMA_RCFR0_MCU_RX_CTL_BAR |
126 MT_DMA_RCFR0_MCU_RX_BYPASS |
127 MT_DMA_RCFR0_RX_DROPPED_UCAST |
128 MT_DMA_RCFR0_RX_DROPPED_MCAST;
129 set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
130 FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
131 mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
132 }
133 }
134
135 static void
mt7615_mac_init(struct mt7615_dev * dev)136 mt7615_mac_init(struct mt7615_dev *dev)
137 {
138 int i;
139
140 mt7615_init_mac_chain(dev, 0);
141
142 mt76_rmw_field(dev, MT_TMAC_CTCR0,
143 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
144 mt76_rmw_field(dev, MT_TMAC_CTCR0,
145 MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
146 mt76_rmw(dev, MT_TMAC_CTCR0,
147 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
148 MT_TMAC_CTCR0_INS_DDLMT_EN,
149 MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
150 MT_TMAC_CTCR0_INS_DDLMT_EN);
151
152 mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0);
153 mt7615_mac_set_scs(&dev->phy, true);
154
155 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
156 MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
157
158 mt76_wr(dev, MT_AGG_ARCR,
159 FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
160 MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
161 FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
162 FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
163
164 for (i = 0; i < MT7615_WTBL_SIZE; i++)
165 mt7615_mac_wtbl_update(dev, i,
166 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
167
168 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
169 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
170
171 mt76_wr(dev, MT_DMA_DCR0,
172 FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
173 MT_DMA_DCR0_RX_VEC_DROP | MT_DMA_DCR0_DAMSDU_EN |
174 MT_DMA_DCR0_RX_HDR_TRANS_EN);
175 /* disable TDLS filtering */
176 mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN);
177 mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
178 if (is_mt7663(&dev->mt76)) {
179 mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
180 mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
181 } else {
182 mt7615_init_mac_chain(dev, 1);
183 }
184 mt7615_mcu_set_rx_hdr_trans_blacklist(dev);
185 }
186
187 static void
mt7615_check_offload_capability(struct mt7615_dev * dev)188 mt7615_check_offload_capability(struct mt7615_dev *dev)
189 {
190 struct ieee80211_hw *hw = mt76_hw(dev);
191 struct wiphy *wiphy = hw->wiphy;
192
193 if (mt7615_firmware_offload(dev)) {
194 ieee80211_hw_set(hw, SUPPORTS_PS);
195 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
196
197 wiphy->flags &= ~WIPHY_FLAG_4ADDR_STATION;
198 wiphy->max_remain_on_channel_duration = 5000;
199 wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
200 NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR |
201 WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
202 NL80211_FEATURE_P2P_GO_CTWIN |
203 NL80211_FEATURE_P2P_GO_OPPPS;
204 } else {
205 dev->ops->hw_scan = NULL;
206 dev->ops->cancel_hw_scan = NULL;
207 dev->ops->sched_scan_start = NULL;
208 dev->ops->sched_scan_stop = NULL;
209 dev->ops->set_rekey_data = NULL;
210 dev->ops->remain_on_channel = NULL;
211 dev->ops->cancel_remain_on_channel = NULL;
212
213 wiphy->max_sched_scan_plan_interval = 0;
214 wiphy->max_sched_scan_ie_len = 0;
215 wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
216 wiphy->max_sched_scan_ssids = 0;
217 wiphy->max_match_sets = 0;
218 wiphy->max_sched_scan_reqs = 0;
219 }
220 }
221
mt7615_wait_for_mcu_init(struct mt7615_dev * dev)222 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
223 {
224 flush_work(&dev->mcu_work);
225
226 return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
227 }
228 EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init);
229
230 static const struct ieee80211_iface_limit if_limits[] = {
231 {
232 .max = 1,
233 .types = BIT(NL80211_IFTYPE_ADHOC)
234 }, {
235 .max = MT7615_MAX_INTERFACES,
236 .types = BIT(NL80211_IFTYPE_AP) |
237 #ifdef CONFIG_MAC80211_MESH
238 BIT(NL80211_IFTYPE_MESH_POINT) |
239 #endif
240 BIT(NL80211_IFTYPE_P2P_CLIENT) |
241 BIT(NL80211_IFTYPE_P2P_GO) |
242 BIT(NL80211_IFTYPE_STATION)
243 }
244 };
245
246 static const struct ieee80211_iface_combination if_comb_radar[] = {
247 {
248 .limits = if_limits,
249 .n_limits = ARRAY_SIZE(if_limits),
250 .max_interfaces = MT7615_MAX_INTERFACES,
251 .num_different_channels = 1,
252 .beacon_int_infra_match = true,
253 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
254 BIT(NL80211_CHAN_WIDTH_20) |
255 BIT(NL80211_CHAN_WIDTH_40) |
256 BIT(NL80211_CHAN_WIDTH_80) |
257 BIT(NL80211_CHAN_WIDTH_160) |
258 BIT(NL80211_CHAN_WIDTH_80P80),
259 }
260 };
261
262 static const struct ieee80211_iface_combination if_comb[] = {
263 {
264 .limits = if_limits,
265 .n_limits = ARRAY_SIZE(if_limits),
266 .max_interfaces = MT7615_MAX_INTERFACES,
267 .num_different_channels = 1,
268 .beacon_int_infra_match = true,
269 }
270 };
271
mt7615_init_txpower(struct mt7615_dev * dev,struct ieee80211_supported_band * sband)272 void mt7615_init_txpower(struct mt7615_dev *dev,
273 struct ieee80211_supported_band *sband)
274 {
275 int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
276 int delta_idx, delta = mt76_tx_power_nss_delta(n_chains);
277 u8 *eep = (u8 *)dev->mt76.eeprom.data;
278 enum nl80211_band band = sband->band;
279 struct mt76_power_limits limits;
280 u8 rate_val;
281
282 delta_idx = mt7615_eeprom_get_power_delta_index(dev, band);
283 rate_val = eep[delta_idx];
284 if ((rate_val & ~MT_EE_RATE_POWER_MASK) ==
285 (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN))
286 delta += rate_val & MT_EE_RATE_POWER_MASK;
287
288 if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band))
289 target_chains = 1;
290 else
291 target_chains = n_chains;
292
293 for (i = 0; i < sband->n_channels; i++) {
294 struct ieee80211_channel *chan = &sband->channels[i];
295 u8 target_power = 0;
296 int j;
297
298 for (j = 0; j < target_chains; j++) {
299 int index;
300
301 index = mt7615_eeprom_get_target_power_index(dev, chan, j);
302 if (index < 0)
303 continue;
304
305 target_power = max(target_power, eep[index]);
306 }
307
308 target_power = mt76_get_rate_power_limits(&dev->mphy, chan,
309 &limits,
310 target_power);
311 target_power += delta;
312 target_power = DIV_ROUND_UP(target_power, 2);
313 chan->max_power = min_t(int, chan->max_reg_power,
314 target_power);
315 chan->orig_mpwr = target_power;
316 }
317 }
318 EXPORT_SYMBOL_GPL(mt7615_init_txpower);
319
mt7615_init_work(struct mt7615_dev * dev)320 void mt7615_init_work(struct mt7615_dev *dev)
321 {
322 mt7615_mcu_set_eeprom(dev);
323 mt7615_mac_init(dev);
324 mt7615_phy_init(dev);
325 mt7615_mcu_del_wtbl_all(dev);
326 mt7615_check_offload_capability(dev);
327 }
328 EXPORT_SYMBOL_GPL(mt7615_init_work);
329
330 static void
mt7615_regd_notifier(struct wiphy * wiphy,struct regulatory_request * request)331 mt7615_regd_notifier(struct wiphy *wiphy,
332 struct regulatory_request *request)
333 {
334 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
335 struct mt7615_dev *dev = mt7615_hw_dev(hw);
336 struct mt76_phy *mphy = hw->priv;
337 struct mt7615_phy *phy = mphy->priv;
338 struct cfg80211_chan_def *chandef = &mphy->chandef;
339
340 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
341 dev->mt76.region = request->dfs_region;
342
343 mt7615_init_txpower(dev, &mphy->sband_2g.sband);
344 mt7615_init_txpower(dev, &mphy->sband_5g.sband);
345
346 mt7615_mutex_acquire(dev);
347
348 if (chandef->chan->flags & IEEE80211_CHAN_RADAR)
349 mt7615_dfs_init_radar_detector(phy);
350
351 if (mt7615_firmware_offload(phy->dev)) {
352 mt76_connac_mcu_set_channel_domain(mphy);
353 mt76_connac_mcu_set_rate_txpower(mphy);
354 }
355
356 mt7615_mutex_release(dev);
357 }
358
359 static void
mt7615_init_wiphy(struct ieee80211_hw * hw)360 mt7615_init_wiphy(struct ieee80211_hw *hw)
361 {
362 struct mt7615_phy *phy = mt7615_hw_phy(hw);
363 struct wiphy *wiphy = hw->wiphy;
364
365 hw->queues = 4;
366 hw->max_rates = 3;
367 hw->max_report_rates = 7;
368 hw->max_rate_tries = 11;
369 hw->netdev_features = NETIF_F_RXCSUM;
370
371 hw->radiotap_timestamp.units_pos =
372 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
373
374 phy->slottime = 9;
375
376 hw->sta_data_size = sizeof(struct mt7615_sta);
377 hw->vif_data_size = sizeof(struct mt7615_vif);
378
379 if (is_mt7663(&phy->dev->mt76)) {
380 wiphy->iface_combinations = if_comb;
381 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
382 } else {
383 wiphy->iface_combinations = if_comb_radar;
384 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_radar);
385 }
386 wiphy->reg_notifier = mt7615_regd_notifier;
387
388 wiphy->max_sched_scan_plan_interval =
389 MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL;
390 wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
391 wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN;
392 wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID;
393 wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH;
394 wiphy->max_sched_scan_reqs = 1;
395 wiphy->max_scan_ssids = 4;
396
397 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
398 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
399 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
400 if (!is_mt7622(&phy->dev->mt76))
401 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER);
402
403 ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
404 ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
405 ieee80211_hw_set(hw, WANT_MONITOR_VIF);
406 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
407 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
408
409 if (is_mt7615(&phy->dev->mt76))
410 hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
411 else
412 hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
413
414 phy->mt76->sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
415 phy->mt76->sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
416 phy->mt76->sband_5g.sband.vht_cap.cap |=
417 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
418 }
419
420 static void
mt7615_cap_dbdc_enable(struct mt7615_dev * dev)421 mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
422 {
423 dev->mphy.sband_5g.sband.vht_cap.cap &=
424 ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
425 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
426 if (dev->chainmask == 0xf)
427 dev->mphy.antenna_mask = dev->chainmask >> 2;
428 else
429 dev->mphy.antenna_mask = dev->chainmask >> 1;
430 dev->mphy.chainmask = dev->mphy.antenna_mask;
431 dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask;
432 dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask;
433 mt76_set_stream_caps(&dev->mphy, true);
434 }
435
436 static void
mt7615_cap_dbdc_disable(struct mt7615_dev * dev)437 mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
438 {
439 dev->mphy.sband_5g.sband.vht_cap.cap |=
440 IEEE80211_VHT_CAP_SHORT_GI_160 |
441 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
442 dev->mphy.antenna_mask = dev->chainmask;
443 dev->mphy.chainmask = dev->chainmask;
444 dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
445 dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
446 mt76_set_stream_caps(&dev->mphy, true);
447 }
448
mt7615_reg_map(struct mt7615_dev * dev,u32 addr)449 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr)
450 {
451 u32 base, offset;
452
453 if (is_mt7663(&dev->mt76)) {
454 base = addr & MT7663_MCU_PCIE_REMAP_2_BASE;
455 offset = addr & MT7663_MCU_PCIE_REMAP_2_OFFSET;
456 } else {
457 base = addr & MT_MCU_PCIE_REMAP_2_BASE;
458 offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET;
459 }
460 mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base);
461
462 return MT_PCIE_REMAP_BASE_2 + offset;
463 }
464 EXPORT_SYMBOL_GPL(mt7615_reg_map);
465
466 static void
mt7615_led_set_config(struct led_classdev * led_cdev,u8 delay_on,u8 delay_off)467 mt7615_led_set_config(struct led_classdev *led_cdev,
468 u8 delay_on, u8 delay_off)
469 {
470 struct mt7615_dev *dev;
471 struct mt76_phy *mphy;
472 u32 val, addr;
473 u8 index;
474
475 mphy = container_of(led_cdev, struct mt76_phy, leds.cdev);
476 dev = container_of(mphy->dev, struct mt7615_dev, mt76);
477
478 if (!mt76_connac_pm_ref(mphy, &dev->pm))
479 return;
480
481 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |
482 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
483 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
484
485 index = dev->dbdc_support ? mphy->band_idx : mphy->leds.pin;
486 addr = mt7615_reg_map(dev, MT_LED_STATUS_0(index));
487 mt76_wr(dev, addr, val);
488 addr = mt7615_reg_map(dev, MT_LED_STATUS_1(index));
489 mt76_wr(dev, addr, val);
490
491 val = MT_LED_CTRL_REPLAY(index) | MT_LED_CTRL_KICK(index);
492 if (dev->mphy.leds.al)
493 val |= MT_LED_CTRL_POLARITY(index);
494 if (mphy->band_idx)
495 val |= MT_LED_CTRL_BAND(index);
496
497 addr = mt7615_reg_map(dev, MT_LED_CTRL);
498 mt76_wr(dev, addr, val);
499
500 mt76_connac_pm_unref(mphy, &dev->pm);
501 }
502
mt7615_led_set_blink(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)503 int mt7615_led_set_blink(struct led_classdev *led_cdev,
504 unsigned long *delay_on,
505 unsigned long *delay_off)
506 {
507 u8 delta_on, delta_off;
508
509 delta_off = max_t(u8, *delay_off / 10, 1);
510 delta_on = max_t(u8, *delay_on / 10, 1);
511
512 mt7615_led_set_config(led_cdev, delta_on, delta_off);
513
514 return 0;
515 }
516 EXPORT_SYMBOL_GPL(mt7615_led_set_blink);
517
mt7615_led_set_brightness(struct led_classdev * led_cdev,enum led_brightness brightness)518 void mt7615_led_set_brightness(struct led_classdev *led_cdev,
519 enum led_brightness brightness)
520 {
521 if (!brightness)
522 mt7615_led_set_config(led_cdev, 0, 0xff);
523 else
524 mt7615_led_set_config(led_cdev, 0xff, 0);
525 }
526 EXPORT_SYMBOL_GPL(mt7615_led_set_brightness);
527
mt7615_register_ext_phy(struct mt7615_dev * dev)528 int mt7615_register_ext_phy(struct mt7615_dev *dev)
529 {
530 struct mt7615_phy *phy = mt7615_ext_phy(dev);
531 struct mt76_phy *mphy;
532 int i, ret;
533
534 if (!is_mt7615(&dev->mt76))
535 return -EOPNOTSUPP;
536
537 if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
538 return -EINVAL;
539
540 if (phy)
541 return 0;
542
543 mt7615_cap_dbdc_enable(dev);
544 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops, MT_BAND1);
545 if (!mphy)
546 return -ENOMEM;
547
548 phy = mphy->priv;
549 phy->dev = dev;
550 phy->mt76 = mphy;
551 mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask;
552 mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1;
553 mt7615_init_wiphy(mphy->hw);
554
555 INIT_DELAYED_WORK(&mphy->mac_work, mt7615_mac_work);
556 INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
557 skb_queue_head_init(&phy->scan_event_list);
558
559 INIT_WORK(&phy->roc_work, mt7615_roc_work);
560 timer_setup(&phy->roc_timer, mt7615_roc_timer, 0);
561 init_waitqueue_head(&phy->roc_wait);
562
563 mt7615_mac_set_scs(phy, true);
564
565 /*
566 * Make the secondary PHY MAC address local without overlapping with
567 * the usual MAC address allocation scheme on multiple virtual interfaces
568 */
569 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
570 ETH_ALEN);
571 mphy->macaddr[0] |= 2;
572 mphy->macaddr[0] ^= BIT(7);
573 mt76_eeprom_override(mphy);
574
575 /* second phy can only handle 5 GHz */
576 mphy->cap.has_5ghz = true;
577
578 /* mt7615 second phy shares the same hw queues with the primary one */
579 for (i = 0; i <= MT_TXQ_PSD ; i++)
580 mphy->q_tx[i] = dev->mphy.q_tx[i];
581
582 /* init led callbacks */
583 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
584 mphy->leds.cdev.brightness_set = mt7615_led_set_brightness;
585 mphy->leds.cdev.blink_set = mt7615_led_set_blink;
586 }
587
588 ret = mt76_register_phy(mphy, true, mt76_rates,
589 ARRAY_SIZE(mt76_rates));
590 if (ret)
591 ieee80211_free_hw(mphy->hw);
592
593 return ret;
594 }
595 EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
596
mt7615_unregister_ext_phy(struct mt7615_dev * dev)597 void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
598 {
599 struct mt7615_phy *phy = mt7615_ext_phy(dev);
600 struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
601
602 if (!phy)
603 return;
604
605 mt7615_cap_dbdc_disable(dev);
606 mt76_unregister_phy(mphy);
607 ieee80211_free_hw(mphy->hw);
608 }
609 EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy);
610
mt7615_init_device(struct mt7615_dev * dev)611 void mt7615_init_device(struct mt7615_dev *dev)
612 {
613 struct ieee80211_hw *hw = mt76_hw(dev);
614
615 dev->phy.dev = dev;
616 dev->phy.mt76 = &dev->mt76.phy;
617 dev->mt76.phy.priv = &dev->phy;
618 dev->mt76.tx_worker.fn = mt7615_tx_worker;
619
620 INIT_DELAYED_WORK(&dev->pm.ps_work, mt7615_pm_power_save_work);
621 INIT_WORK(&dev->pm.wake_work, mt7615_pm_wake_work);
622 spin_lock_init(&dev->pm.wake.lock);
623 mutex_init(&dev->pm.mutex);
624 init_waitqueue_head(&dev->pm.wait);
625 spin_lock_init(&dev->pm.txq_lock);
626 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7615_mac_work);
627 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
628 INIT_DELAYED_WORK(&dev->coredump.work, mt7615_coredump_work);
629 skb_queue_head_init(&dev->phy.scan_event_list);
630 skb_queue_head_init(&dev->coredump.msg_list);
631 init_waitqueue_head(&dev->reset_wait);
632 init_waitqueue_head(&dev->phy.roc_wait);
633
634 INIT_WORK(&dev->phy.roc_work, mt7615_roc_work);
635 timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0);
636
637 mt7615_init_wiphy(hw);
638 dev->pm.idle_timeout = MT7615_PM_TIMEOUT;
639 dev->pm.stats.last_wake_event = jiffies;
640 dev->pm.stats.last_doze_event = jiffies;
641 mt7615_cap_dbdc_disable(dev);
642
643 #ifdef CONFIG_NL80211_TESTMODE
644 dev->mt76.test_ops = &mt7615_testmode_ops;
645 #endif
646 }
647 EXPORT_SYMBOL_GPL(mt7615_init_device);
648
