1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * F81532/F81534 USB to Serial Ports Bridge
4  *
5  * F81532 => 2 Serial Ports
6  * F81534 => 4 Serial Ports
7  *
8  * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
9  * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
10  * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
11  *
12  * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
13  * for all serial port TX and 1 endpoint bulk-in for all serial port read in
14  * (Read Data/MSR/LSR).
15  *
16  * Write URB is fixed with 512bytes, per serial port used 128Bytes.
17  * It can be described by f81534_prepare_write_buffer()
18  *
19  * Read URB is 512Bytes max, per serial port used 128Bytes.
20  * It can be described by f81534_process_read_urb() and maybe received with
21  * 128x1,2,3,4 bytes.
22  *
23  */
24 #include <linux/slab.h>
25 #include <linux/tty.h>
26 #include <linux/tty_flip.h>
27 #include <linux/usb.h>
28 #include <linux/usb/serial.h>
29 #include <linux/serial_reg.h>
30 #include <linux/module.h>
31 #include <linux/uaccess.h>
32 
33 /* Serial Port register Address */
34 #define F81534_UART_BASE_ADDRESS	0x1200
35 #define F81534_UART_OFFSET		0x10
36 #define F81534_DIVISOR_LSB_REG		(0x00 + F81534_UART_BASE_ADDRESS)
37 #define F81534_DIVISOR_MSB_REG		(0x01 + F81534_UART_BASE_ADDRESS)
38 #define F81534_INTERRUPT_ENABLE_REG	(0x01 + F81534_UART_BASE_ADDRESS)
39 #define F81534_FIFO_CONTROL_REG		(0x02 + F81534_UART_BASE_ADDRESS)
40 #define F81534_LINE_CONTROL_REG		(0x03 + F81534_UART_BASE_ADDRESS)
41 #define F81534_MODEM_CONTROL_REG	(0x04 + F81534_UART_BASE_ADDRESS)
42 #define F81534_LINE_STATUS_REG		(0x05 + F81534_UART_BASE_ADDRESS)
43 #define F81534_MODEM_STATUS_REG		(0x06 + F81534_UART_BASE_ADDRESS)
44 #define F81534_CLOCK_REG		(0x08 + F81534_UART_BASE_ADDRESS)
45 #define F81534_CONFIG1_REG		(0x09 + F81534_UART_BASE_ADDRESS)
46 
47 #define F81534_DEF_CONF_ADDRESS_START	0x3000
48 #define F81534_DEF_CONF_SIZE		8
49 
50 #define F81534_CUSTOM_ADDRESS_START	0x2f00
51 #define F81534_CUSTOM_DATA_SIZE		0x10
52 #define F81534_CUSTOM_NO_CUSTOM_DATA	0xff
53 #define F81534_CUSTOM_VALID_TOKEN	0xf0
54 #define F81534_CONF_OFFSET		1
55 #define F81534_CONF_GPIO_OFFSET		4
56 
57 #define F81534_MAX_DATA_BLOCK		64
58 #define F81534_MAX_BUS_RETRY		20
59 
60 /* Default URB timeout for USB operations */
61 #define F81534_USB_MAX_RETRY		10
62 #define F81534_USB_TIMEOUT		2000
63 #define F81534_SET_GET_REGISTER		0xA0
64 
65 #define F81534_NUM_PORT			4
66 #define F81534_UNUSED_PORT		0xff
67 #define F81534_WRITE_BUFFER_SIZE	512
68 
69 #define DRIVER_DESC			"Fintek F81532/F81534"
70 #define FINTEK_VENDOR_ID_1		0x1934
71 #define FINTEK_VENDOR_ID_2		0x2C42
72 #define FINTEK_DEVICE_ID		0x1202
73 #define F81534_MAX_TX_SIZE		124
74 #define F81534_MAX_RX_SIZE		124
75 #define F81534_RECEIVE_BLOCK_SIZE	128
76 #define F81534_MAX_RECEIVE_BLOCK_SIZE	512
77 
78 #define F81534_TOKEN_RECEIVE		0x01
79 #define F81534_TOKEN_WRITE		0x02
80 #define F81534_TOKEN_TX_EMPTY		0x03
81 #define F81534_TOKEN_MSR_CHANGE		0x04
82 
83 /*
84  * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
85  * idle if we performed any command.
86  *
87  * SPI Bus status register: F81534_BUS_REG_STATUS
88  *	Bit 0/1	: BUSY
89  *	Bit 2	: IDLE
90  */
91 #define F81534_BUS_BUSY			(BIT(0) | BIT(1))
92 #define F81534_BUS_IDLE			BIT(2)
93 #define F81534_BUS_READ_DATA		0x1004
94 #define F81534_BUS_REG_STATUS		0x1003
95 #define F81534_BUS_REG_START		0x1002
96 #define F81534_BUS_REG_END		0x1001
97 
98 #define F81534_CMD_READ			0x03
99 
100 #define F81534_DEFAULT_BAUD_RATE	9600
101 
102 #define F81534_PORT_CONF_RS232		0
103 #define F81534_PORT_CONF_RS485		BIT(0)
104 #define F81534_PORT_CONF_RS485_INVERT	(BIT(0) | BIT(1))
105 #define F81534_PORT_CONF_MODE_MASK	GENMASK(1, 0)
106 #define F81534_PORT_CONF_DISABLE_PORT	BIT(3)
107 #define F81534_PORT_CONF_NOT_EXIST_PORT	BIT(7)
108 #define F81534_PORT_UNAVAILABLE		\
109 	(F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
110 
111 
112 #define F81534_1X_RXTRIGGER		0xc3
113 #define F81534_8X_RXTRIGGER		0xcf
114 
115 /*
116  * F81532/534 Clock registers (offset +08h)
117  *
118  * Bit0:	UART Enable (always on)
119  * Bit2-1:	Clock source selector
120  *			00: 1.846MHz.
121  *			01: 18.46MHz.
122  *			10: 24MHz.
123  *			11: 14.77MHz.
124  * Bit4:	Auto direction(RTS) control (RTS pin Low when TX)
125  * Bit5:	Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
126  */
127 
128 #define F81534_UART_EN			BIT(0)
129 #define F81534_CLK_1_846_MHZ		0
130 #define F81534_CLK_18_46_MHZ		BIT(1)
131 #define F81534_CLK_24_MHZ		BIT(2)
132 #define F81534_CLK_14_77_MHZ		(BIT(1) | BIT(2))
133 #define F81534_CLK_MASK			GENMASK(2, 1)
134 #define F81534_CLK_TX_DELAY_1BIT	BIT(3)
135 #define F81534_CLK_RS485_MODE		BIT(4)
136 #define F81534_CLK_RS485_INVERT		BIT(5)
137 
138 static const struct usb_device_id f81534_id_table[] = {
139 	{ USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
140 	{ USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
141 	{}			/* Terminating entry */
142 };
143 
144 #define F81534_TX_EMPTY_BIT		0
145 
146 struct f81534_serial_private {
147 	u8 conf_data[F81534_DEF_CONF_SIZE];
148 	int tty_idx[F81534_NUM_PORT];
149 	u8 setting_idx;
150 	int opened_port;
151 	struct mutex urb_mutex;
152 };
153 
154 struct f81534_port_private {
155 	struct mutex mcr_mutex;
156 	struct mutex lcr_mutex;
157 	struct work_struct lsr_work;
158 	struct usb_serial_port *port;
159 	unsigned long tx_empty;
160 	spinlock_t msr_lock;
161 	u32 baud_base;
162 	u8 shadow_mcr;
163 	u8 shadow_lcr;
164 	u8 shadow_msr;
165 	u8 shadow_clk;
166 	u8 phy_num;
167 };
168 
169 struct f81534_pin_data {
170 	const u16 reg_addr;
171 	const u8 reg_mask;
172 };
173 
174 struct f81534_port_out_pin {
175 	struct f81534_pin_data pin[3];
176 };
177 
178 /* Pin output value for M2/M1/M0(SD) */
179 static const struct f81534_port_out_pin f81534_port_out_pins[] = {
180 	 { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } },
181 	 { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } },
182 	 { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } },
183 	 { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } },
184 };
185 
186 static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 };
187 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ,
188 				F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ };
189 
f81534_logic_to_phy_port(struct usb_serial * serial,struct usb_serial_port * port)190 static int f81534_logic_to_phy_port(struct usb_serial *serial,
191 					struct usb_serial_port *port)
192 {
193 	struct f81534_serial_private *serial_priv =
194 			usb_get_serial_data(port->serial);
195 	int count = 0;
196 	int i;
197 
198 	for (i = 0; i < F81534_NUM_PORT; ++i) {
199 		if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
200 			continue;
201 
202 		if (port->port_number == count)
203 			return i;
204 
205 		++count;
206 	}
207 
208 	return -ENODEV;
209 }
210 
f81534_set_register(struct usb_serial * serial,u16 reg,u8 data)211 static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
212 {
213 	struct usb_interface *interface = serial->interface;
214 	struct usb_device *dev = serial->dev;
215 	size_t count = F81534_USB_MAX_RETRY;
216 	int status;
217 	u8 *tmp;
218 
219 	tmp = kmalloc(sizeof(u8), GFP_KERNEL);
220 	if (!tmp)
221 		return -ENOMEM;
222 
223 	*tmp = data;
224 
225 	/*
226 	 * Our device maybe not reply when heavily loading, We'll retry for
227 	 * F81534_USB_MAX_RETRY times.
228 	 */
229 	while (count--) {
230 		status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
231 					 F81534_SET_GET_REGISTER,
232 					 USB_TYPE_VENDOR | USB_DIR_OUT,
233 					 reg, 0, tmp, sizeof(u8),
234 					 F81534_USB_TIMEOUT);
235 		if (status > 0) {
236 			status = 0;
237 			break;
238 		} else if (status == 0) {
239 			status = -EIO;
240 		}
241 	}
242 
243 	if (status < 0) {
244 		dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
245 				__func__, reg, data, status);
246 	}
247 
248 	kfree(tmp);
249 	return status;
250 }
251 
f81534_get_register(struct usb_serial * serial,u16 reg,u8 * data)252 static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
253 {
254 	struct usb_interface *interface = serial->interface;
255 	struct usb_device *dev = serial->dev;
256 	size_t count = F81534_USB_MAX_RETRY;
257 	int status;
258 	u8 *tmp;
259 
260 	tmp = kmalloc(sizeof(u8), GFP_KERNEL);
261 	if (!tmp)
262 		return -ENOMEM;
263 
264 	/*
265 	 * Our device maybe not reply when heavily loading, We'll retry for
266 	 * F81534_USB_MAX_RETRY times.
267 	 */
268 	while (count--) {
269 		status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
270 					 F81534_SET_GET_REGISTER,
271 					 USB_TYPE_VENDOR | USB_DIR_IN,
272 					 reg, 0, tmp, sizeof(u8),
273 					 F81534_USB_TIMEOUT);
274 		if (status > 0) {
275 			status = 0;
276 			break;
277 		} else if (status == 0) {
278 			status = -EIO;
279 		}
280 	}
281 
282 	if (status < 0) {
283 		dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
284 				reg, status);
285 		goto end;
286 	}
287 
288 	*data = *tmp;
289 
290 end:
291 	kfree(tmp);
292 	return status;
293 }
294 
f81534_set_mask_register(struct usb_serial * serial,u16 reg,u8 mask,u8 data)295 static int f81534_set_mask_register(struct usb_serial *serial, u16 reg,
296 					u8 mask, u8 data)
297 {
298 	int status;
299 	u8 tmp;
300 
301 	status = f81534_get_register(serial, reg, &tmp);
302 	if (status)
303 		return status;
304 
305 	tmp &= ~mask;
306 	tmp |= (mask & data);
307 
308 	return f81534_set_register(serial, reg, tmp);
309 }
310 
f81534_set_phy_port_register(struct usb_serial * serial,int phy,u16 reg,u8 data)311 static int f81534_set_phy_port_register(struct usb_serial *serial, int phy,
312 					u16 reg, u8 data)
313 {
314 	return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy,
315 					data);
316 }
317 
f81534_get_phy_port_register(struct usb_serial * serial,int phy,u16 reg,u8 * data)318 static int f81534_get_phy_port_register(struct usb_serial *serial, int phy,
319 					u16 reg, u8 *data)
320 {
321 	return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy,
322 					data);
323 }
324 
f81534_set_port_register(struct usb_serial_port * port,u16 reg,u8 data)325 static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
326 					u8 data)
327 {
328 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
329 
330 	return f81534_set_register(port->serial,
331 			reg + port_priv->phy_num * F81534_UART_OFFSET, data);
332 }
333 
f81534_get_port_register(struct usb_serial_port * port,u16 reg,u8 * data)334 static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
335 					u8 *data)
336 {
337 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
338 
339 	return f81534_get_register(port->serial,
340 			reg + port_priv->phy_num * F81534_UART_OFFSET, data);
341 }
342 
343 /*
344  * If we try to access the internal flash via SPI bus, we should check the bus
345  * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
346  */
f81534_wait_for_spi_idle(struct usb_serial * serial)347 static int f81534_wait_for_spi_idle(struct usb_serial *serial)
348 {
349 	size_t count = F81534_MAX_BUS_RETRY;
350 	u8 tmp;
351 	int status;
352 
353 	do {
354 		status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
355 						&tmp);
356 		if (status)
357 			return status;
358 
359 		if (tmp & F81534_BUS_BUSY)
360 			continue;
361 
362 		if (tmp & F81534_BUS_IDLE)
363 			break;
364 
365 	} while (--count);
366 
367 	if (!count) {
368 		dev_err(&serial->interface->dev,
369 				"%s: timed out waiting for idle SPI bus\n",
370 				__func__);
371 		return -EIO;
372 	}
373 
374 	return f81534_set_register(serial, F81534_BUS_REG_STATUS,
375 				tmp & ~F81534_BUS_IDLE);
376 }
377 
f81534_get_spi_register(struct usb_serial * serial,u16 reg,u8 * data)378 static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
379 					u8 *data)
380 {
381 	int status;
382 
383 	status = f81534_get_register(serial, reg, data);
384 	if (status)
385 		return status;
386 
387 	return f81534_wait_for_spi_idle(serial);
388 }
389 
f81534_set_spi_register(struct usb_serial * serial,u16 reg,u8 data)390 static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
391 {
392 	int status;
393 
394 	status = f81534_set_register(serial, reg, data);
395 	if (status)
396 		return status;
397 
398 	return f81534_wait_for_spi_idle(serial);
399 }
400 
f81534_read_flash(struct usb_serial * serial,u32 address,size_t size,u8 * buf)401 static int f81534_read_flash(struct usb_serial *serial, u32 address,
402 				size_t size, u8 *buf)
403 {
404 	u8 tmp_buf[F81534_MAX_DATA_BLOCK];
405 	size_t block = 0;
406 	size_t read_size;
407 	size_t count;
408 	int status;
409 	int offset;
410 	u16 reg_tmp;
411 
412 	status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
413 					F81534_CMD_READ);
414 	if (status)
415 		return status;
416 
417 	status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
418 					(address >> 16) & 0xff);
419 	if (status)
420 		return status;
421 
422 	status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
423 					(address >> 8) & 0xff);
424 	if (status)
425 		return status;
426 
427 	status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
428 					(address >> 0) & 0xff);
429 	if (status)
430 		return status;
431 
432 	/* Continuous read mode */
433 	do {
434 		read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
435 
436 		for (count = 0; count < read_size; ++count) {
437 			/* To write F81534_BUS_REG_END when final byte */
438 			if (size <= F81534_MAX_DATA_BLOCK &&
439 					read_size == count + 1)
440 				reg_tmp = F81534_BUS_REG_END;
441 			else
442 				reg_tmp = F81534_BUS_REG_START;
443 
444 			/*
445 			 * Dummy code, force IC to generate a read pulse, the
446 			 * set of value 0xf1 is dont care (any value is ok)
447 			 */
448 			status = f81534_set_spi_register(serial, reg_tmp,
449 					0xf1);
450 			if (status)
451 				return status;
452 
453 			status = f81534_get_spi_register(serial,
454 						F81534_BUS_READ_DATA,
455 						&tmp_buf[count]);
456 			if (status)
457 				return status;
458 
459 			offset = count + block * F81534_MAX_DATA_BLOCK;
460 			buf[offset] = tmp_buf[count];
461 		}
462 
463 		size -= read_size;
464 		++block;
465 	} while (size);
466 
467 	return 0;
468 }
469 
f81534_prepare_write_buffer(struct usb_serial_port * port,u8 * buf)470 static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
471 {
472 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
473 	int phy_num = port_priv->phy_num;
474 	u8 tx_len;
475 	int i;
476 
477 	/*
478 	 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
479 	 * index 0: port phy idx (e.g., 0,1,2,3)
480 	 * index 1: only F81534_TOKEN_WRITE
481 	 * index 2: serial TX out length
482 	 * index 3: fix to 0
483 	 * index 4~127: serial out data block
484 	 */
485 	for (i = 0; i < F81534_NUM_PORT; ++i) {
486 		buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
487 		buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
488 		buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
489 		buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
490 	}
491 
492 	tx_len = kfifo_out_locked(&port->write_fifo,
493 				&buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
494 				F81534_MAX_TX_SIZE, &port->lock);
495 
496 	buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
497 }
498 
f81534_submit_writer(struct usb_serial_port * port,gfp_t mem_flags)499 static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
500 {
501 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
502 	struct urb *urb;
503 	unsigned long flags;
504 	int result;
505 
506 	/* Check is any data in write_fifo */
507 	spin_lock_irqsave(&port->lock, flags);
508 
509 	if (kfifo_is_empty(&port->write_fifo)) {
510 		spin_unlock_irqrestore(&port->lock, flags);
511 		return 0;
512 	}
513 
514 	spin_unlock_irqrestore(&port->lock, flags);
515 
516 	/* Check H/W is TXEMPTY */
517 	if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
518 		return 0;
519 
520 	urb = port->write_urbs[0];
521 	f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
522 	urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
523 
524 	result = usb_submit_urb(urb, mem_flags);
525 	if (result) {
526 		set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
527 		dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
528 				result);
529 		return result;
530 	}
531 
532 	usb_serial_port_softint(port);
533 	return 0;
534 }
535 
f81534_calc_baud_divisor(u32 baudrate,u32 clockrate)536 static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
537 {
538 	if (!baudrate)
539 		return 0;
540 
541 	/* Round to nearest divisor */
542 	return DIV_ROUND_CLOSEST(clockrate, baudrate);
543 }
544 
f81534_find_clk(u32 baudrate)545 static int f81534_find_clk(u32 baudrate)
546 {
547 	int idx;
548 
549 	for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) {
550 		if (baudrate <= baudrate_table[idx] &&
551 				baudrate_table[idx] % baudrate == 0)
552 			return idx;
553 	}
554 
555 	return -EINVAL;
556 }
557 
f81534_set_port_config(struct usb_serial_port * port,struct tty_struct * tty,u32 baudrate,u32 old_baudrate,u8 lcr)558 static int f81534_set_port_config(struct usb_serial_port *port,
559 		struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr)
560 {
561 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
562 	u32 divisor;
563 	int status;
564 	int i;
565 	int idx;
566 	u8 value;
567 	u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE};
568 
569 	for (i = 0; i < ARRAY_SIZE(baud_list); ++i) {
570 		idx = f81534_find_clk(baud_list[i]);
571 		if (idx >= 0) {
572 			baudrate = baud_list[i];
573 			tty_encode_baud_rate(tty, baudrate, baudrate);
574 			break;
575 		}
576 	}
577 
578 	if (idx < 0)
579 		return -EINVAL;
580 
581 	port_priv->baud_base = baudrate_table[idx];
582 	port_priv->shadow_clk &= ~F81534_CLK_MASK;
583 	port_priv->shadow_clk |= clock_table[idx];
584 
585 	status = f81534_set_port_register(port, F81534_CLOCK_REG,
586 			port_priv->shadow_clk);
587 	if (status) {
588 		dev_err(&port->dev, "CLOCK_REG setting failed\n");
589 		return status;
590 	}
591 
592 	if (baudrate <= 1200)
593 		value = F81534_1X_RXTRIGGER;	/* 128 FIFO & TL: 1x */
594 	else
595 		value = F81534_8X_RXTRIGGER;	/* 128 FIFO & TL: 8x */
596 
597 	status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
598 	if (status) {
599 		dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
600 		return status;
601 	}
602 
603 	if (baudrate <= 1200)
604 		value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
605 	else
606 		value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */
607 
608 	status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
609 						value);
610 	if (status) {
611 		dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
612 		return status;
613 	}
614 
615 	divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base);
616 
617 	mutex_lock(&port_priv->lcr_mutex);
618 
619 	value = UART_LCR_DLAB;
620 	status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
621 						value);
622 	if (status) {
623 		dev_err(&port->dev, "%s: set LCR failed\n", __func__);
624 		goto out_unlock;
625 	}
626 
627 	value = divisor & 0xff;
628 	status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
629 	if (status) {
630 		dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
631 		goto out_unlock;
632 	}
633 
634 	value = (divisor >> 8) & 0xff;
635 	status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
636 	if (status) {
637 		dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
638 		goto out_unlock;
639 	}
640 
641 	value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC);
642 	status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
643 						value);
644 	if (status) {
645 		dev_err(&port->dev, "%s: set LCR failed\n", __func__);
646 		goto out_unlock;
647 	}
648 
649 	port_priv->shadow_lcr = value;
650 out_unlock:
651 	mutex_unlock(&port_priv->lcr_mutex);
652 
653 	return status;
654 }
655 
f81534_break_ctl(struct tty_struct * tty,int break_state)656 static void f81534_break_ctl(struct tty_struct *tty, int break_state)
657 {
658 	struct usb_serial_port *port = tty->driver_data;
659 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
660 	int status;
661 
662 	mutex_lock(&port_priv->lcr_mutex);
663 
664 	if (break_state)
665 		port_priv->shadow_lcr |= UART_LCR_SBC;
666 	else
667 		port_priv->shadow_lcr &= ~UART_LCR_SBC;
668 
669 	status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
670 					port_priv->shadow_lcr);
671 	if (status)
672 		dev_err(&port->dev, "set break failed: %d\n", status);
673 
674 	mutex_unlock(&port_priv->lcr_mutex);
675 }
676 
f81534_update_mctrl(struct usb_serial_port * port,unsigned int set,unsigned int clear)677 static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
678 				unsigned int clear)
679 {
680 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
681 	int status;
682 	u8 tmp;
683 
684 	if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
685 		return 0;	/* no change */
686 
687 	mutex_lock(&port_priv->mcr_mutex);
688 
689 	/* 'Set' takes precedence over 'Clear' */
690 	clear &= ~set;
691 
692 	/* Always enable UART_MCR_OUT2 */
693 	tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
694 
695 	if (clear & TIOCM_DTR)
696 		tmp &= ~UART_MCR_DTR;
697 
698 	if (clear & TIOCM_RTS)
699 		tmp &= ~UART_MCR_RTS;
700 
701 	if (set & TIOCM_DTR)
702 		tmp |= UART_MCR_DTR;
703 
704 	if (set & TIOCM_RTS)
705 		tmp |= UART_MCR_RTS;
706 
707 	status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
708 	if (status < 0) {
709 		dev_err(&port->dev, "%s: MCR write failed\n", __func__);
710 		mutex_unlock(&port_priv->mcr_mutex);
711 		return status;
712 	}
713 
714 	port_priv->shadow_mcr = tmp;
715 	mutex_unlock(&port_priv->mcr_mutex);
716 	return 0;
717 }
718 
719 /*
720  * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
721  * for latest configuration index. If nothing found
722  * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
723  * F81534_DEF_CONF_ADDRESS_START section.
724  *
725  * Due to we only use block0 to save data, so *index should be 0 or
726  * F81534_CUSTOM_NO_CUSTOM_DATA.
727  */
f81534_find_config_idx(struct usb_serial * serial,u8 * index)728 static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
729 {
730 	u8 tmp;
731 	int status;
732 
733 	status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
734 					&tmp);
735 	if (status) {
736 		dev_err(&serial->interface->dev, "%s: read failed: %d\n",
737 				__func__, status);
738 		return status;
739 	}
740 
741 	/* We'll use the custom data when the data is valid. */
742 	if (tmp == F81534_CUSTOM_VALID_TOKEN)
743 		*index = 0;
744 	else
745 		*index = F81534_CUSTOM_NO_CUSTOM_DATA;
746 
747 	return 0;
748 }
749 
750 /*
751  * The F81532/534 will not report serial port to USB serial subsystem when
752  * H/W DCD/DSR/CTS/RI/RX pin connected to ground.
753  *
754  * To detect RX pin status, we'll enable MCR interal loopback, disable it and
755  * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI.
756  */
f81534_check_port_hw_disabled(struct usb_serial * serial,int phy)757 static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy)
758 {
759 	int status;
760 	u8 old_mcr;
761 	u8 msr;
762 	u8 lsr;
763 	u8 msr_mask;
764 
765 	msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
766 
767 	status = f81534_get_phy_port_register(serial, phy,
768 				F81534_MODEM_STATUS_REG, &msr);
769 	if (status)
770 		return false;
771 
772 	if ((msr & msr_mask) != msr_mask)
773 		return false;
774 
775 	status = f81534_set_phy_port_register(serial, phy,
776 				F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
777 				UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
778 	if (status)
779 		return false;
780 
781 	status = f81534_get_phy_port_register(serial, phy,
782 				F81534_MODEM_CONTROL_REG, &old_mcr);
783 	if (status)
784 		return false;
785 
786 	status = f81534_set_phy_port_register(serial, phy,
787 				F81534_MODEM_CONTROL_REG, UART_MCR_LOOP);
788 	if (status)
789 		return false;
790 
791 	status = f81534_set_phy_port_register(serial, phy,
792 				F81534_MODEM_CONTROL_REG, 0x0);
793 	if (status)
794 		return false;
795 
796 	msleep(60);
797 
798 	status = f81534_get_phy_port_register(serial, phy,
799 				F81534_LINE_STATUS_REG, &lsr);
800 	if (status)
801 		return false;
802 
803 	status = f81534_set_phy_port_register(serial, phy,
804 				F81534_MODEM_CONTROL_REG, old_mcr);
805 	if (status)
806 		return false;
807 
808 	if ((lsr & UART_LSR_BI) == UART_LSR_BI)
809 		return true;
810 
811 	return false;
812 }
813 
814 /*
815  * We had 2 generation of F81532/534 IC. All has an internal storage.
816  *
817  * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
818  * internal data will used. All mode and gpio control should manually set
819  * by AP or Driver and all storage space value are 0xff. The
820  * f81534_calc_num_ports() will run to final we marked as "oldest version"
821  * for this IC.
822  *
823  * 2rd is designed to more generic to use any transceiver and this is our
824  * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
825  * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
826  * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
827  * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
828  * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
829  * The f81534_calc_num_ports() will run to "new style" with checking
830  * F81534_PORT_UNAVAILABLE section.
831  */
f81534_calc_num_ports(struct usb_serial * serial,struct usb_serial_endpoints * epds)832 static int f81534_calc_num_ports(struct usb_serial *serial,
833 					struct usb_serial_endpoints *epds)
834 {
835 	struct f81534_serial_private *serial_priv;
836 	struct device *dev = &serial->interface->dev;
837 	int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]);
838 	int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]);
839 	u8 num_port = 0;
840 	int index = 0;
841 	int status;
842 	int i;
843 
844 	if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
845 			size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
846 		dev_err(dev, "unsupported endpoint max packet size\n");
847 		return -ENODEV;
848 	}
849 
850 	serial_priv = devm_kzalloc(&serial->interface->dev,
851 					sizeof(*serial_priv), GFP_KERNEL);
852 	if (!serial_priv)
853 		return -ENOMEM;
854 
855 	usb_set_serial_data(serial, serial_priv);
856 	mutex_init(&serial_priv->urb_mutex);
857 
858 	/* Check had custom setting */
859 	status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
860 	if (status) {
861 		dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
862 				__func__, status);
863 		return status;
864 	}
865 
866 	/*
867 	 * We'll read custom data only when data available, otherwise we'll
868 	 * read default value instead.
869 	 */
870 	if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
871 		status = f81534_read_flash(serial,
872 						F81534_CUSTOM_ADDRESS_START +
873 						F81534_CONF_OFFSET,
874 						sizeof(serial_priv->conf_data),
875 						serial_priv->conf_data);
876 		if (status) {
877 			dev_err(&serial->interface->dev,
878 					"%s: get custom data failed: %d\n",
879 					__func__, status);
880 			return status;
881 		}
882 
883 		dev_dbg(&serial->interface->dev,
884 				"%s: read config from block: %d\n", __func__,
885 				serial_priv->setting_idx);
886 	} else {
887 		/* Read default board setting */
888 		status = f81534_read_flash(serial,
889 				F81534_DEF_CONF_ADDRESS_START,
890 				sizeof(serial_priv->conf_data),
891 				serial_priv->conf_data);
892 		if (status) {
893 			dev_err(&serial->interface->dev,
894 					"%s: read failed: %d\n", __func__,
895 					status);
896 			return status;
897 		}
898 
899 		dev_dbg(&serial->interface->dev, "%s: read default config\n",
900 				__func__);
901 	}
902 
903 	/* New style, find all possible ports */
904 	for (i = 0; i < F81534_NUM_PORT; ++i) {
905 		if (f81534_check_port_hw_disabled(serial, i))
906 			serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE;
907 
908 		if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
909 			continue;
910 
911 		++num_port;
912 	}
913 
914 	if (!num_port) {
915 		dev_warn(&serial->interface->dev,
916 			"no config found, assuming 4 ports\n");
917 		num_port = 4;		/* Nothing found, oldest version IC */
918 	}
919 
920 	/* Assign phy-to-logic mapping */
921 	for (i = 0; i < F81534_NUM_PORT; ++i) {
922 		if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
923 			continue;
924 
925 		serial_priv->tty_idx[i] = index++;
926 		dev_dbg(&serial->interface->dev,
927 				"%s: phy_num: %d, tty_idx: %d\n", __func__, i,
928 				serial_priv->tty_idx[i]);
929 	}
930 
931 	/*
932 	 * Setup bulk-out endpoint multiplexing. All ports share the same
933 	 * bulk-out endpoint.
934 	 */
935 	BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT);
936 
937 	for (i = 1; i < num_port; ++i)
938 		epds->bulk_out[i] = epds->bulk_out[0];
939 
940 	epds->num_bulk_out = num_port;
941 
942 	return num_port;
943 }
944 
f81534_set_termios(struct tty_struct * tty,struct usb_serial_port * port,struct ktermios * old_termios)945 static void f81534_set_termios(struct tty_struct *tty,
946 				struct usb_serial_port *port,
947 				struct ktermios *old_termios)
948 {
949 	u8 new_lcr = 0;
950 	int status;
951 	u32 baud;
952 	u32 old_baud;
953 
954 	if (C_BAUD(tty) == B0)
955 		f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
956 	else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
957 		f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
958 
959 	if (C_PARENB(tty)) {
960 		new_lcr |= UART_LCR_PARITY;
961 
962 		if (!C_PARODD(tty))
963 			new_lcr |= UART_LCR_EPAR;
964 
965 		if (C_CMSPAR(tty))
966 			new_lcr |= UART_LCR_SPAR;
967 	}
968 
969 	if (C_CSTOPB(tty))
970 		new_lcr |= UART_LCR_STOP;
971 
972 	switch (C_CSIZE(tty)) {
973 	case CS5:
974 		new_lcr |= UART_LCR_WLEN5;
975 		break;
976 	case CS6:
977 		new_lcr |= UART_LCR_WLEN6;
978 		break;
979 	case CS7:
980 		new_lcr |= UART_LCR_WLEN7;
981 		break;
982 	default:
983 	case CS8:
984 		new_lcr |= UART_LCR_WLEN8;
985 		break;
986 	}
987 
988 	baud = tty_get_baud_rate(tty);
989 	if (!baud)
990 		return;
991 
992 	if (old_termios)
993 		old_baud = tty_termios_baud_rate(old_termios);
994 	else
995 		old_baud = F81534_DEFAULT_BAUD_RATE;
996 
997 	dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
998 
999 	status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr);
1000 	if (status < 0) {
1001 		dev_err(&port->dev, "%s: set port config failed: %d\n",
1002 				__func__, status);
1003 	}
1004 }
1005 
f81534_submit_read_urb(struct usb_serial * serial,gfp_t flags)1006 static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
1007 {
1008 	return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
1009 }
1010 
f81534_msr_changed(struct usb_serial_port * port,u8 msr)1011 static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
1012 {
1013 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1014 	struct tty_struct *tty;
1015 	unsigned long flags;
1016 	u8 old_msr;
1017 
1018 	if (!(msr & UART_MSR_ANY_DELTA))
1019 		return;
1020 
1021 	spin_lock_irqsave(&port_priv->msr_lock, flags);
1022 	old_msr = port_priv->shadow_msr;
1023 	port_priv->shadow_msr = msr;
1024 	spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1025 
1026 	dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
1027 			msr);
1028 
1029 	/* Update input line counters */
1030 	if (msr & UART_MSR_DCTS)
1031 		port->icount.cts++;
1032 	if (msr & UART_MSR_DDSR)
1033 		port->icount.dsr++;
1034 	if (msr & UART_MSR_DDCD)
1035 		port->icount.dcd++;
1036 	if (msr & UART_MSR_TERI)
1037 		port->icount.rng++;
1038 
1039 	wake_up_interruptible(&port->port.delta_msr_wait);
1040 
1041 	if (!(msr & UART_MSR_DDCD))
1042 		return;
1043 
1044 	dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
1045 			__func__, port_priv->phy_num, old_msr, msr);
1046 
1047 	tty = tty_port_tty_get(&port->port);
1048 	if (!tty)
1049 		return;
1050 
1051 	usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
1052 	tty_kref_put(tty);
1053 }
1054 
f81534_read_msr(struct usb_serial_port * port)1055 static int f81534_read_msr(struct usb_serial_port *port)
1056 {
1057 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1058 	unsigned long flags;
1059 	int status;
1060 	u8 msr;
1061 
1062 	/* Get MSR initial value */
1063 	status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1064 	if (status)
1065 		return status;
1066 
1067 	/* Force update current state */
1068 	spin_lock_irqsave(&port_priv->msr_lock, flags);
1069 	port_priv->shadow_msr = msr;
1070 	spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1071 
1072 	return 0;
1073 }
1074 
f81534_open(struct tty_struct * tty,struct usb_serial_port * port)1075 static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
1076 {
1077 	struct f81534_serial_private *serial_priv =
1078 			usb_get_serial_data(port->serial);
1079 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1080 	int status;
1081 
1082 	status = f81534_set_port_register(port,
1083 				F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
1084 				UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
1085 	if (status) {
1086 		dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
1087 				status);
1088 		return status;
1089 	}
1090 
1091 	if (tty)
1092 		f81534_set_termios(tty, port, NULL);
1093 
1094 	status = f81534_read_msr(port);
1095 	if (status)
1096 		return status;
1097 
1098 	mutex_lock(&serial_priv->urb_mutex);
1099 
1100 	/* Submit Read URBs for first port opened */
1101 	if (!serial_priv->opened_port) {
1102 		status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
1103 		if (status)
1104 			goto exit;
1105 	}
1106 
1107 	serial_priv->opened_port++;
1108 
1109 exit:
1110 	mutex_unlock(&serial_priv->urb_mutex);
1111 
1112 	set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1113 	return status;
1114 }
1115 
f81534_close(struct usb_serial_port * port)1116 static void f81534_close(struct usb_serial_port *port)
1117 {
1118 	struct f81534_serial_private *serial_priv =
1119 			usb_get_serial_data(port->serial);
1120 	struct usb_serial_port *port0 = port->serial->port[0];
1121 	unsigned long flags;
1122 	size_t i;
1123 
1124 	usb_kill_urb(port->write_urbs[0]);
1125 
1126 	spin_lock_irqsave(&port->lock, flags);
1127 	kfifo_reset_out(&port->write_fifo);
1128 	spin_unlock_irqrestore(&port->lock, flags);
1129 
1130 	/* Kill Read URBs when final port closed */
1131 	mutex_lock(&serial_priv->urb_mutex);
1132 	serial_priv->opened_port--;
1133 
1134 	if (!serial_priv->opened_port) {
1135 		for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
1136 			usb_kill_urb(port0->read_urbs[i]);
1137 	}
1138 
1139 	mutex_unlock(&serial_priv->urb_mutex);
1140 }
1141 
f81534_get_serial_info(struct usb_serial_port * port,struct serial_struct __user * retinfo)1142 static int f81534_get_serial_info(struct usb_serial_port *port,
1143 				  struct serial_struct __user *retinfo)
1144 {
1145 	struct f81534_port_private *port_priv;
1146 	struct serial_struct tmp;
1147 
1148 	port_priv = usb_get_serial_port_data(port);
1149 
1150 	memset(&tmp, 0, sizeof(tmp));
1151 
1152 	tmp.type = PORT_16550A;
1153 	tmp.port = port->port_number;
1154 	tmp.line = port->minor;
1155 	tmp.baud_base = port_priv->baud_base;
1156 
1157 	if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1158 		return -EFAULT;
1159 
1160 	return 0;
1161 }
1162 
f81534_ioctl(struct tty_struct * tty,unsigned int cmd,unsigned long arg)1163 static int f81534_ioctl(struct tty_struct *tty, unsigned int cmd,
1164 			unsigned long arg)
1165 {
1166 	struct usb_serial_port *port = tty->driver_data;
1167 	struct serial_struct __user *buf = (struct serial_struct __user *)arg;
1168 
1169 	switch (cmd) {
1170 	case TIOCGSERIAL:
1171 		return f81534_get_serial_info(port, buf);
1172 	default:
1173 		break;
1174 	}
1175 
1176 	return -ENOIOCTLCMD;
1177 }
1178 
f81534_process_per_serial_block(struct usb_serial_port * port,u8 * data)1179 static void f81534_process_per_serial_block(struct usb_serial_port *port,
1180 		u8 *data)
1181 {
1182 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1183 	int phy_num = data[0];
1184 	size_t read_size = 0;
1185 	size_t i;
1186 	char tty_flag;
1187 	int status;
1188 	u8 lsr;
1189 
1190 	/*
1191 	 * The block layout is 128 Bytes
1192 	 * index 0: port phy idx (e.g., 0,1,2,3),
1193 	 * index 1: It's could be
1194 	 *			F81534_TOKEN_RECEIVE
1195 	 *			F81534_TOKEN_TX_EMPTY
1196 	 *			F81534_TOKEN_MSR_CHANGE
1197 	 * index 2: serial in size (data+lsr, must be even)
1198 	 *			meaningful for F81534_TOKEN_RECEIVE only
1199 	 * index 3: current MSR with this device
1200 	 * index 4~127: serial in data block (data+lsr, must be even)
1201 	 */
1202 	switch (data[1]) {
1203 	case F81534_TOKEN_TX_EMPTY:
1204 		set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1205 
1206 		/* Try to submit writer */
1207 		status = f81534_submit_writer(port, GFP_ATOMIC);
1208 		if (status)
1209 			dev_err(&port->dev, "%s: submit failed\n", __func__);
1210 		return;
1211 
1212 	case F81534_TOKEN_MSR_CHANGE:
1213 		f81534_msr_changed(port, data[3]);
1214 		return;
1215 
1216 	case F81534_TOKEN_RECEIVE:
1217 		read_size = data[2];
1218 		if (read_size > F81534_MAX_RX_SIZE) {
1219 			dev_err(&port->dev,
1220 				"%s: phy: %d read_size: %zu larger than: %d\n",
1221 				__func__, phy_num, read_size,
1222 				F81534_MAX_RX_SIZE);
1223 			return;
1224 		}
1225 
1226 		break;
1227 
1228 	default:
1229 		dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
1230 				data[1]);
1231 		return;
1232 	}
1233 
1234 	for (i = 4; i < 4 + read_size; i += 2) {
1235 		tty_flag = TTY_NORMAL;
1236 		lsr = data[i + 1];
1237 
1238 		if (lsr & UART_LSR_BRK_ERROR_BITS) {
1239 			if (lsr & UART_LSR_BI) {
1240 				tty_flag = TTY_BREAK;
1241 				port->icount.brk++;
1242 				usb_serial_handle_break(port);
1243 			} else if (lsr & UART_LSR_PE) {
1244 				tty_flag = TTY_PARITY;
1245 				port->icount.parity++;
1246 			} else if (lsr & UART_LSR_FE) {
1247 				tty_flag = TTY_FRAME;
1248 				port->icount.frame++;
1249 			}
1250 
1251 			if (lsr & UART_LSR_OE) {
1252 				port->icount.overrun++;
1253 				tty_insert_flip_char(&port->port, 0,
1254 						TTY_OVERRUN);
1255 			}
1256 
1257 			schedule_work(&port_priv->lsr_work);
1258 		}
1259 
1260 		if (port->port.console && port->sysrq) {
1261 			if (usb_serial_handle_sysrq_char(port, data[i]))
1262 				continue;
1263 		}
1264 
1265 		tty_insert_flip_char(&port->port, data[i], tty_flag);
1266 	}
1267 
1268 	tty_flip_buffer_push(&port->port);
1269 }
1270 
f81534_process_read_urb(struct urb * urb)1271 static void f81534_process_read_urb(struct urb *urb)
1272 {
1273 	struct f81534_serial_private *serial_priv;
1274 	struct usb_serial_port *port;
1275 	struct usb_serial *serial;
1276 	u8 *buf;
1277 	int phy_port_num;
1278 	int tty_port_num;
1279 	size_t i;
1280 
1281 	if (!urb->actual_length ||
1282 			urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
1283 		return;
1284 	}
1285 
1286 	port = urb->context;
1287 	serial = port->serial;
1288 	buf = urb->transfer_buffer;
1289 	serial_priv = usb_get_serial_data(serial);
1290 
1291 	for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
1292 		phy_port_num = buf[i];
1293 		if (phy_port_num >= F81534_NUM_PORT) {
1294 			dev_err(&port->dev,
1295 				"%s: phy_port_num: %d larger than: %d\n",
1296 				__func__, phy_port_num, F81534_NUM_PORT);
1297 			continue;
1298 		}
1299 
1300 		tty_port_num = serial_priv->tty_idx[phy_port_num];
1301 		port = serial->port[tty_port_num];
1302 
1303 		if (tty_port_initialized(&port->port))
1304 			f81534_process_per_serial_block(port, &buf[i]);
1305 	}
1306 }
1307 
f81534_write_usb_callback(struct urb * urb)1308 static void f81534_write_usb_callback(struct urb *urb)
1309 {
1310 	struct usb_serial_port *port = urb->context;
1311 
1312 	switch (urb->status) {
1313 	case 0:
1314 		break;
1315 	case -ENOENT:
1316 	case -ECONNRESET:
1317 	case -ESHUTDOWN:
1318 		dev_dbg(&port->dev, "%s - urb stopped: %d\n",
1319 				__func__, urb->status);
1320 		return;
1321 	case -EPIPE:
1322 		dev_err(&port->dev, "%s - urb stopped: %d\n",
1323 				__func__, urb->status);
1324 		return;
1325 	default:
1326 		dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
1327 				__func__, urb->status);
1328 		break;
1329 	}
1330 }
1331 
f81534_lsr_worker(struct work_struct * work)1332 static void f81534_lsr_worker(struct work_struct *work)
1333 {
1334 	struct f81534_port_private *port_priv;
1335 	struct usb_serial_port *port;
1336 	int status;
1337 	u8 tmp;
1338 
1339 	port_priv = container_of(work, struct f81534_port_private, lsr_work);
1340 	port = port_priv->port;
1341 
1342 	status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp);
1343 	if (status)
1344 		dev_warn(&port->dev, "read LSR failed: %d\n", status);
1345 }
1346 
f81534_set_port_output_pin(struct usb_serial_port * port)1347 static int f81534_set_port_output_pin(struct usb_serial_port *port)
1348 {
1349 	struct f81534_serial_private *serial_priv;
1350 	struct f81534_port_private *port_priv;
1351 	struct usb_serial *serial;
1352 	const struct f81534_port_out_pin *pins;
1353 	int status;
1354 	int i;
1355 	u8 value;
1356 	u8 idx;
1357 
1358 	serial = port->serial;
1359 	serial_priv = usb_get_serial_data(serial);
1360 	port_priv = usb_get_serial_port_data(port);
1361 
1362 	idx = F81534_CONF_GPIO_OFFSET + port_priv->phy_num;
1363 	value = serial_priv->conf_data[idx];
1364 	pins = &f81534_port_out_pins[port_priv->phy_num];
1365 
1366 	for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) {
1367 		status = f81534_set_mask_register(serial,
1368 				pins->pin[i].reg_addr, pins->pin[i].reg_mask,
1369 				value & BIT(i) ? pins->pin[i].reg_mask : 0);
1370 		if (status)
1371 			return status;
1372 	}
1373 
1374 	dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value);
1375 	return 0;
1376 }
1377 
f81534_port_probe(struct usb_serial_port * port)1378 static int f81534_port_probe(struct usb_serial_port *port)
1379 {
1380 	struct f81534_serial_private *serial_priv;
1381 	struct f81534_port_private *port_priv;
1382 	int ret;
1383 	u8 value;
1384 
1385 	serial_priv = usb_get_serial_data(port->serial);
1386 	port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
1387 	if (!port_priv)
1388 		return -ENOMEM;
1389 
1390 	/*
1391 	 * We'll make tx frame error when baud rate from 384~500kps. So we'll
1392 	 * delay all tx data frame with 1bit.
1393 	 */
1394 	port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
1395 	spin_lock_init(&port_priv->msr_lock);
1396 	mutex_init(&port_priv->mcr_mutex);
1397 	mutex_init(&port_priv->lcr_mutex);
1398 	INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker);
1399 
1400 	/* Assign logic-to-phy mapping */
1401 	ret = f81534_logic_to_phy_port(port->serial, port);
1402 	if (ret < 0)
1403 		return ret;
1404 
1405 	port_priv->phy_num = ret;
1406 	port_priv->port = port;
1407 	usb_set_serial_port_data(port, port_priv);
1408 	dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
1409 			port->port_number, port_priv->phy_num);
1410 
1411 	/*
1412 	 * The F81532/534 will hang-up when enable LSR interrupt in IER and
1413 	 * occur data overrun. So we'll disable the LSR interrupt in probe()
1414 	 * and submit the LSR worker to clear LSR state when reported LSR error
1415 	 * bit with bulk-in data in f81534_process_per_serial_block().
1416 	 */
1417 	ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG,
1418 			UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
1419 	if (ret)
1420 		return ret;
1421 
1422 	value = serial_priv->conf_data[port_priv->phy_num];
1423 	switch (value & F81534_PORT_CONF_MODE_MASK) {
1424 	case F81534_PORT_CONF_RS485_INVERT:
1425 		port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
1426 					F81534_CLK_RS485_INVERT;
1427 		dev_dbg(&port->dev, "RS485 invert mode\n");
1428 		break;
1429 	case F81534_PORT_CONF_RS485:
1430 		port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
1431 		dev_dbg(&port->dev, "RS485 mode\n");
1432 		break;
1433 
1434 	default:
1435 	case F81534_PORT_CONF_RS232:
1436 		dev_dbg(&port->dev, "RS232 mode\n");
1437 		break;
1438 	}
1439 
1440 	return f81534_set_port_output_pin(port);
1441 }
1442 
f81534_port_remove(struct usb_serial_port * port)1443 static int f81534_port_remove(struct usb_serial_port *port)
1444 {
1445 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1446 
1447 	flush_work(&port_priv->lsr_work);
1448 	return 0;
1449 }
1450 
f81534_tiocmget(struct tty_struct * tty)1451 static int f81534_tiocmget(struct tty_struct *tty)
1452 {
1453 	struct usb_serial_port *port = tty->driver_data;
1454 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1455 	int status;
1456 	int r;
1457 	u8 msr;
1458 	u8 mcr;
1459 
1460 	/* Read current MSR from device */
1461 	status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1462 	if (status)
1463 		return status;
1464 
1465 	mutex_lock(&port_priv->mcr_mutex);
1466 	mcr = port_priv->shadow_mcr;
1467 	mutex_unlock(&port_priv->mcr_mutex);
1468 
1469 	r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
1470 	    (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
1471 	    (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
1472 	    (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
1473 	    (msr & UART_MSR_RI ? TIOCM_RI : 0) |
1474 	    (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
1475 
1476 	return r;
1477 }
1478 
f81534_tiocmset(struct tty_struct * tty,unsigned int set,unsigned int clear)1479 static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
1480 				unsigned int clear)
1481 {
1482 	struct usb_serial_port *port = tty->driver_data;
1483 
1484 	return f81534_update_mctrl(port, set, clear);
1485 }
1486 
f81534_dtr_rts(struct usb_serial_port * port,int on)1487 static void f81534_dtr_rts(struct usb_serial_port *port, int on)
1488 {
1489 	if (on)
1490 		f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
1491 	else
1492 		f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
1493 }
1494 
f81534_write(struct tty_struct * tty,struct usb_serial_port * port,const u8 * buf,int count)1495 static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
1496 			const u8 *buf, int count)
1497 {
1498 	int bytes_out, status;
1499 
1500 	if (!count)
1501 		return 0;
1502 
1503 	bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
1504 					&port->lock);
1505 
1506 	status = f81534_submit_writer(port, GFP_ATOMIC);
1507 	if (status) {
1508 		dev_err(&port->dev, "%s: submit failed\n", __func__);
1509 		return status;
1510 	}
1511 
1512 	return bytes_out;
1513 }
1514 
f81534_tx_empty(struct usb_serial_port * port)1515 static bool f81534_tx_empty(struct usb_serial_port *port)
1516 {
1517 	struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1518 
1519 	return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1520 }
1521 
f81534_resume(struct usb_serial * serial)1522 static int f81534_resume(struct usb_serial *serial)
1523 {
1524 	struct f81534_serial_private *serial_priv =
1525 			usb_get_serial_data(serial);
1526 	struct usb_serial_port *port;
1527 	int error = 0;
1528 	int status;
1529 	size_t i;
1530 
1531 	/*
1532 	 * We'll register port 0 bulkin when port had opened, It'll take all
1533 	 * port received data, MSR register change and TX_EMPTY information.
1534 	 */
1535 	mutex_lock(&serial_priv->urb_mutex);
1536 
1537 	if (serial_priv->opened_port) {
1538 		status = f81534_submit_read_urb(serial, GFP_NOIO);
1539 		if (status) {
1540 			mutex_unlock(&serial_priv->urb_mutex);
1541 			return status;
1542 		}
1543 	}
1544 
1545 	mutex_unlock(&serial_priv->urb_mutex);
1546 
1547 	for (i = 0; i < serial->num_ports; i++) {
1548 		port = serial->port[i];
1549 		if (!tty_port_initialized(&port->port))
1550 			continue;
1551 
1552 		status = f81534_submit_writer(port, GFP_NOIO);
1553 		if (status) {
1554 			dev_err(&port->dev, "%s: submit failed\n", __func__);
1555 			++error;
1556 		}
1557 	}
1558 
1559 	if (error)
1560 		return -EIO;
1561 
1562 	return 0;
1563 }
1564 
1565 static struct usb_serial_driver f81534_device = {
1566 	.driver = {
1567 		   .owner = THIS_MODULE,
1568 		   .name = "f81534",
1569 	},
1570 	.description =		DRIVER_DESC,
1571 	.id_table =		f81534_id_table,
1572 	.num_bulk_in =		1,
1573 	.num_bulk_out =		1,
1574 	.open =			f81534_open,
1575 	.close =		f81534_close,
1576 	.write =		f81534_write,
1577 	.tx_empty =		f81534_tx_empty,
1578 	.calc_num_ports =	f81534_calc_num_ports,
1579 	.port_probe =		f81534_port_probe,
1580 	.port_remove =		f81534_port_remove,
1581 	.break_ctl =		f81534_break_ctl,
1582 	.dtr_rts =		f81534_dtr_rts,
1583 	.process_read_urb =	f81534_process_read_urb,
1584 	.ioctl =		f81534_ioctl,
1585 	.tiocmget =		f81534_tiocmget,
1586 	.tiocmset =		f81534_tiocmset,
1587 	.write_bulk_callback =	f81534_write_usb_callback,
1588 	.set_termios =		f81534_set_termios,
1589 	.resume =		f81534_resume,
1590 };
1591 
1592 static struct usb_serial_driver *const serial_drivers[] = {
1593 	&f81534_device, NULL
1594 };
1595 
1596 module_usb_serial_driver(serial_drivers, f81534_id_table);
1597 
1598 MODULE_DEVICE_TABLE(usb, f81534_id_table);
1599 MODULE_DESCRIPTION(DRIVER_DESC);
1600 MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
1601 MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
1602 MODULE_LICENSE("GPL");
1603