1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3 
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
8 #include <linux/err.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <linux/firmware.h>
24 #include <asm/byteorder.h>
25 #include <net/devlink.h>
26 #include <trace/events/devlink.h>
27 
28 #include "core.h"
29 #include "core_env.h"
30 #include "item.h"
31 #include "cmd.h"
32 #include "port.h"
33 #include "trap.h"
34 #include "emad.h"
35 #include "reg.h"
36 #include "resources.h"
37 #include "../mlxfw/mlxfw.h"
38 
39 static LIST_HEAD(mlxsw_core_driver_list);
40 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
41 
42 static const char mlxsw_core_driver_name[] = "mlxsw_core";
43 
44 static struct workqueue_struct *mlxsw_wq;
45 static struct workqueue_struct *mlxsw_owq;
46 
47 struct mlxsw_core_port {
48 	struct devlink_port devlink_port;
49 	void *port_driver_priv;
50 	u8 local_port;
51 };
52 
mlxsw_core_port_driver_priv(struct mlxsw_core_port * mlxsw_core_port)53 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
54 {
55 	return mlxsw_core_port->port_driver_priv;
56 }
57 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
58 
mlxsw_core_port_check(struct mlxsw_core_port * mlxsw_core_port)59 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
60 {
61 	return mlxsw_core_port->port_driver_priv != NULL;
62 }
63 
64 struct mlxsw_core {
65 	struct mlxsw_driver *driver;
66 	const struct mlxsw_bus *bus;
67 	void *bus_priv;
68 	const struct mlxsw_bus_info *bus_info;
69 	struct workqueue_struct *emad_wq;
70 	struct list_head rx_listener_list;
71 	struct list_head event_listener_list;
72 	struct {
73 		atomic64_t tid;
74 		struct list_head trans_list;
75 		spinlock_t trans_list_lock; /* protects trans_list writes */
76 		bool use_emad;
77 		bool enable_string_tlv;
78 	} emad;
79 	struct {
80 		u8 *mapping; /* lag_id+port_index to local_port mapping */
81 	} lag;
82 	struct mlxsw_res res;
83 	struct mlxsw_hwmon *hwmon;
84 	struct mlxsw_thermal *thermal;
85 	struct mlxsw_core_port *ports;
86 	unsigned int max_ports;
87 	atomic_t active_ports_count;
88 	bool fw_flash_in_progress;
89 	struct {
90 		struct devlink_health_reporter *fw_fatal;
91 	} health;
92 	struct mlxsw_env *env;
93 	bool is_initialized; /* Denotes if core was already initialized. */
94 	unsigned long driver_priv[];
95 	/* driver_priv has to be always the last item */
96 };
97 
98 #define MLXSW_PORT_MAX_PORTS_DEFAULT	0x40
99 
mlxsw_ports_occ_get(void * priv)100 static u64 mlxsw_ports_occ_get(void *priv)
101 {
102 	struct mlxsw_core *mlxsw_core = priv;
103 
104 	return atomic_read(&mlxsw_core->active_ports_count);
105 }
106 
mlxsw_core_resources_ports_register(struct mlxsw_core * mlxsw_core)107 static int mlxsw_core_resources_ports_register(struct mlxsw_core *mlxsw_core)
108 {
109 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
110 	struct devlink_resource_size_params ports_num_params;
111 	u32 max_ports;
112 
113 	max_ports = mlxsw_core->max_ports - 1;
114 	devlink_resource_size_params_init(&ports_num_params, max_ports,
115 					  max_ports, 1,
116 					  DEVLINK_RESOURCE_UNIT_ENTRY);
117 
118 	return devlink_resource_register(devlink,
119 					 DEVLINK_RESOURCE_GENERIC_NAME_PORTS,
120 					 max_ports, MLXSW_CORE_RESOURCE_PORTS,
121 					 DEVLINK_RESOURCE_ID_PARENT_TOP,
122 					 &ports_num_params);
123 }
124 
mlxsw_ports_init(struct mlxsw_core * mlxsw_core,bool reload)125 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core, bool reload)
126 {
127 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
128 	int err;
129 
130 	/* Switch ports are numbered from 1 to queried value */
131 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
132 		mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
133 							   MAX_SYSTEM_PORT) + 1;
134 	else
135 		mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
136 
137 	mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
138 				    sizeof(struct mlxsw_core_port), GFP_KERNEL);
139 	if (!mlxsw_core->ports)
140 		return -ENOMEM;
141 
142 	if (!reload) {
143 		err = mlxsw_core_resources_ports_register(mlxsw_core);
144 		if (err)
145 			goto err_resources_ports_register;
146 	}
147 	atomic_set(&mlxsw_core->active_ports_count, 0);
148 	devlink_resource_occ_get_register(devlink, MLXSW_CORE_RESOURCE_PORTS,
149 					  mlxsw_ports_occ_get, mlxsw_core);
150 
151 	return 0;
152 
153 err_resources_ports_register:
154 	kfree(mlxsw_core->ports);
155 	return err;
156 }
157 
mlxsw_ports_fini(struct mlxsw_core * mlxsw_core,bool reload)158 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core, bool reload)
159 {
160 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
161 
162 	devlink_resource_occ_get_unregister(devlink, MLXSW_CORE_RESOURCE_PORTS);
163 	if (!reload)
164 		devlink_resources_unregister(priv_to_devlink(mlxsw_core), NULL);
165 
166 	kfree(mlxsw_core->ports);
167 }
168 
mlxsw_core_max_ports(const struct mlxsw_core * mlxsw_core)169 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
170 {
171 	return mlxsw_core->max_ports;
172 }
173 EXPORT_SYMBOL(mlxsw_core_max_ports);
174 
mlxsw_core_driver_priv(struct mlxsw_core * mlxsw_core)175 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
176 {
177 	return mlxsw_core->driver_priv;
178 }
179 EXPORT_SYMBOL(mlxsw_core_driver_priv);
180 
mlxsw_core_res_query_enabled(const struct mlxsw_core * mlxsw_core)181 bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core)
182 {
183 	return mlxsw_core->driver->res_query_enabled;
184 }
185 EXPORT_SYMBOL(mlxsw_core_res_query_enabled);
186 
mlxsw_core_temp_warn_enabled(const struct mlxsw_core * mlxsw_core)187 bool mlxsw_core_temp_warn_enabled(const struct mlxsw_core *mlxsw_core)
188 {
189 	return mlxsw_core->driver->temp_warn_enabled;
190 }
191 
192 bool
mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev * rev,const struct mlxsw_fw_rev * req_rev)193 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
194 					  const struct mlxsw_fw_rev *req_rev)
195 {
196 	return rev->minor > req_rev->minor ||
197 	       (rev->minor == req_rev->minor &&
198 		rev->subminor >= req_rev->subminor);
199 }
200 EXPORT_SYMBOL(mlxsw_core_fw_rev_minor_subminor_validate);
201 
202 struct mlxsw_rx_listener_item {
203 	struct list_head list;
204 	struct mlxsw_rx_listener rxl;
205 	void *priv;
206 	bool enabled;
207 };
208 
209 struct mlxsw_event_listener_item {
210 	struct list_head list;
211 	struct mlxsw_core *mlxsw_core;
212 	struct mlxsw_event_listener el;
213 	void *priv;
214 };
215 
216 /******************
217  * EMAD processing
218  ******************/
219 
220 /* emad_eth_hdr_dmac
221  * Destination MAC in EMAD's Ethernet header.
222  * Must be set to 01:02:c9:00:00:01
223  */
224 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
225 
226 /* emad_eth_hdr_smac
227  * Source MAC in EMAD's Ethernet header.
228  * Must be set to 00:02:c9:01:02:03
229  */
230 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
231 
232 /* emad_eth_hdr_ethertype
233  * Ethertype in EMAD's Ethernet header.
234  * Must be set to 0x8932
235  */
236 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
237 
238 /* emad_eth_hdr_mlx_proto
239  * Mellanox protocol.
240  * Must be set to 0x0.
241  */
242 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
243 
244 /* emad_eth_hdr_ver
245  * Mellanox protocol version.
246  * Must be set to 0x0.
247  */
248 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
249 
250 /* emad_op_tlv_type
251  * Type of the TLV.
252  * Must be set to 0x1 (operation TLV).
253  */
254 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
255 
256 /* emad_op_tlv_len
257  * Length of the operation TLV in u32.
258  * Must be set to 0x4.
259  */
260 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
261 
262 /* emad_op_tlv_dr
263  * Direct route bit. Setting to 1 indicates the EMAD is a direct route
264  * EMAD. DR TLV must follow.
265  *
266  * Note: Currently not supported and must not be set.
267  */
268 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
269 
270 /* emad_op_tlv_status
271  * Returned status in case of EMAD response. Must be set to 0 in case
272  * of EMAD request.
273  * 0x0 - success
274  * 0x1 - device is busy. Requester should retry
275  * 0x2 - Mellanox protocol version not supported
276  * 0x3 - unknown TLV
277  * 0x4 - register not supported
278  * 0x5 - operation class not supported
279  * 0x6 - EMAD method not supported
280  * 0x7 - bad parameter (e.g. port out of range)
281  * 0x8 - resource not available
282  * 0x9 - message receipt acknowledgment. Requester should retry
283  * 0x70 - internal error
284  */
285 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
286 
287 /* emad_op_tlv_register_id
288  * Register ID of register within register TLV.
289  */
290 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
291 
292 /* emad_op_tlv_r
293  * Response bit. Setting to 1 indicates Response, otherwise request.
294  */
295 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
296 
297 /* emad_op_tlv_method
298  * EMAD method type.
299  * 0x1 - query
300  * 0x2 - write
301  * 0x3 - send (currently not supported)
302  * 0x4 - event
303  */
304 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
305 
306 /* emad_op_tlv_class
307  * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
308  */
309 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
310 
311 /* emad_op_tlv_tid
312  * EMAD transaction ID. Used for pairing request and response EMADs.
313  */
314 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
315 
316 /* emad_string_tlv_type
317  * Type of the TLV.
318  * Must be set to 0x2 (string TLV).
319  */
320 MLXSW_ITEM32(emad, string_tlv, type, 0x00, 27, 5);
321 
322 /* emad_string_tlv_len
323  * Length of the string TLV in u32.
324  */
325 MLXSW_ITEM32(emad, string_tlv, len, 0x00, 16, 11);
326 
327 #define MLXSW_EMAD_STRING_TLV_STRING_LEN 128
328 
329 /* emad_string_tlv_string
330  * String provided by the device's firmware in case of erroneous register access
331  */
332 MLXSW_ITEM_BUF(emad, string_tlv, string, 0x04,
333 	       MLXSW_EMAD_STRING_TLV_STRING_LEN);
334 
335 /* emad_reg_tlv_type
336  * Type of the TLV.
337  * Must be set to 0x3 (register TLV).
338  */
339 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
340 
341 /* emad_reg_tlv_len
342  * Length of the operation TLV in u32.
343  */
344 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
345 
346 /* emad_end_tlv_type
347  * Type of the TLV.
348  * Must be set to 0x0 (end TLV).
349  */
350 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
351 
352 /* emad_end_tlv_len
353  * Length of the end TLV in u32.
354  * Must be set to 1.
355  */
356 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
357 
358 enum mlxsw_core_reg_access_type {
359 	MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
360 	MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
361 };
362 
363 static inline const char *
mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)364 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
365 {
366 	switch (type) {
367 	case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
368 		return "query";
369 	case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
370 		return "write";
371 	}
372 	BUG();
373 }
374 
mlxsw_emad_pack_end_tlv(char * end_tlv)375 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
376 {
377 	mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
378 	mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
379 }
380 
mlxsw_emad_pack_reg_tlv(char * reg_tlv,const struct mlxsw_reg_info * reg,char * payload)381 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
382 				    const struct mlxsw_reg_info *reg,
383 				    char *payload)
384 {
385 	mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
386 	mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
387 	memcpy(reg_tlv + sizeof(u32), payload, reg->len);
388 }
389 
mlxsw_emad_pack_string_tlv(char * string_tlv)390 static void mlxsw_emad_pack_string_tlv(char *string_tlv)
391 {
392 	mlxsw_emad_string_tlv_type_set(string_tlv, MLXSW_EMAD_TLV_TYPE_STRING);
393 	mlxsw_emad_string_tlv_len_set(string_tlv, MLXSW_EMAD_STRING_TLV_LEN);
394 }
395 
mlxsw_emad_pack_op_tlv(char * op_tlv,const struct mlxsw_reg_info * reg,enum mlxsw_core_reg_access_type type,u64 tid)396 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
397 				   const struct mlxsw_reg_info *reg,
398 				   enum mlxsw_core_reg_access_type type,
399 				   u64 tid)
400 {
401 	mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
402 	mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
403 	mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
404 	mlxsw_emad_op_tlv_status_set(op_tlv, 0);
405 	mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
406 	mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
407 	if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
408 		mlxsw_emad_op_tlv_method_set(op_tlv,
409 					     MLXSW_EMAD_OP_TLV_METHOD_QUERY);
410 	else
411 		mlxsw_emad_op_tlv_method_set(op_tlv,
412 					     MLXSW_EMAD_OP_TLV_METHOD_WRITE);
413 	mlxsw_emad_op_tlv_class_set(op_tlv,
414 				    MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
415 	mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
416 }
417 
mlxsw_emad_construct_eth_hdr(struct sk_buff * skb)418 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
419 {
420 	char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
421 
422 	mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
423 	mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
424 	mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
425 	mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
426 	mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
427 
428 	skb_reset_mac_header(skb);
429 
430 	return 0;
431 }
432 
mlxsw_emad_construct(struct sk_buff * skb,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,u64 tid,bool enable_string_tlv)433 static void mlxsw_emad_construct(struct sk_buff *skb,
434 				 const struct mlxsw_reg_info *reg,
435 				 char *payload,
436 				 enum mlxsw_core_reg_access_type type,
437 				 u64 tid, bool enable_string_tlv)
438 {
439 	char *buf;
440 
441 	buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
442 	mlxsw_emad_pack_end_tlv(buf);
443 
444 	buf = skb_push(skb, reg->len + sizeof(u32));
445 	mlxsw_emad_pack_reg_tlv(buf, reg, payload);
446 
447 	if (enable_string_tlv) {
448 		buf = skb_push(skb, MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32));
449 		mlxsw_emad_pack_string_tlv(buf);
450 	}
451 
452 	buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
453 	mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
454 
455 	mlxsw_emad_construct_eth_hdr(skb);
456 }
457 
458 struct mlxsw_emad_tlv_offsets {
459 	u16 op_tlv;
460 	u16 string_tlv;
461 	u16 reg_tlv;
462 };
463 
mlxsw_emad_tlv_is_string_tlv(const char * tlv)464 static bool mlxsw_emad_tlv_is_string_tlv(const char *tlv)
465 {
466 	u8 tlv_type = mlxsw_emad_string_tlv_type_get(tlv);
467 
468 	return tlv_type == MLXSW_EMAD_TLV_TYPE_STRING;
469 }
470 
mlxsw_emad_tlv_parse(struct sk_buff * skb)471 static void mlxsw_emad_tlv_parse(struct sk_buff *skb)
472 {
473 	struct mlxsw_emad_tlv_offsets *offsets =
474 		(struct mlxsw_emad_tlv_offsets *) skb->cb;
475 
476 	offsets->op_tlv = MLXSW_EMAD_ETH_HDR_LEN;
477 	offsets->string_tlv = 0;
478 	offsets->reg_tlv = MLXSW_EMAD_ETH_HDR_LEN +
479 			   MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
480 
481 	/* If string TLV is present, it must come after the operation TLV. */
482 	if (mlxsw_emad_tlv_is_string_tlv(skb->data + offsets->reg_tlv)) {
483 		offsets->string_tlv = offsets->reg_tlv;
484 		offsets->reg_tlv += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);
485 	}
486 }
487 
mlxsw_emad_op_tlv(const struct sk_buff * skb)488 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
489 {
490 	struct mlxsw_emad_tlv_offsets *offsets =
491 		(struct mlxsw_emad_tlv_offsets *) skb->cb;
492 
493 	return ((char *) (skb->data + offsets->op_tlv));
494 }
495 
mlxsw_emad_string_tlv(const struct sk_buff * skb)496 static char *mlxsw_emad_string_tlv(const struct sk_buff *skb)
497 {
498 	struct mlxsw_emad_tlv_offsets *offsets =
499 		(struct mlxsw_emad_tlv_offsets *) skb->cb;
500 
501 	if (!offsets->string_tlv)
502 		return NULL;
503 
504 	return ((char *) (skb->data + offsets->string_tlv));
505 }
506 
mlxsw_emad_reg_tlv(const struct sk_buff * skb)507 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
508 {
509 	struct mlxsw_emad_tlv_offsets *offsets =
510 		(struct mlxsw_emad_tlv_offsets *) skb->cb;
511 
512 	return ((char *) (skb->data + offsets->reg_tlv));
513 }
514 
mlxsw_emad_reg_payload(const char * reg_tlv)515 static char *mlxsw_emad_reg_payload(const char *reg_tlv)
516 {
517 	return ((char *) (reg_tlv + sizeof(u32)));
518 }
519 
mlxsw_emad_reg_payload_cmd(const char * mbox)520 static char *mlxsw_emad_reg_payload_cmd(const char *mbox)
521 {
522 	return ((char *) (mbox + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
523 }
524 
mlxsw_emad_get_tid(const struct sk_buff * skb)525 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
526 {
527 	char *op_tlv;
528 
529 	op_tlv = mlxsw_emad_op_tlv(skb);
530 	return mlxsw_emad_op_tlv_tid_get(op_tlv);
531 }
532 
mlxsw_emad_is_resp(const struct sk_buff * skb)533 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
534 {
535 	char *op_tlv;
536 
537 	op_tlv = mlxsw_emad_op_tlv(skb);
538 	return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
539 }
540 
mlxsw_emad_process_status(char * op_tlv,enum mlxsw_emad_op_tlv_status * p_status)541 static int mlxsw_emad_process_status(char *op_tlv,
542 				     enum mlxsw_emad_op_tlv_status *p_status)
543 {
544 	*p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
545 
546 	switch (*p_status) {
547 	case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
548 		return 0;
549 	case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
550 	case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
551 		return -EAGAIN;
552 	case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
553 	case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
554 	case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
555 	case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
556 	case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
557 	case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
558 	case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
559 	case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
560 	default:
561 		return -EIO;
562 	}
563 }
564 
565 static int
mlxsw_emad_process_status_skb(struct sk_buff * skb,enum mlxsw_emad_op_tlv_status * p_status)566 mlxsw_emad_process_status_skb(struct sk_buff *skb,
567 			      enum mlxsw_emad_op_tlv_status *p_status)
568 {
569 	return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
570 }
571 
572 struct mlxsw_reg_trans {
573 	struct list_head list;
574 	struct list_head bulk_list;
575 	struct mlxsw_core *core;
576 	struct sk_buff *tx_skb;
577 	struct mlxsw_tx_info tx_info;
578 	struct delayed_work timeout_dw;
579 	unsigned int retries;
580 	u64 tid;
581 	struct completion completion;
582 	atomic_t active;
583 	mlxsw_reg_trans_cb_t *cb;
584 	unsigned long cb_priv;
585 	const struct mlxsw_reg_info *reg;
586 	enum mlxsw_core_reg_access_type type;
587 	int err;
588 	char *emad_err_string;
589 	enum mlxsw_emad_op_tlv_status emad_status;
590 	struct rcu_head rcu;
591 };
592 
mlxsw_emad_process_string_tlv(const struct sk_buff * skb,struct mlxsw_reg_trans * trans)593 static void mlxsw_emad_process_string_tlv(const struct sk_buff *skb,
594 					  struct mlxsw_reg_trans *trans)
595 {
596 	char *string_tlv;
597 	char *string;
598 
599 	string_tlv = mlxsw_emad_string_tlv(skb);
600 	if (!string_tlv)
601 		return;
602 
603 	trans->emad_err_string = kzalloc(MLXSW_EMAD_STRING_TLV_STRING_LEN,
604 					 GFP_ATOMIC);
605 	if (!trans->emad_err_string)
606 		return;
607 
608 	string = mlxsw_emad_string_tlv_string_data(string_tlv);
609 	strlcpy(trans->emad_err_string, string,
610 		MLXSW_EMAD_STRING_TLV_STRING_LEN);
611 }
612 
613 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS	3000
614 #define MLXSW_EMAD_TIMEOUT_MS			200
615 
mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans * trans)616 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
617 {
618 	unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
619 
620 	if (trans->core->fw_flash_in_progress)
621 		timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
622 
623 	queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw,
624 			   timeout << trans->retries);
625 }
626 
mlxsw_emad_transmit(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans)627 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
628 			       struct mlxsw_reg_trans *trans)
629 {
630 	struct sk_buff *skb;
631 	int err;
632 
633 	skb = skb_clone(trans->tx_skb, GFP_KERNEL);
634 	if (!skb)
635 		return -ENOMEM;
636 
637 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
638 			    skb->data + mlxsw_core->driver->txhdr_len,
639 			    skb->len - mlxsw_core->driver->txhdr_len);
640 
641 	atomic_set(&trans->active, 1);
642 	err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
643 	if (err) {
644 		dev_kfree_skb(skb);
645 		return err;
646 	}
647 	mlxsw_emad_trans_timeout_schedule(trans);
648 	return 0;
649 }
650 
mlxsw_emad_trans_finish(struct mlxsw_reg_trans * trans,int err)651 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
652 {
653 	struct mlxsw_core *mlxsw_core = trans->core;
654 
655 	dev_kfree_skb(trans->tx_skb);
656 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
657 	list_del_rcu(&trans->list);
658 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
659 	trans->err = err;
660 	complete(&trans->completion);
661 }
662 
mlxsw_emad_transmit_retry(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans)663 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
664 				      struct mlxsw_reg_trans *trans)
665 {
666 	int err;
667 
668 	if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
669 		trans->retries++;
670 		err = mlxsw_emad_transmit(trans->core, trans);
671 		if (err == 0)
672 			return;
673 
674 		if (!atomic_dec_and_test(&trans->active))
675 			return;
676 	} else {
677 		err = -EIO;
678 	}
679 	mlxsw_emad_trans_finish(trans, err);
680 }
681 
mlxsw_emad_trans_timeout_work(struct work_struct * work)682 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
683 {
684 	struct mlxsw_reg_trans *trans = container_of(work,
685 						     struct mlxsw_reg_trans,
686 						     timeout_dw.work);
687 
688 	if (!atomic_dec_and_test(&trans->active))
689 		return;
690 
691 	mlxsw_emad_transmit_retry(trans->core, trans);
692 }
693 
mlxsw_emad_process_response(struct mlxsw_core * mlxsw_core,struct mlxsw_reg_trans * trans,struct sk_buff * skb)694 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
695 					struct mlxsw_reg_trans *trans,
696 					struct sk_buff *skb)
697 {
698 	int err;
699 
700 	if (!atomic_dec_and_test(&trans->active))
701 		return;
702 
703 	err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
704 	if (err == -EAGAIN) {
705 		mlxsw_emad_transmit_retry(mlxsw_core, trans);
706 	} else {
707 		if (err == 0) {
708 			char *reg_tlv = mlxsw_emad_reg_tlv(skb);
709 
710 			if (trans->cb)
711 				trans->cb(mlxsw_core,
712 					  mlxsw_emad_reg_payload(reg_tlv),
713 					  trans->reg->len, trans->cb_priv);
714 		} else {
715 			mlxsw_emad_process_string_tlv(skb, trans);
716 		}
717 		mlxsw_emad_trans_finish(trans, err);
718 	}
719 }
720 
721 /* called with rcu read lock held */
mlxsw_emad_rx_listener_func(struct sk_buff * skb,u8 local_port,void * priv)722 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
723 					void *priv)
724 {
725 	struct mlxsw_core *mlxsw_core = priv;
726 	struct mlxsw_reg_trans *trans;
727 
728 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
729 			    skb->data, skb->len);
730 
731 	mlxsw_emad_tlv_parse(skb);
732 
733 	if (!mlxsw_emad_is_resp(skb))
734 		goto free_skb;
735 
736 	list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
737 		if (mlxsw_emad_get_tid(skb) == trans->tid) {
738 			mlxsw_emad_process_response(mlxsw_core, trans, skb);
739 			break;
740 		}
741 	}
742 
743 free_skb:
744 	dev_kfree_skb(skb);
745 }
746 
747 static const struct mlxsw_listener mlxsw_emad_rx_listener =
748 	MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
749 		  EMAD, DISCARD);
750 
mlxsw_emad_init(struct mlxsw_core * mlxsw_core)751 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
752 {
753 	struct workqueue_struct *emad_wq;
754 	u64 tid;
755 	int err;
756 
757 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
758 		return 0;
759 
760 	emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0);
761 	if (!emad_wq)
762 		return -ENOMEM;
763 	mlxsw_core->emad_wq = emad_wq;
764 
765 	/* Set the upper 32 bits of the transaction ID field to a random
766 	 * number. This allows us to discard EMADs addressed to other
767 	 * devices.
768 	 */
769 	get_random_bytes(&tid, 4);
770 	tid <<= 32;
771 	atomic64_set(&mlxsw_core->emad.tid, tid);
772 
773 	INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
774 	spin_lock_init(&mlxsw_core->emad.trans_list_lock);
775 
776 	err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
777 				       mlxsw_core);
778 	if (err)
779 		goto err_trap_register;
780 
781 	err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
782 	if (err)
783 		goto err_emad_trap_set;
784 	mlxsw_core->emad.use_emad = true;
785 
786 	return 0;
787 
788 err_emad_trap_set:
789 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
790 				   mlxsw_core);
791 err_trap_register:
792 	destroy_workqueue(mlxsw_core->emad_wq);
793 	return err;
794 }
795 
mlxsw_emad_fini(struct mlxsw_core * mlxsw_core)796 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
797 {
798 
799 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
800 		return;
801 
802 	mlxsw_core->emad.use_emad = false;
803 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
804 				   mlxsw_core);
805 	destroy_workqueue(mlxsw_core->emad_wq);
806 }
807 
mlxsw_emad_alloc(const struct mlxsw_core * mlxsw_core,u16 reg_len,bool enable_string_tlv)808 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
809 					u16 reg_len, bool enable_string_tlv)
810 {
811 	struct sk_buff *skb;
812 	u16 emad_len;
813 
814 	emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
815 		    (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
816 		    sizeof(u32) + mlxsw_core->driver->txhdr_len);
817 	if (enable_string_tlv)
818 		emad_len += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);
819 	if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
820 		return NULL;
821 
822 	skb = netdev_alloc_skb(NULL, emad_len);
823 	if (!skb)
824 		return NULL;
825 	memset(skb->data, 0, emad_len);
826 	skb_reserve(skb, emad_len);
827 
828 	return skb;
829 }
830 
mlxsw_emad_reg_access(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,struct mlxsw_reg_trans * trans,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv,u64 tid)831 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
832 				 const struct mlxsw_reg_info *reg,
833 				 char *payload,
834 				 enum mlxsw_core_reg_access_type type,
835 				 struct mlxsw_reg_trans *trans,
836 				 struct list_head *bulk_list,
837 				 mlxsw_reg_trans_cb_t *cb,
838 				 unsigned long cb_priv, u64 tid)
839 {
840 	bool enable_string_tlv;
841 	struct sk_buff *skb;
842 	int err;
843 
844 	dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
845 		tid, reg->id, mlxsw_reg_id_str(reg->id),
846 		mlxsw_core_reg_access_type_str(type));
847 
848 	/* Since this can be changed during emad_reg_access, read it once and
849 	 * use the value all the way.
850 	 */
851 	enable_string_tlv = mlxsw_core->emad.enable_string_tlv;
852 
853 	skb = mlxsw_emad_alloc(mlxsw_core, reg->len, enable_string_tlv);
854 	if (!skb)
855 		return -ENOMEM;
856 
857 	list_add_tail(&trans->bulk_list, bulk_list);
858 	trans->core = mlxsw_core;
859 	trans->tx_skb = skb;
860 	trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
861 	trans->tx_info.is_emad = true;
862 	INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
863 	trans->tid = tid;
864 	init_completion(&trans->completion);
865 	trans->cb = cb;
866 	trans->cb_priv = cb_priv;
867 	trans->reg = reg;
868 	trans->type = type;
869 
870 	mlxsw_emad_construct(skb, reg, payload, type, trans->tid,
871 			     enable_string_tlv);
872 	mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
873 
874 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
875 	list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
876 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
877 	err = mlxsw_emad_transmit(mlxsw_core, trans);
878 	if (err)
879 		goto err_out;
880 	return 0;
881 
882 err_out:
883 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
884 	list_del_rcu(&trans->list);
885 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
886 	list_del(&trans->bulk_list);
887 	dev_kfree_skb(trans->tx_skb);
888 	return err;
889 }
890 
891 /*****************
892  * Core functions
893  *****************/
894 
mlxsw_core_driver_register(struct mlxsw_driver * mlxsw_driver)895 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
896 {
897 	spin_lock(&mlxsw_core_driver_list_lock);
898 	list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
899 	spin_unlock(&mlxsw_core_driver_list_lock);
900 	return 0;
901 }
902 EXPORT_SYMBOL(mlxsw_core_driver_register);
903 
mlxsw_core_driver_unregister(struct mlxsw_driver * mlxsw_driver)904 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
905 {
906 	spin_lock(&mlxsw_core_driver_list_lock);
907 	list_del(&mlxsw_driver->list);
908 	spin_unlock(&mlxsw_core_driver_list_lock);
909 }
910 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
911 
__driver_find(const char * kind)912 static struct mlxsw_driver *__driver_find(const char *kind)
913 {
914 	struct mlxsw_driver *mlxsw_driver;
915 
916 	list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
917 		if (strcmp(mlxsw_driver->kind, kind) == 0)
918 			return mlxsw_driver;
919 	}
920 	return NULL;
921 }
922 
mlxsw_core_driver_get(const char * kind)923 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
924 {
925 	struct mlxsw_driver *mlxsw_driver;
926 
927 	spin_lock(&mlxsw_core_driver_list_lock);
928 	mlxsw_driver = __driver_find(kind);
929 	spin_unlock(&mlxsw_core_driver_list_lock);
930 	return mlxsw_driver;
931 }
932 
933 struct mlxsw_core_fw_info {
934 	struct mlxfw_dev mlxfw_dev;
935 	struct mlxsw_core *mlxsw_core;
936 };
937 
mlxsw_core_fw_component_query(struct mlxfw_dev * mlxfw_dev,u16 component_index,u32 * p_max_size,u8 * p_align_bits,u16 * p_max_write_size)938 static int mlxsw_core_fw_component_query(struct mlxfw_dev *mlxfw_dev,
939 					 u16 component_index, u32 *p_max_size,
940 					 u8 *p_align_bits, u16 *p_max_write_size)
941 {
942 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
943 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
944 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
945 	char mcqi_pl[MLXSW_REG_MCQI_LEN];
946 	int err;
947 
948 	mlxsw_reg_mcqi_pack(mcqi_pl, component_index);
949 	err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcqi), mcqi_pl);
950 	if (err)
951 		return err;
952 	mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits, p_max_write_size);
953 
954 	*p_align_bits = max_t(u8, *p_align_bits, 2);
955 	*p_max_write_size = min_t(u16, *p_max_write_size, MLXSW_REG_MCDA_MAX_DATA_LEN);
956 	return 0;
957 }
958 
mlxsw_core_fw_fsm_lock(struct mlxfw_dev * mlxfw_dev,u32 * fwhandle)959 static int mlxsw_core_fw_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle)
960 {
961 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
962 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
963 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
964 	char mcc_pl[MLXSW_REG_MCC_LEN];
965 	u8 control_state;
966 	int err;
967 
968 	mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0);
969 	err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
970 	if (err)
971 		return err;
972 
973 	mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state);
974 	if (control_state != MLXFW_FSM_STATE_IDLE)
975 		return -EBUSY;
976 
977 	mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE, 0, *fwhandle, 0);
978 	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
979 }
980 
mlxsw_core_fw_fsm_component_update(struct mlxfw_dev * mlxfw_dev,u32 fwhandle,u16 component_index,u32 component_size)981 static int mlxsw_core_fw_fsm_component_update(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
982 					      u16 component_index, u32 component_size)
983 {
984 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
985 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
986 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
987 	char mcc_pl[MLXSW_REG_MCC_LEN];
988 
989 	mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT,
990 			   component_index, fwhandle, component_size);
991 	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
992 }
993 
mlxsw_core_fw_fsm_block_download(struct mlxfw_dev * mlxfw_dev,u32 fwhandle,u8 * data,u16 size,u32 offset)994 static int mlxsw_core_fw_fsm_block_download(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
995 					    u8 *data, u16 size, u32 offset)
996 {
997 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
998 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
999 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1000 	char mcda_pl[MLXSW_REG_MCDA_LEN];
1001 
1002 	mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data);
1003 	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl);
1004 }
1005 
mlxsw_core_fw_fsm_component_verify(struct mlxfw_dev * mlxfw_dev,u32 fwhandle,u16 component_index)1006 static int mlxsw_core_fw_fsm_component_verify(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
1007 					      u16 component_index)
1008 {
1009 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1010 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1011 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1012 	char mcc_pl[MLXSW_REG_MCC_LEN];
1013 
1014 	mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT,
1015 			   component_index, fwhandle, 0);
1016 	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1017 }
1018 
mlxsw_core_fw_fsm_activate(struct mlxfw_dev * mlxfw_dev,u32 fwhandle)1019 static int mlxsw_core_fw_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1020 {
1021 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1022 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1023 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1024 	char mcc_pl[MLXSW_REG_MCC_LEN];
1025 
1026 	mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0, fwhandle, 0);
1027 	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1028 }
1029 
mlxsw_core_fw_fsm_query_state(struct mlxfw_dev * mlxfw_dev,u32 fwhandle,enum mlxfw_fsm_state * fsm_state,enum mlxfw_fsm_state_err * fsm_state_err)1030 static int mlxsw_core_fw_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
1031 					 enum mlxfw_fsm_state *fsm_state,
1032 					 enum mlxfw_fsm_state_err *fsm_state_err)
1033 {
1034 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1035 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1036 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1037 	char mcc_pl[MLXSW_REG_MCC_LEN];
1038 	u8 control_state;
1039 	u8 error_code;
1040 	int err;
1041 
1042 	mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0);
1043 	err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1044 	if (err)
1045 		return err;
1046 
1047 	mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state);
1048 	*fsm_state = control_state;
1049 	*fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code, MLXFW_FSM_STATE_ERR_MAX);
1050 	return 0;
1051 }
1052 
mlxsw_core_fw_fsm_cancel(struct mlxfw_dev * mlxfw_dev,u32 fwhandle)1053 static void mlxsw_core_fw_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1054 {
1055 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1056 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1057 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1058 	char mcc_pl[MLXSW_REG_MCC_LEN];
1059 
1060 	mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0, fwhandle, 0);
1061 	mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1062 }
1063 
mlxsw_core_fw_fsm_release(struct mlxfw_dev * mlxfw_dev,u32 fwhandle)1064 static void mlxsw_core_fw_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1065 {
1066 	struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1067 		container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1068 	struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1069 	char mcc_pl[MLXSW_REG_MCC_LEN];
1070 
1071 	mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0, fwhandle, 0);
1072 	mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1073 }
1074 
1075 static const struct mlxfw_dev_ops mlxsw_core_fw_mlxsw_dev_ops = {
1076 	.component_query	= mlxsw_core_fw_component_query,
1077 	.fsm_lock		= mlxsw_core_fw_fsm_lock,
1078 	.fsm_component_update	= mlxsw_core_fw_fsm_component_update,
1079 	.fsm_block_download	= mlxsw_core_fw_fsm_block_download,
1080 	.fsm_component_verify	= mlxsw_core_fw_fsm_component_verify,
1081 	.fsm_activate		= mlxsw_core_fw_fsm_activate,
1082 	.fsm_query_state	= mlxsw_core_fw_fsm_query_state,
1083 	.fsm_cancel		= mlxsw_core_fw_fsm_cancel,
1084 	.fsm_release		= mlxsw_core_fw_fsm_release,
1085 };
1086 
mlxsw_core_fw_flash(struct mlxsw_core * mlxsw_core,const struct firmware * firmware,struct netlink_ext_ack * extack)1087 static int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core, const struct firmware *firmware,
1088 			       struct netlink_ext_ack *extack)
1089 {
1090 	struct mlxsw_core_fw_info mlxsw_core_fw_info = {
1091 		.mlxfw_dev = {
1092 			.ops = &mlxsw_core_fw_mlxsw_dev_ops,
1093 			.psid = mlxsw_core->bus_info->psid,
1094 			.psid_size = strlen(mlxsw_core->bus_info->psid),
1095 			.devlink = priv_to_devlink(mlxsw_core),
1096 		},
1097 		.mlxsw_core = mlxsw_core
1098 	};
1099 	int err;
1100 
1101 	mlxsw_core->fw_flash_in_progress = true;
1102 	err = mlxfw_firmware_flash(&mlxsw_core_fw_info.mlxfw_dev, firmware, extack);
1103 	mlxsw_core->fw_flash_in_progress = false;
1104 
1105 	return err;
1106 }
1107 
mlxsw_core_fw_rev_validate(struct mlxsw_core * mlxsw_core,const struct mlxsw_bus_info * mlxsw_bus_info,const struct mlxsw_fw_rev * req_rev,const char * filename)1108 static int mlxsw_core_fw_rev_validate(struct mlxsw_core *mlxsw_core,
1109 				      const struct mlxsw_bus_info *mlxsw_bus_info,
1110 				      const struct mlxsw_fw_rev *req_rev,
1111 				      const char *filename)
1112 {
1113 	const struct mlxsw_fw_rev *rev = &mlxsw_bus_info->fw_rev;
1114 	union devlink_param_value value;
1115 	const struct firmware *firmware;
1116 	int err;
1117 
1118 	/* Don't check if driver does not require it */
1119 	if (!req_rev || !filename)
1120 		return 0;
1121 
1122 	/* Don't check if devlink 'fw_load_policy' param is 'flash' */
1123 	err = devlink_param_driverinit_value_get(priv_to_devlink(mlxsw_core),
1124 						 DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY,
1125 						 &value);
1126 	if (err)
1127 		return err;
1128 	if (value.vu8 == DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH)
1129 		return 0;
1130 
1131 	/* Validate driver & FW are compatible */
1132 	if (rev->major != req_rev->major) {
1133 		WARN(1, "Mismatch in major FW version [%d:%d] is never expected; Please contact support\n",
1134 		     rev->major, req_rev->major);
1135 		return -EINVAL;
1136 	}
1137 	if (mlxsw_core_fw_rev_minor_subminor_validate(rev, req_rev))
1138 		return 0;
1139 
1140 	dev_err(mlxsw_bus_info->dev, "The firmware version %d.%d.%d is incompatible with the driver (required >= %d.%d.%d)\n",
1141 		rev->major, rev->minor, rev->subminor, req_rev->major,
1142 		req_rev->minor, req_rev->subminor);
1143 	dev_info(mlxsw_bus_info->dev, "Flashing firmware using file %s\n", filename);
1144 
1145 	err = request_firmware_direct(&firmware, filename, mlxsw_bus_info->dev);
1146 	if (err) {
1147 		dev_err(mlxsw_bus_info->dev, "Could not request firmware file %s\n", filename);
1148 		return err;
1149 	}
1150 
1151 	err = mlxsw_core_fw_flash(mlxsw_core, firmware, NULL);
1152 	release_firmware(firmware);
1153 	if (err)
1154 		dev_err(mlxsw_bus_info->dev, "Could not upgrade firmware\n");
1155 
1156 	/* On FW flash success, tell the caller FW reset is needed
1157 	 * if current FW supports it.
1158 	 */
1159 	if (rev->minor >= req_rev->can_reset_minor)
1160 		return err ? err : -EAGAIN;
1161 	else
1162 		return 0;
1163 }
1164 
mlxsw_core_fw_flash_update(struct mlxsw_core * mlxsw_core,struct devlink_flash_update_params * params,struct netlink_ext_ack * extack)1165 static int mlxsw_core_fw_flash_update(struct mlxsw_core *mlxsw_core,
1166 				      struct devlink_flash_update_params *params,
1167 				      struct netlink_ext_ack *extack)
1168 {
1169 	return mlxsw_core_fw_flash(mlxsw_core, params->fw, extack);
1170 }
1171 
mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)1172 static int mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink *devlink, u32 id,
1173 							    union devlink_param_value val,
1174 							    struct netlink_ext_ack *extack)
1175 {
1176 	if (val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER &&
1177 	    val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) {
1178 		NL_SET_ERR_MSG_MOD(extack, "'fw_load_policy' must be 'driver' or 'flash'");
1179 		return -EINVAL;
1180 	}
1181 
1182 	return 0;
1183 }
1184 
1185 static const struct devlink_param mlxsw_core_fw_devlink_params[] = {
1186 	DEVLINK_PARAM_GENERIC(FW_LOAD_POLICY, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
1187 			      mlxsw_core_devlink_param_fw_load_policy_validate),
1188 };
1189 
mlxsw_core_fw_params_register(struct mlxsw_core * mlxsw_core)1190 static int mlxsw_core_fw_params_register(struct mlxsw_core *mlxsw_core)
1191 {
1192 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1193 	union devlink_param_value value;
1194 	int err;
1195 
1196 	err = devlink_params_register(devlink, mlxsw_core_fw_devlink_params,
1197 				      ARRAY_SIZE(mlxsw_core_fw_devlink_params));
1198 	if (err)
1199 		return err;
1200 
1201 	value.vu8 = DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER;
1202 	devlink_param_driverinit_value_set(devlink, DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY, value);
1203 	return 0;
1204 }
1205 
mlxsw_core_fw_params_unregister(struct mlxsw_core * mlxsw_core)1206 static void mlxsw_core_fw_params_unregister(struct mlxsw_core *mlxsw_core)
1207 {
1208 	devlink_params_unregister(priv_to_devlink(mlxsw_core), mlxsw_core_fw_devlink_params,
1209 				  ARRAY_SIZE(mlxsw_core_fw_devlink_params));
1210 }
1211 
mlxsw_devlink_port_split(struct devlink * devlink,unsigned int port_index,unsigned int count,struct netlink_ext_ack * extack)1212 static int mlxsw_devlink_port_split(struct devlink *devlink,
1213 				    unsigned int port_index,
1214 				    unsigned int count,
1215 				    struct netlink_ext_ack *extack)
1216 {
1217 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1218 
1219 	if (port_index >= mlxsw_core->max_ports) {
1220 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
1221 		return -EINVAL;
1222 	}
1223 	if (!mlxsw_core->driver->port_split)
1224 		return -EOPNOTSUPP;
1225 	return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
1226 					      extack);
1227 }
1228 
mlxsw_devlink_port_unsplit(struct devlink * devlink,unsigned int port_index,struct netlink_ext_ack * extack)1229 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
1230 				      unsigned int port_index,
1231 				      struct netlink_ext_ack *extack)
1232 {
1233 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1234 
1235 	if (port_index >= mlxsw_core->max_ports) {
1236 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
1237 		return -EINVAL;
1238 	}
1239 	if (!mlxsw_core->driver->port_unsplit)
1240 		return -EOPNOTSUPP;
1241 	return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
1242 						extack);
1243 }
1244 
1245 static int
mlxsw_devlink_sb_pool_get(struct devlink * devlink,unsigned int sb_index,u16 pool_index,struct devlink_sb_pool_info * pool_info)1246 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
1247 			  unsigned int sb_index, u16 pool_index,
1248 			  struct devlink_sb_pool_info *pool_info)
1249 {
1250 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1251 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1252 
1253 	if (!mlxsw_driver->sb_pool_get)
1254 		return -EOPNOTSUPP;
1255 	return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
1256 					 pool_index, pool_info);
1257 }
1258 
1259 static int
mlxsw_devlink_sb_pool_set(struct devlink * devlink,unsigned int sb_index,u16 pool_index,u32 size,enum devlink_sb_threshold_type threshold_type,struct netlink_ext_ack * extack)1260 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
1261 			  unsigned int sb_index, u16 pool_index, u32 size,
1262 			  enum devlink_sb_threshold_type threshold_type,
1263 			  struct netlink_ext_ack *extack)
1264 {
1265 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1266 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1267 
1268 	if (!mlxsw_driver->sb_pool_set)
1269 		return -EOPNOTSUPP;
1270 	return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
1271 					 pool_index, size, threshold_type,
1272 					 extack);
1273 }
1274 
__dl_port(struct devlink_port * devlink_port)1275 static void *__dl_port(struct devlink_port *devlink_port)
1276 {
1277 	return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
1278 }
1279 
mlxsw_devlink_port_type_set(struct devlink_port * devlink_port,enum devlink_port_type port_type)1280 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
1281 				       enum devlink_port_type port_type)
1282 {
1283 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1284 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1285 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1286 
1287 	if (!mlxsw_driver->port_type_set)
1288 		return -EOPNOTSUPP;
1289 
1290 	return mlxsw_driver->port_type_set(mlxsw_core,
1291 					   mlxsw_core_port->local_port,
1292 					   port_type);
1293 }
1294 
mlxsw_devlink_sb_port_pool_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 * p_threshold)1295 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
1296 					  unsigned int sb_index, u16 pool_index,
1297 					  u32 *p_threshold)
1298 {
1299 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1300 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1301 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1302 
1303 	if (!mlxsw_driver->sb_port_pool_get ||
1304 	    !mlxsw_core_port_check(mlxsw_core_port))
1305 		return -EOPNOTSUPP;
1306 	return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
1307 					      pool_index, p_threshold);
1308 }
1309 
mlxsw_devlink_sb_port_pool_set(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 threshold,struct netlink_ext_ack * extack)1310 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
1311 					  unsigned int sb_index, u16 pool_index,
1312 					  u32 threshold,
1313 					  struct netlink_ext_ack *extack)
1314 {
1315 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1316 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1317 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1318 
1319 	if (!mlxsw_driver->sb_port_pool_set ||
1320 	    !mlxsw_core_port_check(mlxsw_core_port))
1321 		return -EOPNOTSUPP;
1322 	return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
1323 					      pool_index, threshold, extack);
1324 }
1325 
1326 static int
mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 * p_pool_index,u32 * p_threshold)1327 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
1328 				  unsigned int sb_index, u16 tc_index,
1329 				  enum devlink_sb_pool_type pool_type,
1330 				  u16 *p_pool_index, u32 *p_threshold)
1331 {
1332 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1333 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1334 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1335 
1336 	if (!mlxsw_driver->sb_tc_pool_bind_get ||
1337 	    !mlxsw_core_port_check(mlxsw_core_port))
1338 		return -EOPNOTSUPP;
1339 	return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
1340 						 tc_index, pool_type,
1341 						 p_pool_index, p_threshold);
1342 }
1343 
1344 static int
mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u16 pool_index,u32 threshold,struct netlink_ext_ack * extack)1345 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
1346 				  unsigned int sb_index, u16 tc_index,
1347 				  enum devlink_sb_pool_type pool_type,
1348 				  u16 pool_index, u32 threshold,
1349 				  struct netlink_ext_ack *extack)
1350 {
1351 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1352 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1353 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1354 
1355 	if (!mlxsw_driver->sb_tc_pool_bind_set ||
1356 	    !mlxsw_core_port_check(mlxsw_core_port))
1357 		return -EOPNOTSUPP;
1358 	return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
1359 						 tc_index, pool_type,
1360 						 pool_index, threshold, extack);
1361 }
1362 
mlxsw_devlink_sb_occ_snapshot(struct devlink * devlink,unsigned int sb_index)1363 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
1364 					 unsigned int sb_index)
1365 {
1366 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1367 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1368 
1369 	if (!mlxsw_driver->sb_occ_snapshot)
1370 		return -EOPNOTSUPP;
1371 	return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
1372 }
1373 
mlxsw_devlink_sb_occ_max_clear(struct devlink * devlink,unsigned int sb_index)1374 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
1375 					  unsigned int sb_index)
1376 {
1377 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1378 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1379 
1380 	if (!mlxsw_driver->sb_occ_max_clear)
1381 		return -EOPNOTSUPP;
1382 	return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
1383 }
1384 
1385 static int
mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 pool_index,u32 * p_cur,u32 * p_max)1386 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
1387 				   unsigned int sb_index, u16 pool_index,
1388 				   u32 *p_cur, u32 *p_max)
1389 {
1390 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1391 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1392 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1393 
1394 	if (!mlxsw_driver->sb_occ_port_pool_get ||
1395 	    !mlxsw_core_port_check(mlxsw_core_port))
1396 		return -EOPNOTSUPP;
1397 	return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
1398 						  pool_index, p_cur, p_max);
1399 }
1400 
1401 static int
mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port * devlink_port,unsigned int sb_index,u16 tc_index,enum devlink_sb_pool_type pool_type,u32 * p_cur,u32 * p_max)1402 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
1403 				      unsigned int sb_index, u16 tc_index,
1404 				      enum devlink_sb_pool_type pool_type,
1405 				      u32 *p_cur, u32 *p_max)
1406 {
1407 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1408 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1409 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1410 
1411 	if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
1412 	    !mlxsw_core_port_check(mlxsw_core_port))
1413 		return -EOPNOTSUPP;
1414 	return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
1415 						     sb_index, tc_index,
1416 						     pool_type, p_cur, p_max);
1417 }
1418 
1419 static int
mlxsw_devlink_info_get(struct devlink * devlink,struct devlink_info_req * req,struct netlink_ext_ack * extack)1420 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
1421 		       struct netlink_ext_ack *extack)
1422 {
1423 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1424 	char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
1425 	u32 hw_rev, fw_major, fw_minor, fw_sub_minor;
1426 	char mgir_pl[MLXSW_REG_MGIR_LEN];
1427 	char buf[32];
1428 	int err;
1429 
1430 	err = devlink_info_driver_name_put(req,
1431 					   mlxsw_core->bus_info->device_kind);
1432 	if (err)
1433 		return err;
1434 
1435 	mlxsw_reg_mgir_pack(mgir_pl);
1436 	err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl);
1437 	if (err)
1438 		return err;
1439 	mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major,
1440 			      &fw_minor, &fw_sub_minor);
1441 
1442 	sprintf(buf, "%X", hw_rev);
1443 	err = devlink_info_version_fixed_put(req, "hw.revision", buf);
1444 	if (err)
1445 		return err;
1446 
1447 	err = devlink_info_version_fixed_put(req,
1448 					     DEVLINK_INFO_VERSION_GENERIC_FW_PSID,
1449 					     fw_info_psid);
1450 	if (err)
1451 		return err;
1452 
1453 	sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor);
1454 	err = devlink_info_version_running_put(req, "fw.version", buf);
1455 	if (err)
1456 		return err;
1457 
1458 	return devlink_info_version_running_put(req,
1459 						DEVLINK_INFO_VERSION_GENERIC_FW,
1460 						buf);
1461 }
1462 
1463 static int
mlxsw_devlink_core_bus_device_reload_down(struct devlink * devlink,bool netns_change,enum devlink_reload_action action,enum devlink_reload_limit limit,struct netlink_ext_ack * extack)1464 mlxsw_devlink_core_bus_device_reload_down(struct devlink *devlink,
1465 					  bool netns_change, enum devlink_reload_action action,
1466 					  enum devlink_reload_limit limit,
1467 					  struct netlink_ext_ack *extack)
1468 {
1469 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1470 
1471 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
1472 		return -EOPNOTSUPP;
1473 
1474 	mlxsw_core_bus_device_unregister(mlxsw_core, true);
1475 	return 0;
1476 }
1477 
1478 static int
mlxsw_devlink_core_bus_device_reload_up(struct devlink * devlink,enum devlink_reload_action action,enum devlink_reload_limit limit,u32 * actions_performed,struct netlink_ext_ack * extack)1479 mlxsw_devlink_core_bus_device_reload_up(struct devlink *devlink, enum devlink_reload_action action,
1480 					enum devlink_reload_limit limit, u32 *actions_performed,
1481 					struct netlink_ext_ack *extack)
1482 {
1483 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1484 
1485 	*actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
1486 			     BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE);
1487 	return mlxsw_core_bus_device_register(mlxsw_core->bus_info,
1488 					      mlxsw_core->bus,
1489 					      mlxsw_core->bus_priv, true,
1490 					      devlink, extack);
1491 }
1492 
mlxsw_devlink_flash_update(struct devlink * devlink,struct devlink_flash_update_params * params,struct netlink_ext_ack * extack)1493 static int mlxsw_devlink_flash_update(struct devlink *devlink,
1494 				      struct devlink_flash_update_params *params,
1495 				      struct netlink_ext_ack *extack)
1496 {
1497 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1498 
1499 	return mlxsw_core_fw_flash_update(mlxsw_core, params, extack);
1500 }
1501 
mlxsw_devlink_trap_init(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)1502 static int mlxsw_devlink_trap_init(struct devlink *devlink,
1503 				   const struct devlink_trap *trap,
1504 				   void *trap_ctx)
1505 {
1506 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1507 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1508 
1509 	if (!mlxsw_driver->trap_init)
1510 		return -EOPNOTSUPP;
1511 	return mlxsw_driver->trap_init(mlxsw_core, trap, trap_ctx);
1512 }
1513 
mlxsw_devlink_trap_fini(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)1514 static void mlxsw_devlink_trap_fini(struct devlink *devlink,
1515 				    const struct devlink_trap *trap,
1516 				    void *trap_ctx)
1517 {
1518 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1519 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1520 
1521 	if (!mlxsw_driver->trap_fini)
1522 		return;
1523 	mlxsw_driver->trap_fini(mlxsw_core, trap, trap_ctx);
1524 }
1525 
mlxsw_devlink_trap_action_set(struct devlink * devlink,const struct devlink_trap * trap,enum devlink_trap_action action,struct netlink_ext_ack * extack)1526 static int mlxsw_devlink_trap_action_set(struct devlink *devlink,
1527 					 const struct devlink_trap *trap,
1528 					 enum devlink_trap_action action,
1529 					 struct netlink_ext_ack *extack)
1530 {
1531 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1532 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1533 
1534 	if (!mlxsw_driver->trap_action_set)
1535 		return -EOPNOTSUPP;
1536 	return mlxsw_driver->trap_action_set(mlxsw_core, trap, action, extack);
1537 }
1538 
1539 static int
mlxsw_devlink_trap_group_init(struct devlink * devlink,const struct devlink_trap_group * group)1540 mlxsw_devlink_trap_group_init(struct devlink *devlink,
1541 			      const struct devlink_trap_group *group)
1542 {
1543 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1544 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1545 
1546 	if (!mlxsw_driver->trap_group_init)
1547 		return -EOPNOTSUPP;
1548 	return mlxsw_driver->trap_group_init(mlxsw_core, group);
1549 }
1550 
1551 static int
mlxsw_devlink_trap_group_set(struct devlink * devlink,const struct devlink_trap_group * group,const struct devlink_trap_policer * policer,struct netlink_ext_ack * extack)1552 mlxsw_devlink_trap_group_set(struct devlink *devlink,
1553 			     const struct devlink_trap_group *group,
1554 			     const struct devlink_trap_policer *policer,
1555 			     struct netlink_ext_ack *extack)
1556 {
1557 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1558 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1559 
1560 	if (!mlxsw_driver->trap_group_set)
1561 		return -EOPNOTSUPP;
1562 	return mlxsw_driver->trap_group_set(mlxsw_core, group, policer, extack);
1563 }
1564 
1565 static int
mlxsw_devlink_trap_policer_init(struct devlink * devlink,const struct devlink_trap_policer * policer)1566 mlxsw_devlink_trap_policer_init(struct devlink *devlink,
1567 				const struct devlink_trap_policer *policer)
1568 {
1569 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1570 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1571 
1572 	if (!mlxsw_driver->trap_policer_init)
1573 		return -EOPNOTSUPP;
1574 	return mlxsw_driver->trap_policer_init(mlxsw_core, policer);
1575 }
1576 
1577 static void
mlxsw_devlink_trap_policer_fini(struct devlink * devlink,const struct devlink_trap_policer * policer)1578 mlxsw_devlink_trap_policer_fini(struct devlink *devlink,
1579 				const struct devlink_trap_policer *policer)
1580 {
1581 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1582 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1583 
1584 	if (!mlxsw_driver->trap_policer_fini)
1585 		return;
1586 	mlxsw_driver->trap_policer_fini(mlxsw_core, policer);
1587 }
1588 
1589 static int
mlxsw_devlink_trap_policer_set(struct devlink * devlink,const struct devlink_trap_policer * policer,u64 rate,u64 burst,struct netlink_ext_ack * extack)1590 mlxsw_devlink_trap_policer_set(struct devlink *devlink,
1591 			       const struct devlink_trap_policer *policer,
1592 			       u64 rate, u64 burst,
1593 			       struct netlink_ext_ack *extack)
1594 {
1595 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1596 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1597 
1598 	if (!mlxsw_driver->trap_policer_set)
1599 		return -EOPNOTSUPP;
1600 	return mlxsw_driver->trap_policer_set(mlxsw_core, policer, rate, burst,
1601 					      extack);
1602 }
1603 
1604 static int
mlxsw_devlink_trap_policer_counter_get(struct devlink * devlink,const struct devlink_trap_policer * policer,u64 * p_drops)1605 mlxsw_devlink_trap_policer_counter_get(struct devlink *devlink,
1606 				       const struct devlink_trap_policer *policer,
1607 				       u64 *p_drops)
1608 {
1609 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1610 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1611 
1612 	if (!mlxsw_driver->trap_policer_counter_get)
1613 		return -EOPNOTSUPP;
1614 	return mlxsw_driver->trap_policer_counter_get(mlxsw_core, policer,
1615 						      p_drops);
1616 }
1617 
1618 static const struct devlink_ops mlxsw_devlink_ops = {
1619 	.reload_actions		= BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
1620 				  BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
1621 	.reload_down		= mlxsw_devlink_core_bus_device_reload_down,
1622 	.reload_up		= mlxsw_devlink_core_bus_device_reload_up,
1623 	.port_type_set			= mlxsw_devlink_port_type_set,
1624 	.port_split			= mlxsw_devlink_port_split,
1625 	.port_unsplit			= mlxsw_devlink_port_unsplit,
1626 	.sb_pool_get			= mlxsw_devlink_sb_pool_get,
1627 	.sb_pool_set			= mlxsw_devlink_sb_pool_set,
1628 	.sb_port_pool_get		= mlxsw_devlink_sb_port_pool_get,
1629 	.sb_port_pool_set		= mlxsw_devlink_sb_port_pool_set,
1630 	.sb_tc_pool_bind_get		= mlxsw_devlink_sb_tc_pool_bind_get,
1631 	.sb_tc_pool_bind_set		= mlxsw_devlink_sb_tc_pool_bind_set,
1632 	.sb_occ_snapshot		= mlxsw_devlink_sb_occ_snapshot,
1633 	.sb_occ_max_clear		= mlxsw_devlink_sb_occ_max_clear,
1634 	.sb_occ_port_pool_get		= mlxsw_devlink_sb_occ_port_pool_get,
1635 	.sb_occ_tc_port_bind_get	= mlxsw_devlink_sb_occ_tc_port_bind_get,
1636 	.info_get			= mlxsw_devlink_info_get,
1637 	.flash_update			= mlxsw_devlink_flash_update,
1638 	.trap_init			= mlxsw_devlink_trap_init,
1639 	.trap_fini			= mlxsw_devlink_trap_fini,
1640 	.trap_action_set		= mlxsw_devlink_trap_action_set,
1641 	.trap_group_init		= mlxsw_devlink_trap_group_init,
1642 	.trap_group_set			= mlxsw_devlink_trap_group_set,
1643 	.trap_policer_init		= mlxsw_devlink_trap_policer_init,
1644 	.trap_policer_fini		= mlxsw_devlink_trap_policer_fini,
1645 	.trap_policer_set		= mlxsw_devlink_trap_policer_set,
1646 	.trap_policer_counter_get	= mlxsw_devlink_trap_policer_counter_get,
1647 };
1648 
mlxsw_core_params_register(struct mlxsw_core * mlxsw_core)1649 static int mlxsw_core_params_register(struct mlxsw_core *mlxsw_core)
1650 {
1651 	int err;
1652 
1653 	err = mlxsw_core_fw_params_register(mlxsw_core);
1654 	if (err)
1655 		return err;
1656 
1657 	if (mlxsw_core->driver->params_register) {
1658 		err = mlxsw_core->driver->params_register(mlxsw_core);
1659 		if (err)
1660 			goto err_params_register;
1661 	}
1662 	return 0;
1663 
1664 err_params_register:
1665 	mlxsw_core_fw_params_unregister(mlxsw_core);
1666 	return err;
1667 }
1668 
mlxsw_core_params_unregister(struct mlxsw_core * mlxsw_core)1669 static void mlxsw_core_params_unregister(struct mlxsw_core *mlxsw_core)
1670 {
1671 	mlxsw_core_fw_params_unregister(mlxsw_core);
1672 	if (mlxsw_core->driver->params_register)
1673 		mlxsw_core->driver->params_unregister(mlxsw_core);
1674 }
1675 
1676 struct mlxsw_core_health_event {
1677 	struct mlxsw_core *mlxsw_core;
1678 	char mfde_pl[MLXSW_REG_MFDE_LEN];
1679 	struct work_struct work;
1680 };
1681 
mlxsw_core_health_event_work(struct work_struct * work)1682 static void mlxsw_core_health_event_work(struct work_struct *work)
1683 {
1684 	struct mlxsw_core_health_event *event;
1685 	struct mlxsw_core *mlxsw_core;
1686 
1687 	event = container_of(work, struct mlxsw_core_health_event, work);
1688 	mlxsw_core = event->mlxsw_core;
1689 	devlink_health_report(mlxsw_core->health.fw_fatal, "FW fatal event occurred",
1690 			      event->mfde_pl);
1691 	kfree(event);
1692 }
1693 
mlxsw_core_health_listener_func(const struct mlxsw_reg_info * reg,char * mfde_pl,void * priv)1694 static void mlxsw_core_health_listener_func(const struct mlxsw_reg_info *reg,
1695 					    char *mfde_pl, void *priv)
1696 {
1697 	struct mlxsw_core_health_event *event;
1698 	struct mlxsw_core *mlxsw_core = priv;
1699 
1700 	event = kmalloc(sizeof(*event), GFP_ATOMIC);
1701 	if (!event)
1702 		return;
1703 	event->mlxsw_core = mlxsw_core;
1704 	memcpy(event->mfde_pl, mfde_pl, sizeof(event->mfde_pl));
1705 	INIT_WORK(&event->work, mlxsw_core_health_event_work);
1706 	mlxsw_core_schedule_work(&event->work);
1707 }
1708 
1709 static const struct mlxsw_listener mlxsw_core_health_listener =
1710 	MLXSW_EVENTL(mlxsw_core_health_listener_func, MFDE, MFDE);
1711 
mlxsw_core_health_fw_fatal_dump(struct devlink_health_reporter * reporter,struct devlink_fmsg * fmsg,void * priv_ctx,struct netlink_ext_ack * extack)1712 static int mlxsw_core_health_fw_fatal_dump(struct devlink_health_reporter *reporter,
1713 					   struct devlink_fmsg *fmsg, void *priv_ctx,
1714 					   struct netlink_ext_ack *extack)
1715 {
1716 	char *mfde_pl = priv_ctx;
1717 	char *val_str;
1718 	u8 event_id;
1719 	u32 val;
1720 	int err;
1721 
1722 	if (!priv_ctx)
1723 		/* User-triggered dumps are not possible */
1724 		return -EOPNOTSUPP;
1725 
1726 	val = mlxsw_reg_mfde_irisc_id_get(mfde_pl);
1727 	err = devlink_fmsg_u8_pair_put(fmsg, "irisc_id", val);
1728 	if (err)
1729 		return err;
1730 	err = devlink_fmsg_arr_pair_nest_start(fmsg, "event");
1731 	if (err)
1732 		return err;
1733 
1734 	event_id = mlxsw_reg_mfde_event_id_get(mfde_pl);
1735 	err = devlink_fmsg_u32_pair_put(fmsg, "id", event_id);
1736 	if (err)
1737 		return err;
1738 	switch (event_id) {
1739 	case MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO:
1740 		val_str = "CR space timeout";
1741 		break;
1742 	case MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP:
1743 		val_str = "KVD insertion machine stopped";
1744 		break;
1745 	default:
1746 		val_str = NULL;
1747 	}
1748 	if (val_str) {
1749 		err = devlink_fmsg_string_pair_put(fmsg, "desc", val_str);
1750 		if (err)
1751 			return err;
1752 	}
1753 	err = devlink_fmsg_arr_pair_nest_end(fmsg);
1754 	if (err)
1755 		return err;
1756 
1757 	val = mlxsw_reg_mfde_method_get(mfde_pl);
1758 	switch (val) {
1759 	case MLXSW_REG_MFDE_METHOD_QUERY:
1760 		val_str = "query";
1761 		break;
1762 	case MLXSW_REG_MFDE_METHOD_WRITE:
1763 		val_str = "write";
1764 		break;
1765 	default:
1766 		val_str = NULL;
1767 	}
1768 	if (val_str) {
1769 		err = devlink_fmsg_string_pair_put(fmsg, "method", val_str);
1770 		if (err)
1771 			return err;
1772 	}
1773 
1774 	val = mlxsw_reg_mfde_long_process_get(mfde_pl);
1775 	err = devlink_fmsg_bool_pair_put(fmsg, "long_process", val);
1776 	if (err)
1777 		return err;
1778 
1779 	val = mlxsw_reg_mfde_command_type_get(mfde_pl);
1780 	switch (val) {
1781 	case MLXSW_REG_MFDE_COMMAND_TYPE_MAD:
1782 		val_str = "mad";
1783 		break;
1784 	case MLXSW_REG_MFDE_COMMAND_TYPE_EMAD:
1785 		val_str = "emad";
1786 		break;
1787 	case MLXSW_REG_MFDE_COMMAND_TYPE_CMDIF:
1788 		val_str = "cmdif";
1789 		break;
1790 	default:
1791 		val_str = NULL;
1792 	}
1793 	if (val_str) {
1794 		err = devlink_fmsg_string_pair_put(fmsg, "command_type", val_str);
1795 		if (err)
1796 			return err;
1797 	}
1798 
1799 	val = mlxsw_reg_mfde_reg_attr_id_get(mfde_pl);
1800 	err = devlink_fmsg_u32_pair_put(fmsg, "reg_attr_id", val);
1801 	if (err)
1802 		return err;
1803 
1804 	if (event_id == MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO) {
1805 		val = mlxsw_reg_mfde_log_address_get(mfde_pl);
1806 		err = devlink_fmsg_u32_pair_put(fmsg, "log_address", val);
1807 		if (err)
1808 			return err;
1809 		val = mlxsw_reg_mfde_log_id_get(mfde_pl);
1810 		err = devlink_fmsg_u8_pair_put(fmsg, "log_irisc_id", val);
1811 		if (err)
1812 			return err;
1813 		val = mlxsw_reg_mfde_log_ip_get(mfde_pl);
1814 		err = devlink_fmsg_u64_pair_put(fmsg, "log_ip", val);
1815 		if (err)
1816 			return err;
1817 	} else if (event_id == MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP) {
1818 		val = mlxsw_reg_mfde_pipes_mask_get(mfde_pl);
1819 		err = devlink_fmsg_u32_pair_put(fmsg, "pipes_mask", val);
1820 		if (err)
1821 			return err;
1822 	}
1823 
1824 	return 0;
1825 }
1826 
1827 static int
mlxsw_core_health_fw_fatal_test(struct devlink_health_reporter * reporter,struct netlink_ext_ack * extack)1828 mlxsw_core_health_fw_fatal_test(struct devlink_health_reporter *reporter,
1829 				struct netlink_ext_ack *extack)
1830 {
1831 	struct mlxsw_core *mlxsw_core = devlink_health_reporter_priv(reporter);
1832 	char mfgd_pl[MLXSW_REG_MFGD_LEN];
1833 	int err;
1834 
1835 	/* Read the register first to make sure no other bits are changed. */
1836 	err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1837 	if (err)
1838 		return err;
1839 	mlxsw_reg_mfgd_trigger_test_set(mfgd_pl, true);
1840 	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1841 }
1842 
1843 static const struct devlink_health_reporter_ops
1844 mlxsw_core_health_fw_fatal_ops = {
1845 	.name = "fw_fatal",
1846 	.dump = mlxsw_core_health_fw_fatal_dump,
1847 	.test = mlxsw_core_health_fw_fatal_test,
1848 };
1849 
mlxsw_core_health_fw_fatal_config(struct mlxsw_core * mlxsw_core,bool enable)1850 static int mlxsw_core_health_fw_fatal_config(struct mlxsw_core *mlxsw_core,
1851 					     bool enable)
1852 {
1853 	char mfgd_pl[MLXSW_REG_MFGD_LEN];
1854 	int err;
1855 
1856 	/* Read the register first to make sure no other bits are changed. */
1857 	err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1858 	if (err)
1859 		return err;
1860 	mlxsw_reg_mfgd_fatal_event_mode_set(mfgd_pl, enable);
1861 	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1862 }
1863 
mlxsw_core_health_init(struct mlxsw_core * mlxsw_core)1864 static int mlxsw_core_health_init(struct mlxsw_core *mlxsw_core)
1865 {
1866 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1867 	struct devlink_health_reporter *fw_fatal;
1868 	int err;
1869 
1870 	if (!mlxsw_core->driver->fw_fatal_enabled)
1871 		return 0;
1872 
1873 	fw_fatal = devlink_health_reporter_create(devlink, &mlxsw_core_health_fw_fatal_ops,
1874 						  0, mlxsw_core);
1875 	if (IS_ERR(fw_fatal)) {
1876 		dev_err(mlxsw_core->bus_info->dev, "Failed to create fw fatal reporter");
1877 		return PTR_ERR(fw_fatal);
1878 	}
1879 	mlxsw_core->health.fw_fatal = fw_fatal;
1880 
1881 	err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1882 	if (err)
1883 		goto err_trap_register;
1884 
1885 	err = mlxsw_core_health_fw_fatal_config(mlxsw_core, true);
1886 	if (err)
1887 		goto err_fw_fatal_config;
1888 
1889 	return 0;
1890 
1891 err_fw_fatal_config:
1892 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1893 err_trap_register:
1894 	devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal);
1895 	return err;
1896 }
1897 
mlxsw_core_health_fini(struct mlxsw_core * mlxsw_core)1898 static void mlxsw_core_health_fini(struct mlxsw_core *mlxsw_core)
1899 {
1900 	if (!mlxsw_core->driver->fw_fatal_enabled)
1901 		return;
1902 
1903 	mlxsw_core_health_fw_fatal_config(mlxsw_core, false);
1904 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1905 	/* Make sure there is no more event work scheduled */
1906 	mlxsw_core_flush_owq();
1907 	devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal);
1908 }
1909 
1910 static int
__mlxsw_core_bus_device_register(const struct mlxsw_bus_info * mlxsw_bus_info,const struct mlxsw_bus * mlxsw_bus,void * bus_priv,bool reload,struct devlink * devlink,struct netlink_ext_ack * extack)1911 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1912 				 const struct mlxsw_bus *mlxsw_bus,
1913 				 void *bus_priv, bool reload,
1914 				 struct devlink *devlink,
1915 				 struct netlink_ext_ack *extack)
1916 {
1917 	const char *device_kind = mlxsw_bus_info->device_kind;
1918 	struct mlxsw_core *mlxsw_core;
1919 	struct mlxsw_driver *mlxsw_driver;
1920 	struct mlxsw_res *res;
1921 	size_t alloc_size;
1922 	int err;
1923 
1924 	mlxsw_driver = mlxsw_core_driver_get(device_kind);
1925 	if (!mlxsw_driver)
1926 		return -EINVAL;
1927 
1928 	if (!reload) {
1929 		alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
1930 		devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size,
1931 					mlxsw_bus_info->dev);
1932 		if (!devlink) {
1933 			err = -ENOMEM;
1934 			goto err_devlink_alloc;
1935 		}
1936 	}
1937 
1938 	mlxsw_core = devlink_priv(devlink);
1939 	INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1940 	INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1941 	mlxsw_core->driver = mlxsw_driver;
1942 	mlxsw_core->bus = mlxsw_bus;
1943 	mlxsw_core->bus_priv = bus_priv;
1944 	mlxsw_core->bus_info = mlxsw_bus_info;
1945 
1946 	res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1947 	err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1948 	if (err)
1949 		goto err_bus_init;
1950 
1951 	if (mlxsw_driver->resources_register && !reload) {
1952 		err = mlxsw_driver->resources_register(mlxsw_core);
1953 		if (err)
1954 			goto err_register_resources;
1955 	}
1956 
1957 	err = mlxsw_ports_init(mlxsw_core, reload);
1958 	if (err)
1959 		goto err_ports_init;
1960 
1961 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1962 	    MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1963 		alloc_size = sizeof(u8) *
1964 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1965 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1966 		mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1967 		if (!mlxsw_core->lag.mapping) {
1968 			err = -ENOMEM;
1969 			goto err_alloc_lag_mapping;
1970 		}
1971 	}
1972 
1973 	err = mlxsw_emad_init(mlxsw_core);
1974 	if (err)
1975 		goto err_emad_init;
1976 
1977 	if (!reload) {
1978 		err = devlink_register(devlink);
1979 		if (err)
1980 			goto err_devlink_register;
1981 	}
1982 
1983 	if (!reload) {
1984 		err = mlxsw_core_params_register(mlxsw_core);
1985 		if (err)
1986 			goto err_register_params;
1987 	}
1988 
1989 	err = mlxsw_core_fw_rev_validate(mlxsw_core, mlxsw_bus_info, mlxsw_driver->fw_req_rev,
1990 					 mlxsw_driver->fw_filename);
1991 	if (err)
1992 		goto err_fw_rev_validate;
1993 
1994 	err = mlxsw_core_health_init(mlxsw_core);
1995 	if (err)
1996 		goto err_health_init;
1997 
1998 	if (mlxsw_driver->init) {
1999 		err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info, extack);
2000 		if (err)
2001 			goto err_driver_init;
2002 	}
2003 
2004 	err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
2005 	if (err)
2006 		goto err_hwmon_init;
2007 
2008 	err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
2009 				 &mlxsw_core->thermal);
2010 	if (err)
2011 		goto err_thermal_init;
2012 
2013 	err = mlxsw_env_init(mlxsw_core, &mlxsw_core->env);
2014 	if (err)
2015 		goto err_env_init;
2016 
2017 	mlxsw_core->is_initialized = true;
2018 	devlink_params_publish(devlink);
2019 
2020 	if (!reload)
2021 		devlink_reload_enable(devlink);
2022 
2023 	return 0;
2024 
2025 err_env_init:
2026 	mlxsw_thermal_fini(mlxsw_core->thermal);
2027 err_thermal_init:
2028 	mlxsw_hwmon_fini(mlxsw_core->hwmon);
2029 err_hwmon_init:
2030 	if (mlxsw_core->driver->fini)
2031 		mlxsw_core->driver->fini(mlxsw_core);
2032 err_driver_init:
2033 	mlxsw_core_health_fini(mlxsw_core);
2034 err_health_init:
2035 err_fw_rev_validate:
2036 	if (!reload)
2037 		mlxsw_core_params_unregister(mlxsw_core);
2038 err_register_params:
2039 	if (!reload)
2040 		devlink_unregister(devlink);
2041 err_devlink_register:
2042 	mlxsw_emad_fini(mlxsw_core);
2043 err_emad_init:
2044 	kfree(mlxsw_core->lag.mapping);
2045 err_alloc_lag_mapping:
2046 	mlxsw_ports_fini(mlxsw_core, reload);
2047 err_ports_init:
2048 	if (!reload)
2049 		devlink_resources_unregister(devlink, NULL);
2050 err_register_resources:
2051 	mlxsw_bus->fini(bus_priv);
2052 err_bus_init:
2053 	if (!reload)
2054 		devlink_free(devlink);
2055 err_devlink_alloc:
2056 	return err;
2057 }
2058 
mlxsw_core_bus_device_register(const struct mlxsw_bus_info * mlxsw_bus_info,const struct mlxsw_bus * mlxsw_bus,void * bus_priv,bool reload,struct devlink * devlink,struct netlink_ext_ack * extack)2059 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
2060 				   const struct mlxsw_bus *mlxsw_bus,
2061 				   void *bus_priv, bool reload,
2062 				   struct devlink *devlink,
2063 				   struct netlink_ext_ack *extack)
2064 {
2065 	bool called_again = false;
2066 	int err;
2067 
2068 again:
2069 	err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus,
2070 					       bus_priv, reload,
2071 					       devlink, extack);
2072 	/* -EAGAIN is returned in case the FW was updated. FW needs
2073 	 * a reset, so lets try to call __mlxsw_core_bus_device_register()
2074 	 * again.
2075 	 */
2076 	if (err == -EAGAIN && !called_again) {
2077 		called_again = true;
2078 		goto again;
2079 	}
2080 
2081 	return err;
2082 }
2083 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
2084 
mlxsw_core_bus_device_unregister(struct mlxsw_core * mlxsw_core,bool reload)2085 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
2086 				      bool reload)
2087 {
2088 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
2089 
2090 	if (!reload)
2091 		devlink_reload_disable(devlink);
2092 	if (devlink_is_reload_failed(devlink)) {
2093 		if (!reload)
2094 			/* Only the parts that were not de-initialized in the
2095 			 * failed reload attempt need to be de-initialized.
2096 			 */
2097 			goto reload_fail_deinit;
2098 		else
2099 			return;
2100 	}
2101 
2102 	devlink_params_unpublish(devlink);
2103 	mlxsw_core->is_initialized = false;
2104 	mlxsw_env_fini(mlxsw_core->env);
2105 	mlxsw_thermal_fini(mlxsw_core->thermal);
2106 	mlxsw_hwmon_fini(mlxsw_core->hwmon);
2107 	if (mlxsw_core->driver->fini)
2108 		mlxsw_core->driver->fini(mlxsw_core);
2109 	mlxsw_core_health_fini(mlxsw_core);
2110 	if (!reload)
2111 		mlxsw_core_params_unregister(mlxsw_core);
2112 	if (!reload)
2113 		devlink_unregister(devlink);
2114 	mlxsw_emad_fini(mlxsw_core);
2115 	kfree(mlxsw_core->lag.mapping);
2116 	mlxsw_ports_fini(mlxsw_core, reload);
2117 	if (!reload)
2118 		devlink_resources_unregister(devlink, NULL);
2119 	mlxsw_core->bus->fini(mlxsw_core->bus_priv);
2120 	if (!reload)
2121 		devlink_free(devlink);
2122 
2123 	return;
2124 
2125 reload_fail_deinit:
2126 	mlxsw_core_params_unregister(mlxsw_core);
2127 	devlink_unregister(devlink);
2128 	devlink_resources_unregister(devlink, NULL);
2129 	devlink_free(devlink);
2130 }
2131 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
2132 
mlxsw_core_skb_transmit_busy(struct mlxsw_core * mlxsw_core,const struct mlxsw_tx_info * tx_info)2133 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
2134 				  const struct mlxsw_tx_info *tx_info)
2135 {
2136 	return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
2137 						  tx_info);
2138 }
2139 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
2140 
mlxsw_core_skb_transmit(struct mlxsw_core * mlxsw_core,struct sk_buff * skb,const struct mlxsw_tx_info * tx_info)2141 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
2142 			    const struct mlxsw_tx_info *tx_info)
2143 {
2144 	return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
2145 					     tx_info);
2146 }
2147 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
2148 
mlxsw_core_ptp_transmitted(struct mlxsw_core * mlxsw_core,struct sk_buff * skb,u8 local_port)2149 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
2150 				struct sk_buff *skb, u8 local_port)
2151 {
2152 	if (mlxsw_core->driver->ptp_transmitted)
2153 		mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb,
2154 						    local_port);
2155 }
2156 EXPORT_SYMBOL(mlxsw_core_ptp_transmitted);
2157 
__is_rx_listener_equal(const struct mlxsw_rx_listener * rxl_a,const struct mlxsw_rx_listener * rxl_b)2158 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
2159 				   const struct mlxsw_rx_listener *rxl_b)
2160 {
2161 	return (rxl_a->func == rxl_b->func &&
2162 		rxl_a->local_port == rxl_b->local_port &&
2163 		rxl_a->trap_id == rxl_b->trap_id &&
2164 		rxl_a->mirror_reason == rxl_b->mirror_reason);
2165 }
2166 
2167 static struct mlxsw_rx_listener_item *
__find_rx_listener_item(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl)2168 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
2169 			const struct mlxsw_rx_listener *rxl)
2170 {
2171 	struct mlxsw_rx_listener_item *rxl_item;
2172 
2173 	list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
2174 		if (__is_rx_listener_equal(&rxl_item->rxl, rxl))
2175 			return rxl_item;
2176 	}
2177 	return NULL;
2178 }
2179 
mlxsw_core_rx_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl,void * priv,bool enabled)2180 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
2181 				    const struct mlxsw_rx_listener *rxl,
2182 				    void *priv, bool enabled)
2183 {
2184 	struct mlxsw_rx_listener_item *rxl_item;
2185 
2186 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2187 	if (rxl_item)
2188 		return -EEXIST;
2189 	rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
2190 	if (!rxl_item)
2191 		return -ENOMEM;
2192 	rxl_item->rxl = *rxl;
2193 	rxl_item->priv = priv;
2194 	rxl_item->enabled = enabled;
2195 
2196 	list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
2197 	return 0;
2198 }
2199 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
2200 
mlxsw_core_rx_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl)2201 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
2202 				       const struct mlxsw_rx_listener *rxl)
2203 {
2204 	struct mlxsw_rx_listener_item *rxl_item;
2205 
2206 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2207 	if (!rxl_item)
2208 		return;
2209 	list_del_rcu(&rxl_item->list);
2210 	synchronize_rcu();
2211 	kfree(rxl_item);
2212 }
2213 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
2214 
2215 static void
mlxsw_core_rx_listener_state_set(struct mlxsw_core * mlxsw_core,const struct mlxsw_rx_listener * rxl,bool enabled)2216 mlxsw_core_rx_listener_state_set(struct mlxsw_core *mlxsw_core,
2217 				 const struct mlxsw_rx_listener *rxl,
2218 				 bool enabled)
2219 {
2220 	struct mlxsw_rx_listener_item *rxl_item;
2221 
2222 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2223 	if (WARN_ON(!rxl_item))
2224 		return;
2225 	rxl_item->enabled = enabled;
2226 }
2227 
mlxsw_core_event_listener_func(struct sk_buff * skb,u8 local_port,void * priv)2228 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
2229 					   void *priv)
2230 {
2231 	struct mlxsw_event_listener_item *event_listener_item = priv;
2232 	struct mlxsw_core *mlxsw_core;
2233 	struct mlxsw_reg_info reg;
2234 	char *payload;
2235 	char *reg_tlv;
2236 	char *op_tlv;
2237 
2238 	mlxsw_core = event_listener_item->mlxsw_core;
2239 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
2240 			    skb->data, skb->len);
2241 
2242 	mlxsw_emad_tlv_parse(skb);
2243 	op_tlv = mlxsw_emad_op_tlv(skb);
2244 	reg_tlv = mlxsw_emad_reg_tlv(skb);
2245 
2246 	reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
2247 	reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
2248 	payload = mlxsw_emad_reg_payload(reg_tlv);
2249 	event_listener_item->el.func(&reg, payload, event_listener_item->priv);
2250 	dev_kfree_skb(skb);
2251 }
2252 
__is_event_listener_equal(const struct mlxsw_event_listener * el_a,const struct mlxsw_event_listener * el_b)2253 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
2254 				      const struct mlxsw_event_listener *el_b)
2255 {
2256 	return (el_a->func == el_b->func &&
2257 		el_a->trap_id == el_b->trap_id);
2258 }
2259 
2260 static struct mlxsw_event_listener_item *
__find_event_listener_item(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el)2261 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
2262 			   const struct mlxsw_event_listener *el)
2263 {
2264 	struct mlxsw_event_listener_item *el_item;
2265 
2266 	list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
2267 		if (__is_event_listener_equal(&el_item->el, el))
2268 			return el_item;
2269 	}
2270 	return NULL;
2271 }
2272 
mlxsw_core_event_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el,void * priv)2273 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
2274 				       const struct mlxsw_event_listener *el,
2275 				       void *priv)
2276 {
2277 	int err;
2278 	struct mlxsw_event_listener_item *el_item;
2279 	const struct mlxsw_rx_listener rxl = {
2280 		.func = mlxsw_core_event_listener_func,
2281 		.local_port = MLXSW_PORT_DONT_CARE,
2282 		.trap_id = el->trap_id,
2283 	};
2284 
2285 	el_item = __find_event_listener_item(mlxsw_core, el);
2286 	if (el_item)
2287 		return -EEXIST;
2288 	el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
2289 	if (!el_item)
2290 		return -ENOMEM;
2291 	el_item->mlxsw_core = mlxsw_core;
2292 	el_item->el = *el;
2293 	el_item->priv = priv;
2294 
2295 	err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item, true);
2296 	if (err)
2297 		goto err_rx_listener_register;
2298 
2299 	/* No reason to save item if we did not manage to register an RX
2300 	 * listener for it.
2301 	 */
2302 	list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
2303 
2304 	return 0;
2305 
2306 err_rx_listener_register:
2307 	kfree(el_item);
2308 	return err;
2309 }
2310 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
2311 
mlxsw_core_event_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_event_listener * el)2312 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
2313 					  const struct mlxsw_event_listener *el)
2314 {
2315 	struct mlxsw_event_listener_item *el_item;
2316 	const struct mlxsw_rx_listener rxl = {
2317 		.func = mlxsw_core_event_listener_func,
2318 		.local_port = MLXSW_PORT_DONT_CARE,
2319 		.trap_id = el->trap_id,
2320 	};
2321 
2322 	el_item = __find_event_listener_item(mlxsw_core, el);
2323 	if (!el_item)
2324 		return;
2325 	mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl);
2326 	list_del(&el_item->list);
2327 	kfree(el_item);
2328 }
2329 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
2330 
mlxsw_core_listener_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv,bool enabled)2331 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
2332 					const struct mlxsw_listener *listener,
2333 					void *priv, bool enabled)
2334 {
2335 	if (listener->is_event) {
2336 		WARN_ON(!enabled);
2337 		return mlxsw_core_event_listener_register(mlxsw_core,
2338 						&listener->event_listener,
2339 						priv);
2340 	} else {
2341 		return mlxsw_core_rx_listener_register(mlxsw_core,
2342 						&listener->rx_listener,
2343 						priv, enabled);
2344 	}
2345 }
2346 
mlxsw_core_listener_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)2347 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
2348 				      const struct mlxsw_listener *listener,
2349 				      void *priv)
2350 {
2351 	if (listener->is_event)
2352 		mlxsw_core_event_listener_unregister(mlxsw_core,
2353 						     &listener->event_listener);
2354 	else
2355 		mlxsw_core_rx_listener_unregister(mlxsw_core,
2356 						  &listener->rx_listener);
2357 }
2358 
mlxsw_core_trap_register(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)2359 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
2360 			     const struct mlxsw_listener *listener, void *priv)
2361 {
2362 	enum mlxsw_reg_htgt_trap_group trap_group;
2363 	enum mlxsw_reg_hpkt_action action;
2364 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
2365 	int err;
2366 
2367 	err = mlxsw_core_listener_register(mlxsw_core, listener, priv,
2368 					   listener->enabled_on_register);
2369 	if (err)
2370 		return err;
2371 
2372 	action = listener->enabled_on_register ? listener->en_action :
2373 						 listener->dis_action;
2374 	trap_group = listener->enabled_on_register ? listener->en_trap_group :
2375 						     listener->dis_trap_group;
2376 	mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id,
2377 			    trap_group, listener->is_ctrl);
2378 	err = mlxsw_reg_write(mlxsw_core,  MLXSW_REG(hpkt), hpkt_pl);
2379 	if (err)
2380 		goto err_trap_set;
2381 
2382 	return 0;
2383 
2384 err_trap_set:
2385 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
2386 	return err;
2387 }
2388 EXPORT_SYMBOL(mlxsw_core_trap_register);
2389 
mlxsw_core_trap_unregister(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,void * priv)2390 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
2391 				const struct mlxsw_listener *listener,
2392 				void *priv)
2393 {
2394 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
2395 
2396 	if (!listener->is_event) {
2397 		mlxsw_reg_hpkt_pack(hpkt_pl, listener->dis_action,
2398 				    listener->trap_id, listener->dis_trap_group,
2399 				    listener->is_ctrl);
2400 		mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2401 	}
2402 
2403 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
2404 }
2405 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
2406 
mlxsw_core_trap_state_set(struct mlxsw_core * mlxsw_core,const struct mlxsw_listener * listener,bool enabled)2407 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
2408 			      const struct mlxsw_listener *listener,
2409 			      bool enabled)
2410 {
2411 	enum mlxsw_reg_htgt_trap_group trap_group;
2412 	enum mlxsw_reg_hpkt_action action;
2413 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
2414 	int err;
2415 
2416 	/* Not supported for event listener */
2417 	if (WARN_ON(listener->is_event))
2418 		return -EINVAL;
2419 
2420 	action = enabled ? listener->en_action : listener->dis_action;
2421 	trap_group = enabled ? listener->en_trap_group :
2422 			       listener->dis_trap_group;
2423 	mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id,
2424 			    trap_group, listener->is_ctrl);
2425 	err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2426 	if (err)
2427 		return err;
2428 
2429 	mlxsw_core_rx_listener_state_set(mlxsw_core, &listener->rx_listener,
2430 					 enabled);
2431 	return 0;
2432 }
2433 EXPORT_SYMBOL(mlxsw_core_trap_state_set);
2434 
mlxsw_core_tid_get(struct mlxsw_core * mlxsw_core)2435 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
2436 {
2437 	return atomic64_inc_return(&mlxsw_core->emad.tid);
2438 }
2439 
mlxsw_core_reg_access_emad(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)2440 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
2441 				      const struct mlxsw_reg_info *reg,
2442 				      char *payload,
2443 				      enum mlxsw_core_reg_access_type type,
2444 				      struct list_head *bulk_list,
2445 				      mlxsw_reg_trans_cb_t *cb,
2446 				      unsigned long cb_priv)
2447 {
2448 	u64 tid = mlxsw_core_tid_get(mlxsw_core);
2449 	struct mlxsw_reg_trans *trans;
2450 	int err;
2451 
2452 	trans = kzalloc(sizeof(*trans), GFP_KERNEL);
2453 	if (!trans)
2454 		return -ENOMEM;
2455 
2456 	err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
2457 				    bulk_list, cb, cb_priv, tid);
2458 	if (err) {
2459 		kfree_rcu(trans, rcu);
2460 		return err;
2461 	}
2462 	return 0;
2463 }
2464 
mlxsw_reg_trans_query(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)2465 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
2466 			  const struct mlxsw_reg_info *reg, char *payload,
2467 			  struct list_head *bulk_list,
2468 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
2469 {
2470 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
2471 					  MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
2472 					  bulk_list, cb, cb_priv);
2473 }
2474 EXPORT_SYMBOL(mlxsw_reg_trans_query);
2475 
mlxsw_reg_trans_write(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,struct list_head * bulk_list,mlxsw_reg_trans_cb_t * cb,unsigned long cb_priv)2476 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
2477 			  const struct mlxsw_reg_info *reg, char *payload,
2478 			  struct list_head *bulk_list,
2479 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
2480 {
2481 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
2482 					  MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
2483 					  bulk_list, cb, cb_priv);
2484 }
2485 EXPORT_SYMBOL(mlxsw_reg_trans_write);
2486 
2487 #define MLXSW_REG_TRANS_ERR_STRING_SIZE	256
2488 
mlxsw_reg_trans_wait(struct mlxsw_reg_trans * trans)2489 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
2490 {
2491 	char err_string[MLXSW_REG_TRANS_ERR_STRING_SIZE];
2492 	struct mlxsw_core *mlxsw_core = trans->core;
2493 	int err;
2494 
2495 	wait_for_completion(&trans->completion);
2496 	cancel_delayed_work_sync(&trans->timeout_dw);
2497 	err = trans->err;
2498 
2499 	if (trans->retries)
2500 		dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
2501 			 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
2502 	if (err) {
2503 		dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
2504 			trans->tid, trans->reg->id,
2505 			mlxsw_reg_id_str(trans->reg->id),
2506 			mlxsw_core_reg_access_type_str(trans->type),
2507 			trans->emad_status,
2508 			mlxsw_emad_op_tlv_status_str(trans->emad_status));
2509 
2510 		snprintf(err_string, MLXSW_REG_TRANS_ERR_STRING_SIZE,
2511 			 "(tid=%llx,reg_id=%x(%s)) %s (%s)\n", trans->tid,
2512 			 trans->reg->id, mlxsw_reg_id_str(trans->reg->id),
2513 			 mlxsw_emad_op_tlv_status_str(trans->emad_status),
2514 			 trans->emad_err_string ? trans->emad_err_string : "");
2515 
2516 		trace_devlink_hwerr(priv_to_devlink(mlxsw_core),
2517 				    trans->emad_status, err_string);
2518 
2519 		kfree(trans->emad_err_string);
2520 	}
2521 
2522 	list_del(&trans->bulk_list);
2523 	kfree_rcu(trans, rcu);
2524 	return err;
2525 }
2526 
mlxsw_reg_trans_bulk_wait(struct list_head * bulk_list)2527 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
2528 {
2529 	struct mlxsw_reg_trans *trans;
2530 	struct mlxsw_reg_trans *tmp;
2531 	int sum_err = 0;
2532 	int err;
2533 
2534 	list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
2535 		err = mlxsw_reg_trans_wait(trans);
2536 		if (err && sum_err == 0)
2537 			sum_err = err; /* first error to be returned */
2538 	}
2539 	return sum_err;
2540 }
2541 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
2542 
mlxsw_core_reg_access_cmd(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type)2543 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
2544 				     const struct mlxsw_reg_info *reg,
2545 				     char *payload,
2546 				     enum mlxsw_core_reg_access_type type)
2547 {
2548 	enum mlxsw_emad_op_tlv_status status;
2549 	int err, n_retry;
2550 	bool reset_ok;
2551 	char *in_mbox, *out_mbox, *tmp;
2552 
2553 	dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
2554 		reg->id, mlxsw_reg_id_str(reg->id),
2555 		mlxsw_core_reg_access_type_str(type));
2556 
2557 	in_mbox = mlxsw_cmd_mbox_alloc();
2558 	if (!in_mbox)
2559 		return -ENOMEM;
2560 
2561 	out_mbox = mlxsw_cmd_mbox_alloc();
2562 	if (!out_mbox) {
2563 		err = -ENOMEM;
2564 		goto free_in_mbox;
2565 	}
2566 
2567 	mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
2568 			       mlxsw_core_tid_get(mlxsw_core));
2569 	tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
2570 	mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
2571 
2572 	/* There is a special treatment needed for MRSR (reset) register.
2573 	 * The command interface will return error after the command
2574 	 * is executed, so tell the lower layer to expect it
2575 	 * and cope accordingly.
2576 	 */
2577 	reset_ok = reg->id == MLXSW_REG_MRSR_ID;
2578 
2579 	n_retry = 0;
2580 retry:
2581 	err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
2582 	if (!err) {
2583 		err = mlxsw_emad_process_status(out_mbox, &status);
2584 		if (err) {
2585 			if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
2586 				goto retry;
2587 			dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
2588 				status, mlxsw_emad_op_tlv_status_str(status));
2589 		}
2590 	}
2591 
2592 	if (!err)
2593 		memcpy(payload, mlxsw_emad_reg_payload_cmd(out_mbox),
2594 		       reg->len);
2595 
2596 	mlxsw_cmd_mbox_free(out_mbox);
2597 free_in_mbox:
2598 	mlxsw_cmd_mbox_free(in_mbox);
2599 	if (err)
2600 		dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
2601 			reg->id, mlxsw_reg_id_str(reg->id),
2602 			mlxsw_core_reg_access_type_str(type));
2603 	return err;
2604 }
2605 
mlxsw_core_reg_access_cb(struct mlxsw_core * mlxsw_core,char * payload,size_t payload_len,unsigned long cb_priv)2606 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
2607 				     char *payload, size_t payload_len,
2608 				     unsigned long cb_priv)
2609 {
2610 	char *orig_payload = (char *) cb_priv;
2611 
2612 	memcpy(orig_payload, payload, payload_len);
2613 }
2614 
mlxsw_core_reg_access(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload,enum mlxsw_core_reg_access_type type)2615 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
2616 				 const struct mlxsw_reg_info *reg,
2617 				 char *payload,
2618 				 enum mlxsw_core_reg_access_type type)
2619 {
2620 	LIST_HEAD(bulk_list);
2621 	int err;
2622 
2623 	/* During initialization EMAD interface is not available to us,
2624 	 * so we default to command interface. We switch to EMAD interface
2625 	 * after setting the appropriate traps.
2626 	 */
2627 	if (!mlxsw_core->emad.use_emad)
2628 		return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
2629 						 payload, type);
2630 
2631 	err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
2632 					 payload, type, &bulk_list,
2633 					 mlxsw_core_reg_access_cb,
2634 					 (unsigned long) payload);
2635 	if (err)
2636 		return err;
2637 	return mlxsw_reg_trans_bulk_wait(&bulk_list);
2638 }
2639 
mlxsw_reg_query(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload)2640 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
2641 		    const struct mlxsw_reg_info *reg, char *payload)
2642 {
2643 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
2644 				     MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
2645 }
2646 EXPORT_SYMBOL(mlxsw_reg_query);
2647 
mlxsw_reg_write(struct mlxsw_core * mlxsw_core,const struct mlxsw_reg_info * reg,char * payload)2648 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
2649 		    const struct mlxsw_reg_info *reg, char *payload)
2650 {
2651 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
2652 				     MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
2653 }
2654 EXPORT_SYMBOL(mlxsw_reg_write);
2655 
mlxsw_core_skb_receive(struct mlxsw_core * mlxsw_core,struct sk_buff * skb,struct mlxsw_rx_info * rx_info)2656 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
2657 			    struct mlxsw_rx_info *rx_info)
2658 {
2659 	struct mlxsw_rx_listener_item *rxl_item;
2660 	const struct mlxsw_rx_listener *rxl;
2661 	u8 local_port;
2662 	bool found = false;
2663 
2664 	if (rx_info->is_lag) {
2665 		dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
2666 				    __func__, rx_info->u.lag_id,
2667 				    rx_info->trap_id);
2668 		/* Upper layer does not care if the skb came from LAG or not,
2669 		 * so just get the local_port for the lag port and push it up.
2670 		 */
2671 		local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
2672 							rx_info->u.lag_id,
2673 							rx_info->lag_port_index);
2674 	} else {
2675 		local_port = rx_info->u.sys_port;
2676 	}
2677 
2678 	dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
2679 			    __func__, local_port, rx_info->trap_id);
2680 
2681 	if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
2682 	    (local_port >= mlxsw_core->max_ports))
2683 		goto drop;
2684 
2685 	rcu_read_lock();
2686 	list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
2687 		rxl = &rxl_item->rxl;
2688 		if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
2689 		     rxl->local_port == local_port) &&
2690 		    rxl->trap_id == rx_info->trap_id &&
2691 		    rxl->mirror_reason == rx_info->mirror_reason) {
2692 			if (rxl_item->enabled)
2693 				found = true;
2694 			break;
2695 		}
2696 	}
2697 	if (!found) {
2698 		rcu_read_unlock();
2699 		goto drop;
2700 	}
2701 
2702 	rxl->func(skb, local_port, rxl_item->priv);
2703 	rcu_read_unlock();
2704 	return;
2705 
2706 drop:
2707 	dev_kfree_skb(skb);
2708 }
2709 EXPORT_SYMBOL(mlxsw_core_skb_receive);
2710 
mlxsw_core_lag_mapping_index(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index)2711 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
2712 					u16 lag_id, u8 port_index)
2713 {
2714 	return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
2715 	       port_index;
2716 }
2717 
mlxsw_core_lag_mapping_set(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index,u8 local_port)2718 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
2719 				u16 lag_id, u8 port_index, u8 local_port)
2720 {
2721 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2722 						 lag_id, port_index);
2723 
2724 	mlxsw_core->lag.mapping[index] = local_port;
2725 }
2726 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
2727 
mlxsw_core_lag_mapping_get(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 port_index)2728 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
2729 			      u16 lag_id, u8 port_index)
2730 {
2731 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2732 						 lag_id, port_index);
2733 
2734 	return mlxsw_core->lag.mapping[index];
2735 }
2736 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
2737 
mlxsw_core_lag_mapping_clear(struct mlxsw_core * mlxsw_core,u16 lag_id,u8 local_port)2738 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
2739 				  u16 lag_id, u8 local_port)
2740 {
2741 	int i;
2742 
2743 	for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
2744 		int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2745 							 lag_id, i);
2746 
2747 		if (mlxsw_core->lag.mapping[index] == local_port)
2748 			mlxsw_core->lag.mapping[index] = 0;
2749 	}
2750 }
2751 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
2752 
mlxsw_core_res_valid(struct mlxsw_core * mlxsw_core,enum mlxsw_res_id res_id)2753 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
2754 			  enum mlxsw_res_id res_id)
2755 {
2756 	return mlxsw_res_valid(&mlxsw_core->res, res_id);
2757 }
2758 EXPORT_SYMBOL(mlxsw_core_res_valid);
2759 
mlxsw_core_res_get(struct mlxsw_core * mlxsw_core,enum mlxsw_res_id res_id)2760 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
2761 		       enum mlxsw_res_id res_id)
2762 {
2763 	return mlxsw_res_get(&mlxsw_core->res, res_id);
2764 }
2765 EXPORT_SYMBOL(mlxsw_core_res_get);
2766 
__mlxsw_core_port_init(struct mlxsw_core * mlxsw_core,u8 local_port,enum devlink_port_flavour flavour,u32 port_number,bool split,u32 split_port_subnumber,bool splittable,u32 lanes,const unsigned char * switch_id,unsigned char switch_id_len)2767 static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
2768 				  enum devlink_port_flavour flavour,
2769 				  u32 port_number, bool split,
2770 				  u32 split_port_subnumber,
2771 				  bool splittable, u32 lanes,
2772 				  const unsigned char *switch_id,
2773 				  unsigned char switch_id_len)
2774 {
2775 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
2776 	struct mlxsw_core_port *mlxsw_core_port =
2777 					&mlxsw_core->ports[local_port];
2778 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2779 	struct devlink_port_attrs attrs = {};
2780 	int err;
2781 
2782 	attrs.split = split;
2783 	attrs.lanes = lanes;
2784 	attrs.splittable = splittable;
2785 	attrs.flavour = flavour;
2786 	attrs.phys.port_number = port_number;
2787 	attrs.phys.split_subport_number = split_port_subnumber;
2788 	memcpy(attrs.switch_id.id, switch_id, switch_id_len);
2789 	attrs.switch_id.id_len = switch_id_len;
2790 	mlxsw_core_port->local_port = local_port;
2791 	devlink_port_attrs_set(devlink_port, &attrs);
2792 	err = devlink_port_register(devlink, devlink_port, local_port);
2793 	if (err)
2794 		memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
2795 	return err;
2796 }
2797 
__mlxsw_core_port_fini(struct mlxsw_core * mlxsw_core,u8 local_port)2798 static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
2799 {
2800 	struct mlxsw_core_port *mlxsw_core_port =
2801 					&mlxsw_core->ports[local_port];
2802 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2803 
2804 	devlink_port_unregister(devlink_port);
2805 	memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
2806 }
2807 
mlxsw_core_port_init(struct mlxsw_core * mlxsw_core,u8 local_port,u32 port_number,bool split,u32 split_port_subnumber,bool splittable,u32 lanes,const unsigned char * switch_id,unsigned char switch_id_len)2808 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
2809 			 u32 port_number, bool split,
2810 			 u32 split_port_subnumber,
2811 			 bool splittable, u32 lanes,
2812 			 const unsigned char *switch_id,
2813 			 unsigned char switch_id_len)
2814 {
2815 	int err;
2816 
2817 	err = __mlxsw_core_port_init(mlxsw_core, local_port,
2818 				     DEVLINK_PORT_FLAVOUR_PHYSICAL,
2819 				     port_number, split, split_port_subnumber,
2820 				     splittable, lanes,
2821 				     switch_id, switch_id_len);
2822 	if (err)
2823 		return err;
2824 
2825 	atomic_inc(&mlxsw_core->active_ports_count);
2826 	return 0;
2827 }
2828 EXPORT_SYMBOL(mlxsw_core_port_init);
2829 
mlxsw_core_port_fini(struct mlxsw_core * mlxsw_core,u8 local_port)2830 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
2831 {
2832 	atomic_dec(&mlxsw_core->active_ports_count);
2833 
2834 	__mlxsw_core_port_fini(mlxsw_core, local_port);
2835 }
2836 EXPORT_SYMBOL(mlxsw_core_port_fini);
2837 
mlxsw_core_cpu_port_init(struct mlxsw_core * mlxsw_core,void * port_driver_priv,const unsigned char * switch_id,unsigned char switch_id_len)2838 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
2839 			     void *port_driver_priv,
2840 			     const unsigned char *switch_id,
2841 			     unsigned char switch_id_len)
2842 {
2843 	struct mlxsw_core_port *mlxsw_core_port =
2844 				&mlxsw_core->ports[MLXSW_PORT_CPU_PORT];
2845 	int err;
2846 
2847 	err = __mlxsw_core_port_init(mlxsw_core, MLXSW_PORT_CPU_PORT,
2848 				     DEVLINK_PORT_FLAVOUR_CPU,
2849 				     0, false, 0, false, 0,
2850 				     switch_id, switch_id_len);
2851 	if (err)
2852 		return err;
2853 
2854 	mlxsw_core_port->port_driver_priv = port_driver_priv;
2855 	return 0;
2856 }
2857 EXPORT_SYMBOL(mlxsw_core_cpu_port_init);
2858 
mlxsw_core_cpu_port_fini(struct mlxsw_core * mlxsw_core)2859 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core)
2860 {
2861 	__mlxsw_core_port_fini(mlxsw_core, MLXSW_PORT_CPU_PORT);
2862 }
2863 EXPORT_SYMBOL(mlxsw_core_cpu_port_fini);
2864 
mlxsw_core_port_eth_set(struct mlxsw_core * mlxsw_core,u8 local_port,void * port_driver_priv,struct net_device * dev)2865 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
2866 			     void *port_driver_priv, struct net_device *dev)
2867 {
2868 	struct mlxsw_core_port *mlxsw_core_port =
2869 					&mlxsw_core->ports[local_port];
2870 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2871 
2872 	mlxsw_core_port->port_driver_priv = port_driver_priv;
2873 	devlink_port_type_eth_set(devlink_port, dev);
2874 }
2875 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
2876 
mlxsw_core_port_ib_set(struct mlxsw_core * mlxsw_core,u8 local_port,void * port_driver_priv)2877 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
2878 			    void *port_driver_priv)
2879 {
2880 	struct mlxsw_core_port *mlxsw_core_port =
2881 					&mlxsw_core->ports[local_port];
2882 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2883 
2884 	mlxsw_core_port->port_driver_priv = port_driver_priv;
2885 	devlink_port_type_ib_set(devlink_port, NULL);
2886 }
2887 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
2888 
mlxsw_core_port_clear(struct mlxsw_core * mlxsw_core,u8 local_port,void * port_driver_priv)2889 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
2890 			   void *port_driver_priv)
2891 {
2892 	struct mlxsw_core_port *mlxsw_core_port =
2893 					&mlxsw_core->ports[local_port];
2894 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2895 
2896 	mlxsw_core_port->port_driver_priv = port_driver_priv;
2897 	devlink_port_type_clear(devlink_port);
2898 }
2899 EXPORT_SYMBOL(mlxsw_core_port_clear);
2900 
mlxsw_core_port_type_get(struct mlxsw_core * mlxsw_core,u8 local_port)2901 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
2902 						u8 local_port)
2903 {
2904 	struct mlxsw_core_port *mlxsw_core_port =
2905 					&mlxsw_core->ports[local_port];
2906 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2907 
2908 	return devlink_port->type;
2909 }
2910 EXPORT_SYMBOL(mlxsw_core_port_type_get);
2911 
2912 
2913 struct devlink_port *
mlxsw_core_port_devlink_port_get(struct mlxsw_core * mlxsw_core,u8 local_port)2914 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
2915 				 u8 local_port)
2916 {
2917 	struct mlxsw_core_port *mlxsw_core_port =
2918 					&mlxsw_core->ports[local_port];
2919 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2920 
2921 	return devlink_port;
2922 }
2923 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get);
2924 
mlxsw_core_port_is_xm(const struct mlxsw_core * mlxsw_core,u8 local_port)2925 bool mlxsw_core_port_is_xm(const struct mlxsw_core *mlxsw_core, u8 local_port)
2926 {
2927 	const struct mlxsw_bus_info *bus_info = mlxsw_core->bus_info;
2928 	int i;
2929 
2930 	for (i = 0; i < bus_info->xm_local_ports_count; i++)
2931 		if (bus_info->xm_local_ports[i] == local_port)
2932 			return true;
2933 	return false;
2934 }
2935 EXPORT_SYMBOL(mlxsw_core_port_is_xm);
2936 
mlxsw_core_env(const struct mlxsw_core * mlxsw_core)2937 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core)
2938 {
2939 	return mlxsw_core->env;
2940 }
2941 
mlxsw_core_is_initialized(const struct mlxsw_core * mlxsw_core)2942 bool mlxsw_core_is_initialized(const struct mlxsw_core *mlxsw_core)
2943 {
2944 	return mlxsw_core->is_initialized;
2945 }
2946 
mlxsw_core_module_max_width(struct mlxsw_core * mlxsw_core,u8 module)2947 int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module)
2948 {
2949 	enum mlxsw_reg_pmtm_module_type module_type;
2950 	char pmtm_pl[MLXSW_REG_PMTM_LEN];
2951 	int err;
2952 
2953 	mlxsw_reg_pmtm_pack(pmtm_pl, module);
2954 	err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(pmtm), pmtm_pl);
2955 	if (err)
2956 		return err;
2957 	mlxsw_reg_pmtm_unpack(pmtm_pl, &module_type);
2958 
2959 	/* Here we need to get the module width according to the module type. */
2960 
2961 	switch (module_type) {
2962 	case MLXSW_REG_PMTM_MODULE_TYPE_C2C8X:
2963 	case MLXSW_REG_PMTM_MODULE_TYPE_QSFP_DD:
2964 	case MLXSW_REG_PMTM_MODULE_TYPE_OSFP:
2965 		return 8;
2966 	case MLXSW_REG_PMTM_MODULE_TYPE_C2C4X:
2967 	case MLXSW_REG_PMTM_MODULE_TYPE_BP_4X:
2968 	case MLXSW_REG_PMTM_MODULE_TYPE_QSFP:
2969 		return 4;
2970 	case MLXSW_REG_PMTM_MODULE_TYPE_C2C2X:
2971 	case MLXSW_REG_PMTM_MODULE_TYPE_BP_2X:
2972 	case MLXSW_REG_PMTM_MODULE_TYPE_SFP_DD:
2973 	case MLXSW_REG_PMTM_MODULE_TYPE_DSFP:
2974 		return 2;
2975 	case MLXSW_REG_PMTM_MODULE_TYPE_C2C1X:
2976 	case MLXSW_REG_PMTM_MODULE_TYPE_BP_1X:
2977 	case MLXSW_REG_PMTM_MODULE_TYPE_SFP:
2978 		return 1;
2979 	default:
2980 		return -EINVAL;
2981 	}
2982 }
2983 EXPORT_SYMBOL(mlxsw_core_module_max_width);
2984 
mlxsw_core_buf_dump_dbg(struct mlxsw_core * mlxsw_core,const char * buf,size_t size)2985 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
2986 				    const char *buf, size_t size)
2987 {
2988 	__be32 *m = (__be32 *) buf;
2989 	int i;
2990 	int count = size / sizeof(__be32);
2991 
2992 	for (i = count - 1; i >= 0; i--)
2993 		if (m[i])
2994 			break;
2995 	i++;
2996 	count = i ? i : 1;
2997 	for (i = 0; i < count; i += 4)
2998 		dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
2999 			i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
3000 			be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
3001 }
3002 
mlxsw_cmd_exec(struct mlxsw_core * mlxsw_core,u16 opcode,u8 opcode_mod,u32 in_mod,bool out_mbox_direct,bool reset_ok,char * in_mbox,size_t in_mbox_size,char * out_mbox,size_t out_mbox_size)3003 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
3004 		   u32 in_mod, bool out_mbox_direct, bool reset_ok,
3005 		   char *in_mbox, size_t in_mbox_size,
3006 		   char *out_mbox, size_t out_mbox_size)
3007 {
3008 	u8 status;
3009 	int err;
3010 
3011 	BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
3012 	if (!mlxsw_core->bus->cmd_exec)
3013 		return -EOPNOTSUPP;
3014 
3015 	dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
3016 		opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
3017 	if (in_mbox) {
3018 		dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
3019 		mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
3020 	}
3021 
3022 	err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
3023 					opcode_mod, in_mod, out_mbox_direct,
3024 					in_mbox, in_mbox_size,
3025 					out_mbox, out_mbox_size, &status);
3026 
3027 	if (!err && out_mbox) {
3028 		dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
3029 		mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
3030 	}
3031 
3032 	if (reset_ok && err == -EIO &&
3033 	    status == MLXSW_CMD_STATUS_RUNNING_RESET) {
3034 		err = 0;
3035 	} else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
3036 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
3037 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
3038 			in_mod, status, mlxsw_cmd_status_str(status));
3039 	} else if (err == -ETIMEDOUT) {
3040 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
3041 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
3042 			in_mod);
3043 	}
3044 
3045 	return err;
3046 }
3047 EXPORT_SYMBOL(mlxsw_cmd_exec);
3048 
mlxsw_core_schedule_dw(struct delayed_work * dwork,unsigned long delay)3049 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
3050 {
3051 	return queue_delayed_work(mlxsw_wq, dwork, delay);
3052 }
3053 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
3054 
mlxsw_core_schedule_work(struct work_struct * work)3055 bool mlxsw_core_schedule_work(struct work_struct *work)
3056 {
3057 	return queue_work(mlxsw_owq, work);
3058 }
3059 EXPORT_SYMBOL(mlxsw_core_schedule_work);
3060 
mlxsw_core_flush_owq(void)3061 void mlxsw_core_flush_owq(void)
3062 {
3063 	flush_workqueue(mlxsw_owq);
3064 }
3065 EXPORT_SYMBOL(mlxsw_core_flush_owq);
3066 
mlxsw_core_kvd_sizes_get(struct mlxsw_core * mlxsw_core,const struct mlxsw_config_profile * profile,u64 * p_single_size,u64 * p_double_size,u64 * p_linear_size)3067 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
3068 			     const struct mlxsw_config_profile *profile,
3069 			     u64 *p_single_size, u64 *p_double_size,
3070 			     u64 *p_linear_size)
3071 {
3072 	struct mlxsw_driver *driver = mlxsw_core->driver;
3073 
3074 	if (!driver->kvd_sizes_get)
3075 		return -EINVAL;
3076 
3077 	return driver->kvd_sizes_get(mlxsw_core, profile,
3078 				     p_single_size, p_double_size,
3079 				     p_linear_size);
3080 }
3081 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
3082 
mlxsw_core_resources_query(struct mlxsw_core * mlxsw_core,char * mbox,struct mlxsw_res * res)3083 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
3084 			       struct mlxsw_res *res)
3085 {
3086 	int index, i;
3087 	u64 data;
3088 	u16 id;
3089 	int err;
3090 
3091 	if (!res)
3092 		return 0;
3093 
3094 	mlxsw_cmd_mbox_zero(mbox);
3095 
3096 	for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
3097 	     index++) {
3098 		err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index);
3099 		if (err)
3100 			return err;
3101 
3102 		for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
3103 			id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
3104 			data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
3105 
3106 			if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
3107 				return 0;
3108 
3109 			mlxsw_res_parse(res, id, data);
3110 		}
3111 	}
3112 
3113 	/* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get
3114 	 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW.
3115 	 */
3116 	return -EIO;
3117 }
3118 EXPORT_SYMBOL(mlxsw_core_resources_query);
3119 
mlxsw_core_read_frc_h(struct mlxsw_core * mlxsw_core)3120 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core)
3121 {
3122 	return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv);
3123 }
3124 EXPORT_SYMBOL(mlxsw_core_read_frc_h);
3125 
mlxsw_core_read_frc_l(struct mlxsw_core * mlxsw_core)3126 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core)
3127 {
3128 	return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv);
3129 }
3130 EXPORT_SYMBOL(mlxsw_core_read_frc_l);
3131 
mlxsw_core_emad_string_tlv_enable(struct mlxsw_core * mlxsw_core)3132 void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core)
3133 {
3134 	mlxsw_core->emad.enable_string_tlv = true;
3135 }
3136 EXPORT_SYMBOL(mlxsw_core_emad_string_tlv_enable);
3137 
mlxsw_core_module_init(void)3138 static int __init mlxsw_core_module_init(void)
3139 {
3140 	int err;
3141 
3142 	mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0);
3143 	if (!mlxsw_wq)
3144 		return -ENOMEM;
3145 	mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0,
3146 					    mlxsw_core_driver_name);
3147 	if (!mlxsw_owq) {
3148 		err = -ENOMEM;
3149 		goto err_alloc_ordered_workqueue;
3150 	}
3151 	return 0;
3152 
3153 err_alloc_ordered_workqueue:
3154 	destroy_workqueue(mlxsw_wq);
3155 	return err;
3156 }
3157 
mlxsw_core_module_exit(void)3158 static void __exit mlxsw_core_module_exit(void)
3159 {
3160 	destroy_workqueue(mlxsw_owq);
3161 	destroy_workqueue(mlxsw_wq);
3162 }
3163 
3164 module_init(mlxsw_core_module_init);
3165 module_exit(mlxsw_core_module_exit);
3166 
3167 MODULE_LICENSE("Dual BSD/GPL");
3168 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3169 MODULE_DESCRIPTION("Mellanox switch device core driver");
3170