1 /*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/irq.h>
34 #include "en.h"
35 #include "en/xdp.h"
36 #include "en/xsk/rx.h"
37 #include "en/xsk/tx.h"
38
mlx5e_channel_no_affinity_change(struct mlx5e_channel * c)39 static inline bool mlx5e_channel_no_affinity_change(struct mlx5e_channel *c)
40 {
41 int current_cpu = smp_processor_id();
42 const struct cpumask *aff;
43 struct irq_data *idata;
44
45 idata = irq_desc_get_irq_data(c->irq_desc);
46 aff = irq_data_get_affinity_mask(idata);
47 return cpumask_test_cpu(current_cpu, aff);
48 }
49
mlx5e_handle_tx_dim(struct mlx5e_txqsq * sq)50 static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq)
51 {
52 struct mlx5e_sq_stats *stats = sq->stats;
53 struct dim_sample dim_sample = {};
54
55 if (unlikely(!test_bit(MLX5E_SQ_STATE_AM, &sq->state)))
56 return;
57
58 dim_update_sample(sq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
59 net_dim(&sq->dim, dim_sample);
60 }
61
mlx5e_handle_rx_dim(struct mlx5e_rq * rq)62 static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq)
63 {
64 struct mlx5e_rq_stats *stats = rq->stats;
65 struct dim_sample dim_sample = {};
66
67 if (unlikely(!test_bit(MLX5E_RQ_STATE_AM, &rq->state)))
68 return;
69
70 dim_update_sample(rq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample);
71 net_dim(&rq->dim, dim_sample);
72 }
73
mlx5e_trigger_irq(struct mlx5e_icosq * sq)74 void mlx5e_trigger_irq(struct mlx5e_icosq *sq)
75 {
76 struct mlx5_wq_cyc *wq = &sq->wq;
77 struct mlx5e_tx_wqe *nopwqe;
78 u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
79
80 sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
81 nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc);
82 mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &nopwqe->ctrl);
83 }
84
mlx5e_napi_xsk_post(struct mlx5e_xdpsq * xsksq,struct mlx5e_rq * xskrq)85 static bool mlx5e_napi_xsk_post(struct mlx5e_xdpsq *xsksq, struct mlx5e_rq *xskrq)
86 {
87 bool busy_xsk = false, xsk_rx_alloc_err;
88
89 /* Handle the race between the application querying need_wakeup and the
90 * driver setting it:
91 * 1. Update need_wakeup both before and after the TX. If it goes to
92 * "yes", it can only happen with the first update.
93 * 2. If the application queried need_wakeup before we set it, the
94 * packets will be transmitted anyway, even w/o a wakeup.
95 * 3. Give a chance to clear need_wakeup after new packets were queued
96 * for TX.
97 */
98 mlx5e_xsk_update_tx_wakeup(xsksq);
99 busy_xsk |= mlx5e_xsk_tx(xsksq, MLX5E_TX_XSK_POLL_BUDGET);
100 mlx5e_xsk_update_tx_wakeup(xsksq);
101
102 xsk_rx_alloc_err = xskrq->post_wqes(xskrq);
103 busy_xsk |= mlx5e_xsk_update_rx_wakeup(xskrq, xsk_rx_alloc_err);
104
105 return busy_xsk;
106 }
107
mlx5e_napi_poll(struct napi_struct * napi,int budget)108 int mlx5e_napi_poll(struct napi_struct *napi, int budget)
109 {
110 struct mlx5e_channel *c = container_of(napi, struct mlx5e_channel,
111 napi);
112 struct mlx5e_ch_stats *ch_stats = c->stats;
113 struct mlx5e_xdpsq *xsksq = &c->xsksq;
114 struct mlx5e_rq *xskrq = &c->xskrq;
115 struct mlx5e_rq *rq = &c->rq;
116 bool xsk_open = test_bit(MLX5E_CHANNEL_STATE_XSK, c->state);
117 bool aff_change = false;
118 bool busy_xsk = false;
119 bool busy = false;
120 int work_done = 0;
121 int i;
122
123 ch_stats->poll++;
124
125 for (i = 0; i < c->num_tc; i++)
126 busy |= mlx5e_poll_tx_cq(&c->sq[i].cq, budget);
127
128 busy |= mlx5e_poll_xdpsq_cq(&c->xdpsq.cq);
129
130 if (c->xdp)
131 busy |= mlx5e_poll_xdpsq_cq(&c->rq_xdpsq.cq);
132
133 if (likely(budget)) { /* budget=0 means: don't poll rx rings */
134 if (xsk_open)
135 work_done = mlx5e_poll_rx_cq(&xskrq->cq, budget);
136
137 if (likely(budget - work_done))
138 work_done += mlx5e_poll_rx_cq(&rq->cq, budget - work_done);
139
140 busy |= work_done == budget;
141 }
142
143 mlx5e_poll_ico_cq(&c->icosq.cq);
144
145 busy |= rq->post_wqes(rq);
146 if (xsk_open) {
147 mlx5e_poll_ico_cq(&c->xskicosq.cq);
148 busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq);
149 busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq);
150 }
151
152 busy |= busy_xsk;
153
154 if (busy) {
155 if (likely(mlx5e_channel_no_affinity_change(c)))
156 return budget;
157 ch_stats->aff_change++;
158 aff_change = true;
159 if (budget && work_done == budget)
160 work_done--;
161 }
162
163 if (unlikely(!napi_complete_done(napi, work_done)))
164 return work_done;
165
166 ch_stats->arm++;
167
168 for (i = 0; i < c->num_tc; i++) {
169 mlx5e_handle_tx_dim(&c->sq[i]);
170 mlx5e_cq_arm(&c->sq[i].cq);
171 }
172
173 mlx5e_handle_rx_dim(rq);
174
175 mlx5e_cq_arm(&rq->cq);
176 mlx5e_cq_arm(&c->icosq.cq);
177 mlx5e_cq_arm(&c->xdpsq.cq);
178
179 if (xsk_open) {
180 mlx5e_handle_rx_dim(xskrq);
181 mlx5e_cq_arm(&c->xskicosq.cq);
182 mlx5e_cq_arm(&xsksq->cq);
183 mlx5e_cq_arm(&xskrq->cq);
184 }
185
186 if (unlikely(aff_change && busy_xsk)) {
187 mlx5e_trigger_irq(&c->icosq);
188 ch_stats->force_irq++;
189 }
190
191 return work_done;
192 }
193
mlx5e_completion_event(struct mlx5_core_cq * mcq,struct mlx5_eqe * eqe)194 void mlx5e_completion_event(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
195 {
196 struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
197
198 napi_schedule(cq->napi);
199 cq->event_ctr++;
200 cq->channel->stats->events++;
201 }
202
mlx5e_cq_error_event(struct mlx5_core_cq * mcq,enum mlx5_event event)203 void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event)
204 {
205 struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
206 struct mlx5e_channel *c = cq->channel;
207 struct net_device *netdev = c->netdev;
208
209 netdev_err(netdev, "%s: cqn=0x%.6x event=0x%.2x\n",
210 __func__, mcq->cqn, event);
211 }
212
