1 /*
2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef __MLX5_ESWITCH_H__
34 #define __MLX5_ESWITCH_H__
35
36 #include <linux/if_ether.h>
37 #include <linux/if_link.h>
38 #include <linux/atomic.h>
39 #include <linux/xarray.h>
40 #include <net/devlink.h>
41 #include <linux/mlx5/device.h>
42 #include <linux/mlx5/eswitch.h>
43 #include <linux/mlx5/vport.h>
44 #include <linux/mlx5/fs.h>
45 #include "lib/mpfs.h"
46 #include "lib/fs_chains.h"
47 #include "sf/sf.h"
48 #include "en/tc_ct.h"
49 #include "en/tc/sample.h"
50
51 enum mlx5_mapped_obj_type {
52 MLX5_MAPPED_OBJ_CHAIN,
53 MLX5_MAPPED_OBJ_SAMPLE,
54 MLX5_MAPPED_OBJ_INT_PORT_METADATA,
55 };
56
57 struct mlx5_mapped_obj {
58 enum mlx5_mapped_obj_type type;
59 union {
60 u32 chain;
61 struct {
62 u32 group_id;
63 u32 rate;
64 u32 trunc_size;
65 u32 tunnel_id;
66 } sample;
67 u32 int_port_metadata;
68 };
69 };
70
71 #ifdef CONFIG_MLX5_ESWITCH
72
73 #define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15
74
75 #define MLX5_MAX_UC_PER_VPORT(dev) \
76 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
77
78 #define MLX5_MAX_MC_PER_VPORT(dev) \
79 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
80
81 #define mlx5_esw_has_fwd_fdb(dev) \
82 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
83
84 #define esw_chains(esw) \
85 ((esw)->fdb_table.offloads.esw_chains_priv)
86
87 enum {
88 MAPPING_TYPE_CHAIN,
89 MAPPING_TYPE_TUNNEL,
90 MAPPING_TYPE_TUNNEL_ENC_OPTS,
91 MAPPING_TYPE_LABELS,
92 MAPPING_TYPE_ZONE,
93 MAPPING_TYPE_INT_PORT,
94 };
95
96 struct vport_ingress {
97 struct mlx5_flow_table *acl;
98 struct mlx5_flow_handle *allow_rule;
99 struct {
100 struct mlx5_flow_group *allow_spoofchk_only_grp;
101 struct mlx5_flow_group *allow_untagged_spoofchk_grp;
102 struct mlx5_flow_group *allow_untagged_only_grp;
103 struct mlx5_flow_group *drop_grp;
104 struct mlx5_flow_handle *drop_rule;
105 struct mlx5_fc *drop_counter;
106 } legacy;
107 struct {
108 /* Optional group to add an FTE to do internal priority
109 * tagging on ingress packets.
110 */
111 struct mlx5_flow_group *metadata_prio_tag_grp;
112 /* Group to add default match-all FTE entry to tag ingress
113 * packet with metadata.
114 */
115 struct mlx5_flow_group *metadata_allmatch_grp;
116 /* Optional group to add a drop all rule */
117 struct mlx5_flow_group *drop_grp;
118 struct mlx5_modify_hdr *modify_metadata;
119 struct mlx5_flow_handle *modify_metadata_rule;
120 struct mlx5_flow_handle *drop_rule;
121 } offloads;
122 };
123
124 struct vport_egress {
125 struct mlx5_flow_table *acl;
126 struct mlx5_flow_handle *allowed_vlan;
127 struct mlx5_flow_group *vlan_grp;
128 union {
129 struct {
130 struct mlx5_flow_group *drop_grp;
131 struct mlx5_flow_handle *drop_rule;
132 struct mlx5_fc *drop_counter;
133 } legacy;
134 struct {
135 struct mlx5_flow_group *fwd_grp;
136 struct mlx5_flow_handle *fwd_rule;
137 struct mlx5_flow_handle *bounce_rule;
138 struct mlx5_flow_group *bounce_grp;
139 } offloads;
140 };
141 };
142
143 struct mlx5_vport_drop_stats {
144 u64 rx_dropped;
145 u64 tx_dropped;
146 };
147
148 struct mlx5_vport_info {
149 u8 mac[ETH_ALEN];
150 u16 vlan;
151 u64 node_guid;
152 int link_state;
153 u8 qos;
154 u8 spoofchk: 1;
155 u8 trusted: 1;
156 };
157
158 /* Vport context events */
159 enum mlx5_eswitch_vport_event {
160 MLX5_VPORT_UC_ADDR_CHANGE = BIT(0),
161 MLX5_VPORT_MC_ADDR_CHANGE = BIT(1),
162 MLX5_VPORT_PROMISC_CHANGE = BIT(3),
163 };
164
165 struct mlx5_vport {
166 struct mlx5_core_dev *dev;
167 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
168 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
169 struct mlx5_flow_handle *promisc_rule;
170 struct mlx5_flow_handle *allmulti_rule;
171 struct work_struct vport_change_handler;
172
173 struct vport_ingress ingress;
174 struct vport_egress egress;
175 u32 default_metadata;
176 u32 metadata;
177
178 struct mlx5_vport_info info;
179
180 struct {
181 bool enabled;
182 u32 esw_tsar_ix;
183 u32 bw_share;
184 u32 min_rate;
185 u32 max_rate;
186 struct mlx5_esw_rate_group *group;
187 } qos;
188
189 u16 vport;
190 bool enabled;
191 enum mlx5_eswitch_vport_event enabled_events;
192 int index;
193 struct devlink_port *dl_port;
194 struct dentry *dbgfs;
195 };
196
197 struct mlx5_esw_indir_table;
198
199 struct mlx5_eswitch_fdb {
200 union {
201 struct legacy_fdb {
202 struct mlx5_flow_table *fdb;
203 struct mlx5_flow_group *addr_grp;
204 struct mlx5_flow_group *allmulti_grp;
205 struct mlx5_flow_group *promisc_grp;
206 struct mlx5_flow_table *vepa_fdb;
207 struct mlx5_flow_handle *vepa_uplink_rule;
208 struct mlx5_flow_handle *vepa_star_rule;
209 } legacy;
210
211 struct offloads_fdb {
212 struct mlx5_flow_namespace *ns;
213 struct mlx5_flow_table *tc_miss_table;
214 struct mlx5_flow_table *slow_fdb;
215 struct mlx5_flow_group *send_to_vport_grp;
216 struct mlx5_flow_group *send_to_vport_meta_grp;
217 struct mlx5_flow_group *peer_miss_grp;
218 struct mlx5_flow_handle **peer_miss_rules;
219 struct mlx5_flow_group *miss_grp;
220 struct mlx5_flow_handle **send_to_vport_meta_rules;
221 struct mlx5_flow_handle *miss_rule_uni;
222 struct mlx5_flow_handle *miss_rule_multi;
223 int vlan_push_pop_refcount;
224
225 struct mlx5_fs_chains *esw_chains_priv;
226 struct {
227 DECLARE_HASHTABLE(table, 8);
228 /* Protects vports.table */
229 struct mutex lock;
230 } vports;
231
232 struct mlx5_esw_indir_table *indir;
233
234 } offloads;
235 };
236 u32 flags;
237 };
238
239 struct mlx5_esw_offload {
240 struct mlx5_flow_table *ft_offloads_restore;
241 struct mlx5_flow_group *restore_group;
242 struct mlx5_modify_hdr *restore_copy_hdr_id;
243 struct mapping_ctx *reg_c0_obj_pool;
244
245 struct mlx5_flow_table *ft_offloads;
246 struct mlx5_flow_group *vport_rx_group;
247 struct mlx5_flow_group *vport_rx_drop_group;
248 struct mlx5_flow_handle *vport_rx_drop_rule;
249 struct xarray vport_reps;
250 struct list_head peer_flows;
251 struct mutex peer_mutex;
252 struct mutex encap_tbl_lock; /* protects encap_tbl */
253 DECLARE_HASHTABLE(encap_tbl, 8);
254 struct mutex decap_tbl_lock; /* protects decap_tbl */
255 DECLARE_HASHTABLE(decap_tbl, 8);
256 struct mod_hdr_tbl mod_hdr;
257 DECLARE_HASHTABLE(termtbl_tbl, 8);
258 struct mutex termtbl_mutex; /* protects termtbl hash */
259 struct xarray vhca_map;
260 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
261 u8 inline_mode;
262 atomic64_t num_flows;
263 enum devlink_eswitch_encap_mode encap;
264 struct ida vport_metadata_ida;
265 unsigned int host_number; /* ECPF supports one external host */
266 };
267
268 /* E-Switch MC FDB table hash node */
269 struct esw_mc_addr { /* SRIOV only */
270 struct l2addr_node node;
271 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
272 u32 refcnt;
273 };
274
275 struct mlx5_host_work {
276 struct work_struct work;
277 struct mlx5_eswitch *esw;
278 };
279
280 struct mlx5_esw_functions {
281 struct mlx5_nb nb;
282 u16 num_vfs;
283 };
284
285 enum {
286 MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0),
287 MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1),
288 MLX5_ESWITCH_VPORT_ACL_NS_CREATED = BIT(2),
289 };
290
291 struct mlx5_esw_bridge_offloads;
292
293 enum {
294 MLX5_ESW_FDB_CREATED = BIT(0),
295 };
296
297 struct mlx5_eswitch {
298 struct mlx5_core_dev *dev;
299 struct mlx5_nb nb;
300 struct mlx5_eswitch_fdb fdb_table;
301 /* legacy data structures */
302 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
303 struct esw_mc_addr mc_promisc;
304 /* end of legacy */
305 struct workqueue_struct *work_queue;
306 struct xarray vports;
307 u32 flags;
308 int total_vports;
309 int enabled_vports;
310 /* Synchronize between vport change events
311 * and async SRIOV admin state changes
312 */
313 struct mutex state_lock;
314
315 /* Protects eswitch mode change that occurs via one or more
316 * user commands, i.e. sriov state change, devlink commands.
317 */
318 struct rw_semaphore mode_lock;
319 atomic64_t user_count;
320
321 struct {
322 u32 root_tsar_ix;
323 struct mlx5_esw_rate_group *group0;
324 struct list_head groups; /* Protected by esw->state_lock */
325
326 /* Protected by esw->state_lock.
327 * Initially 0, meaning no QoS users and QoS is disabled.
328 */
329 refcount_t refcnt;
330 } qos;
331
332 struct mlx5_esw_bridge_offloads *br_offloads;
333 struct mlx5_esw_offload offloads;
334 int mode;
335 u16 manager_vport;
336 u16 first_host_vport;
337 struct mlx5_esw_functions esw_funcs;
338 struct {
339 u32 large_group_num;
340 } params;
341 struct blocking_notifier_head n_head;
342 struct dentry *dbgfs;
343 };
344
345 void esw_offloads_disable(struct mlx5_eswitch *esw);
346 int esw_offloads_enable(struct mlx5_eswitch *esw);
347 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw);
348 int esw_offloads_init_reps(struct mlx5_eswitch *esw);
349
350 struct mlx5_flow_handle *
351 mlx5_eswitch_add_send_to_vport_meta_rule(struct mlx5_eswitch *esw, u16 vport_num);
352 void mlx5_eswitch_del_send_to_vport_meta_rule(struct mlx5_flow_handle *rule);
353
354 bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw);
355 int mlx5_esw_offloads_vport_metadata_set(struct mlx5_eswitch *esw, bool enable);
356 u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw);
357 void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata);
358
359 int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32 rate_mbps);
360
361 /* E-Switch API */
362 int mlx5_eswitch_init(struct mlx5_core_dev *dev);
363 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
364
365 #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1)
366 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs);
367 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);
368 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf);
369 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw);
370 void mlx5_eswitch_disable(struct mlx5_eswitch *esw);
371 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
372 u16 vport, const u8 *mac);
373 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
374 u16 vport, int link_state);
375 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
376 u16 vport, u16 vlan, u8 qos);
377 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
378 u16 vport, bool spoofchk);
379 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
380 u16 vport_num, bool setting);
381 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
382 u32 max_rate, u32 min_rate);
383 int mlx5_esw_qos_vport_update_group(struct mlx5_eswitch *esw,
384 struct mlx5_vport *vport,
385 struct mlx5_esw_rate_group *group,
386 struct netlink_ext_ack *extack);
387 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
388 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
389 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
390 u16 vport, struct ifla_vf_info *ivi);
391 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
392 u16 vport,
393 struct ifla_vf_stats *vf_stats);
394 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
395
396 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
397 bool other_vport, void *in);
398
399 struct mlx5_flow_spec;
400 struct mlx5_esw_flow_attr;
401 struct mlx5_termtbl_handle;
402
403 bool
404 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
405 struct mlx5_flow_attr *attr,
406 struct mlx5_flow_act *flow_act,
407 struct mlx5_flow_spec *spec);
408
409 struct mlx5_flow_handle *
410 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw,
411 struct mlx5_flow_table *ft,
412 struct mlx5_flow_spec *spec,
413 struct mlx5_esw_flow_attr *attr,
414 struct mlx5_flow_act *flow_act,
415 struct mlx5_flow_destination *dest,
416 int num_dest);
417
418 void
419 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw,
420 struct mlx5_termtbl_handle *tt);
421
422 void
423 mlx5_eswitch_clear_rule_source_port(struct mlx5_eswitch *esw, struct mlx5_flow_spec *spec);
424
425 struct mlx5_flow_handle *
426 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
427 struct mlx5_flow_spec *spec,
428 struct mlx5_flow_attr *attr);
429 struct mlx5_flow_handle *
430 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw,
431 struct mlx5_flow_spec *spec,
432 struct mlx5_flow_attr *attr);
433 void
434 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
435 struct mlx5_flow_handle *rule,
436 struct mlx5_flow_attr *attr);
437 void
438 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw,
439 struct mlx5_flow_handle *rule,
440 struct mlx5_flow_attr *attr);
441
442 struct mlx5_flow_handle *
443 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
444 struct mlx5_flow_destination *dest);
445
446 enum {
447 SET_VLAN_STRIP = BIT(0),
448 SET_VLAN_INSERT = BIT(1)
449 };
450
451 enum mlx5_flow_match_level {
452 MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE,
453 MLX5_MATCH_L2 = MLX5_INLINE_MODE_L2,
454 MLX5_MATCH_L3 = MLX5_INLINE_MODE_IP,
455 MLX5_MATCH_L4 = MLX5_INLINE_MODE_TCP_UDP,
456 };
457
458 /* current maximum for flow based vport multicasting */
459 #define MLX5_MAX_FLOW_FWD_VPORTS 32
460
461 enum {
462 MLX5_ESW_DEST_ENCAP = BIT(0),
463 MLX5_ESW_DEST_ENCAP_VALID = BIT(1),
464 MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2),
465 };
466
467 struct mlx5_esw_flow_attr {
468 struct mlx5_eswitch_rep *in_rep;
469 struct mlx5_core_dev *in_mdev;
470 struct mlx5_core_dev *counter_dev;
471 struct mlx5e_tc_int_port *dest_int_port;
472 struct mlx5e_tc_int_port *int_port;
473
474 int split_count;
475 int out_count;
476
477 __be16 vlan_proto[MLX5_FS_VLAN_DEPTH];
478 u16 vlan_vid[MLX5_FS_VLAN_DEPTH];
479 u8 vlan_prio[MLX5_FS_VLAN_DEPTH];
480 u8 total_vlan;
481 struct {
482 u32 flags;
483 struct mlx5_eswitch_rep *rep;
484 struct mlx5_pkt_reformat *pkt_reformat;
485 struct mlx5_core_dev *mdev;
486 struct mlx5_termtbl_handle *termtbl;
487 int src_port_rewrite_act_id;
488 } dests[MLX5_MAX_FLOW_FWD_VPORTS];
489 struct mlx5_rx_tun_attr *rx_tun_attr;
490 struct ethhdr eth;
491 struct mlx5_pkt_reformat *decap_pkt_reformat;
492 };
493
494 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
495 struct netlink_ext_ack *extack);
496 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
497 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
498 struct netlink_ext_ack *extack);
499 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
500 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
501 enum devlink_eswitch_encap_mode encap,
502 struct netlink_ext_ack *extack);
503 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink,
504 enum devlink_eswitch_encap_mode *encap);
505 int mlx5_devlink_port_function_hw_addr_get(struct devlink_port *port,
506 u8 *hw_addr, int *hw_addr_len,
507 struct netlink_ext_ack *extack);
508 int mlx5_devlink_port_function_hw_addr_set(struct devlink_port *port,
509 const u8 *hw_addr, int hw_addr_len,
510 struct netlink_ext_ack *extack);
511
512 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);
513
514 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
515 struct mlx5_flow_attr *attr);
516 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
517 struct mlx5_flow_attr *attr);
518 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
519 u16 vport, u16 vlan, u8 qos, u8 set_flags);
520
mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev * dev,u8 vlan_depth)521 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev,
522 u8 vlan_depth)
523 {
524 bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) &&
525 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan);
526
527 if (vlan_depth == 1)
528 return ret;
529
530 return ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) &&
531 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2);
532 }
533
534 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
535 struct mlx5_core_dev *dev1);
536
537 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev);
538
539 #define MLX5_DEBUG_ESWITCH_MASK BIT(3)
540
541 #define esw_info(__dev, format, ...) \
542 dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
543
544 #define esw_warn(__dev, format, ...) \
545 dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
546
547 #define esw_debug(dev, format, ...) \
548 mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
549
mlx5_esw_allowed(const struct mlx5_eswitch * esw)550 static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw)
551 {
552 return esw && MLX5_ESWITCH_MANAGER(esw->dev);
553 }
554
555 /* The returned number is valid only when the dev is eswitch manager. */
mlx5_eswitch_manager_vport(struct mlx5_core_dev * dev)556 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev)
557 {
558 return mlx5_core_is_ecpf_esw_manager(dev) ?
559 MLX5_VPORT_ECPF : MLX5_VPORT_PF;
560 }
561
562 static inline bool
mlx5_esw_is_manager_vport(const struct mlx5_eswitch * esw,u16 vport_num)563 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num)
564 {
565 return esw->manager_vport == vport_num;
566 }
567
mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev * dev)568 static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev)
569 {
570 return mlx5_core_is_ecpf_esw_manager(dev) ?
571 MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF;
572 }
573
mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev * dev)574 static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev)
575 {
576 return mlx5_core_is_ecpf_esw_manager(dev);
577 }
578
579 static inline unsigned int
mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev * dev,u16 vport_num)580 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
581 u16 vport_num)
582 {
583 return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num;
584 }
585
586 static inline u16
mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)587 mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)
588 {
589 return dl_port_index & 0xffff;
590 }
591
mlx5_esw_is_fdb_created(struct mlx5_eswitch * esw)592 static inline bool mlx5_esw_is_fdb_created(struct mlx5_eswitch *esw)
593 {
594 return esw->fdb_table.flags & MLX5_ESW_FDB_CREATED;
595 }
596
597 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */
598 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
599
600 /* Each mark identifies eswitch vport type.
601 * MLX5_ESW_VPT_HOST_FN is used to identify both PF and VF ports using
602 * a single mark.
603 * MLX5_ESW_VPT_VF identifies a SRIOV VF vport.
604 * MLX5_ESW_VPT_SF identifies SF vport.
605 */
606 #define MLX5_ESW_VPT_HOST_FN XA_MARK_0
607 #define MLX5_ESW_VPT_VF XA_MARK_1
608 #define MLX5_ESW_VPT_SF XA_MARK_2
609
610 /* The vport iterator is valid only after vport are initialized in mlx5_eswitch_init.
611 * Borrowed the idea from xa_for_each_marked() but with support for desired last element.
612 */
613
614 #define mlx5_esw_for_each_vport(esw, index, vport) \
615 xa_for_each(&((esw)->vports), index, vport)
616
617 #define mlx5_esw_for_each_entry_marked(xa, index, entry, last, filter) \
618 for (index = 0, entry = xa_find(xa, &index, last, filter); \
619 entry; entry = xa_find_after(xa, &index, last, filter))
620
621 #define mlx5_esw_for_each_vport_marked(esw, index, vport, last, filter) \
622 mlx5_esw_for_each_entry_marked(&((esw)->vports), index, vport, last, filter)
623
624 #define mlx5_esw_for_each_vf_vport(esw, index, vport, last) \
625 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_VF)
626
627 #define mlx5_esw_for_each_host_func_vport(esw, index, vport, last) \
628 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_HOST_FN)
629
630 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink);
631 struct mlx5_vport *__must_check
632 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num);
633
634 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num);
635 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num);
636
637 int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data);
638
639 int
640 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
641 enum mlx5_eswitch_vport_event enabled_events);
642 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw);
643
644 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, u16 vport_num,
645 enum mlx5_eswitch_vport_event enabled_events);
646 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
647
648 int
649 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
650 struct mlx5_vport *vport);
651 void
652 esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw,
653 struct mlx5_vport *vport);
654
655 struct esw_vport_tbl_namespace {
656 int max_fte;
657 int max_num_groups;
658 u32 flags;
659 };
660
661 struct mlx5_vport_tbl_attr {
662 u32 chain;
663 u16 prio;
664 u16 vport;
665 const struct esw_vport_tbl_namespace *vport_ns;
666 };
667
668 struct mlx5_flow_table *
669 mlx5_esw_vporttbl_get(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
670 void
671 mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
672
673 struct mlx5_flow_handle *
674 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag);
675
676 int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
677 void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
678
679 int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num);
680 void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num);
681
682 int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
683 enum mlx5_eswitch_vport_event enabled_events);
684 void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num);
685
686 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
687 enum mlx5_eswitch_vport_event enabled_events);
688 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs);
689
690 int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, u16 vport_num);
691 void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
692 struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num);
693
694 void mlx5_esw_vport_debugfs_create(struct mlx5_eswitch *esw, u16 vport_num, bool is_sf, u16 sf_num);
695 void mlx5_esw_vport_debugfs_destroy(struct mlx5_eswitch *esw, u16 vport_num);
696
697 int mlx5_esw_devlink_sf_port_register(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
698 u16 vport_num, u32 controller, u32 sfnum);
699 void mlx5_esw_devlink_sf_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
700
701 int mlx5_esw_offloads_sf_vport_enable(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
702 u16 vport_num, u32 controller, u32 sfnum);
703 void mlx5_esw_offloads_sf_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
704 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id);
705
706 int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num);
707 void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num);
708 int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num);
709
710 /**
711 * mlx5_esw_event_info - Indicates eswitch mode changed/changing.
712 *
713 * @new_mode: New mode of eswitch.
714 */
715 struct mlx5_esw_event_info {
716 u16 new_mode;
717 };
718
719 int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *n);
720 void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *n);
721
722 bool mlx5_esw_hold(struct mlx5_core_dev *dev);
723 void mlx5_esw_release(struct mlx5_core_dev *dev);
724 void mlx5_esw_get(struct mlx5_core_dev *dev);
725 void mlx5_esw_put(struct mlx5_core_dev *dev);
726 int mlx5_esw_try_lock(struct mlx5_eswitch *esw);
727 void mlx5_esw_unlock(struct mlx5_eswitch *esw);
728
729 void esw_vport_change_handle_locked(struct mlx5_vport *vport);
730
731 bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 controller);
732
733 int mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw,
734 struct mlx5_eswitch *slave_esw);
735 void mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw,
736 struct mlx5_eswitch *slave_esw);
737 int mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw);
738
mlx5_eswitch_num_vfs(struct mlx5_eswitch * esw)739 static inline int mlx5_eswitch_num_vfs(struct mlx5_eswitch *esw)
740 {
741 if (mlx5_esw_allowed(esw))
742 return esw->esw_funcs.num_vfs;
743
744 return 0;
745 }
746
747 #else /* CONFIG_MLX5_ESWITCH */
748 /* eswitch API stubs */
mlx5_eswitch_init(struct mlx5_core_dev * dev)749 static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
mlx5_eswitch_cleanup(struct mlx5_eswitch * esw)750 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
mlx5_eswitch_enable(struct mlx5_eswitch * esw,int num_vfs)751 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }
mlx5_eswitch_disable_sriov(struct mlx5_eswitch * esw,bool clear_vf)752 static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf) {}
mlx5_eswitch_disable(struct mlx5_eswitch * esw)753 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw) {}
mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev * dev)754 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
755 static inline
mlx5_eswitch_set_vport_state(struct mlx5_eswitch * esw,u16 vport,int link_state)756 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
mlx5_esw_query_functions(struct mlx5_core_dev * dev)757 static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
758 {
759 return ERR_PTR(-EOPNOTSUPP);
760 }
761
762 static inline struct mlx5_flow_handle *
esw_add_restore_rule(struct mlx5_eswitch * esw,u32 tag)763 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
764 {
765 return ERR_PTR(-EOPNOTSUPP);
766 }
767
768 static inline unsigned int
mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev * dev,u16 vport_num)769 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
770 u16 vport_num)
771 {
772 return vport_num;
773 }
774
775 static inline int
mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch * master_esw,struct mlx5_eswitch * slave_esw)776 mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw,
777 struct mlx5_eswitch *slave_esw)
778 {
779 return 0;
780 }
781
782 static inline void
mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch * master_esw,struct mlx5_eswitch * slave_esw)783 mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw,
784 struct mlx5_eswitch *slave_esw) {}
785
786 static inline int
mlx5_eswitch_reload_reps(struct mlx5_eswitch * esw)787 mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw)
788 {
789 return 0;
790 }
791 #endif /* CONFIG_MLX5_ESWITCH */
792
793 #endif /* __MLX5_ESWITCH_H__ */
794
