1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright 2020-2021 NXP
4 */
5
6 #ifndef _AMPHION_VPU_H
7 #define _AMPHION_VPU_H
8
9 #include <media/v4l2-device.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-mem2mem.h>
12 #include <linux/mailbox_client.h>
13 #include <linux/mailbox_controller.h>
14 #include <linux/kfifo.h>
15
16 #define VPU_TIMEOUT msecs_to_jiffies(1000)
17 #define VPU_INST_NULL_ID (-1L)
18 #define VPU_MSG_BUFFER_SIZE (8192)
19
20 enum imx_plat_type {
21 IMX8QXP = 0,
22 IMX8QM = 1,
23 IMX8DM,
24 IMX8DX,
25 PLAT_TYPE_RESERVED
26 };
27
28 enum vpu_core_type {
29 VPU_CORE_TYPE_ENC = 0,
30 VPU_CORE_TYPE_DEC = 0x10,
31 };
32
33 struct vpu_dev;
34 struct vpu_resources {
35 enum imx_plat_type plat_type;
36 u32 mreg_base;
37 int (*setup)(struct vpu_dev *vpu);
38 int (*setup_encoder)(struct vpu_dev *vpu);
39 int (*setup_decoder)(struct vpu_dev *vpu);
40 int (*reset)(struct vpu_dev *vpu);
41 };
42
43 struct vpu_buffer {
44 void *virt;
45 dma_addr_t phys;
46 u32 length;
47 u32 bytesused;
48 struct device *dev;
49 };
50
51 struct vpu_func {
52 struct video_device *vfd;
53 struct v4l2_m2m_dev *m2m_dev;
54 enum vpu_core_type type;
55 int function;
56 };
57
58 struct vpu_dev {
59 void __iomem *base;
60 struct platform_device *pdev;
61 struct device *dev;
62 struct mutex lock; /* protect vpu device */
63 const struct vpu_resources *res;
64 struct list_head cores;
65
66 struct v4l2_device v4l2_dev;
67 struct vpu_func encoder;
68 struct vpu_func decoder;
69 struct media_device mdev;
70
71 struct delayed_work watchdog_work;
72 void (*get_vpu)(struct vpu_dev *vpu);
73 void (*put_vpu)(struct vpu_dev *vpu);
74 void (*get_enc)(struct vpu_dev *vpu);
75 void (*put_enc)(struct vpu_dev *vpu);
76 void (*get_dec)(struct vpu_dev *vpu);
77 void (*put_dec)(struct vpu_dev *vpu);
78 atomic_t ref_vpu;
79 atomic_t ref_enc;
80 atomic_t ref_dec;
81
82 struct dentry *debugfs;
83 };
84
85 struct vpu_format {
86 u32 pixfmt;
87 unsigned int num_planes;
88 u32 type;
89 u32 flags;
90 u32 width;
91 u32 height;
92 u32 sizeimage[VIDEO_MAX_PLANES];
93 u32 bytesperline[VIDEO_MAX_PLANES];
94 u32 field;
95 };
96
97 struct vpu_core_resources {
98 enum vpu_core_type type;
99 const char *fwname;
100 u32 stride;
101 u32 max_width;
102 u32 min_width;
103 u32 step_width;
104 u32 max_height;
105 u32 min_height;
106 u32 step_height;
107 u32 rpc_size;
108 u32 fwlog_size;
109 u32 act_size;
110 };
111
112 struct vpu_mbox {
113 char name[20];
114 struct mbox_client cl;
115 struct mbox_chan *ch;
116 bool block;
117 };
118
119 enum vpu_core_state {
120 VPU_CORE_DEINIT = 0,
121 VPU_CORE_ACTIVE,
122 VPU_CORE_HANG
123 };
124
125 struct vpu_core {
126 void __iomem *base;
127 struct platform_device *pdev;
128 struct device *dev;
129 struct device *parent;
130 struct device *pd;
131 struct device_link *pd_link;
132 struct mutex lock; /* protect vpu core */
133 struct mutex cmd_lock; /* Lock vpu command */
134 struct list_head list;
135 enum vpu_core_type type;
136 int id;
137 const struct vpu_core_resources *res;
138 unsigned long instance_mask;
139 u32 supported_instance_count;
140 unsigned long hang_mask;
141 u32 request_count;
142 struct list_head instances;
143 enum vpu_core_state state;
144 u32 fw_version;
145
146 struct vpu_buffer fw;
147 struct vpu_buffer rpc;
148 struct vpu_buffer log;
149 struct vpu_buffer act;
150
151 struct vpu_mbox tx_type;
152 struct vpu_mbox tx_data;
153 struct vpu_mbox rx;
154 unsigned long cmd_seq;
155
156 wait_queue_head_t ack_wq;
157 struct completion cmp;
158 struct workqueue_struct *workqueue;
159 struct work_struct msg_work;
160 struct delayed_work msg_delayed_work;
161 struct kfifo msg_fifo;
162 void *msg_buffer;
163 unsigned int msg_buffer_size;
164
165 struct vpu_dev *vpu;
166 void *iface;
167
168 struct dentry *debugfs;
169 struct dentry *debugfs_fwlog;
170 };
171
172 enum vpu_codec_state {
173 VPU_CODEC_STATE_DEINIT = 1,
174 VPU_CODEC_STATE_CONFIGURED,
175 VPU_CODEC_STATE_START,
176 VPU_CODEC_STATE_STARTED,
177 VPU_CODEC_STATE_ACTIVE,
178 VPU_CODEC_STATE_SEEK,
179 VPU_CODEC_STATE_STOP,
180 VPU_CODEC_STATE_DRAIN,
181 VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE,
182 };
183
184 struct vpu_frame_info {
185 u32 type;
186 u32 id;
187 u32 sequence;
188 u32 luma;
189 u32 chroma_u;
190 u32 chroma_v;
191 u32 data_offset;
192 u32 flags;
193 u32 skipped;
194 s64 timestamp;
195 };
196
197 struct vpu_inst;
198 struct vpu_inst_ops {
199 int (*ctrl_init)(struct vpu_inst *inst);
200 int (*start)(struct vpu_inst *inst, u32 type);
201 int (*stop)(struct vpu_inst *inst, u32 type);
202 int (*abort)(struct vpu_inst *inst);
203 bool (*check_ready)(struct vpu_inst *inst, unsigned int type);
204 void (*buf_done)(struct vpu_inst *inst, struct vpu_frame_info *frame);
205 void (*event_notify)(struct vpu_inst *inst, u32 event, void *data);
206 void (*release)(struct vpu_inst *inst);
207 void (*cleanup)(struct vpu_inst *inst);
208 void (*mem_request)(struct vpu_inst *inst,
209 u32 enc_frame_size,
210 u32 enc_frame_num,
211 u32 ref_frame_size,
212 u32 ref_frame_num,
213 u32 act_frame_size,
214 u32 act_frame_num);
215 void (*input_done)(struct vpu_inst *inst);
216 void (*stop_done)(struct vpu_inst *inst);
217 int (*process_output)(struct vpu_inst *inst, struct vb2_buffer *vb);
218 int (*process_capture)(struct vpu_inst *inst, struct vb2_buffer *vb);
219 int (*get_one_frame)(struct vpu_inst *inst, void *info);
220 void (*on_queue_empty)(struct vpu_inst *inst, u32 type);
221 int (*get_debug_info)(struct vpu_inst *inst, char *str, u32 size, u32 i);
222 void (*wait_prepare)(struct vpu_inst *inst);
223 void (*wait_finish)(struct vpu_inst *inst);
224 };
225
226 struct vpu_inst {
227 struct list_head list;
228 struct mutex lock; /* v4l2 and videobuf2 lock */
229 struct vpu_dev *vpu;
230 struct vpu_core *core;
231 struct device *dev;
232 int id;
233
234 struct v4l2_fh fh;
235 struct v4l2_ctrl_handler ctrl_handler;
236 atomic_t ref_count;
237 int (*release)(struct vpu_inst *inst);
238
239 enum vpu_codec_state state;
240 enum vpu_core_type type;
241
242 struct workqueue_struct *workqueue;
243 struct work_struct msg_work;
244 struct kfifo msg_fifo;
245 u8 msg_buffer[VPU_MSG_BUFFER_SIZE];
246
247 struct vpu_buffer stream_buffer;
248 bool use_stream_buffer;
249 struct vpu_buffer act;
250
251 struct list_head cmd_q;
252 void *pending;
253
254 struct vpu_inst_ops *ops;
255 const struct vpu_format *formats;
256 struct vpu_format out_format;
257 struct vpu_format cap_format;
258 u32 min_buffer_cap;
259 u32 min_buffer_out;
260 u32 total_input_count;
261
262 struct v4l2_rect crop;
263 u32 colorspace;
264 u8 ycbcr_enc;
265 u8 quantization;
266 u8 xfer_func;
267 u32 sequence;
268 u32 extra_size;
269
270 u32 flows[16];
271 u32 flow_idx;
272
273 pid_t pid;
274 pid_t tgid;
275 struct dentry *debugfs;
276
277 void *priv;
278 };
279
280 #define call_vop(inst, op, args...) \
281 ((inst)->ops->op ? (inst)->ops->op(inst, ##args) : 0) \
282
283 #define call_void_vop(inst, op, args...) \
284 do { \
285 if ((inst)->ops->op) \
286 (inst)->ops->op(inst, ##args); \
287 } while (0)
288
289 enum {
290 VPU_BUF_STATE_IDLE = 0,
291 VPU_BUF_STATE_INUSE,
292 VPU_BUF_STATE_DECODED,
293 VPU_BUF_STATE_READY,
294 VPU_BUF_STATE_SKIP,
295 VPU_BUF_STATE_ERROR
296 };
297
298 struct vpu_vb2_buffer {
299 struct v4l2_m2m_buffer m2m_buf;
300 dma_addr_t luma;
301 dma_addr_t chroma_u;
302 dma_addr_t chroma_v;
303 unsigned int state;
304 u32 tag;
305 };
306
307 void vpu_writel(struct vpu_dev *vpu, u32 reg, u32 val);
308 u32 vpu_readl(struct vpu_dev *vpu, u32 reg);
309
to_vpu_vb2_buffer(struct vb2_v4l2_buffer * vbuf)310 static inline struct vpu_vb2_buffer *to_vpu_vb2_buffer(struct vb2_v4l2_buffer *vbuf)
311 {
312 struct v4l2_m2m_buffer *m2m_buf = container_of(vbuf, struct v4l2_m2m_buffer, vb);
313
314 return container_of(m2m_buf, struct vpu_vb2_buffer, m2m_buf);
315 }
316
vpu_core_type_desc(enum vpu_core_type type)317 static inline const char *vpu_core_type_desc(enum vpu_core_type type)
318 {
319 return type == VPU_CORE_TYPE_ENC ? "encoder" : "decoder";
320 }
321
to_inst(struct file * filp)322 static inline struct vpu_inst *to_inst(struct file *filp)
323 {
324 return container_of(filp->private_data, struct vpu_inst, fh);
325 }
326
327 #define ctrl_to_inst(ctrl) \
328 container_of((ctrl)->handler, struct vpu_inst, ctrl_handler)
329
330 const struct v4l2_ioctl_ops *venc_get_ioctl_ops(void);
331 const struct v4l2_file_operations *venc_get_fops(void);
332 const struct v4l2_ioctl_ops *vdec_get_ioctl_ops(void);
333 const struct v4l2_file_operations *vdec_get_fops(void);
334
335 int vpu_add_func(struct vpu_dev *vpu, struct vpu_func *func);
336 void vpu_remove_func(struct vpu_func *func);
337
338 struct vpu_inst *vpu_inst_get(struct vpu_inst *inst);
339 void vpu_inst_put(struct vpu_inst *inst);
340 struct vpu_core *vpu_request_core(struct vpu_dev *vpu, enum vpu_core_type type);
341 void vpu_release_core(struct vpu_core *core);
342 int vpu_inst_register(struct vpu_inst *inst);
343 int vpu_inst_unregister(struct vpu_inst *inst);
344 const struct vpu_core_resources *vpu_get_resource(struct vpu_inst *inst);
345
346 int vpu_inst_create_dbgfs_file(struct vpu_inst *inst);
347 int vpu_inst_remove_dbgfs_file(struct vpu_inst *inst);
348 int vpu_core_create_dbgfs_file(struct vpu_core *core);
349 int vpu_core_remove_dbgfs_file(struct vpu_core *core);
350 void vpu_inst_record_flow(struct vpu_inst *inst, u32 flow);
351
352 int vpu_core_driver_init(void);
353 void vpu_core_driver_exit(void);
354
355 extern bool debug;
356 #define vpu_trace(dev, fmt, arg...) \
357 do { \
358 if (debug) \
359 dev_info(dev, "%s: " fmt, __func__, ## arg); \
360 } while (0)
361
362 #endif
363
