1 /*
2 * MCE grading rules.
3 * Copyright 2008, 2009 Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; version 2
8 * of the License.
9 *
10 * Author: Andi Kleen
11 */
12 #include <linux/kernel.h>
13 #include <linux/seq_file.h>
14 #include <linux/init.h>
15 #include <linux/debugfs.h>
16 #include <asm/mce.h>
17 #include <linux/uaccess.h>
18
19 #include "mce-internal.h"
20
21 /*
22 * Grade an mce by severity. In general the most severe ones are processed
23 * first. Since there are quite a lot of combinations test the bits in a
24 * table-driven way. The rules are simply processed in order, first
25 * match wins.
26 *
27 * Note this is only used for machine check exceptions, the corrected
28 * errors use much simpler rules. The exceptions still check for the corrected
29 * errors, but only to leave them alone for the CMCI handler (except for
30 * panic situations)
31 */
32
33 enum context { IN_KERNEL = 1, IN_USER = 2, IN_KERNEL_RECOV = 3 };
34 enum ser { SER_REQUIRED = 1, NO_SER = 2 };
35 enum exception { EXCP_CONTEXT = 1, NO_EXCP = 2 };
36
37 static struct severity {
38 u64 mask;
39 u64 result;
40 unsigned char sev;
41 unsigned char mcgmask;
42 unsigned char mcgres;
43 unsigned char ser;
44 unsigned char context;
45 unsigned char excp;
46 unsigned char covered;
47 char *msg;
48 } severities[] = {
49 #define MCESEV(s, m, c...) { .sev = MCE_ ## s ## _SEVERITY, .msg = m, ## c }
50 #define KERNEL .context = IN_KERNEL
51 #define USER .context = IN_USER
52 #define KERNEL_RECOV .context = IN_KERNEL_RECOV
53 #define SER .ser = SER_REQUIRED
54 #define NOSER .ser = NO_SER
55 #define EXCP .excp = EXCP_CONTEXT
56 #define NOEXCP .excp = NO_EXCP
57 #define BITCLR(x) .mask = x, .result = 0
58 #define BITSET(x) .mask = x, .result = x
59 #define MCGMASK(x, y) .mcgmask = x, .mcgres = y
60 #define MASK(x, y) .mask = x, .result = y
61 #define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)
62 #define MCI_UC_AR (MCI_STATUS_UC|MCI_STATUS_AR)
63 #define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
64 #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
65
66 MCESEV(
67 NO, "Invalid",
68 BITCLR(MCI_STATUS_VAL)
69 ),
70 MCESEV(
71 NO, "Not enabled",
72 EXCP, BITCLR(MCI_STATUS_EN)
73 ),
74 MCESEV(
75 PANIC, "Processor context corrupt",
76 BITSET(MCI_STATUS_PCC)
77 ),
78 /* When MCIP is not set something is very confused */
79 MCESEV(
80 PANIC, "MCIP not set in MCA handler",
81 EXCP, MCGMASK(MCG_STATUS_MCIP, 0)
82 ),
83 /* Neither return not error IP -- no chance to recover -> PANIC */
84 MCESEV(
85 PANIC, "Neither restart nor error IP",
86 EXCP, MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, 0)
87 ),
88 MCESEV(
89 PANIC, "In kernel and no restart IP",
90 EXCP, KERNEL, MCGMASK(MCG_STATUS_RIPV, 0)
91 ),
92 MCESEV(
93 PANIC, "In kernel and no restart IP",
94 EXCP, KERNEL_RECOV, MCGMASK(MCG_STATUS_RIPV, 0)
95 ),
96 MCESEV(
97 DEFERRED, "Deferred error",
98 NOSER, MASK(MCI_STATUS_UC|MCI_STATUS_DEFERRED|MCI_STATUS_POISON, MCI_STATUS_DEFERRED)
99 ),
100 MCESEV(
101 KEEP, "Corrected error",
102 NOSER, BITCLR(MCI_STATUS_UC)
103 ),
104
105 /*
106 * known AO MCACODs reported via MCE or CMC:
107 *
108 * SRAO could be signaled either via a machine check exception or
109 * CMCI with the corresponding bit S 1 or 0. So we don't need to
110 * check bit S for SRAO.
111 */
112 MCESEV(
113 AO, "Action optional: memory scrubbing error",
114 SER, MASK(MCI_STATUS_OVER|MCI_UC_AR|MCACOD_SCRUBMSK, MCI_STATUS_UC|MCACOD_SCRUB)
115 ),
116 MCESEV(
117 AO, "Action optional: last level cache writeback error",
118 SER, MASK(MCI_STATUS_OVER|MCI_UC_AR|MCACOD, MCI_STATUS_UC|MCACOD_L3WB)
119 ),
120
121 /* ignore OVER for UCNA */
122 MCESEV(
123 UCNA, "Uncorrected no action required",
124 SER, MASK(MCI_UC_SAR, MCI_STATUS_UC)
125 ),
126 MCESEV(
127 PANIC, "Illegal combination (UCNA with AR=1)",
128 SER,
129 MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_UC|MCI_STATUS_AR)
130 ),
131 MCESEV(
132 KEEP, "Non signalled machine check",
133 SER, BITCLR(MCI_STATUS_S)
134 ),
135
136 MCESEV(
137 PANIC, "Action required with lost events",
138 SER, BITSET(MCI_STATUS_OVER|MCI_UC_SAR)
139 ),
140
141 /* known AR MCACODs: */
142 #ifdef CONFIG_MEMORY_FAILURE
143 MCESEV(
144 KEEP, "Action required but unaffected thread is continuable",
145 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),
146 MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, MCG_STATUS_RIPV)
147 ),
148 MCESEV(
149 AR, "Action required: data load in error recoverable area of kernel",
150 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
151 KERNEL_RECOV
152 ),
153 MCESEV(
154 AR, "Action required: data load error in a user process",
155 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
156 USER
157 ),
158 MCESEV(
159 AR, "Action required: instruction fetch error in a user process",
160 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
161 USER
162 ),
163 MCESEV(
164 PANIC, "Data load in unrecoverable area of kernel",
165 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
166 KERNEL
167 ),
168 #endif
169 MCESEV(
170 PANIC, "Action required: unknown MCACOD",
171 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR)
172 ),
173
174 MCESEV(
175 SOME, "Action optional: unknown MCACOD",
176 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_S)
177 ),
178 MCESEV(
179 SOME, "Action optional with lost events",
180 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_OVER|MCI_UC_S)
181 ),
182
183 MCESEV(
184 PANIC, "Overflowed uncorrected",
185 BITSET(MCI_STATUS_OVER|MCI_STATUS_UC)
186 ),
187 MCESEV(
188 UC, "Uncorrected",
189 BITSET(MCI_STATUS_UC)
190 ),
191 MCESEV(
192 SOME, "No match",
193 BITSET(0)
194 ) /* always matches. keep at end */
195 };
196
197 #define mc_recoverable(mcg) (((mcg) & (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) == \
198 (MCG_STATUS_RIPV|MCG_STATUS_EIPV))
199
200 /*
201 * If mcgstatus indicated that ip/cs on the stack were
202 * no good, then "m->cs" will be zero and we will have
203 * to assume the worst case (IN_KERNEL) as we actually
204 * have no idea what we were executing when the machine
205 * check hit.
206 * If we do have a good "m->cs" (or a faked one in the
207 * case we were executing in VM86 mode) we can use it to
208 * distinguish an exception taken in user from from one
209 * taken in the kernel.
210 */
error_context(struct mce * m)211 static int error_context(struct mce *m)
212 {
213 if ((m->cs & 3) == 3)
214 return IN_USER;
215 if (mc_recoverable(m->mcgstatus) && ex_has_fault_handler(m->ip))
216 return IN_KERNEL_RECOV;
217 return IN_KERNEL;
218 }
219
mce_severity_amd_smca(struct mce * m,enum context err_ctx)220 static int mce_severity_amd_smca(struct mce *m, enum context err_ctx)
221 {
222 u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);
223 u32 low, high;
224
225 /*
226 * We need to look at the following bits:
227 * - "succor" bit (data poisoning support), and
228 * - TCC bit (Task Context Corrupt)
229 * in MCi_STATUS to determine error severity.
230 */
231 if (!mce_flags.succor)
232 return MCE_PANIC_SEVERITY;
233
234 if (rdmsr_safe(addr, &low, &high))
235 return MCE_PANIC_SEVERITY;
236
237 /* TCC (Task context corrupt). If set and if IN_KERNEL, panic. */
238 if ((low & MCI_CONFIG_MCAX) &&
239 (m->status & MCI_STATUS_TCC) &&
240 (err_ctx == IN_KERNEL))
241 return MCE_PANIC_SEVERITY;
242
243 /* ...otherwise invoke hwpoison handler. */
244 return MCE_AR_SEVERITY;
245 }
246
247 /*
248 * See AMD Error Scope Hierarchy table in a newer BKDG. For example
249 * 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features"
250 */
mce_severity_amd(struct mce * m,int tolerant,char ** msg,bool is_excp)251 static int mce_severity_amd(struct mce *m, int tolerant, char **msg, bool is_excp)
252 {
253 enum context ctx = error_context(m);
254
255 /* Processor Context Corrupt, no need to fumble too much, die! */
256 if (m->status & MCI_STATUS_PCC)
257 return MCE_PANIC_SEVERITY;
258
259 if (m->status & MCI_STATUS_UC) {
260
261 if (ctx == IN_KERNEL)
262 return MCE_PANIC_SEVERITY;
263
264 /*
265 * On older systems where overflow_recov flag is not present, we
266 * should simply panic if an error overflow occurs. If
267 * overflow_recov flag is present and set, then software can try
268 * to at least kill process to prolong system operation.
269 */
270 if (mce_flags.overflow_recov) {
271 if (mce_flags.smca)
272 return mce_severity_amd_smca(m, ctx);
273
274 /* kill current process */
275 return MCE_AR_SEVERITY;
276 } else {
277 /* at least one error was not logged */
278 if (m->status & MCI_STATUS_OVER)
279 return MCE_PANIC_SEVERITY;
280 }
281
282 /*
283 * For any other case, return MCE_UC_SEVERITY so that we log the
284 * error and exit #MC handler.
285 */
286 return MCE_UC_SEVERITY;
287 }
288
289 /*
290 * deferred error: poll handler catches these and adds to mce_ring so
291 * memory-failure can take recovery actions.
292 */
293 if (m->status & MCI_STATUS_DEFERRED)
294 return MCE_DEFERRED_SEVERITY;
295
296 /*
297 * corrected error: poll handler catches these and passes responsibility
298 * of decoding the error to EDAC
299 */
300 return MCE_KEEP_SEVERITY;
301 }
302
mce_severity_intel(struct mce * m,int tolerant,char ** msg,bool is_excp)303 static int mce_severity_intel(struct mce *m, int tolerant, char **msg, bool is_excp)
304 {
305 enum exception excp = (is_excp ? EXCP_CONTEXT : NO_EXCP);
306 enum context ctx = error_context(m);
307 struct severity *s;
308
309 for (s = severities;; s++) {
310 if ((m->status & s->mask) != s->result)
311 continue;
312 if ((m->mcgstatus & s->mcgmask) != s->mcgres)
313 continue;
314 if (s->ser == SER_REQUIRED && !mca_cfg.ser)
315 continue;
316 if (s->ser == NO_SER && mca_cfg.ser)
317 continue;
318 if (s->context && ctx != s->context)
319 continue;
320 if (s->excp && excp != s->excp)
321 continue;
322 if (msg)
323 *msg = s->msg;
324 s->covered = 1;
325 if (s->sev >= MCE_UC_SEVERITY && ctx == IN_KERNEL) {
326 if (tolerant < 1)
327 return MCE_PANIC_SEVERITY;
328 }
329 return s->sev;
330 }
331 }
332
333 /* Default to mce_severity_intel */
334 int (*mce_severity)(struct mce *m, int tolerant, char **msg, bool is_excp) =
335 mce_severity_intel;
336
mcheck_vendor_init_severity(void)337 void __init mcheck_vendor_init_severity(void)
338 {
339 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
340 mce_severity = mce_severity_amd;
341 }
342
343 #ifdef CONFIG_DEBUG_FS
s_start(struct seq_file * f,loff_t * pos)344 static void *s_start(struct seq_file *f, loff_t *pos)
345 {
346 if (*pos >= ARRAY_SIZE(severities))
347 return NULL;
348 return &severities[*pos];
349 }
350
s_next(struct seq_file * f,void * data,loff_t * pos)351 static void *s_next(struct seq_file *f, void *data, loff_t *pos)
352 {
353 if (++(*pos) >= ARRAY_SIZE(severities))
354 return NULL;
355 return &severities[*pos];
356 }
357
s_stop(struct seq_file * f,void * data)358 static void s_stop(struct seq_file *f, void *data)
359 {
360 }
361
s_show(struct seq_file * f,void * data)362 static int s_show(struct seq_file *f, void *data)
363 {
364 struct severity *ser = data;
365 seq_printf(f, "%d\t%s\n", ser->covered, ser->msg);
366 return 0;
367 }
368
369 static const struct seq_operations severities_seq_ops = {
370 .start = s_start,
371 .next = s_next,
372 .stop = s_stop,
373 .show = s_show,
374 };
375
severities_coverage_open(struct inode * inode,struct file * file)376 static int severities_coverage_open(struct inode *inode, struct file *file)
377 {
378 return seq_open(file, &severities_seq_ops);
379 }
380
severities_coverage_write(struct file * file,const char __user * ubuf,size_t count,loff_t * ppos)381 static ssize_t severities_coverage_write(struct file *file,
382 const char __user *ubuf,
383 size_t count, loff_t *ppos)
384 {
385 int i;
386 for (i = 0; i < ARRAY_SIZE(severities); i++)
387 severities[i].covered = 0;
388 return count;
389 }
390
391 static const struct file_operations severities_coverage_fops = {
392 .open = severities_coverage_open,
393 .release = seq_release,
394 .read = seq_read,
395 .write = severities_coverage_write,
396 .llseek = seq_lseek,
397 };
398
severities_debugfs_init(void)399 static int __init severities_debugfs_init(void)
400 {
401 struct dentry *dmce, *fsev;
402
403 dmce = mce_get_debugfs_dir();
404 if (!dmce)
405 goto err_out;
406
407 fsev = debugfs_create_file("severities-coverage", 0444, dmce, NULL,
408 &severities_coverage_fops);
409 if (!fsev)
410 goto err_out;
411
412 return 0;
413
414 err_out:
415 return -ENOMEM;
416 }
417 late_initcall(severities_debugfs_init);
418 #endif /* CONFIG_DEBUG_FS */
419
