1 /*
2 * Copyright 2012-20 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dm_services.h"
27 #include "dce_calcs.h"
28 #include "reg_helper.h"
29 #include "basics/conversion.h"
30 #include "dcn32_hubp.h"
31
32 #define REG(reg)\
33 hubp2->hubp_regs->reg
34
35 #define CTX \
36 hubp2->base.ctx
37
38 #undef FN
39 #define FN(reg_name, field_name) \
40 hubp2->hubp_shift->field_name, hubp2->hubp_mask->field_name
41
hubp32_update_force_pstate_disallow(struct hubp * hubp,bool pstate_disallow)42 void hubp32_update_force_pstate_disallow(struct hubp *hubp, bool pstate_disallow)
43 {
44 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
45 REG_UPDATE_2(UCLK_PSTATE_FORCE,
46 DATA_UCLK_PSTATE_FORCE_EN, pstate_disallow,
47 DATA_UCLK_PSTATE_FORCE_VALUE, 0);
48 }
49
hubp32_update_mall_sel(struct hubp * hubp,uint32_t mall_sel,bool c_cursor)50 void hubp32_update_mall_sel(struct hubp *hubp, uint32_t mall_sel, bool c_cursor)
51 {
52 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
53
54 // Also cache cursor in MALL if using MALL for SS
55 REG_UPDATE_2(DCHUBP_MALL_CONFIG, USE_MALL_SEL, mall_sel,
56 USE_MALL_FOR_CURSOR, c_cursor);
57 }
58
hubp32_prepare_subvp_buffering(struct hubp * hubp,bool enable)59 void hubp32_prepare_subvp_buffering(struct hubp *hubp, bool enable)
60 {
61 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
62 REG_UPDATE(DCHUBP_VMPG_CONFIG, FORCE_ONE_ROW_FOR_FRAME, enable);
63
64 /* Programming guide suggests CURSOR_REQ_MODE = 1 for SubVP:
65 * For Pstate change using the MALL with sub-viewport buffering,
66 * the cursor does not use the MALL (USE_MALL_FOR_CURSOR is ignored)
67 * and sub-viewport positioning by Display FW has to avoid the cursor
68 * requests to DRAM (set CURSOR_REQ_MODE = 1 to minimize this exclusion).
69 *
70 * CURSOR_REQ_MODE = 1 begins fetching cursor data at the beginning of display prefetch.
71 * Setting this should allow the sub-viewport position to always avoid the cursor because
72 * we do not allow the sub-viewport region to overlap with display prefetch (i.e. during blank).
73 */
74 REG_UPDATE(CURSOR_CONTROL, CURSOR_REQ_MODE, enable);
75 }
76
hubp32_phantom_hubp_post_enable(struct hubp * hubp)77 void hubp32_phantom_hubp_post_enable(struct hubp *hubp)
78 {
79 uint32_t reg_val;
80 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
81
82 /* For phantom pipe enable, disable GSL */
83 REG_UPDATE(DCSURF_FLIP_CONTROL2, SURFACE_GSL_ENABLE, 0);
84 REG_UPDATE(DCHUBP_CNTL, HUBP_BLANK_EN, 1);
85 reg_val = REG_READ(DCHUBP_CNTL);
86 if (reg_val) {
87 /* init sequence workaround: in case HUBP is
88 * power gated, this wait would timeout.
89 *
90 * we just wrote reg_val to non-0, if it stay 0
91 * it means HUBP is gated
92 */
93 REG_WAIT(DCHUBP_CNTL,
94 HUBP_NO_OUTSTANDING_REQ, 1,
95 1, 200);
96 }
97 }
98
hubp32_cursor_set_attributes(struct hubp * hubp,const struct dc_cursor_attributes * attr)99 void hubp32_cursor_set_attributes(
100 struct hubp *hubp,
101 const struct dc_cursor_attributes *attr)
102 {
103 struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
104 enum cursor_pitch hw_pitch = hubp1_get_cursor_pitch(attr->pitch);
105 enum cursor_lines_per_chunk lpc = hubp2_get_lines_per_chunk(
106 attr->width, attr->color_format);
107
108 //Round cursor width up to next multiple of 64
109 uint32_t cursor_width = ((attr->width + 63) / 64) * 64;
110 uint32_t cursor_height = attr->height;
111 uint32_t cursor_size = cursor_width * cursor_height;
112
113 hubp->curs_attr = *attr;
114
115 REG_UPDATE(CURSOR_SURFACE_ADDRESS_HIGH,
116 CURSOR_SURFACE_ADDRESS_HIGH, attr->address.high_part);
117 REG_UPDATE(CURSOR_SURFACE_ADDRESS,
118 CURSOR_SURFACE_ADDRESS, attr->address.low_part);
119
120 REG_UPDATE_2(CURSOR_SIZE,
121 CURSOR_WIDTH, attr->width,
122 CURSOR_HEIGHT, attr->height);
123
124 REG_UPDATE_4(CURSOR_CONTROL,
125 CURSOR_MODE, attr->color_format,
126 CURSOR_2X_MAGNIFY, attr->attribute_flags.bits.ENABLE_MAGNIFICATION,
127 CURSOR_PITCH, hw_pitch,
128 CURSOR_LINES_PER_CHUNK, lpc);
129
130 REG_SET_2(CURSOR_SETTINGS, 0,
131 /* no shift of the cursor HDL schedule */
132 CURSOR0_DST_Y_OFFSET, 0,
133 /* used to shift the cursor chunk request deadline */
134 CURSOR0_CHUNK_HDL_ADJUST, 3);
135
136 switch (attr->color_format) {
137 case CURSOR_MODE_MONO:
138 cursor_size /= 2;
139 break;
140 case CURSOR_MODE_COLOR_1BIT_AND:
141 case CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA:
142 case CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA:
143 cursor_size *= 4;
144 break;
145
146 case CURSOR_MODE_COLOR_64BIT_FP_PRE_MULTIPLIED:
147 case CURSOR_MODE_COLOR_64BIT_FP_UN_PRE_MULTIPLIED:
148 default:
149 cursor_size *= 8;
150 break;
151 }
152
153 if (cursor_size > 16384)
154 REG_UPDATE(DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, true);
155 else
156 REG_UPDATE(DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, false);
157 }
158
159 static struct hubp_funcs dcn32_hubp_funcs = {
160 .hubp_enable_tripleBuffer = hubp2_enable_triplebuffer,
161 .hubp_is_triplebuffer_enabled = hubp2_is_triplebuffer_enabled,
162 .hubp_program_surface_flip_and_addr = hubp3_program_surface_flip_and_addr,
163 .hubp_program_surface_config = hubp3_program_surface_config,
164 .hubp_is_flip_pending = hubp2_is_flip_pending,
165 .hubp_setup = hubp3_setup,
166 .hubp_setup_interdependent = hubp2_setup_interdependent,
167 .hubp_set_vm_system_aperture_settings = hubp3_set_vm_system_aperture_settings,
168 .set_blank = hubp2_set_blank,
169 .dcc_control = hubp3_dcc_control,
170 .mem_program_viewport = min_set_viewport,
171 .set_cursor_attributes = hubp32_cursor_set_attributes,
172 .set_cursor_position = hubp2_cursor_set_position,
173 .hubp_clk_cntl = hubp2_clk_cntl,
174 .hubp_vtg_sel = hubp2_vtg_sel,
175 .dmdata_set_attributes = hubp3_dmdata_set_attributes,
176 .dmdata_load = hubp2_dmdata_load,
177 .dmdata_status_done = hubp2_dmdata_status_done,
178 .hubp_read_state = hubp3_read_state,
179 .hubp_clear_underflow = hubp2_clear_underflow,
180 .hubp_set_flip_control_surface_gsl = hubp2_set_flip_control_surface_gsl,
181 .hubp_init = hubp3_init,
182 .set_unbounded_requesting = hubp31_set_unbounded_requesting,
183 .hubp_soft_reset = hubp31_soft_reset,
184 .hubp_set_flip_int = hubp1_set_flip_int,
185 .hubp_in_blank = hubp1_in_blank,
186 .hubp_update_force_pstate_disallow = hubp32_update_force_pstate_disallow,
187 .phantom_hubp_post_enable = hubp32_phantom_hubp_post_enable,
188 .hubp_update_mall_sel = hubp32_update_mall_sel,
189 .hubp_prepare_subvp_buffering = hubp32_prepare_subvp_buffering
190 };
191
hubp32_construct(struct dcn20_hubp * hubp2,struct dc_context * ctx,uint32_t inst,const struct dcn_hubp2_registers * hubp_regs,const struct dcn_hubp2_shift * hubp_shift,const struct dcn_hubp2_mask * hubp_mask)192 bool hubp32_construct(
193 struct dcn20_hubp *hubp2,
194 struct dc_context *ctx,
195 uint32_t inst,
196 const struct dcn_hubp2_registers *hubp_regs,
197 const struct dcn_hubp2_shift *hubp_shift,
198 const struct dcn_hubp2_mask *hubp_mask)
199 {
200 hubp2->base.funcs = &dcn32_hubp_funcs;
201 hubp2->base.ctx = ctx;
202 hubp2->hubp_regs = hubp_regs;
203 hubp2->hubp_shift = hubp_shift;
204 hubp2->hubp_mask = hubp_mask;
205 hubp2->base.inst = inst;
206 hubp2->base.opp_id = OPP_ID_INVALID;
207 hubp2->base.mpcc_id = 0xf;
208
209 return true;
210 }
211
