1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
4 * Author: James.Qian.Wang <james.qian.wang@arm.com>
5 *
6 */
7 #include <linux/clk.h>
8 #include <linux/pm_runtime.h>
9 #include <linux/spinlock.h>
10
11 #include <drm/drm_atomic.h>
12 #include <drm/drm_atomic_helper.h>
13 #include <drm/drm_crtc_helper.h>
14 #include <drm/drm_plane_helper.h>
15 #include <drm/drm_print.h>
16 #include <drm/drm_vblank.h>
17
18 #include "komeda_dev.h"
19 #include "komeda_kms.h"
20
komeda_crtc_update_clock_ratio(struct komeda_crtc_state * kcrtc_st)21 static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st)
22 {
23 u64 pxlclk, aclk;
24
25 if (!kcrtc_st->base.active) {
26 kcrtc_st->clock_ratio = 0;
27 return;
28 }
29
30 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL;
31 aclk = komeda_crtc_get_aclk(kcrtc_st);
32
33 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk);
34 }
35
36 /**
37 * komeda_crtc_atomic_check - build display output data flow
38 * @crtc: DRM crtc
39 * @state: the crtc state object
40 *
41 * crtc_atomic_check is the final check stage, so beside build a display data
42 * pipeline according to the crtc_state, but still needs to release or disable
43 * the unclaimed pipeline resources.
44 *
45 * RETURNS:
46 * Zero for success or -errno
47 */
48 static int
komeda_crtc_atomic_check(struct drm_crtc * crtc,struct drm_crtc_state * state)49 komeda_crtc_atomic_check(struct drm_crtc *crtc,
50 struct drm_crtc_state *state)
51 {
52 struct komeda_crtc *kcrtc = to_kcrtc(crtc);
53 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(state);
54 int err;
55
56 if (drm_atomic_crtc_needs_modeset(state))
57 komeda_crtc_update_clock_ratio(kcrtc_st);
58
59 if (state->active) {
60 err = komeda_build_display_data_flow(kcrtc, kcrtc_st);
61 if (err)
62 return err;
63 }
64
65 /* release unclaimed pipeline resources */
66 err = komeda_release_unclaimed_resources(kcrtc->slave, kcrtc_st);
67 if (err)
68 return err;
69
70 err = komeda_release_unclaimed_resources(kcrtc->master, kcrtc_st);
71 if (err)
72 return err;
73
74 return 0;
75 }
76
77 /* For active a crtc, mainly need two parts of preparation
78 * 1. adjust display operation mode.
79 * 2. enable needed clk
80 */
81 static int
komeda_crtc_prepare(struct komeda_crtc * kcrtc)82 komeda_crtc_prepare(struct komeda_crtc *kcrtc)
83 {
84 struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
85 struct komeda_pipeline *master = kcrtc->master;
86 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(kcrtc->base.state);
87 struct drm_display_mode *mode = &kcrtc_st->base.adjusted_mode;
88 u32 new_mode;
89 int err;
90
91 mutex_lock(&mdev->lock);
92
93 new_mode = mdev->dpmode | BIT(master->id);
94 if (WARN_ON(new_mode == mdev->dpmode)) {
95 err = 0;
96 goto unlock;
97 }
98
99 err = mdev->funcs->change_opmode(mdev, new_mode);
100 if (err) {
101 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,",
102 mdev->dpmode, new_mode);
103 goto unlock;
104 }
105
106 mdev->dpmode = new_mode;
107 /* Only need to enable aclk on single display mode, but no need to
108 * enable aclk it on dual display mode, since the dual mode always
109 * switch from single display mode, the aclk already enabled, no need
110 * to enable it again.
111 */
112 if (new_mode != KOMEDA_MODE_DUAL_DISP) {
113 err = clk_set_rate(mdev->aclk, komeda_crtc_get_aclk(kcrtc_st));
114 if (err)
115 DRM_ERROR("failed to set aclk.\n");
116 err = clk_prepare_enable(mdev->aclk);
117 if (err)
118 DRM_ERROR("failed to enable aclk.\n");
119 }
120
121 err = clk_set_rate(master->pxlclk, mode->crtc_clock * 1000);
122 if (err)
123 DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id);
124 err = clk_prepare_enable(master->pxlclk);
125 if (err)
126 DRM_ERROR("failed to enable pxl clk for pipe%d.\n", master->id);
127
128 unlock:
129 mutex_unlock(&mdev->lock);
130
131 return err;
132 }
133
134 static int
komeda_crtc_unprepare(struct komeda_crtc * kcrtc)135 komeda_crtc_unprepare(struct komeda_crtc *kcrtc)
136 {
137 struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
138 struct komeda_pipeline *master = kcrtc->master;
139 u32 new_mode;
140 int err;
141
142 mutex_lock(&mdev->lock);
143
144 new_mode = mdev->dpmode & (~BIT(master->id));
145
146 if (WARN_ON(new_mode == mdev->dpmode)) {
147 err = 0;
148 goto unlock;
149 }
150
151 err = mdev->funcs->change_opmode(mdev, new_mode);
152 if (err) {
153 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,",
154 mdev->dpmode, new_mode);
155 goto unlock;
156 }
157
158 mdev->dpmode = new_mode;
159
160 clk_disable_unprepare(master->pxlclk);
161 if (new_mode == KOMEDA_MODE_INACTIVE)
162 clk_disable_unprepare(mdev->aclk);
163
164 unlock:
165 mutex_unlock(&mdev->lock);
166
167 return err;
168 }
169
komeda_crtc_handle_event(struct komeda_crtc * kcrtc,struct komeda_events * evts)170 void komeda_crtc_handle_event(struct komeda_crtc *kcrtc,
171 struct komeda_events *evts)
172 {
173 struct drm_crtc *crtc = &kcrtc->base;
174 u32 events = evts->pipes[kcrtc->master->id];
175
176 if (events & KOMEDA_EVENT_VSYNC)
177 drm_crtc_handle_vblank(crtc);
178
179 if (events & KOMEDA_EVENT_EOW) {
180 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn;
181
182 if (wb_conn)
183 drm_writeback_signal_completion(&wb_conn->base, 0);
184 else
185 DRM_WARN("CRTC[%d]: EOW happen but no wb_connector.\n",
186 drm_crtc_index(&kcrtc->base));
187 }
188 /* will handle it together with the write back support */
189 if (events & KOMEDA_EVENT_EOW)
190 DRM_DEBUG("EOW.\n");
191
192 if (events & KOMEDA_EVENT_FLIP) {
193 unsigned long flags;
194 struct drm_pending_vblank_event *event;
195
196 spin_lock_irqsave(&crtc->dev->event_lock, flags);
197 if (kcrtc->disable_done) {
198 complete_all(kcrtc->disable_done);
199 kcrtc->disable_done = NULL;
200 } else if (crtc->state->event) {
201 event = crtc->state->event;
202 /*
203 * Consume event before notifying drm core that flip
204 * happened.
205 */
206 crtc->state->event = NULL;
207 drm_crtc_send_vblank_event(crtc, event);
208 } else {
209 DRM_WARN("CRTC[%d]: FLIP happen but no pending commit.\n",
210 drm_crtc_index(&kcrtc->base));
211 }
212 spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
213 }
214 }
215
216 static void
komeda_crtc_do_flush(struct drm_crtc * crtc,struct drm_crtc_state * old)217 komeda_crtc_do_flush(struct drm_crtc *crtc,
218 struct drm_crtc_state *old)
219 {
220 struct komeda_crtc *kcrtc = to_kcrtc(crtc);
221 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc->state);
222 struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
223 struct komeda_pipeline *master = kcrtc->master;
224 struct komeda_pipeline *slave = kcrtc->slave;
225 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn;
226 struct drm_connector_state *conn_st;
227
228 DRM_DEBUG_ATOMIC("CRTC%d_FLUSH: active_pipes: 0x%x, affected: 0x%x.\n",
229 drm_crtc_index(crtc),
230 kcrtc_st->active_pipes, kcrtc_st->affected_pipes);
231
232 /* step 1: update the pipeline/component state to HW */
233 if (has_bit(master->id, kcrtc_st->affected_pipes))
234 komeda_pipeline_update(master, old->state);
235
236 if (slave && has_bit(slave->id, kcrtc_st->affected_pipes))
237 komeda_pipeline_update(slave, old->state);
238
239 conn_st = wb_conn ? wb_conn->base.base.state : NULL;
240 if (conn_st && conn_st->writeback_job)
241 drm_writeback_queue_job(&wb_conn->base, conn_st);
242
243 /* step 2: notify the HW to kickoff the update */
244 mdev->funcs->flush(mdev, master->id, kcrtc_st->active_pipes);
245 }
246
247 static void
komeda_crtc_atomic_enable(struct drm_crtc * crtc,struct drm_crtc_state * old)248 komeda_crtc_atomic_enable(struct drm_crtc *crtc,
249 struct drm_crtc_state *old)
250 {
251 komeda_crtc_prepare(to_kcrtc(crtc));
252 drm_crtc_vblank_on(crtc);
253 komeda_crtc_do_flush(crtc, old);
254 }
255
256 static void
komeda_crtc_atomic_disable(struct drm_crtc * crtc,struct drm_crtc_state * old)257 komeda_crtc_atomic_disable(struct drm_crtc *crtc,
258 struct drm_crtc_state *old)
259 {
260 struct komeda_crtc *kcrtc = to_kcrtc(crtc);
261 struct komeda_crtc_state *old_st = to_kcrtc_st(old);
262 struct komeda_dev *mdev = crtc->dev->dev_private;
263 struct komeda_pipeline *master = kcrtc->master;
264 struct komeda_pipeline *slave = kcrtc->slave;
265 struct completion *disable_done = &crtc->state->commit->flip_done;
266 struct completion temp;
267 int timeout;
268
269 DRM_DEBUG_ATOMIC("CRTC%d_DISABLE: active_pipes: 0x%x, affected: 0x%x.\n",
270 drm_crtc_index(crtc),
271 old_st->active_pipes, old_st->affected_pipes);
272
273 if (slave && has_bit(slave->id, old_st->active_pipes))
274 komeda_pipeline_disable(slave, old->state);
275
276 if (has_bit(master->id, old_st->active_pipes))
277 komeda_pipeline_disable(master, old->state);
278
279 /* crtc_disable has two scenarios according to the state->active switch.
280 * 1. active -> inactive
281 * this commit is a disable commit. and the commit will be finished
282 * or done after the disable operation. on this case we can directly
283 * use the crtc->state->event to tracking the HW disable operation.
284 * 2. active -> active
285 * the crtc->commit is not for disable, but a modeset operation when
286 * crtc is active, such commit actually has been completed by 3
287 * DRM operations:
288 * crtc_disable, update_planes(crtc_flush), crtc_enable
289 * so on this case the crtc->commit is for the whole process.
290 * we can not use it for tracing the disable, we need a temporary
291 * flip_done for tracing the disable. and crtc->state->event for
292 * the crtc_enable operation.
293 * That's also the reason why skip modeset commit in
294 * komeda_crtc_atomic_flush()
295 */
296 if (crtc->state->active) {
297 struct komeda_pipeline_state *pipe_st;
298 /* clear the old active_comps to zero */
299 pipe_st = komeda_pipeline_get_old_state(master, old->state);
300 pipe_st->active_comps = 0;
301
302 init_completion(&temp);
303 kcrtc->disable_done = &temp;
304 disable_done = &temp;
305 }
306
307 mdev->funcs->flush(mdev, master->id, 0);
308
309 /* wait the disable take affect.*/
310 timeout = wait_for_completion_timeout(disable_done, HZ);
311 if (timeout == 0) {
312 DRM_ERROR("disable pipeline%d timeout.\n", kcrtc->master->id);
313 if (crtc->state->active) {
314 unsigned long flags;
315
316 spin_lock_irqsave(&crtc->dev->event_lock, flags);
317 kcrtc->disable_done = NULL;
318 spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
319 }
320 }
321
322 drm_crtc_vblank_off(crtc);
323 komeda_crtc_unprepare(kcrtc);
324 }
325
326 static void
komeda_crtc_atomic_flush(struct drm_crtc * crtc,struct drm_crtc_state * old)327 komeda_crtc_atomic_flush(struct drm_crtc *crtc,
328 struct drm_crtc_state *old)
329 {
330 /* commit with modeset will be handled in enable/disable */
331 if (drm_atomic_crtc_needs_modeset(crtc->state))
332 return;
333
334 komeda_crtc_do_flush(crtc, old);
335 }
336
337 /* Returns the minimum frequency of the aclk rate (main engine clock) in Hz */
338 static unsigned long
komeda_calc_min_aclk_rate(struct komeda_crtc * kcrtc,unsigned long pxlclk)339 komeda_calc_min_aclk_rate(struct komeda_crtc *kcrtc,
340 unsigned long pxlclk)
341 {
342 /* Once dual-link one display pipeline drives two display outputs,
343 * the aclk needs run on the double rate of pxlclk
344 */
345 if (kcrtc->master->dual_link)
346 return pxlclk * 2;
347 else
348 return pxlclk;
349 }
350
351 /* Get current aclk rate that specified by state */
komeda_crtc_get_aclk(struct komeda_crtc_state * kcrtc_st)352 unsigned long komeda_crtc_get_aclk(struct komeda_crtc_state *kcrtc_st)
353 {
354 struct drm_crtc *crtc = kcrtc_st->base.crtc;
355 struct komeda_dev *mdev = crtc->dev->dev_private;
356 unsigned long pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000;
357 unsigned long min_aclk;
358
359 min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), pxlclk);
360
361 return clk_round_rate(mdev->aclk, min_aclk);
362 }
363
364 static enum drm_mode_status
komeda_crtc_mode_valid(struct drm_crtc * crtc,const struct drm_display_mode * m)365 komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)
366 {
367 struct komeda_dev *mdev = crtc->dev->dev_private;
368 struct komeda_crtc *kcrtc = to_kcrtc(crtc);
369 struct komeda_pipeline *master = kcrtc->master;
370 unsigned long min_pxlclk, min_aclk;
371
372 if (m->flags & DRM_MODE_FLAG_INTERLACE)
373 return MODE_NO_INTERLACE;
374
375 min_pxlclk = m->clock * 1000;
376 if (master->dual_link)
377 min_pxlclk /= 2;
378
379 if (min_pxlclk != clk_round_rate(master->pxlclk, min_pxlclk)) {
380 DRM_DEBUG_ATOMIC("pxlclk doesn't support %lu Hz\n", min_pxlclk);
381
382 return MODE_NOCLOCK;
383 }
384
385 min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), min_pxlclk);
386 if (clk_round_rate(mdev->aclk, min_aclk) < min_aclk) {
387 DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %lu.\n",
388 m->name, min_pxlclk);
389
390 return MODE_CLOCK_HIGH;
391 }
392
393 return MODE_OK;
394 }
395
komeda_crtc_mode_fixup(struct drm_crtc * crtc,const struct drm_display_mode * m,struct drm_display_mode * adjusted_mode)396 static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc,
397 const struct drm_display_mode *m,
398 struct drm_display_mode *adjusted_mode)
399 {
400 struct komeda_crtc *kcrtc = to_kcrtc(crtc);
401 unsigned long clk_rate;
402
403 drm_mode_set_crtcinfo(adjusted_mode, 0);
404 /* In dual link half the horizontal settings */
405 if (kcrtc->master->dual_link) {
406 adjusted_mode->crtc_clock /= 2;
407 adjusted_mode->crtc_hdisplay /= 2;
408 adjusted_mode->crtc_hsync_start /= 2;
409 adjusted_mode->crtc_hsync_end /= 2;
410 adjusted_mode->crtc_htotal /= 2;
411 }
412
413 clk_rate = adjusted_mode->crtc_clock * 1000;
414 /* crtc_clock will be used as the komeda output pixel clock */
415 adjusted_mode->crtc_clock = clk_round_rate(kcrtc->master->pxlclk,
416 clk_rate) / 1000;
417
418 return true;
419 }
420
421 static const struct drm_crtc_helper_funcs komeda_crtc_helper_funcs = {
422 .atomic_check = komeda_crtc_atomic_check,
423 .atomic_flush = komeda_crtc_atomic_flush,
424 .atomic_enable = komeda_crtc_atomic_enable,
425 .atomic_disable = komeda_crtc_atomic_disable,
426 .mode_valid = komeda_crtc_mode_valid,
427 .mode_fixup = komeda_crtc_mode_fixup,
428 };
429
komeda_crtc_reset(struct drm_crtc * crtc)430 static void komeda_crtc_reset(struct drm_crtc *crtc)
431 {
432 struct komeda_crtc_state *state;
433
434 if (crtc->state)
435 __drm_atomic_helper_crtc_destroy_state(crtc->state);
436
437 kfree(to_kcrtc_st(crtc->state));
438 crtc->state = NULL;
439
440 state = kzalloc(sizeof(*state), GFP_KERNEL);
441 if (state) {
442 crtc->state = &state->base;
443 crtc->state->crtc = crtc;
444 }
445 }
446
447 static struct drm_crtc_state *
komeda_crtc_atomic_duplicate_state(struct drm_crtc * crtc)448 komeda_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
449 {
450 struct komeda_crtc_state *old = to_kcrtc_st(crtc->state);
451 struct komeda_crtc_state *new;
452
453 new = kzalloc(sizeof(*new), GFP_KERNEL);
454 if (!new)
455 return NULL;
456
457 __drm_atomic_helper_crtc_duplicate_state(crtc, &new->base);
458
459 new->affected_pipes = old->active_pipes;
460 new->clock_ratio = old->clock_ratio;
461 new->max_slave_zorder = old->max_slave_zorder;
462
463 return &new->base;
464 }
465
komeda_crtc_atomic_destroy_state(struct drm_crtc * crtc,struct drm_crtc_state * state)466 static void komeda_crtc_atomic_destroy_state(struct drm_crtc *crtc,
467 struct drm_crtc_state *state)
468 {
469 __drm_atomic_helper_crtc_destroy_state(state);
470 kfree(to_kcrtc_st(state));
471 }
472
komeda_crtc_vblank_enable(struct drm_crtc * crtc)473 static int komeda_crtc_vblank_enable(struct drm_crtc *crtc)
474 {
475 struct komeda_dev *mdev = crtc->dev->dev_private;
476 struct komeda_crtc *kcrtc = to_kcrtc(crtc);
477
478 mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, true);
479 return 0;
480 }
481
komeda_crtc_vblank_disable(struct drm_crtc * crtc)482 static void komeda_crtc_vblank_disable(struct drm_crtc *crtc)
483 {
484 struct komeda_dev *mdev = crtc->dev->dev_private;
485 struct komeda_crtc *kcrtc = to_kcrtc(crtc);
486
487 mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, false);
488 }
489
490 static const struct drm_crtc_funcs komeda_crtc_funcs = {
491 .gamma_set = drm_atomic_helper_legacy_gamma_set,
492 .destroy = drm_crtc_cleanup,
493 .set_config = drm_atomic_helper_set_config,
494 .page_flip = drm_atomic_helper_page_flip,
495 .reset = komeda_crtc_reset,
496 .atomic_duplicate_state = komeda_crtc_atomic_duplicate_state,
497 .atomic_destroy_state = komeda_crtc_atomic_destroy_state,
498 .enable_vblank = komeda_crtc_vblank_enable,
499 .disable_vblank = komeda_crtc_vblank_disable,
500 };
501
komeda_kms_setup_crtcs(struct komeda_kms_dev * kms,struct komeda_dev * mdev)502 int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms,
503 struct komeda_dev *mdev)
504 {
505 struct komeda_crtc *crtc;
506 struct komeda_pipeline *master;
507 char str[16];
508 int i;
509
510 kms->n_crtcs = 0;
511
512 for (i = 0; i < mdev->n_pipelines; i++) {
513 crtc = &kms->crtcs[kms->n_crtcs];
514 master = mdev->pipelines[i];
515
516 crtc->master = master;
517 crtc->slave = komeda_pipeline_get_slave(master);
518
519 if (crtc->slave)
520 sprintf(str, "pipe-%d", crtc->slave->id);
521 else
522 sprintf(str, "None");
523
524 DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s).\n",
525 kms->n_crtcs, master->id, str);
526
527 kms->n_crtcs++;
528 }
529
530 return 0;
531 }
532
533 static struct drm_plane *
get_crtc_primary(struct komeda_kms_dev * kms,struct komeda_crtc * crtc)534 get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc)
535 {
536 struct komeda_plane *kplane;
537 struct drm_plane *plane;
538
539 drm_for_each_plane(plane, &kms->base) {
540 if (plane->type != DRM_PLANE_TYPE_PRIMARY)
541 continue;
542
543 kplane = to_kplane(plane);
544 /* only master can be primary */
545 if (kplane->layer->base.pipeline == crtc->master)
546 return plane;
547 }
548
549 return NULL;
550 }
551
komeda_crtc_add(struct komeda_kms_dev * kms,struct komeda_crtc * kcrtc)552 static int komeda_crtc_add(struct komeda_kms_dev *kms,
553 struct komeda_crtc *kcrtc)
554 {
555 struct drm_crtc *crtc = &kcrtc->base;
556 int err;
557
558 err = drm_crtc_init_with_planes(&kms->base, crtc,
559 get_crtc_primary(kms, kcrtc), NULL,
560 &komeda_crtc_funcs, NULL);
561 if (err)
562 return err;
563
564 drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs);
565 drm_crtc_vblank_reset(crtc);
566
567 crtc->port = kcrtc->master->of_output_port;
568
569 return err;
570 }
571
komeda_kms_add_crtcs(struct komeda_kms_dev * kms,struct komeda_dev * mdev)572 int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev)
573 {
574 int i, err;
575
576 for (i = 0; i < kms->n_crtcs; i++) {
577 err = komeda_crtc_add(kms, &kms->crtcs[i]);
578 if (err)
579 return err;
580 }
581
582 return 0;
583 }
584
