1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 Intel Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * The full GNU General Public License is included in this distribution
23 * in the file called COPYING.
24 *
25 * Contact Information:
26 * Intel Linux Wireless <linuxwifi@intel.com>
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 Intel Corporation
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *
63 *****************************************************************************/
64 #include <linux/firmware.h>
65 #include <linux/rtnetlink.h>
66 #include "iwl-trans.h"
67 #include "iwl-csr.h"
68 #include "mvm.h"
69 #include "iwl-eeprom-parse.h"
70 #include "iwl-eeprom-read.h"
71 #include "iwl-nvm-parse.h"
72 #include "iwl-prph.h"
73 #include "fw/acpi.h"
74
75 /* Default NVM size to read */
76 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
77
78 #define NVM_WRITE_OPCODE 1
79 #define NVM_READ_OPCODE 0
80
81 /* load nvm chunk response */
82 enum {
83 READ_NVM_CHUNK_SUCCEED = 0,
84 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
85 };
86
87 /*
88 * prepare the NVM host command w/ the pointers to the nvm buffer
89 * and send it to fw
90 */
iwl_nvm_write_chunk(struct iwl_mvm * mvm,u16 section,u16 offset,u16 length,const u8 * data)91 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
92 u16 offset, u16 length, const u8 *data)
93 {
94 struct iwl_nvm_access_cmd nvm_access_cmd = {
95 .offset = cpu_to_le16(offset),
96 .length = cpu_to_le16(length),
97 .type = cpu_to_le16(section),
98 .op_code = NVM_WRITE_OPCODE,
99 };
100 struct iwl_host_cmd cmd = {
101 .id = NVM_ACCESS_CMD,
102 .len = { sizeof(struct iwl_nvm_access_cmd), length },
103 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
104 .data = { &nvm_access_cmd, data },
105 /* data may come from vmalloc, so use _DUP */
106 .dataflags = { 0, IWL_HCMD_DFL_DUP },
107 };
108 struct iwl_rx_packet *pkt;
109 struct iwl_nvm_access_resp *nvm_resp;
110 int ret;
111
112 ret = iwl_mvm_send_cmd(mvm, &cmd);
113 if (ret)
114 return ret;
115
116 pkt = cmd.resp_pkt;
117 /* Extract & check NVM write response */
118 nvm_resp = (void *)pkt->data;
119 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
120 IWL_ERR(mvm,
121 "NVM access write command failed for section %u (status = 0x%x)\n",
122 section, le16_to_cpu(nvm_resp->status));
123 ret = -EIO;
124 }
125
126 iwl_free_resp(&cmd);
127 return ret;
128 }
129
iwl_nvm_read_chunk(struct iwl_mvm * mvm,u16 section,u16 offset,u16 length,u8 * data)130 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
131 u16 offset, u16 length, u8 *data)
132 {
133 struct iwl_nvm_access_cmd nvm_access_cmd = {
134 .offset = cpu_to_le16(offset),
135 .length = cpu_to_le16(length),
136 .type = cpu_to_le16(section),
137 .op_code = NVM_READ_OPCODE,
138 };
139 struct iwl_nvm_access_resp *nvm_resp;
140 struct iwl_rx_packet *pkt;
141 struct iwl_host_cmd cmd = {
142 .id = NVM_ACCESS_CMD,
143 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
144 .data = { &nvm_access_cmd, },
145 };
146 int ret, bytes_read, offset_read;
147 u8 *resp_data;
148
149 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
150
151 ret = iwl_mvm_send_cmd(mvm, &cmd);
152 if (ret)
153 return ret;
154
155 pkt = cmd.resp_pkt;
156
157 /* Extract NVM response */
158 nvm_resp = (void *)pkt->data;
159 ret = le16_to_cpu(nvm_resp->status);
160 bytes_read = le16_to_cpu(nvm_resp->length);
161 offset_read = le16_to_cpu(nvm_resp->offset);
162 resp_data = nvm_resp->data;
163 if (ret) {
164 if ((offset != 0) &&
165 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
166 /*
167 * meaning of NOT_VALID_ADDRESS:
168 * driver try to read chunk from address that is
169 * multiple of 2K and got an error since addr is empty.
170 * meaning of (offset != 0): driver already
171 * read valid data from another chunk so this case
172 * is not an error.
173 */
174 IWL_DEBUG_EEPROM(mvm->trans->dev,
175 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
176 offset);
177 ret = 0;
178 } else {
179 IWL_DEBUG_EEPROM(mvm->trans->dev,
180 "NVM access command failed with status %d (device: %s)\n",
181 ret, mvm->cfg->name);
182 ret = -ENODATA;
183 }
184 goto exit;
185 }
186
187 if (offset_read != offset) {
188 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
189 offset_read);
190 ret = -EINVAL;
191 goto exit;
192 }
193
194 /* Write data to NVM */
195 memcpy(data + offset, resp_data, bytes_read);
196 ret = bytes_read;
197
198 exit:
199 iwl_free_resp(&cmd);
200 return ret;
201 }
202
iwl_nvm_write_section(struct iwl_mvm * mvm,u16 section,const u8 * data,u16 length)203 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
204 const u8 *data, u16 length)
205 {
206 int offset = 0;
207
208 /* copy data in chunks of 2k (and remainder if any) */
209
210 while (offset < length) {
211 int chunk_size, ret;
212
213 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
214 length - offset);
215
216 ret = iwl_nvm_write_chunk(mvm, section, offset,
217 chunk_size, data + offset);
218 if (ret < 0)
219 return ret;
220
221 offset += chunk_size;
222 }
223
224 return 0;
225 }
226
227 /*
228 * Reads an NVM section completely.
229 * NICs prior to 7000 family doesn't have a real NVM, but just read
230 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
231 * by uCode, we need to manually check in this case that we don't
232 * overflow and try to read more than the EEPROM size.
233 * For 7000 family NICs, we supply the maximal size we can read, and
234 * the uCode fills the response with as much data as we can,
235 * without overflowing, so no check is needed.
236 */
iwl_nvm_read_section(struct iwl_mvm * mvm,u16 section,u8 * data,u32 size_read)237 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
238 u8 *data, u32 size_read)
239 {
240 u16 length, offset = 0;
241 int ret;
242
243 /* Set nvm section read length */
244 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
245
246 ret = length;
247
248 /* Read the NVM until exhausted (reading less than requested) */
249 while (ret == length) {
250 /* Check no memory assumptions fail and cause an overflow */
251 if ((size_read + offset + length) >
252 mvm->trans->trans_cfg->base_params->eeprom_size) {
253 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
254 return -ENOBUFS;
255 }
256
257 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
258 if (ret < 0) {
259 IWL_DEBUG_EEPROM(mvm->trans->dev,
260 "Cannot read NVM from section %d offset %d, length %d\n",
261 section, offset, length);
262 return ret;
263 }
264 offset += ret;
265 }
266
267 iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset);
268
269 IWL_DEBUG_EEPROM(mvm->trans->dev,
270 "NVM section %d read completed\n", section);
271 return offset;
272 }
273
274 static struct iwl_nvm_data *
iwl_parse_nvm_sections(struct iwl_mvm * mvm)275 iwl_parse_nvm_sections(struct iwl_mvm *mvm)
276 {
277 struct iwl_nvm_section *sections = mvm->nvm_sections;
278 const __be16 *hw;
279 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
280 bool lar_enabled;
281 int regulatory_type;
282
283 /* Checking for required sections */
284 if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
285 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
286 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
287 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
288 return NULL;
289 }
290 } else {
291 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
292 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
293 else
294 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
295
296 /* SW and REGULATORY sections are mandatory */
297 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
298 !mvm->nvm_sections[regulatory_type].data) {
299 IWL_ERR(mvm,
300 "Can't parse empty family 8000 OTP/NVM sections\n");
301 return NULL;
302 }
303 /* MAC_OVERRIDE or at least HW section must exist */
304 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
305 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
306 IWL_ERR(mvm,
307 "Can't parse mac_address, empty sections\n");
308 return NULL;
309 }
310
311 /* PHY_SKU section is mandatory in B0 */
312 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
313 IWL_ERR(mvm,
314 "Can't parse phy_sku in B0, empty sections\n");
315 return NULL;
316 }
317 }
318
319 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
320 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
321 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
322 mac_override =
323 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
324 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
325
326 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
327 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
328 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
329
330 lar_enabled = !iwlwifi_mod_params.lar_disable &&
331 fw_has_capa(&mvm->fw->ucode_capa,
332 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
333
334 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib,
335 regulatory, mac_override, phy_sku,
336 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
337 lar_enabled);
338 }
339
340 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */
iwl_mvm_load_nvm_to_nic(struct iwl_mvm * mvm)341 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
342 {
343 int i, ret = 0;
344 struct iwl_nvm_section *sections = mvm->nvm_sections;
345
346 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
347
348 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
349 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
350 continue;
351 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
352 sections[i].length);
353 if (ret < 0) {
354 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
355 break;
356 }
357 }
358 return ret;
359 }
360
iwl_nvm_init(struct iwl_mvm * mvm)361 int iwl_nvm_init(struct iwl_mvm *mvm)
362 {
363 int ret, section;
364 u32 size_read = 0;
365 u8 *nvm_buffer, *temp;
366 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
367
368 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
369 return -EINVAL;
370
371 /* load NVM values from nic */
372 /* Read From FW NVM */
373 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
374
375 nvm_buffer = kmalloc(mvm->trans->trans_cfg->base_params->eeprom_size,
376 GFP_KERNEL);
377 if (!nvm_buffer)
378 return -ENOMEM;
379 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
380 /* we override the constness for initial read */
381 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
382 size_read);
383 if (ret == -ENODATA) {
384 ret = 0;
385 continue;
386 }
387 if (ret < 0)
388 break;
389 size_read += ret;
390 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
391 if (!temp) {
392 ret = -ENOMEM;
393 break;
394 }
395
396 iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret);
397
398 mvm->nvm_sections[section].data = temp;
399 mvm->nvm_sections[section].length = ret;
400
401 #ifdef CONFIG_IWLWIFI_DEBUGFS
402 switch (section) {
403 case NVM_SECTION_TYPE_SW:
404 mvm->nvm_sw_blob.data = temp;
405 mvm->nvm_sw_blob.size = ret;
406 break;
407 case NVM_SECTION_TYPE_CALIBRATION:
408 mvm->nvm_calib_blob.data = temp;
409 mvm->nvm_calib_blob.size = ret;
410 break;
411 case NVM_SECTION_TYPE_PRODUCTION:
412 mvm->nvm_prod_blob.data = temp;
413 mvm->nvm_prod_blob.size = ret;
414 break;
415 case NVM_SECTION_TYPE_PHY_SKU:
416 mvm->nvm_phy_sku_blob.data = temp;
417 mvm->nvm_phy_sku_blob.size = ret;
418 break;
419 case NVM_SECTION_TYPE_REGULATORY_SDP:
420 case NVM_SECTION_TYPE_REGULATORY:
421 mvm->nvm_reg_blob.data = temp;
422 mvm->nvm_reg_blob.size = ret;
423 break;
424 default:
425 if (section == mvm->cfg->nvm_hw_section_num) {
426 mvm->nvm_hw_blob.data = temp;
427 mvm->nvm_hw_blob.size = ret;
428 break;
429 }
430 }
431 #endif
432 }
433 if (!size_read)
434 IWL_ERR(mvm, "OTP is blank\n");
435 kfree(nvm_buffer);
436
437 /* Only if PNVM selected in the mod param - load external NVM */
438 if (mvm->nvm_file_name) {
439 /* read External NVM file from the mod param */
440 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
441 mvm->nvm_sections);
442 if (ret) {
443 mvm->nvm_file_name = nvm_file_C;
444
445 if ((ret == -EFAULT || ret == -ENOENT) &&
446 mvm->nvm_file_name) {
447 /* in case nvm file was failed try again */
448 ret = iwl_read_external_nvm(mvm->trans,
449 mvm->nvm_file_name,
450 mvm->nvm_sections);
451 if (ret)
452 return ret;
453 } else {
454 return ret;
455 }
456 }
457 }
458
459 /* parse the relevant nvm sections */
460 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
461 if (!mvm->nvm_data)
462 return -ENODATA;
463 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
464 mvm->nvm_data->nvm_version);
465
466 return ret < 0 ? ret : 0;
467 }
468
469 struct iwl_mcc_update_resp *
iwl_mvm_update_mcc(struct iwl_mvm * mvm,const char * alpha2,enum iwl_mcc_source src_id)470 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
471 enum iwl_mcc_source src_id)
472 {
473 struct iwl_mcc_update_cmd mcc_update_cmd = {
474 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
475 .source_id = (u8)src_id,
476 };
477 struct iwl_mcc_update_resp *resp_cp;
478 struct iwl_rx_packet *pkt;
479 struct iwl_host_cmd cmd = {
480 .id = MCC_UPDATE_CMD,
481 .flags = CMD_WANT_SKB,
482 .data = { &mcc_update_cmd },
483 };
484
485 int ret;
486 u32 status;
487 int resp_len, n_channels;
488 u16 mcc;
489
490 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
491 return ERR_PTR(-EOPNOTSUPP);
492
493 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
494
495 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
496 alpha2[0], alpha2[1], src_id);
497
498 ret = iwl_mvm_send_cmd(mvm, &cmd);
499 if (ret)
500 return ERR_PTR(ret);
501
502 pkt = cmd.resp_pkt;
503
504 /* Extract MCC response */
505 if (fw_has_capa(&mvm->fw->ucode_capa,
506 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
507 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
508
509 n_channels = __le32_to_cpu(mcc_resp->n_channels);
510 resp_len = sizeof(struct iwl_mcc_update_resp) +
511 n_channels * sizeof(__le32);
512 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
513 if (!resp_cp) {
514 resp_cp = ERR_PTR(-ENOMEM);
515 goto exit;
516 }
517 } else {
518 struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
519
520 n_channels = __le32_to_cpu(mcc_resp_v3->n_channels);
521 resp_len = sizeof(struct iwl_mcc_update_resp) +
522 n_channels * sizeof(__le32);
523 resp_cp = kzalloc(resp_len, GFP_KERNEL);
524 if (!resp_cp) {
525 resp_cp = ERR_PTR(-ENOMEM);
526 goto exit;
527 }
528
529 resp_cp->status = mcc_resp_v3->status;
530 resp_cp->mcc = mcc_resp_v3->mcc;
531 resp_cp->cap = cpu_to_le16(mcc_resp_v3->cap);
532 resp_cp->source_id = mcc_resp_v3->source_id;
533 resp_cp->time = mcc_resp_v3->time;
534 resp_cp->geo_info = mcc_resp_v3->geo_info;
535 resp_cp->n_channels = mcc_resp_v3->n_channels;
536 memcpy(resp_cp->channels, mcc_resp_v3->channels,
537 n_channels * sizeof(__le32));
538 }
539
540 status = le32_to_cpu(resp_cp->status);
541
542 mcc = le16_to_cpu(resp_cp->mcc);
543
544 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
545 if (mcc == 0) {
546 mcc = 0x3030; /* "00" - world */
547 resp_cp->mcc = cpu_to_le16(mcc);
548 }
549
550 IWL_DEBUG_LAR(mvm,
551 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
552 status, mcc, mcc >> 8, mcc & 0xff, n_channels);
553
554 exit:
555 iwl_free_resp(&cmd);
556 return resp_cp;
557 }
558
iwl_mvm_init_mcc(struct iwl_mvm * mvm)559 int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
560 {
561 bool tlv_lar;
562 bool nvm_lar;
563 int retval;
564 struct ieee80211_regdomain *regd;
565 char mcc[3];
566
567 if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
568 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
569 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
570 nvm_lar = mvm->nvm_data->lar_enabled;
571 if (tlv_lar != nvm_lar)
572 IWL_INFO(mvm,
573 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
574 tlv_lar ? "enabled" : "disabled",
575 nvm_lar ? "enabled" : "disabled");
576 }
577
578 if (!iwl_mvm_is_lar_supported(mvm))
579 return 0;
580
581 /*
582 * try to replay the last set MCC to FW. If it doesn't exist,
583 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
584 */
585 retval = iwl_mvm_init_fw_regd(mvm);
586 if (retval != -ENOENT)
587 return retval;
588
589 /*
590 * Driver regulatory hint for initial update, this also informs the
591 * firmware we support wifi location updates.
592 * Disallow scans that might crash the FW while the LAR regdomain
593 * is not set.
594 */
595 mvm->lar_regdom_set = false;
596
597 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
598 if (IS_ERR_OR_NULL(regd))
599 return -EIO;
600
601 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
602 !iwl_acpi_get_mcc(mvm->dev, mcc)) {
603 kfree(regd);
604 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
605 MCC_SOURCE_BIOS, NULL);
606 if (IS_ERR_OR_NULL(regd))
607 return -EIO;
608 }
609
610 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
611 kfree(regd);
612 return retval;
613 }
614
iwl_mvm_rx_chub_update_mcc(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)615 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
616 struct iwl_rx_cmd_buffer *rxb)
617 {
618 struct iwl_rx_packet *pkt = rxb_addr(rxb);
619 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
620 enum iwl_mcc_source src;
621 char mcc[3];
622 struct ieee80211_regdomain *regd;
623 int wgds_tbl_idx;
624
625 lockdep_assert_held(&mvm->mutex);
626
627 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
628 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
629 return;
630 }
631
632 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
633 return;
634
635 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
636 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
637 mcc[2] = '\0';
638 src = notif->source_id;
639
640 IWL_DEBUG_LAR(mvm,
641 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
642 mcc, src);
643 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
644 if (IS_ERR_OR_NULL(regd))
645 return;
646
647 wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
648 if (wgds_tbl_idx < 0)
649 IWL_DEBUG_INFO(mvm, "SAR WGDS is disabled (%d)\n",
650 wgds_tbl_idx);
651 else
652 IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
653 wgds_tbl_idx);
654
655 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
656 kfree(regd);
657 }
658
